dev: Delete the authors list from files in src/dev.
[gem5.git] / src / dev / x86 / i82094aa.hh
1 /*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __DEV_X86_I82094AA_HH__
30 #define __DEV_X86_I82094AA_HH__
31
32 #include <map>
33
34 #include "base/bitunion.hh"
35 #include "dev/x86/intdev.hh"
36 #include "dev/intpin.hh"
37 #include "dev/io_device.hh"
38 #include "params/I82094AA.hh"
39
40 namespace X86ISA
41 {
42
43 class I8259;
44 class Interrupts;
45
46 class I82094AA : public BasicPioDevice
47 {
48 public:
49 BitUnion64(RedirTableEntry)
50 Bitfield<63, 32> topDW;
51 Bitfield<55, 32> topReserved;
52 Bitfield<31, 0> bottomDW;
53 Bitfield<31, 17> bottomReserved;
54 Bitfield<63, 56> dest;
55 Bitfield<16> mask;
56 Bitfield<15> trigger;
57 Bitfield<14> remoteIRR;
58 Bitfield<13> polarity;
59 Bitfield<12> deliveryStatus;
60 Bitfield<11> destMode;
61 Bitfield<10, 8> deliveryMode;
62 Bitfield<7, 0> vector;
63 EndBitUnion(RedirTableEntry)
64
65 protected:
66 I8259 * extIntPic;
67
68 uint8_t regSel;
69 uint8_t initialApicId;
70 uint8_t id;
71 uint8_t arbId;
72
73 uint64_t lowestPriorityOffset;
74
75 static const uint8_t TableSize = 24;
76 // This implementation is based on version 0x11, but 0x14 avoids having
77 // to deal with the arbitration and APIC bus guck.
78 static const uint8_t APICVersion = 0x14;
79
80 RedirTableEntry redirTable[TableSize];
81 bool pinStates[TableSize];
82
83 std::vector<IntSinkPin<I82094AA> *> inputs;
84
85 IntMasterPort<I82094AA> intMasterPort;
86
87 public:
88 typedef I82094AAParams Params;
89
90 const Params *
91 params() const
92 {
93 return dynamic_cast<const Params *>(_params);
94 }
95
96 I82094AA(Params *p);
97
98 void init() override;
99
100 Tick read(PacketPtr pkt) override;
101 Tick write(PacketPtr pkt) override;
102
103 void writeReg(uint8_t offset, uint32_t value);
104 uint32_t readReg(uint8_t offset);
105
106 Port &getPort(const std::string &if_name,
107 PortID idx=InvalidPortID) override;
108
109 bool recvResponse(PacketPtr pkt);
110
111 void signalInterrupt(int line);
112 void raiseInterruptPin(int number);
113 void lowerInterruptPin(int number);
114
115 void serialize(CheckpointOut &cp) const override;
116 void unserialize(CheckpointIn &cp) override;
117 };
118
119 } // namespace X86ISA
120
121 #endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__