85f9ef8f6fadebc531aa4f09975732041d559525
[gem5.git] / src / dev / x86 / i8259.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #ifndef __DEV_X86_I8259_HH__
30 #define __DEV_X86_I8259_HH__
31
32 #include "dev/intpin.hh"
33 #include "dev/io_device.hh"
34 #include "enums/X86I8259CascadeMode.hh"
35 #include "params/I8259.hh"
36
37 namespace X86ISA
38 {
39
40 class I8259 : public BasicPioDevice
41 {
42 protected:
43 static const int NumLines = 8;
44 bool pinStates[NumLines];
45
46 void init() override;
47
48 Tick latency;
49 std::vector<IntSourcePin<I8259> *> output;
50 std::vector<IntSinkPin<I8259> *> inputs;
51 Enums::X86I8259CascadeMode mode;
52 I8259 * slave;
53
54 // Interrupt Request Register
55 uint8_t IRR;
56 // In Service Register
57 uint8_t ISR;
58 // Interrupt Mask Register
59 uint8_t IMR;
60
61 // The higher order bits of the vector to return
62 uint8_t vectorOffset;
63
64 bool cascadeMode;
65 // A bit vector of lines with slaves attached, or the slave id, depending
66 // on if this is a master or slave PIC.
67 uint8_t cascadeBits;
68
69 bool edgeTriggered;
70 bool readIRR;
71
72 // State machine information for reading in initialization control words.
73 bool expectICW4;
74 int initControlWord;
75
76 // Whether or not the PIC is in auto EOI mode.
77 bool autoEOI;
78
79 void requestInterrupt(int line);
80 void handleEOI(int line);
81
82 public:
83 typedef I8259Params Params;
84
85 const Params *
86 params() const
87 {
88 return dynamic_cast<const Params *>(_params);
89 }
90
91 I8259(Params * p);
92
93 Port &
94 getPort(const std::string &if_name, PortID idx=InvalidPortID) override
95 {
96 if (if_name == "inputs")
97 return *inputs.at(idx);
98 else if (if_name == "output")
99 return *output.at(idx);
100 else
101 return BasicPioDevice::getPort(if_name, idx);
102 }
103
104 Tick read(PacketPtr pkt) override;
105 Tick write(PacketPtr pkt) override;
106
107 void
108 maskAll()
109 {
110 IMR = 0xFF;
111 }
112
113 void
114 unmaskAll()
115 {
116 IMR = 0x00;
117 }
118
119 void signalInterrupt(int line);
120 void raiseInterruptPin(int number);
121 void lowerInterruptPin(int number);
122 int getVector();
123
124 void serialize(CheckpointOut &cp) const override;
125 void unserialize(CheckpointIn &cp) override;
126 };
127
128 } // namespace X86ISA
129
130 #endif //__DEV_X86_I8259_HH__