mem-cache: Add multiple eviction stats
[gem5.git] / src / dev / x86 / i8259.hh
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __DEV_X86_I8259_HH__
32 #define __DEV_X86_I8259_HH__
33
34 #include "dev/intpin.hh"
35 #include "dev/io_device.hh"
36 #include "enums/X86I8259CascadeMode.hh"
37 #include "params/I8259.hh"
38
39 namespace X86ISA
40 {
41
42 class I8259 : public BasicPioDevice
43 {
44 protected:
45 static const int NumLines = 8;
46 bool pinStates[NumLines];
47
48 void init() override;
49
50 Tick latency;
51 std::vector<IntSourcePin<I8259> *> output;
52 std::vector<IntSinkPin<I8259> *> inputs;
53 Enums::X86I8259CascadeMode mode;
54 I8259 * slave;
55
56 // Interrupt Request Register
57 uint8_t IRR;
58 // In Service Register
59 uint8_t ISR;
60 // Interrupt Mask Register
61 uint8_t IMR;
62
63 // The higher order bits of the vector to return
64 uint8_t vectorOffset;
65
66 bool cascadeMode;
67 // A bit vector of lines with slaves attached, or the slave id, depending
68 // on if this is a master or slave PIC.
69 uint8_t cascadeBits;
70
71 bool edgeTriggered;
72 bool readIRR;
73
74 // State machine information for reading in initialization control words.
75 bool expectICW4;
76 int initControlWord;
77
78 // Whether or not the PIC is in auto EOI mode.
79 bool autoEOI;
80
81 void requestInterrupt(int line);
82 void handleEOI(int line);
83
84 public:
85 typedef I8259Params Params;
86
87 const Params *
88 params() const
89 {
90 return dynamic_cast<const Params *>(_params);
91 }
92
93 I8259(Params * p);
94
95 Port &
96 getPort(const std::string &if_name, PortID idx=InvalidPortID) override
97 {
98 if (if_name == "inputs")
99 return *inputs.at(idx);
100 else if (if_name == "output")
101 return *output.at(idx);
102 else
103 return BasicPioDevice::getPort(if_name, idx);
104 }
105
106 Tick read(PacketPtr pkt) override;
107 Tick write(PacketPtr pkt) override;
108
109 void
110 maskAll()
111 {
112 IMR = 0xFF;
113 }
114
115 void
116 unmaskAll()
117 {
118 IMR = 0x00;
119 }
120
121 void signalInterrupt(int line);
122 void raiseInterruptPin(int number);
123 void lowerInterruptPin(int number);
124 int getVector();
125
126 void serialize(CheckpointOut &cp) const override;
127 void unserialize(CheckpointIn &cp) override;
128 };
129
130 } // namespace X86ISA
131
132 #endif //__DEV_X86_I8259_HH__