src/dev/x86/pc.cc

   1 /*
   2  * Copyright (c) 2008 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 /** @file
  32  * Implementation of PC platform.
  33  */
  34
  35 #include <deque>
  36 #include <string>
  37 #include <vector>
  38
  39 #include "arch/x86/intmessage.hh"
  40 #include "arch/x86/x86_traits.hh"
  41 #include "cpu/intr_control.hh"
  42 #include "dev/terminal.hh"
  43 #include "dev/x86/i82094aa.hh"
  44 #include "dev/x86/i8254.hh"
  45 #include "dev/x86/pc.hh"
  46 #include "dev/x86/south_bridge.hh"
  47 #include "sim/system.hh"
  48
  49 using namespace std;
  50 using namespace TheISA;
  51
  52 Pc::Pc(const Params *p)
  53     : Platform(p), system(p->system)
  54 {
  55     southBridge = NULL;
  56     // set the back pointer from the system to myself
  57     system->platform = this;
  58 }
  59
  60 void
  61 Pc::init()
  62 {
  63     assert(southBridge);
  64
  65     /*
  66      * Initialize the timer.
  67      */
  68     I8254 & timer = *southBridge->pit;
  69     //Timer 0, mode 2, no bcd, 16 bit count
  70     timer.writeControl(0x34);
  71     //Timer 0, latch command
  72     timer.writeControl(0x00);
  73     //Write a 16 bit count of 0
  74     timer.writeCounter(0, 0);
  75     timer.writeCounter(0, 0);
  76
  77     /*
  78      * Initialize the I/O APIC.
  79      */
  80     I82094AA & ioApic = *southBridge->ioApic;
  81     I82094AA::RedirTableEntry entry = 0;
  82     entry.deliveryMode = DeliveryMode::ExtInt;
  83     entry.vector = 0x20;
  84     ioApic.writeReg(0x10, entry.bottomDW);
  85     ioApic.writeReg(0x11, entry.topDW);
  86 }
  87
  88 Tick
  89 Pc::intrFrequency()
  90 {
  91     panic("Need implementation\n");
  92     M5_DUMMY_RETURN
  93 }
  94
  95 void
  96 Pc::postConsoleInt()
  97 {
  98     warn_once("Don't know what interrupt to post for console.\n");
  99     //panic("Need implementation\n");
 100 }
 101
 102 void
 103 Pc::clearConsoleInt()
 104 {
 105     warn_once("Don't know what interrupt to clear for console.\n");
 106     //panic("Need implementation\n");
 107 }
 108
 109 void
 110 Pc::postPciInt(int line)
 111 {
 112     panic("Need implementation\n");
 113 }
 114
 115 void
 116 Pc::clearPciInt(int line)
 117 {
 118     panic("Need implementation\n");
 119 }
 120
 121 Addr
 122 Pc::pciToDma(Addr pciAddr) const
 123 {
 124     panic("Need implementation\n");
 125     M5_DUMMY_RETURN
 126 }
 127
 128
 129 Addr
 130 Pc::calcConfigAddr(int bus, int dev, int func)
 131 {
 132     assert(func < 8);
 133     assert(dev < 32);
 134     assert(bus == 0);
 135     return (PhysAddrPrefixPciConfig | (func << 8) | (dev << 11));
 136 }
 137
 138 Pc *
 139 PcParams::create()
 140 {
 141     return new Pc(this);
 142 }