Automated merge with ssh://daystrom.m5sim.org//repo/m5
[gem5.git] / src / dev / x86 / pc.cc
1 /*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 /** @file
32 * Implementation of PC platform.
33 */
34
35 #include <deque>
36 #include <string>
37 #include <vector>
38
39 #include "arch/x86/x86_traits.hh"
40 #include "cpu/intr_control.hh"
41 #include "dev/simconsole.hh"
42 #include "dev/x86/pc.hh"
43 #include "sim/system.hh"
44
45 using namespace std;
46 using namespace TheISA;
47
48 PC::PC(const Params *p)
49 : Platform(p), system(p->system)
50 {
51 // set the back pointer from the system to myself
52 system->platform = this;
53 }
54
55 Tick
56 PC::intrFrequency()
57 {
58 panic("Need implementation\n");
59 M5_DUMMY_RETURN
60 }
61
62 void
63 PC::postConsoleInt()
64 {
65 warn_once("Don't know what interrupt to post for console.\n");
66 //panic("Need implementation\n");
67 }
68
69 void
70 PC::clearConsoleInt()
71 {
72 warn_once("Don't know what interrupt to clear for console.\n");
73 //panic("Need implementation\n");
74 }
75
76 void
77 PC::postPciInt(int line)
78 {
79 panic("Need implementation\n");
80 }
81
82 void
83 PC::clearPciInt(int line)
84 {
85 panic("Need implementation\n");
86 }
87
88 Addr
89 PC::pciToDma(Addr pciAddr) const
90 {
91 panic("Need implementation\n");
92 M5_DUMMY_RETURN
93 }
94
95
96 Addr
97 PC::calcConfigAddr(int bus, int dev, int func)
98 {
99 assert(func < 8);
100 assert(dev < 32);
101 assert(bus == 0);
102 return (PhysAddrPrefixPciConfig | (func << 8) | (dev << 11));
103 }
104
105 PC *
106 PCParams::create()
107 {
108 return new PC(this);
109 }