46e213474072ef1f9d2fecc41d6cb127ea4067bf
[mesa.git] / src / freedreno / computerator / ir3_asm.c
1 /*
2 * Copyright © 2020 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "ir3/ir3_compiler.h"
25
26 #include "ir3_asm.h"
27 #include "ir3_parser.h"
28
29 struct ir3_kernel *
30 ir3_asm_assemble(struct ir3_compiler *c, FILE *in)
31 {
32 struct ir3_kernel *kernel = calloc(1, sizeof(*kernel));
33
34 struct ir3_shader *shader = calloc(1, sizeof(*shader));
35 shader->compiler = c;
36 shader->type = MESA_SHADER_COMPUTE;
37
38 struct ir3_shader_variant *v = calloc(1, sizeof(*v));
39 v->type = MESA_SHADER_COMPUTE;
40 v->shader = shader;
41
42 kernel->v = v;
43
44 kernel->info.numwg = INVALID_REG;
45
46 v->ir = ir3_parse(v, &kernel->info, in);
47 if (!v->ir)
48 errx(-1, "parse failed");
49
50 ir3_debug_print(v->ir, "AFTER PARSING");
51
52 memcpy(kernel->base.local_size, kernel->info.local_size, sizeof(kernel->base.local_size));
53 kernel->base.num_bufs = kernel->info.num_bufs;
54 memcpy(kernel->base.buf_sizes, kernel->info.buf_sizes, sizeof(kernel->base.buf_sizes));
55
56 kernel->bin = ir3_shader_assemble(v, c->gpu_id);
57
58 unsigned sz = v->info.sizedwords * 4;
59
60 v->bo = fd_bo_new(c->dev, sz,
61 DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
62 DRM_FREEDRENO_GEM_TYPE_KMEM,
63 "%s", ir3_shader_stage(v));
64
65 memcpy(fd_bo_map(v->bo), kernel->bin, sz);
66
67 return kernel;
68 }
69
70 void
71 ir3_asm_disassemble(struct ir3_kernel *k, FILE *out)
72 {
73 ir3_shader_disasm(k->v, k->bin, out);
74 }