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freedreno/ir3: fix printing half constant registers.
[mesa.git] / src / freedreno / ir3 / disasm-a3xx.c
1 /*
2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include <stdint.h>
27 #include <stdbool.h>
28 #include <string.h>
29 #include <assert.h>
30
31 #include <util/u_debug.h>
32
33 #include "instr-a3xx.h"
34
35 /* bitmask of debug flags */
36 enum debug_t {
37 PRINT_RAW = 0x1, /* dump raw hexdump */
38 PRINT_VERBOSE = 0x2,
39 EXPAND_REPEAT = 0x4,
40 };
41
42 static enum debug_t debug;
43
44 #define printf debug_printf
45
46 static const char *levels[] = {
47 "",
48 "\t",
49 "\t\t",
50 "\t\t\t",
51 "\t\t\t\t",
52 "\t\t\t\t\t",
53 "\t\t\t\t\t\t",
54 "\t\t\t\t\t\t\t",
55 "\t\t\t\t\t\t\t\t",
56 "\t\t\t\t\t\t\t\t\t",
57 "x",
58 "x",
59 "x",
60 "x",
61 "x",
62 "x",
63 };
64
65 static const char *component = "xyzw";
66
67 static const char *type[] = {
68 [TYPE_F16] = "f16",
69 [TYPE_F32] = "f32",
70 [TYPE_U16] = "u16",
71 [TYPE_U32] = "u32",
72 [TYPE_S16] = "s16",
73 [TYPE_S32] = "s32",
74 [TYPE_U8] = "u8",
75 [TYPE_S8] = "s8",
76 };
77
78 struct disasm_ctx {
79 FILE *out;
80 int level;
81 unsigned gpu_id;
82
83 /* current instruction repeat flag: */
84 unsigned repeat;
85 /* current instruction repeat indx/offset (for --expand): */
86 unsigned repeatidx;
87 };
88
89 static void print_reg(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
90 bool c, bool im, bool neg, bool abs, bool addr_rel)
91 {
92 const char type = c ? 'c' : 'r';
93
94 // XXX I prefer - and || for neg/abs, but preserving format used
95 // by libllvm-a3xx for easy diffing..
96
97 if (abs && neg)
98 fprintf(ctx->out, "(absneg)");
99 else if (neg)
100 fprintf(ctx->out, "(neg)");
101 else if (abs)
102 fprintf(ctx->out, "(abs)");
103
104 if (r)
105 fprintf(ctx->out, "(r)");
106
107 if (im) {
108 fprintf(ctx->out, "%d", reg.iim_val);
109 } else if (addr_rel) {
110 /* I would just use %+d but trying to make it diff'able with
111 * libllvm-a3xx...
112 */
113 if (reg.iim_val < 0)
114 fprintf(ctx->out, "%s%c<a0.x - %d>", full ? "" : "h", type, -reg.iim_val);
115 else if (reg.iim_val > 0)
116 fprintf(ctx->out, "%s%c<a0.x + %d>", full ? "" : "h", type, reg.iim_val);
117 else
118 fprintf(ctx->out, "%s%c<a0.x>", full ? "" : "h", type);
119 } else if ((reg.num == REG_A0) && !c) {
120 fprintf(ctx->out, "a0.%c", component[reg.comp]);
121 } else if ((reg.num == REG_P0) && !c) {
122 fprintf(ctx->out, "p0.%c", component[reg.comp]);
123 } else {
124 fprintf(ctx->out, "%s%c%d.%c", full ? "" : "h", type, reg.num, component[reg.comp]);
125 }
126 }
127
128 static unsigned regidx(reg_t reg)
129 {
130 return (4 * reg.num) + reg.comp;
131 }
132
133 static reg_t idxreg(unsigned idx)
134 {
135 return (reg_t){
136 .comp = idx & 0x3,
137 .num = idx >> 2,
138 };
139 }
140
141 static void print_reg_dst(struct disasm_ctx *ctx, reg_t reg, bool full, bool addr_rel)
142 {
143 reg = idxreg(regidx(reg) + ctx->repeatidx);
144 print_reg(ctx, reg, full, false, false, false, false, false, addr_rel);
145 }
146
147 static void print_reg_src(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
148 bool c, bool im, bool neg, bool abs, bool addr_rel)
149 {
150 if (r)
151 reg = idxreg(regidx(reg) + ctx->repeatidx);
152
153 print_reg(ctx, reg, full, r, c, im, neg, abs, addr_rel);
154 }
155
156 /* TODO switch to using reginfo struct everywhere, since more readable
157 * than passing a bunch of bools to print_reg_src
158 */
159
160 struct reginfo {
161 reg_t reg;
162 bool full;
163 bool r;
164 bool c;
165 bool im;
166 bool neg;
167 bool abs;
168 bool addr_rel;
169 };
170
171 static void print_src(struct disasm_ctx *ctx, struct reginfo *info)
172 {
173 print_reg_src(ctx, info->reg, info->full, info->r, info->c, info->im,
174 info->neg, info->abs, info->addr_rel);
175 }
176
177 //static void print_dst(struct disasm_ctx *ctx, struct reginfo *info)
178 //{
179 // print_reg_dst(ctx, info->reg, info->full, info->addr_rel);
180 //}
181
182 static void print_instr_cat0(struct disasm_ctx *ctx, instr_t *instr)
183 {
184 instr_cat0_t *cat0 = &instr->cat0;
185
186 switch (cat0->opc) {
187 case OPC_KILL:
188 case OPC_IF:
189 fprintf(ctx->out, " %sp0.%c", cat0->inv ? "!" : "",
190 component[cat0->comp]);
191 break;
192 case OPC_BR:
193 fprintf(ctx->out, " %sp0.%c, #%d", cat0->inv ? "!" : "",
194 component[cat0->comp], cat0->a3xx.immed);
195 break;
196 case OPC_JUMP:
197 case OPC_CALL:
198 fprintf(ctx->out, " #%d", cat0->a3xx.immed);
199 break;
200 }
201
202 if ((debug & PRINT_VERBOSE) && (cat0->dummy2|cat0->dummy3|cat0->dummy4))
203 fprintf(ctx->out, "\t{0: %x,%x,%x}", cat0->dummy2, cat0->dummy3, cat0->dummy4);
204 }
205
206 static void print_instr_cat1(struct disasm_ctx *ctx, instr_t *instr)
207 {
208 instr_cat1_t *cat1 = &instr->cat1;
209
210 if (cat1->ul)
211 fprintf(ctx->out, "(ul)");
212
213 if (cat1->src_type == cat1->dst_type) {
214 if ((cat1->src_type == TYPE_S16) && (((reg_t)cat1->dst).num == REG_A0)) {
215 /* special case (nmemonic?): */
216 fprintf(ctx->out, "mova");
217 } else {
218 fprintf(ctx->out, "mov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
219 }
220 } else {
221 fprintf(ctx->out, "cov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
222 }
223
224 fprintf(ctx->out, " ");
225
226 if (cat1->even)
227 fprintf(ctx->out, "(even)");
228
229 if (cat1->pos_inf)
230 fprintf(ctx->out, "(pos_infinity)");
231
232 print_reg_dst(ctx, (reg_t)(cat1->dst), type_size(cat1->dst_type) == 32,
233 cat1->dst_rel);
234
235 fprintf(ctx->out, ", ");
236
237 /* ugg, have to special case this.. vs print_reg().. */
238 if (cat1->src_im) {
239 if (type_float(cat1->src_type))
240 fprintf(ctx->out, "(%f)", cat1->fim_val);
241 else if (type_uint(cat1->src_type))
242 fprintf(ctx->out, "0x%08x", cat1->uim_val);
243 else
244 fprintf(ctx->out, "%d", cat1->iim_val);
245 } else if (cat1->src_rel && !cat1->src_c) {
246 /* I would just use %+d but trying to make it diff'able with
247 * libllvm-a3xx...
248 */
249 char type = cat1->src_rel_c ? 'c' : 'r';
250 const char *full = (type_size(cat1->src_type) == 32) ? "" : "h";
251 if (cat1->off < 0)
252 fprintf(ctx->out, "%s%c<a0.x - %d>", full, type, -cat1->off);
253 else if (cat1->off > 0)
254 fprintf(ctx->out, "%s%c<a0.x + %d>", full, type, cat1->off);
255 else
256 fprintf(ctx->out, "%s%c<a0.x>", full, type);
257 } else {
258 print_reg_src(ctx, (reg_t)(cat1->src), type_size(cat1->src_type) == 32,
259 cat1->src_r, cat1->src_c, cat1->src_im, false, false, false);
260 }
261
262 if ((debug & PRINT_VERBOSE) && (cat1->must_be_0))
263 fprintf(ctx->out, "\t{1: %x}", cat1->must_be_0);
264 }
265
266 static void print_instr_cat2(struct disasm_ctx *ctx, instr_t *instr)
267 {
268 instr_cat2_t *cat2 = &instr->cat2;
269 static const char *cond[] = {
270 "lt",
271 "le",
272 "gt",
273 "ge",
274 "eq",
275 "ne",
276 "?6?",
277 };
278
279 switch (_OPC(2, cat2->opc)) {
280 case OPC_CMPS_F:
281 case OPC_CMPS_U:
282 case OPC_CMPS_S:
283 case OPC_CMPV_F:
284 case OPC_CMPV_U:
285 case OPC_CMPV_S:
286 fprintf(ctx->out, ".%s", cond[cat2->cond]);
287 break;
288 }
289
290 fprintf(ctx->out, " ");
291 if (cat2->ei)
292 fprintf(ctx->out, "(ei)");
293 print_reg_dst(ctx, (reg_t)(cat2->dst), cat2->full ^ cat2->dst_half, false);
294 fprintf(ctx->out, ", ");
295
296 unsigned src1_r = cat2->repeat ? cat2->src1_r : 0;
297 if (cat2->c1.src1_c) {
298 print_reg_src(ctx, (reg_t)(cat2->c1.src1), cat2->full, src1_r,
299 cat2->c1.src1_c, cat2->src1_im, cat2->src1_neg,
300 cat2->src1_abs, false);
301 } else if (cat2->rel1.src1_rel) {
302 print_reg_src(ctx, (reg_t)(cat2->rel1.src1), cat2->full, src1_r,
303 cat2->rel1.src1_c, cat2->src1_im, cat2->src1_neg,
304 cat2->src1_abs, cat2->rel1.src1_rel);
305 } else {
306 print_reg_src(ctx, (reg_t)(cat2->src1), cat2->full, src1_r,
307 false, cat2->src1_im, cat2->src1_neg,
308 cat2->src1_abs, false);
309 }
310
311 unsigned src2_r = cat2->repeat ? cat2->src2_r : 0;
312 switch (_OPC(2, cat2->opc)) {
313 case OPC_ABSNEG_F:
314 case OPC_ABSNEG_S:
315 case OPC_CLZ_B:
316 case OPC_CLZ_S:
317 case OPC_SIGN_F:
318 case OPC_FLOOR_F:
319 case OPC_CEIL_F:
320 case OPC_RNDNE_F:
321 case OPC_RNDAZ_F:
322 case OPC_TRUNC_F:
323 case OPC_NOT_B:
324 case OPC_BFREV_B:
325 case OPC_SETRM:
326 case OPC_CBITS_B:
327 /* these only have one src reg */
328 break;
329 default:
330 fprintf(ctx->out, ", ");
331 if (cat2->c2.src2_c) {
332 print_reg_src(ctx, (reg_t)(cat2->c2.src2), cat2->full, src2_r,
333 cat2->c2.src2_c, cat2->src2_im, cat2->src2_neg,
334 cat2->src2_abs, false);
335 } else if (cat2->rel2.src2_rel) {
336 print_reg_src(ctx, (reg_t)(cat2->rel2.src2), cat2->full, src2_r,
337 cat2->rel2.src2_c, cat2->src2_im, cat2->src2_neg,
338 cat2->src2_abs, cat2->rel2.src2_rel);
339 } else {
340 print_reg_src(ctx, (reg_t)(cat2->src2), cat2->full, src2_r,
341 false, cat2->src2_im, cat2->src2_neg,
342 cat2->src2_abs, false);
343 }
344 break;
345 }
346 }
347
348 static void print_instr_cat3(struct disasm_ctx *ctx, instr_t *instr)
349 {
350 instr_cat3_t *cat3 = &instr->cat3;
351 bool full = instr_cat3_full(cat3);
352
353 fprintf(ctx->out, " ");
354 print_reg_dst(ctx, (reg_t)(cat3->dst), full ^ cat3->dst_half, false);
355 fprintf(ctx->out, ", ");
356 unsigned src1_r = cat3->repeat ? cat3->src1_r : 0;
357 if (cat3->c1.src1_c) {
358 print_reg_src(ctx, (reg_t)(cat3->c1.src1), full,
359 src1_r, cat3->c1.src1_c, false, cat3->src1_neg,
360 false, false);
361 } else if (cat3->rel1.src1_rel) {
362 print_reg_src(ctx, (reg_t)(cat3->rel1.src1), full,
363 src1_r, cat3->rel1.src1_c, false, cat3->src1_neg,
364 false, cat3->rel1.src1_rel);
365 } else {
366 print_reg_src(ctx, (reg_t)(cat3->src1), full,
367 src1_r, false, false, cat3->src1_neg,
368 false, false);
369 }
370 fprintf(ctx->out, ", ");
371 unsigned src2_r = cat3->repeat ? cat3->src2_r : 0;
372 print_reg_src(ctx, (reg_t)cat3->src2, full,
373 src2_r, cat3->src2_c, false, cat3->src2_neg,
374 false, false);
375 fprintf(ctx->out, ", ");
376 if (cat3->c2.src3_c) {
377 print_reg_src(ctx, (reg_t)(cat3->c2.src3), full,
378 cat3->src3_r, cat3->c2.src3_c, false, cat3->src3_neg,
379 false, false);
380 } else if (cat3->rel2.src3_rel) {
381 print_reg_src(ctx, (reg_t)(cat3->rel2.src3), full,
382 cat3->src3_r, cat3->rel2.src3_c, false, cat3->src3_neg,
383 false, cat3->rel2.src3_rel);
384 } else {
385 print_reg_src(ctx, (reg_t)(cat3->src3), full,
386 cat3->src3_r, false, false, cat3->src3_neg,
387 false, false);
388 }
389 }
390
391 static void print_instr_cat4(struct disasm_ctx *ctx, instr_t *instr)
392 {
393 instr_cat4_t *cat4 = &instr->cat4;
394
395 fprintf(ctx->out, " ");
396 print_reg_dst(ctx, (reg_t)(cat4->dst), cat4->full ^ cat4->dst_half, false);
397 fprintf(ctx->out, ", ");
398
399 if (cat4->c.src_c) {
400 print_reg_src(ctx, (reg_t)(cat4->c.src), cat4->full,
401 cat4->src_r, cat4->c.src_c, cat4->src_im,
402 cat4->src_neg, cat4->src_abs, false);
403 } else if (cat4->rel.src_rel) {
404 print_reg_src(ctx, (reg_t)(cat4->rel.src), cat4->full,
405 cat4->src_r, cat4->rel.src_c, cat4->src_im,
406 cat4->src_neg, cat4->src_abs, cat4->rel.src_rel);
407 } else {
408 print_reg_src(ctx, (reg_t)(cat4->src), cat4->full,
409 cat4->src_r, false, cat4->src_im,
410 cat4->src_neg, cat4->src_abs, false);
411 }
412
413 if ((debug & PRINT_VERBOSE) && (cat4->dummy1|cat4->dummy2))
414 fprintf(ctx->out, "\t{4: %x,%x}", cat4->dummy1, cat4->dummy2);
415 }
416
417 static void print_instr_cat5(struct disasm_ctx *ctx, instr_t *instr)
418 {
419 static const struct {
420 bool src1, src2, samp, tex;
421 } info[0x1f] = {
422 [opc_op(OPC_ISAM)] = { true, false, true, true, },
423 [opc_op(OPC_ISAML)] = { true, true, true, true, },
424 [opc_op(OPC_ISAMM)] = { true, false, true, true, },
425 [opc_op(OPC_SAM)] = { true, false, true, true, },
426 [opc_op(OPC_SAMB)] = { true, true, true, true, },
427 [opc_op(OPC_SAML)] = { true, true, true, true, },
428 [opc_op(OPC_SAMGQ)] = { true, false, true, true, },
429 [opc_op(OPC_GETLOD)] = { true, false, true, true, },
430 [opc_op(OPC_CONV)] = { true, true, true, true, },
431 [opc_op(OPC_CONVM)] = { true, true, true, true, },
432 [opc_op(OPC_GETSIZE)] = { true, false, false, true, },
433 [opc_op(OPC_GETBUF)] = { false, false, false, true, },
434 [opc_op(OPC_GETPOS)] = { true, false, false, true, },
435 [opc_op(OPC_GETINFO)] = { false, false, false, true, },
436 [opc_op(OPC_DSX)] = { true, false, false, false, },
437 [opc_op(OPC_DSY)] = { true, false, false, false, },
438 [opc_op(OPC_GATHER4R)] = { true, false, true, true, },
439 [opc_op(OPC_GATHER4G)] = { true, false, true, true, },
440 [opc_op(OPC_GATHER4B)] = { true, false, true, true, },
441 [opc_op(OPC_GATHER4A)] = { true, false, true, true, },
442 [opc_op(OPC_SAMGP0)] = { true, false, true, true, },
443 [opc_op(OPC_SAMGP1)] = { true, false, true, true, },
444 [opc_op(OPC_SAMGP2)] = { true, false, true, true, },
445 [opc_op(OPC_SAMGP3)] = { true, false, true, true, },
446 [opc_op(OPC_DSXPP_1)] = { true, false, false, false, },
447 [opc_op(OPC_DSYPP_1)] = { true, false, false, false, },
448 [opc_op(OPC_RGETPOS)] = { true, false, false, false, },
449 [opc_op(OPC_RGETINFO)] = { false, false, false, false, },
450 };
451 instr_cat5_t *cat5 = &instr->cat5;
452 int i;
453
454 if (cat5->is_3d) fprintf(ctx->out, ".3d");
455 if (cat5->is_a) fprintf(ctx->out, ".a");
456 if (cat5->is_o) fprintf(ctx->out, ".o");
457 if (cat5->is_p) fprintf(ctx->out, ".p");
458 if (cat5->is_s) fprintf(ctx->out, ".s");
459 if (cat5->is_s2en) fprintf(ctx->out, ".s2en");
460
461 fprintf(ctx->out, " ");
462
463 switch (_OPC(5, cat5->opc)) {
464 case OPC_DSXPP_1:
465 case OPC_DSYPP_1:
466 break;
467 default:
468 fprintf(ctx->out, "(%s)", type[cat5->type]);
469 break;
470 }
471
472 fprintf(ctx->out, "(");
473 for (i = 0; i < 4; i++)
474 if (cat5->wrmask & (1 << i))
475 fprintf(ctx->out, "%c", "xyzw"[i]);
476 fprintf(ctx->out, ")");
477
478 print_reg_dst(ctx, (reg_t)(cat5->dst), type_size(cat5->type) == 32, false);
479
480 if (info[cat5->opc].src1) {
481 fprintf(ctx->out, ", ");
482 print_reg_src(ctx, (reg_t)(cat5->src1), cat5->full, false, false, false,
483 false, false, false);
484 }
485
486 if (cat5->is_s2en) {
487 if (cat5->is_o || info[cat5->opc].src2) {
488 fprintf(ctx->out, ", ");
489 print_reg_src(ctx, (reg_t)(cat5->s2en.src2), cat5->full,
490 false, false, false, false, false, false);
491 }
492 fprintf(ctx->out, ", ");
493 print_reg_src(ctx, (reg_t)(cat5->s2en.src3), false, false, false, false,
494 false, false, false);
495 } else {
496 if (cat5->is_o || info[cat5->opc].src2) {
497 fprintf(ctx->out, ", ");
498 print_reg_src(ctx, (reg_t)(cat5->norm.src2), cat5->full,
499 false, false, false, false, false, false);
500 }
501 if (info[cat5->opc].samp)
502 fprintf(ctx->out, ", s#%d", cat5->norm.samp);
503 if (info[cat5->opc].tex)
504 fprintf(ctx->out, ", t#%d", cat5->norm.tex);
505 }
506
507 if (debug & PRINT_VERBOSE) {
508 if (cat5->is_s2en) {
509 if ((debug & PRINT_VERBOSE) && (cat5->s2en.dummy1|cat5->s2en.dummy2|cat5->dummy2))
510 fprintf(ctx->out, "\t{5: %x,%x,%x}", cat5->s2en.dummy1, cat5->s2en.dummy2, cat5->dummy2);
511 } else {
512 if ((debug & PRINT_VERBOSE) && (cat5->norm.dummy1|cat5->dummy2))
513 fprintf(ctx->out, "\t{5: %x,%x}", cat5->norm.dummy1, cat5->dummy2);
514 }
515 }
516 }
517
518 static void print_instr_cat6_a3xx(struct disasm_ctx *ctx, instr_t *instr)
519 {
520 instr_cat6_t *cat6 = &instr->cat6;
521 char sd = 0, ss = 0; /* dst/src address space */
522 bool nodst = false;
523 struct reginfo dst, src1, src2;
524 int src1off = 0, dstoff = 0;
525
526 memset(&dst, 0, sizeof(dst));
527 memset(&src1, 0, sizeof(src1));
528 memset(&src2, 0, sizeof(src2));
529
530 switch (_OPC(6, cat6->opc)) {
531 case OPC_RESINFO:
532 case OPC_RESFMT:
533 dst.full = type_size(cat6->type) == 32;
534 src1.full = type_size(cat6->type) == 32;
535 src2.full = type_size(cat6->type) == 32;
536 break;
537 case OPC_L2G:
538 case OPC_G2L:
539 dst.full = true;
540 src1.full = true;
541 src2.full = true;
542 break;
543 case OPC_STG:
544 case OPC_STL:
545 case OPC_STP:
546 case OPC_STLW:
547 case OPC_STIB:
548 dst.full = true;
549 src1.full = type_size(cat6->type) == 32;
550 src2.full = type_size(cat6->type) == 32;
551 break;
552 default:
553 dst.full = type_size(cat6->type) == 32;
554 src1.full = true;
555 src2.full = true;
556 break;
557 }
558
559 switch (_OPC(6, cat6->opc)) {
560 case OPC_PREFETCH:
561 break;
562 case OPC_RESINFO:
563 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
564 break;
565 case OPC_LDGB:
566 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
567 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
568 fprintf(ctx->out, ".%s", type[cat6->type]);
569 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
570 break;
571 case OPC_STGB:
572 case OPC_STIB:
573 fprintf(ctx->out, ".%s", cat6->stgb.typed ? "typed" : "untyped");
574 fprintf(ctx->out, ".%dd", cat6->stgb.d + 1);
575 fprintf(ctx->out, ".%s", type[cat6->type]);
576 fprintf(ctx->out, ".%d", cat6->stgb.type_size + 1);
577 break;
578 case OPC_ATOMIC_ADD:
579 case OPC_ATOMIC_SUB:
580 case OPC_ATOMIC_XCHG:
581 case OPC_ATOMIC_INC:
582 case OPC_ATOMIC_DEC:
583 case OPC_ATOMIC_CMPXCHG:
584 case OPC_ATOMIC_MIN:
585 case OPC_ATOMIC_MAX:
586 case OPC_ATOMIC_AND:
587 case OPC_ATOMIC_OR:
588 case OPC_ATOMIC_XOR:
589 ss = cat6->g ? 'g' : 'l';
590 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
591 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
592 fprintf(ctx->out, ".%s", type[cat6->type]);
593 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
594 fprintf(ctx->out, ".%c", ss);
595 break;
596 default:
597 dst.im = cat6->g && !cat6->dst_off;
598 fprintf(ctx->out, ".%s", type[cat6->type]);
599 break;
600 }
601 fprintf(ctx->out, " ");
602
603 switch (_OPC(6, cat6->opc)) {
604 case OPC_STG:
605 sd = 'g';
606 break;
607 case OPC_STP:
608 sd = 'p';
609 break;
610 case OPC_STL:
611 case OPC_STLW:
612 sd = 'l';
613 break;
614
615 case OPC_LDG:
616 case OPC_LDC:
617 ss = 'g';
618 break;
619 case OPC_LDP:
620 ss = 'p';
621 break;
622 case OPC_LDL:
623 case OPC_LDLW:
624 case OPC_LDLV:
625 ss = 'l';
626 break;
627
628 case OPC_L2G:
629 ss = 'l';
630 sd = 'g';
631 break;
632
633 case OPC_G2L:
634 ss = 'g';
635 sd = 'l';
636 break;
637
638 case OPC_PREFETCH:
639 ss = 'g';
640 nodst = true;
641 break;
642 }
643
644 if ((_OPC(6, cat6->opc) == OPC_STGB) || (_OPC(6, cat6->opc) == OPC_STIB)) {
645 struct reginfo src3;
646
647 memset(&src3, 0, sizeof(src3));
648
649 src1.reg = (reg_t)(cat6->stgb.src1);
650 src2.reg = (reg_t)(cat6->stgb.src2);
651 src2.im = cat6->stgb.src2_im;
652 src3.reg = (reg_t)(cat6->stgb.src3);
653 src3.im = cat6->stgb.src3_im;
654 src3.full = true;
655
656 fprintf(ctx->out, "g[%u], ", cat6->stgb.dst_ssbo);
657 print_src(ctx, &src1);
658 fprintf(ctx->out, ", ");
659 print_src(ctx, &src2);
660 fprintf(ctx->out, ", ");
661 print_src(ctx, &src3);
662
663 if (debug & PRINT_VERBOSE)
664 fprintf(ctx->out, " (pad0=%x, pad3=%x)", cat6->stgb.pad0, cat6->stgb.pad3);
665
666 return;
667 }
668
669 if (is_atomic(_OPC(6, cat6->opc))) {
670
671 src1.reg = (reg_t)(cat6->ldgb.src1);
672 src1.im = cat6->ldgb.src1_im;
673 src2.reg = (reg_t)(cat6->ldgb.src2);
674 src2.im = cat6->ldgb.src2_im;
675 dst.reg = (reg_t)(cat6->ldgb.dst);
676
677 print_src(ctx, &dst);
678 fprintf(ctx->out, ", ");
679 if (ss == 'g') {
680 struct reginfo src3;
681 memset(&src3, 0, sizeof(src3));
682
683 src3.reg = (reg_t)(cat6->ldgb.src3);
684 src3.full = true;
685
686 /* For images, the ".typed" variant is used and src2 is
687 * the ivecN coordinates, ie ivec2 for 2d.
688 *
689 * For SSBOs, the ".untyped" variant is used and src2 is
690 * a simple dword offset.. src3 appears to be
691 * uvec2(offset * 4, 0). Not sure the point of that.
692 */
693
694 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
695 print_src(ctx, &src1); /* value */
696 fprintf(ctx->out, ", ");
697 print_src(ctx, &src2); /* offset/coords */
698 fprintf(ctx->out, ", ");
699 print_src(ctx, &src3); /* 64b byte offset.. */
700
701 if (debug & PRINT_VERBOSE) {
702 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0,
703 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
704 }
705 } else { /* ss == 'l' */
706 fprintf(ctx->out, "l[");
707 print_src(ctx, &src1); /* simple byte offset */
708 fprintf(ctx->out, "], ");
709 print_src(ctx, &src2); /* value */
710
711 if (debug & PRINT_VERBOSE) {
712 fprintf(ctx->out, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)",
713 cat6->ldgb.src3, cat6->ldgb.pad0,
714 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
715 }
716 }
717
718 return;
719 } else if (_OPC(6, cat6->opc) == OPC_RESINFO) {
720 dst.reg = (reg_t)(cat6->ldgb.dst);
721
722 print_src(ctx, &dst);
723 fprintf(ctx->out, ", ");
724 fprintf(ctx->out, "g[%u]", cat6->ldgb.src_ssbo);
725
726 return;
727 } else if (_OPC(6, cat6->opc) == OPC_LDGB) {
728
729 src1.reg = (reg_t)(cat6->ldgb.src1);
730 src1.im = cat6->ldgb.src1_im;
731 src2.reg = (reg_t)(cat6->ldgb.src2);
732 src2.im = cat6->ldgb.src2_im;
733 dst.reg = (reg_t)(cat6->ldgb.dst);
734
735 print_src(ctx, &dst);
736 fprintf(ctx->out, ", ");
737 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
738 print_src(ctx, &src1);
739 fprintf(ctx->out, ", ");
740 print_src(ctx, &src2);
741
742 if (debug & PRINT_VERBOSE)
743 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0, cat6->ldgb.pad3, cat6->ldgb.mustbe0);
744
745 return;
746 } else if (_OPC(6, cat6->opc) == OPC_LDG && cat6->a.src1_im && cat6->a.src2_im) {
747 struct reginfo src3;
748
749 memset(&src3, 0, sizeof(src3));
750 src1.reg = (reg_t)(cat6->a.src1);
751 src2.reg = (reg_t)(cat6->a.src2);
752 src2.im = cat6->a.src2_im;
753 src3.reg = (reg_t)(cat6->a.off);
754 src3.full = true;
755 dst.reg = (reg_t)(cat6->d.dst);
756
757 print_src(ctx, &dst);
758 fprintf(ctx->out, ", g[");
759 print_src(ctx, &src1);
760 fprintf(ctx->out, "+");
761 print_src(ctx, &src3);
762 fprintf(ctx->out, "], ");
763 print_src(ctx, &src2);
764
765 return;
766 }
767 if (cat6->dst_off) {
768 dst.reg = (reg_t)(cat6->c.dst);
769 dstoff = cat6->c.off;
770 } else {
771 dst.reg = (reg_t)(cat6->d.dst);
772 }
773
774 if (cat6->src_off) {
775 src1.reg = (reg_t)(cat6->a.src1);
776 src1.im = cat6->a.src1_im;
777 src2.reg = (reg_t)(cat6->a.src2);
778 src2.im = cat6->a.src2_im;
779 src1off = cat6->a.off;
780 } else {
781 src1.reg = (reg_t)(cat6->b.src1);
782 src1.im = cat6->b.src1_im;
783 src2.reg = (reg_t)(cat6->b.src2);
784 src2.im = cat6->b.src2_im;
785 }
786
787 if (!nodst) {
788 if (sd)
789 fprintf(ctx->out, "%c[", sd);
790 /* note: dst might actually be a src (ie. address to store to) */
791 print_src(ctx, &dst);
792 if (cat6->dst_off && cat6->g) {
793 struct reginfo dstoff_reg = {0};
794 dstoff_reg.reg = (reg_t) cat6->c.off;
795 dstoff_reg.full = true;
796 fprintf(ctx->out, "+");
797 print_src(ctx, &dstoff_reg);
798 } else if (dstoff)
799 fprintf(ctx->out, "%+d", dstoff);
800 if (sd)
801 fprintf(ctx->out, "]");
802 fprintf(ctx->out, ", ");
803 }
804
805 if (ss)
806 fprintf(ctx->out, "%c[", ss);
807
808 /* can have a larger than normal immed, so hack: */
809 if (src1.im) {
810 fprintf(ctx->out, "%u", src1.reg.dummy13);
811 } else {
812 print_src(ctx, &src1);
813 }
814
815 if (cat6->src_off && cat6->g)
816 print_src(ctx, &src2);
817 else if (src1off)
818 fprintf(ctx->out, "%+d", src1off);
819 if (ss)
820 fprintf(ctx->out, "]");
821
822 switch (_OPC(6, cat6->opc)) {
823 case OPC_RESINFO:
824 case OPC_RESFMT:
825 break;
826 default:
827 fprintf(ctx->out, ", ");
828 print_src(ctx, &src2);
829 break;
830 }
831 }
832
833 static void print_instr_cat6_a6xx(struct disasm_ctx *ctx, instr_t *instr)
834 {
835 instr_cat6_a6xx_t *cat6 = &instr->cat6_a6xx;
836 struct reginfo src1, src2;
837 bool has_dest = _OPC(6, cat6->opc) == OPC_LDIB;
838 char ss = 0;
839
840 memset(&src1, 0, sizeof(src1));
841 memset(&src2, 0, sizeof(src2));
842
843 fprintf(ctx->out, ".%s", cat6->typed ? "typed" : "untyped");
844 fprintf(ctx->out, ".%dd", cat6->d + 1);
845 fprintf(ctx->out, ".%s", type[cat6->type]);
846 fprintf(ctx->out, ".%u ", cat6->type_size + 1);
847
848 if (has_dest) {
849 src2.reg = (reg_t)(cat6->src2);
850 src2.full = true; // XXX
851 print_src(ctx, &src2);
852
853 fprintf(ctx->out, ", ");
854 }
855
856 /* NOTE: blob seems to use old encoding for ldl/stl (local memory) */
857 ss = 'g';
858
859 fprintf(ctx->out, "%c[%u", ss, cat6->ssbo);
860 fprintf(ctx->out, "] + ");
861 src1.reg = (reg_t)(cat6->src1);
862 src1.full = true; // XXX
863 print_src(ctx, &src1);
864
865 if (!has_dest) {
866 fprintf(ctx->out, ", ");
867
868 src2.reg = (reg_t)(cat6->src2);
869 src2.full = true; // XXX
870 print_src(ctx, &src2);
871 }
872
873 if (debug & PRINT_VERBOSE) {
874 fprintf(ctx->out, " (pad1=%x, pad2=%x, pad3=%x, pad4=%x)", cat6->pad1,
875 cat6->pad2, cat6->pad3, cat6->pad4);
876 }
877 }
878
879 static void print_instr_cat6(struct disasm_ctx *ctx, instr_t *instr)
880 {
881 if (!is_cat6_legacy(instr, ctx->gpu_id)) {
882 print_instr_cat6_a6xx(ctx, instr);
883 if (debug & PRINT_VERBOSE)
884 fprintf(ctx->out, " NEW");
885 } else {
886 print_instr_cat6_a3xx(ctx, instr);
887 if (debug & PRINT_VERBOSE)
888 fprintf(ctx->out, " LEGACY");
889 }
890 }
891 static void print_instr_cat7(struct disasm_ctx *ctx, instr_t *instr)
892 {
893 instr_cat7_t *cat7 = &instr->cat7;
894
895 if (cat7->g)
896 fprintf(ctx->out, ".g");
897 if (cat7->l)
898 fprintf(ctx->out, ".l");
899
900 if (_OPC(7, cat7->opc) == OPC_FENCE) {
901 if (cat7->r)
902 fprintf(ctx->out, ".r");
903 if (cat7->w)
904 fprintf(ctx->out, ".w");
905 }
906 }
907
908 /* size of largest OPC field of all the instruction categories: */
909 #define NOPC_BITS 6
910
911 static const struct opc_info {
912 uint16_t cat;
913 uint16_t opc;
914 const char *name;
915 void (*print)(struct disasm_ctx *ctx, instr_t *instr);
916 } opcs[1 << (3+NOPC_BITS)] = {
917 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat }
918 /* category 0: */
919 OPC(0, OPC_NOP, nop),
920 OPC(0, OPC_BR, br),
921 OPC(0, OPC_JUMP, jump),
922 OPC(0, OPC_CALL, call),
923 OPC(0, OPC_RET, ret),
924 OPC(0, OPC_KILL, kill),
925 OPC(0, OPC_END, end),
926 OPC(0, OPC_EMIT, emit),
927 OPC(0, OPC_CUT, cut),
928 OPC(0, OPC_CHMASK, chmask),
929 OPC(0, OPC_CHSH, chsh),
930 OPC(0, OPC_FLOW_REV, flow_rev),
931 OPC(0, OPC_IF, if),
932 OPC(0, OPC_ELSE, else),
933 OPC(0, OPC_ENDIF, endif),
934
935 /* category 1: */
936 OPC(1, OPC_MOV, ),
937
938 /* category 2: */
939 OPC(2, OPC_ADD_F, add.f),
940 OPC(2, OPC_MIN_F, min.f),
941 OPC(2, OPC_MAX_F, max.f),
942 OPC(2, OPC_MUL_F, mul.f),
943 OPC(2, OPC_SIGN_F, sign.f),
944 OPC(2, OPC_CMPS_F, cmps.f),
945 OPC(2, OPC_ABSNEG_F, absneg.f),
946 OPC(2, OPC_CMPV_F, cmpv.f),
947 OPC(2, OPC_FLOOR_F, floor.f),
948 OPC(2, OPC_CEIL_F, ceil.f),
949 OPC(2, OPC_RNDNE_F, rndne.f),
950 OPC(2, OPC_RNDAZ_F, rndaz.f),
951 OPC(2, OPC_TRUNC_F, trunc.f),
952 OPC(2, OPC_ADD_U, add.u),
953 OPC(2, OPC_ADD_S, add.s),
954 OPC(2, OPC_SUB_U, sub.u),
955 OPC(2, OPC_SUB_S, sub.s),
956 OPC(2, OPC_CMPS_U, cmps.u),
957 OPC(2, OPC_CMPS_S, cmps.s),
958 OPC(2, OPC_MIN_U, min.u),
959 OPC(2, OPC_MIN_S, min.s),
960 OPC(2, OPC_MAX_U, max.u),
961 OPC(2, OPC_MAX_S, max.s),
962 OPC(2, OPC_ABSNEG_S, absneg.s),
963 OPC(2, OPC_AND_B, and.b),
964 OPC(2, OPC_OR_B, or.b),
965 OPC(2, OPC_NOT_B, not.b),
966 OPC(2, OPC_XOR_B, xor.b),
967 OPC(2, OPC_CMPV_U, cmpv.u),
968 OPC(2, OPC_CMPV_S, cmpv.s),
969 OPC(2, OPC_MUL_U24, mul.u24),
970 OPC(2, OPC_MUL_S24, mul.s24),
971 OPC(2, OPC_MULL_U, mull.u),
972 OPC(2, OPC_BFREV_B, bfrev.b),
973 OPC(2, OPC_CLZ_S, clz.s),
974 OPC(2, OPC_CLZ_B, clz.b),
975 OPC(2, OPC_SHL_B, shl.b),
976 OPC(2, OPC_SHR_B, shr.b),
977 OPC(2, OPC_ASHR_B, ashr.b),
978 OPC(2, OPC_BARY_F, bary.f),
979 OPC(2, OPC_MGEN_B, mgen.b),
980 OPC(2, OPC_GETBIT_B, getbit.b),
981 OPC(2, OPC_SETRM, setrm),
982 OPC(2, OPC_CBITS_B, cbits.b),
983 OPC(2, OPC_SHB, shb),
984 OPC(2, OPC_MSAD, msad),
985
986 /* category 3: */
987 OPC(3, OPC_MAD_U16, mad.u16),
988 OPC(3, OPC_MADSH_U16, madsh.u16),
989 OPC(3, OPC_MAD_S16, mad.s16),
990 OPC(3, OPC_MADSH_M16, madsh.m16),
991 OPC(3, OPC_MAD_U24, mad.u24),
992 OPC(3, OPC_MAD_S24, mad.s24),
993 OPC(3, OPC_MAD_F16, mad.f16),
994 OPC(3, OPC_MAD_F32, mad.f32),
995 OPC(3, OPC_SEL_B16, sel.b16),
996 OPC(3, OPC_SEL_B32, sel.b32),
997 OPC(3, OPC_SEL_S16, sel.s16),
998 OPC(3, OPC_SEL_S32, sel.s32),
999 OPC(3, OPC_SEL_F16, sel.f16),
1000 OPC(3, OPC_SEL_F32, sel.f32),
1001 OPC(3, OPC_SAD_S16, sad.s16),
1002 OPC(3, OPC_SAD_S32, sad.s32),
1003
1004 /* category 4: */
1005 OPC(4, OPC_RCP, rcp),
1006 OPC(4, OPC_RSQ, rsq),
1007 OPC(4, OPC_LOG2, log2),
1008 OPC(4, OPC_EXP2, exp2),
1009 OPC(4, OPC_SIN, sin),
1010 OPC(4, OPC_COS, cos),
1011 OPC(4, OPC_SQRT, sqrt),
1012 OPC(4, OPC_HRSQ, hrsq),
1013 OPC(4, OPC_HLOG2, hlog2),
1014 OPC(4, OPC_HEXP2, hexp2),
1015
1016 /* category 5: */
1017 OPC(5, OPC_ISAM, isam),
1018 OPC(5, OPC_ISAML, isaml),
1019 OPC(5, OPC_ISAMM, isamm),
1020 OPC(5, OPC_SAM, sam),
1021 OPC(5, OPC_SAMB, samb),
1022 OPC(5, OPC_SAML, saml),
1023 OPC(5, OPC_SAMGQ, samgq),
1024 OPC(5, OPC_GETLOD, getlod),
1025 OPC(5, OPC_CONV, conv),
1026 OPC(5, OPC_CONVM, convm),
1027 OPC(5, OPC_GETSIZE, getsize),
1028 OPC(5, OPC_GETBUF, getbuf),
1029 OPC(5, OPC_GETPOS, getpos),
1030 OPC(5, OPC_GETINFO, getinfo),
1031 OPC(5, OPC_DSX, dsx),
1032 OPC(5, OPC_DSY, dsy),
1033 OPC(5, OPC_GATHER4R, gather4r),
1034 OPC(5, OPC_GATHER4G, gather4g),
1035 OPC(5, OPC_GATHER4B, gather4b),
1036 OPC(5, OPC_GATHER4A, gather4a),
1037 OPC(5, OPC_SAMGP0, samgp0),
1038 OPC(5, OPC_SAMGP1, samgp1),
1039 OPC(5, OPC_SAMGP2, samgp2),
1040 OPC(5, OPC_SAMGP3, samgp3),
1041 OPC(5, OPC_DSXPP_1, dsxpp.1),
1042 OPC(5, OPC_DSYPP_1, dsypp.1),
1043 OPC(5, OPC_RGETPOS, rgetpos),
1044 OPC(5, OPC_RGETINFO, rgetinfo),
1045
1046
1047 /* category 6: */
1048 OPC(6, OPC_LDG, ldg),
1049 OPC(6, OPC_LDL, ldl),
1050 OPC(6, OPC_LDP, ldp),
1051 OPC(6, OPC_STG, stg),
1052 OPC(6, OPC_STL, stl),
1053 OPC(6, OPC_STP, stp),
1054 OPC(6, OPC_LDIB, ldib),
1055 OPC(6, OPC_G2L, g2l),
1056 OPC(6, OPC_L2G, l2g),
1057 OPC(6, OPC_PREFETCH, prefetch),
1058 OPC(6, OPC_LDLW, ldlw),
1059 OPC(6, OPC_STLW, stlw),
1060 OPC(6, OPC_RESFMT, resfmt),
1061 OPC(6, OPC_RESINFO, resinfo),
1062 OPC(6, OPC_ATOMIC_ADD, atomic.add),
1063 OPC(6, OPC_ATOMIC_SUB, atomic.sub),
1064 OPC(6, OPC_ATOMIC_XCHG, atomic.xchg),
1065 OPC(6, OPC_ATOMIC_INC, atomic.inc),
1066 OPC(6, OPC_ATOMIC_DEC, atomic.dec),
1067 OPC(6, OPC_ATOMIC_CMPXCHG, atomic.cmpxchg),
1068 OPC(6, OPC_ATOMIC_MIN, atomic.min),
1069 OPC(6, OPC_ATOMIC_MAX, atomic.max),
1070 OPC(6, OPC_ATOMIC_AND, atomic.and),
1071 OPC(6, OPC_ATOMIC_OR, atomic.or),
1072 OPC(6, OPC_ATOMIC_XOR, atomic.xor),
1073 OPC(6, OPC_LDGB, ldgb),
1074 OPC(6, OPC_STGB, stgb),
1075 OPC(6, OPC_STIB, stib),
1076 OPC(6, OPC_LDC, ldc),
1077 OPC(6, OPC_LDLV, ldlv),
1078
1079 OPC(7, OPC_BAR, bar),
1080 OPC(7, OPC_FENCE, fence),
1081
1082 #undef OPC
1083 };
1084
1085 #define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)]))
1086
1087 // XXX hack.. probably should move this table somewhere common:
1088 #include "ir3.h"
1089 const char *ir3_instr_name(struct ir3_instruction *instr)
1090 {
1091 if (opc_cat(instr->opc) == -1) return "??meta??";
1092 return opcs[instr->opc].name;
1093 }
1094
1095 static void print_single_instr(struct disasm_ctx *ctx, instr_t *instr)
1096 {
1097 const char *name = GETINFO(instr)->name;
1098 uint32_t opc = instr_opc(instr, ctx->gpu_id);
1099
1100 if (name) {
1101 fprintf(ctx->out, "%s", name);
1102 GETINFO(instr)->print(ctx, instr);
1103 } else {
1104 fprintf(ctx->out, "unknown(%d,%d)", instr->opc_cat, opc);
1105
1106 switch (instr->opc_cat) {
1107 case 0: print_instr_cat0(ctx, instr); break;
1108 case 1: print_instr_cat1(ctx, instr); break;
1109 case 2: print_instr_cat2(ctx, instr); break;
1110 case 3: print_instr_cat3(ctx, instr); break;
1111 case 4: print_instr_cat4(ctx, instr); break;
1112 case 5: print_instr_cat5(ctx, instr); break;
1113 case 6: print_instr_cat6(ctx, instr); break;
1114 case 7: print_instr_cat7(ctx, instr); break;
1115 }
1116 }
1117 }
1118
1119 static bool print_instr(struct disasm_ctx *ctx, uint32_t *dwords, int n)
1120 {
1121 instr_t *instr = (instr_t *)dwords;
1122 uint32_t opc = instr_opc(instr, ctx->gpu_id);
1123 unsigned nop = 0;
1124
1125 if (debug & PRINT_VERBOSE)
1126 fprintf(ctx->out, "%s%04d[%08xx_%08xx] ", levels[ctx->level], n, dwords[1], dwords[0]);
1127
1128 /* NOTE: order flags are printed is a bit fugly.. but for now I
1129 * try to match the order in llvm-a3xx disassembler for easy
1130 * diff'ing..
1131 */
1132
1133 ctx->repeat = instr_repeat(instr);
1134
1135 if (instr->sync) {
1136 fprintf(ctx->out, "(sy)");
1137 }
1138 if (instr->ss && ((instr->opc_cat <= 4) || (instr->opc_cat == 7))) {
1139 fprintf(ctx->out, "(ss)");
1140 }
1141 if (instr->jmp_tgt)
1142 fprintf(ctx->out, "(jp)");
1143 if (instr_sat(instr))
1144 fprintf(ctx->out, "(sat)");
1145 if (ctx->repeat)
1146 fprintf(ctx->out, "(rpt%d)", ctx->repeat);
1147 else if ((instr->opc_cat == 2) && (instr->cat2.src1_r || instr->cat2.src2_r))
1148 nop = (instr->cat2.src2_r * 2) + instr->cat2.src1_r;
1149 else if ((instr->opc_cat == 3) && (instr->cat3.src1_r || instr->cat3.src2_r))
1150 nop = (instr->cat3.src2_r * 2) + instr->cat3.src1_r;
1151 if (nop)
1152 fprintf(ctx->out, "(nop%d)", nop);
1153
1154 if (instr->ul && ((2 <= instr->opc_cat) && (instr->opc_cat <= 4)))
1155 fprintf(ctx->out, "(ul)");
1156
1157 print_single_instr(ctx, instr);
1158 fprintf(ctx->out, "\n");
1159
1160 if ((instr->opc_cat <= 4) && (debug & EXPAND_REPEAT)) {
1161 int i;
1162 for (i = 0; i < nop; i++) {
1163 fprintf(ctx->out, "%s%04d[ ] ", levels[ctx->level], n);
1164 fprintf(ctx->out, "nop\n");
1165 }
1166 for (i = 0; i < ctx->repeat; i++) {
1167 ctx->repeatidx = i + 1;
1168 fprintf(ctx->out, "%s%04d[ ] ", levels[ctx->level], n);
1169
1170 print_single_instr(ctx, instr);
1171 fprintf(ctx->out, "\n");
1172 }
1173 ctx->repeatidx = 0;
1174 }
1175
1176 return (instr->opc_cat == 0) && (opc == OPC_END);
1177 }
1178
1179 int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out, unsigned gpu_id)
1180 {
1181 struct disasm_ctx ctx;
1182 int i;
1183 int nop_count = 0;
1184
1185 assert((sizedwords % 2) == 0);
1186
1187 memset(&ctx, 0, sizeof(ctx));
1188 ctx.out = out;
1189 ctx.level = level;
1190 ctx.gpu_id = gpu_id;
1191
1192 for (i = 0; i < sizedwords; i += 2) {
1193 print_instr(&ctx, &dwords[i], i/2);
1194 if (dwords[i] == 0 && dwords[i + 1] == 0)
1195 nop_count++;
1196 else
1197 nop_count = 0;
1198 if (nop_count > 3)
1199 break;
1200 }
1201
1202 return 0;
1203 }