freedreno/ir3: fix incorrect conversion folding
[mesa.git] / src / freedreno / ir3 / ir3_cf.c
1 /*
2 * Copyright (C) 2019 Google.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "util/ralloc.h"
25
26 #include "ir3.h"
27
28 static bool
29 is_fp16_conv(struct ir3_instruction *instr)
30 {
31 if (instr->opc != OPC_MOV)
32 return false;
33
34 struct ir3_register *dst = instr->regs[0];
35 struct ir3_register *src = instr->regs[1];
36
37 /* disallow conversions that cannot be folded into
38 * alu instructions:
39 */
40 if (dst->flags & (IR3_REG_EVEN | IR3_REG_POS_INF))
41 return false;
42
43 if (dst->flags & (IR3_REG_RELATIV | IR3_REG_ARRAY))
44 return false;
45 if (src->flags & (IR3_REG_RELATIV | IR3_REG_ARRAY))
46 return false;
47
48 if (instr->cat1.src_type == TYPE_F32 &&
49 instr->cat1.dst_type == TYPE_F16)
50 return true;
51
52 if (instr->cat1.src_type == TYPE_F16 &&
53 instr->cat1.dst_type == TYPE_F32)
54 return true;
55
56 return false;
57 }
58
59 static bool
60 all_uses_fp16_conv(struct ir3_instruction *conv_src)
61 {
62 foreach_ssa_use (use, conv_src)
63 if (!is_fp16_conv(use))
64 return false;
65 return true;
66 }
67
68 static void
69 rewrite_uses(struct ir3_instruction *conv, struct ir3_instruction *replace)
70 {
71 foreach_ssa_use (use, conv) {
72 struct ir3_instruction *src;
73 foreach_ssa_src_n (src, n, use) {
74 if (src == conv)
75 use->regs[n]->instr = replace;
76 }
77 }
78 }
79
80 static void
81 try_conversion_folding(struct ir3_instruction *conv)
82 {
83 struct ir3_instruction *src;
84
85 if (!is_fp16_conv(conv))
86 return;
87
88 src = ssa(conv->regs[1]);
89 if (!is_alu(src))
90 return;
91
92 /* avoid folding f2f32(f2f16) together, in cases where this is legal to
93 * do (glsl) nir should have handled that for us already:
94 */
95 if (is_fp16_conv(src))
96 return;
97
98 switch (src->opc) {
99 case OPC_SEL_B32:
100 case OPC_SEL_B16:
101 case OPC_MAX_F:
102 case OPC_MIN_F:
103 case OPC_SIGN_F:
104 case OPC_ABSNEG_F:
105 return;
106 case OPC_MOV:
107 /* if src is a "cov" and type doesn't match, then it can't be folded
108 * for example cov.u32u16+cov.f16f32 can't be folded to cov.u32f32
109 */
110 if (src->cat1.dst_type != src->cat1.src_type &&
111 conv->cat1.src_type != src->cat1.dst_type)
112 return;
113 default:
114 break;
115 }
116
117 if (!all_uses_fp16_conv(src))
118 return;
119
120 if (src->opc == OPC_MOV) {
121 if (src->cat1.dst_type == src->cat1.src_type) {
122 /* If we're folding a conversion into a bitwise move, we need to
123 * change the dst type to F32 to get the right behavior, since we
124 * could be moving a float with a u32.u32 move.
125 */
126 src->cat1.dst_type = conv->cat1.dst_type;
127 src->cat1.src_type = conv->cat1.src_type;
128 } else {
129 /* Otherwise, for typechanging movs, we can just change the dst
130 * type to F16 to collaps the two conversions. For example
131 * cov.s32f32 follwed by cov.f32f16 becomes cov.s32f16.
132 */
133 src->cat1.dst_type = conv->cat1.dst_type;
134 }
135 }
136
137 if (conv->regs[0]->flags & IR3_REG_HALF) {
138 src->regs[0]->flags |= IR3_REG_HALF;
139 } else {
140 src->regs[0]->flags &= ~IR3_REG_HALF;
141 }
142
143 rewrite_uses(conv, src);
144 }
145
146 void
147 ir3_cf(struct ir3 *ir)
148 {
149 void *mem_ctx = ralloc_context(NULL);
150
151 ir3_find_ssa_uses(ir, mem_ctx, false);
152
153 foreach_block (block, &ir->block_list) {
154 foreach_instr_safe (instr, &block->instr_list) {
155 try_conversion_folding(instr);
156 }
157 }
158
159 ralloc_free(mem_ctx);
160 }