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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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25 #include "ir3_compiler.h"
26 #include "compiler/nir/nir.h"
27 #include "compiler/nir/nir_builder.h"
28 #include "util/u_math.h"
31 range_is_gl_uniforms(struct ir3_ubo_range
*r
)
33 return !r
->bindless
&& r
->block
== 0;
36 static inline struct ir3_ubo_range
37 get_ubo_load_range(nir_shader
*nir
, nir_intrinsic_instr
*instr
, uint32_t alignment
)
39 struct ir3_ubo_range r
;
41 if (nir_src_is_const(instr
->src
[1])) {
42 int offset
= nir_src_as_uint(instr
->src
[1]);
43 const int bytes
= nir_intrinsic_dest_components(instr
) * 4;
45 r
.start
= ROUND_DOWN_TO(offset
, alignment
* 16);
46 r
.end
= ALIGN(offset
+ bytes
, alignment
* 16);
48 /* The other valid place to call this is on the GL default uniform block */
49 assert(nir_src_as_uint(instr
->src
[0]) == 0);
51 r
.end
= ALIGN(nir
->num_uniforms
* 16, alignment
* 16);
57 static struct ir3_ubo_range
*
58 get_existing_range(nir_intrinsic_instr
*instr
,
59 struct ir3_ubo_analysis_state
*state
,
62 unsigned block
, base
= 0;
64 if (nir_src_is_const(instr
->src
[0])) {
65 block
= nir_src_as_uint(instr
->src
[0]);
68 nir_intrinsic_instr
*rsrc
= ir3_bindless_resource(instr
->src
[0]);
69 if (rsrc
&& nir_src_is_const(rsrc
->src
[0])) {
70 block
= nir_src_as_uint(rsrc
->src
[0]);
71 base
= nir_intrinsic_desc_set(rsrc
);
77 for (int i
= 0; i
< IR3_MAX_UBO_PUSH_RANGES
; i
++) {
78 struct ir3_ubo_range
*range
= &state
->range
[i
];
79 if (range
->end
< range
->start
) {
80 /* We don't have a matching range, but there are more available.
84 range
->bindless_base
= base
;
85 range
->bindless
= bindless
;
90 } else if (range
->block
== block
&& range
->bindless_base
== base
&&
91 range
->bindless
== bindless
) {
100 gather_ubo_ranges(nir_shader
*nir
, nir_intrinsic_instr
*instr
,
101 struct ir3_ubo_analysis_state
*state
, uint32_t alignment
)
103 if (ir3_shader_debug
& IR3_DBG_NOUBOOPT
)
106 struct ir3_ubo_range
*old_r
= get_existing_range(instr
, state
, true);
110 /* We don't know how to get the size of UBOs being indirected on, other
111 * than on the GL uniforms where we have some other shader_info data.
113 if (!nir_src_is_const(instr
->src
[1]) && !range_is_gl_uniforms(old_r
))
116 const struct ir3_ubo_range r
= get_ubo_load_range(nir
, instr
, alignment
);
118 if (r
.start
< old_r
->start
)
119 old_r
->start
= r
.start
;
120 if (old_r
->end
< r
.end
)
124 /* For indirect offset, it is common to see a pattern of multiple
125 * loads with the same base, but different constant offset, ie:
127 * vec1 32 ssa_33 = iadd ssa_base, const_offset
128 * vec4 32 ssa_34 = intrinsic load_uniform (ssa_33) (base=N, 0, 0)
130 * Detect this, and peel out the const_offset part, to end up with:
132 * vec4 32 ssa_34 = intrinsic load_uniform (ssa_base) (base=N+const_offset, 0, 0)
136 * vec1 32 ssa_33 = imad24_ir3 a, b, const_offset
137 * vec4 32 ssa_34 = intrinsic load_uniform (ssa_33) (base=N, 0, 0)
139 * Can be converted to:
141 * vec1 32 ssa_base = imul24 a, b
142 * vec4 32 ssa_34 = intrinsic load_uniform (ssa_base) (base=N+const_offset, 0, 0)
144 * This gives the other opt passes something much easier to work
145 * with (ie. not requiring value range tracking)
148 handle_partial_const(nir_builder
*b
, nir_ssa_def
**srcp
, int *offp
)
150 if ((*srcp
)->parent_instr
->type
!= nir_instr_type_alu
)
153 nir_alu_instr
*alu
= nir_instr_as_alu((*srcp
)->parent_instr
);
155 if (alu
->op
== nir_op_imad24_ir3
) {
156 /* This case is slightly more complicated as we need to
157 * replace the imad24_ir3 with an imul24:
159 if (!nir_src_is_const(alu
->src
[2].src
))
162 *offp
+= nir_src_as_uint(alu
->src
[2].src
);
163 *srcp
= nir_imul24(b
, nir_ssa_for_alu_src(b
, alu
, 0),
164 nir_ssa_for_alu_src(b
, alu
, 1));
169 if (alu
->op
!= nir_op_iadd
)
172 if (!(alu
->src
[0].src
.is_ssa
&& alu
->src
[1].src
.is_ssa
))
175 if (nir_src_is_const(alu
->src
[0].src
)) {
176 *offp
+= nir_src_as_uint(alu
->src
[0].src
);
177 *srcp
= alu
->src
[1].src
.ssa
;
178 } else if (nir_src_is_const(alu
->src
[1].src
)) {
179 *srcp
= alu
->src
[0].src
.ssa
;
180 *offp
+= nir_src_as_uint(alu
->src
[1].src
);
184 /* Tracks the maximum bindful UBO accessed so that we reduce the UBO
185 * descriptors emitted in the fast path for GL.
188 track_ubo_use(nir_intrinsic_instr
*instr
, nir_builder
*b
, int *num_ubos
)
190 if (ir3_bindless_resource(instr
->src
[0])) {
191 assert(!b
->shader
->info
.first_ubo_is_default_ubo
); /* only set for GL */
195 if (nir_src_is_const(instr
->src
[0])) {
196 int block
= nir_src_as_uint(instr
->src
[0]);
197 *num_ubos
= MAX2(*num_ubos
, block
+ 1);
199 *num_ubos
= b
->shader
->info
.num_ubos
;
204 lower_ubo_load_to_uniform(nir_intrinsic_instr
*instr
, nir_builder
*b
,
205 struct ir3_ubo_analysis_state
*state
, int *num_ubos
, uint32_t alignment
)
207 b
->cursor
= nir_before_instr(&instr
->instr
);
209 /* We don't lower dynamic block index UBO loads to load_uniform, but we
210 * could probably with some effort determine a block stride in number of
213 struct ir3_ubo_range
*range
= get_existing_range(instr
, state
, false);
215 track_ubo_use(instr
, b
, num_ubos
);
219 /* We don't have a good way of determining the range of the dynamic
220 * access in general, so for now just fall back to pulling.
222 if (!nir_src_is_const(instr
->src
[1]) && !range_is_gl_uniforms(range
))
225 /* After gathering the UBO access ranges, we limit the total
226 * upload. Don't lower if this load is outside the range.
228 const struct ir3_ubo_range r
= get_ubo_load_range(b
->shader
,
230 if (!(range
->start
<= r
.start
&& r
.end
<= range
->end
)) {
231 track_ubo_use(instr
, b
, num_ubos
);
235 nir_ssa_def
*ubo_offset
= nir_ssa_for_src(b
, instr
->src
[1], 1);
236 int const_offset
= 0;
238 handle_partial_const(b
, &ubo_offset
, &const_offset
);
240 /* UBO offset is in bytes, but uniform offset is in units of
241 * dwords, so we need to divide by 4 (right-shift by 2). For ldc the
242 * offset is in units of 16 bytes, so we need to multiply by 4. And
243 * also the same for the constant part of the offset:
245 const int shift
= -2;
246 nir_ssa_def
*new_offset
= ir3_nir_try_propagate_bit_shift(b
, ubo_offset
, -2);
247 nir_ssa_def
*uniform_offset
= NULL
;
249 uniform_offset
= new_offset
;
251 uniform_offset
= shift
> 0 ?
252 nir_ishl(b
, ubo_offset
, nir_imm_int(b
, shift
)) :
253 nir_ushr(b
, ubo_offset
, nir_imm_int(b
, -shift
));
256 debug_assert(!(const_offset
& 0x3));
259 const int range_offset
= ((int)range
->offset
- (int)range
->start
) / 4;
260 const_offset
+= range_offset
;
262 /* The range_offset could be negative, if if only part of the UBO
263 * block is accessed, range->start can be greater than range->offset.
264 * But we can't underflow const_offset. If necessary we need to
265 * insert nir instructions to compensate (which can hopefully be
268 if (const_offset
< 0) {
269 uniform_offset
= nir_iadd_imm(b
, uniform_offset
, const_offset
);
273 nir_intrinsic_instr
*uniform
=
274 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_load_uniform
);
275 uniform
->num_components
= instr
->num_components
;
276 uniform
->src
[0] = nir_src_for_ssa(uniform_offset
);
277 nir_intrinsic_set_base(uniform
, const_offset
);
278 nir_ssa_dest_init(&uniform
->instr
, &uniform
->dest
,
279 uniform
->num_components
, instr
->dest
.ssa
.bit_size
,
280 instr
->dest
.ssa
.name
);
281 nir_builder_instr_insert(b
, &uniform
->instr
);
282 nir_ssa_def_rewrite_uses(&instr
->dest
.ssa
,
283 nir_src_for_ssa(&uniform
->dest
.ssa
));
285 nir_instr_remove(&instr
->instr
);
287 state
->lower_count
++;
291 instr_is_load_ubo(nir_instr
*instr
)
293 if (instr
->type
!= nir_instr_type_intrinsic
)
296 nir_intrinsic_op op
= nir_instr_as_intrinsic(instr
)->intrinsic
;
298 /* ir3_nir_lower_io_offsets happens after this pass. */
299 assert(op
!= nir_intrinsic_load_ubo_ir3
);
301 return op
== nir_intrinsic_load_ubo
;
305 ir3_nir_analyze_ubo_ranges(nir_shader
*nir
, struct ir3_shader
*shader
)
307 struct ir3_ubo_analysis_state
*state
= &shader
->const_state
.ubo_state
;
309 memset(state
, 0, sizeof(*state
));
310 for (int i
= 0; i
< IR3_MAX_UBO_PUSH_RANGES
; i
++) {
311 state
->range
[i
].start
= UINT32_MAX
;
314 nir_foreach_function (function
, nir
) {
315 if (function
->impl
) {
316 nir_foreach_block (block
, function
->impl
) {
317 nir_foreach_instr (instr
, block
) {
318 if (instr_is_load_ubo(instr
))
319 gather_ubo_ranges(nir
, nir_instr_as_intrinsic(instr
),
320 state
, shader
->compiler
->const_upload_unit
);
326 /* For now, everything we upload is accessed statically and thus will be
327 * used by the shader. Once we can upload dynamically indexed data, we may
328 * upload sparsely accessed arrays, at which point we probably want to
329 * give priority to smaller UBOs, on the assumption that big UBOs will be
330 * accessed dynamically. Alternatively, we can track statically and
331 * dynamically accessed ranges separately and upload static rangtes
335 /* Limit our uploads to the amount of constant buffer space available in
336 * the hardware, minus what the shader compiler may need for various
337 * driver params. We do this UBO-to-push-constant before the real
338 * allocation of the driver params' const space, because UBO pointers can
339 * be driver params but this pass usually eliminatings them.
341 struct ir3_const_state worst_case_const_state
= { };
342 ir3_setup_const_state(shader
, nir
, &worst_case_const_state
);
343 const uint32_t max_upload
= (shader
->compiler
->max_const
-
344 worst_case_const_state
.offsets
.immediate
) * 16;
346 uint32_t offset
= shader
->const_state
.num_reserved_user_consts
* 16;
347 state
->num_enabled
= ARRAY_SIZE(state
->range
);
348 for (uint32_t i
= 0; i
< ARRAY_SIZE(state
->range
); i
++) {
349 if (state
->range
[i
].start
>= state
->range
[i
].end
) {
350 state
->num_enabled
= i
;
354 uint32_t range_size
= state
->range
[i
].end
- state
->range
[i
].start
;
356 debug_assert(offset
<= max_upload
);
357 state
->range
[i
].offset
= offset
;
358 if (offset
+ range_size
> max_upload
) {
359 range_size
= max_upload
- offset
;
360 state
->range
[i
].end
= state
->range
[i
].start
+ range_size
;
362 offset
+= range_size
;
365 state
->size
= offset
;
368 nir_foreach_function (function
, nir
) {
369 if (function
->impl
) {
371 nir_builder_init(&builder
, function
->impl
);
372 nir_foreach_block (block
, function
->impl
) {
373 nir_foreach_instr_safe (instr
, block
) {
374 if (instr_is_load_ubo(instr
))
375 lower_ubo_load_to_uniform(nir_instr_as_intrinsic(instr
),
376 &builder
, state
, &num_ubos
,
377 shader
->compiler
->const_upload_unit
);
381 nir_metadata_preserve(function
->impl
, nir_metadata_block_index
|
382 nir_metadata_dominance
);
385 /* Update the num_ubos field for GL (first_ubo_is_default_ubo). With
386 * Vulkan's bindless, we don't use the num_ubos field, so we can leave it
389 if (nir
->info
.first_ubo_is_default_ubo
)
390 nir
->info
.num_ubos
= num_ubos
;
392 return state
->lower_count
> 0;