nir: support lowering clipdist to arrays
[mesa.git] / src / freedreno / ir3 / ir3_nir_lower_io_offsets.c
1 /*
2 * Copyright © 2018-2019 Igalia S.L.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ir3_nir.h"
25 #include "compiler/nir/nir_builder.h"
26
27 /**
28 * This pass moves to NIR certain offset computations for different I/O
29 * ops that are currently implemented on the IR3 backend compiler, to
30 * give NIR a chance to optimize them:
31 *
32 * - Dword-offset for SSBO load, store and atomics: A new, similar intrinsic
33 * is emitted that replaces the original one, adding a new source that
34 * holds the result of the original byte-offset source divided by 4.
35 */
36
37
38 /* Returns the ir3-specific intrinsic opcode corresponding to an SSBO
39 * instruction that is handled by this pass. It also conveniently returns
40 * the offset source index in @offset_src_idx.
41 *
42 * If @intrinsic is not SSBO, or it is not handled by the pass, -1 is
43 * returned.
44 */
45 static int
46 get_ir3_intrinsic_for_ssbo_intrinsic(unsigned intrinsic,
47 uint8_t *offset_src_idx)
48 {
49 debug_assert(offset_src_idx);
50
51 *offset_src_idx = 1;
52
53 switch (intrinsic) {
54 case nir_intrinsic_store_ssbo:
55 *offset_src_idx = 2;
56 return nir_intrinsic_store_ssbo_ir3;
57 case nir_intrinsic_load_ssbo:
58 return nir_intrinsic_load_ssbo_ir3;
59 case nir_intrinsic_ssbo_atomic_add:
60 return nir_intrinsic_ssbo_atomic_add_ir3;
61 case nir_intrinsic_ssbo_atomic_imin:
62 return nir_intrinsic_ssbo_atomic_imin_ir3;
63 case nir_intrinsic_ssbo_atomic_umin:
64 return nir_intrinsic_ssbo_atomic_umin_ir3;
65 case nir_intrinsic_ssbo_atomic_imax:
66 return nir_intrinsic_ssbo_atomic_imax_ir3;
67 case nir_intrinsic_ssbo_atomic_umax:
68 return nir_intrinsic_ssbo_atomic_umax_ir3;
69 case nir_intrinsic_ssbo_atomic_and:
70 return nir_intrinsic_ssbo_atomic_and_ir3;
71 case nir_intrinsic_ssbo_atomic_or:
72 return nir_intrinsic_ssbo_atomic_or_ir3;
73 case nir_intrinsic_ssbo_atomic_xor:
74 return nir_intrinsic_ssbo_atomic_xor_ir3;
75 case nir_intrinsic_ssbo_atomic_exchange:
76 return nir_intrinsic_ssbo_atomic_exchange_ir3;
77 case nir_intrinsic_ssbo_atomic_comp_swap:
78 return nir_intrinsic_ssbo_atomic_comp_swap_ir3;
79 default:
80 break;
81 }
82
83 return -1;
84 }
85
86 static nir_ssa_def *
87 check_and_propagate_bit_shift32(nir_builder *b, nir_alu_instr *alu_instr,
88 int32_t direction, int32_t shift)
89 {
90 debug_assert(alu_instr->src[1].src.is_ssa);
91 nir_ssa_def *shift_ssa = alu_instr->src[1].src.ssa;
92
93 /* Only propagate if the shift is a const value so we can check value range
94 * statically.
95 */
96 nir_const_value *const_val = nir_src_as_const_value(alu_instr->src[1].src);
97 if (!const_val)
98 return NULL;
99
100 int32_t current_shift = const_val[0].i32 * direction;
101 int32_t new_shift = current_shift + shift;
102
103 /* If the merge would reverse the direction, bail out.
104 * e.g, 'x << 2' then 'x >> 4' is not 'x >> 2'.
105 */
106 if (current_shift * new_shift < 0)
107 return NULL;
108
109 /* If the propagation would overflow an int32_t, bail out too to be on the
110 * safe side.
111 */
112 if (new_shift < -31 || new_shift > 31)
113 return NULL;
114
115 /* Add or substract shift depending on the final direction (SHR vs. SHL). */
116 if (shift * direction < 0)
117 shift_ssa = nir_isub(b, shift_ssa, nir_imm_int(b, abs(shift)));
118 else
119 shift_ssa = nir_iadd(b, shift_ssa, nir_imm_int(b, abs(shift)));
120
121 return shift_ssa;
122 }
123
124 nir_ssa_def *
125 ir3_nir_try_propagate_bit_shift(nir_builder *b, nir_ssa_def *offset, int32_t shift)
126 {
127 nir_instr *offset_instr = offset->parent_instr;
128 if (offset_instr->type != nir_instr_type_alu)
129 return NULL;
130
131 nir_alu_instr *alu = nir_instr_as_alu(offset_instr);
132 nir_ssa_def *shift_ssa;
133 nir_ssa_def *new_offset = NULL;
134
135 b->cursor = nir_after_instr(&alu->instr);
136
137 /* the first src could be something like ssa_18.x, but we only want
138 * the single component. Otherwise the ishl/ishr/ushr could turn
139 * into a vec4 operation:
140 */
141 nir_ssa_def *src0 = nir_mov_alu(b, alu->src[0], 1);
142
143 switch (alu->op) {
144 case nir_op_ishl:
145 shift_ssa = check_and_propagate_bit_shift32(b, alu, 1, shift);
146 if (shift_ssa)
147 new_offset = nir_ishl(b, src0, shift_ssa);
148 break;
149 case nir_op_ishr:
150 shift_ssa = check_and_propagate_bit_shift32(b, alu, -1, shift);
151 if (shift_ssa)
152 new_offset = nir_ishr(b, src0, shift_ssa);
153 break;
154 case nir_op_ushr:
155 shift_ssa = check_and_propagate_bit_shift32(b, alu, -1, shift);
156 if (shift_ssa)
157 new_offset = nir_ushr(b, src0, shift_ssa);
158 break;
159 default:
160 return NULL;
161 }
162
163 return new_offset;
164 }
165
166 static bool
167 lower_offset_for_ssbo(nir_intrinsic_instr *intrinsic, nir_builder *b,
168 unsigned ir3_ssbo_opcode, uint8_t offset_src_idx)
169 {
170 unsigned num_srcs = nir_intrinsic_infos[intrinsic->intrinsic].num_srcs;
171
172 bool has_dest = nir_intrinsic_infos[intrinsic->intrinsic].has_dest;
173 nir_ssa_def *new_dest = NULL;
174
175 /* Here we create a new intrinsic and copy over all contents from the old one. */
176
177 nir_intrinsic_instr *new_intrinsic;
178 nir_src *target_src;
179
180 /* 'offset_src_idx' holds the index of the source that represent the offset. */
181 new_intrinsic =
182 nir_intrinsic_instr_create(b->shader, ir3_ssbo_opcode);
183
184 debug_assert(intrinsic->src[offset_src_idx].is_ssa);
185 nir_ssa_def *offset = intrinsic->src[offset_src_idx].ssa;
186
187 /* Since we don't have value range checking, we first try to propagate
188 * the division by 4 ('offset >> 2') into another bit-shift instruction that
189 * possibly defines the offset. If that's the case, we emit a similar
190 * instructions adjusting (merging) the shift value.
191 *
192 * Here we use the convention that shifting right is negative while shifting
193 * left is positive. So 'x / 4' ~ 'x >> 2' or 'x << -2'.
194 */
195 nir_ssa_def *new_offset = ir3_nir_try_propagate_bit_shift(b, offset, -2);
196
197 /* The new source that will hold the dword-offset is always the last
198 * one for every intrinsic.
199 */
200 target_src = &new_intrinsic->src[num_srcs];
201 *target_src = nir_src_for_ssa(offset);
202
203 if (has_dest) {
204 debug_assert(intrinsic->dest.is_ssa);
205 nir_ssa_def *dest = &intrinsic->dest.ssa;
206 nir_ssa_dest_init(&new_intrinsic->instr, &new_intrinsic->dest,
207 dest->num_components, dest->bit_size, NULL);
208 new_dest = &new_intrinsic->dest.ssa;
209 }
210
211 for (unsigned i = 0; i < num_srcs; i++)
212 new_intrinsic->src[i] = nir_src_for_ssa(intrinsic->src[i].ssa);
213
214 for (unsigned i = 0; i < NIR_INTRINSIC_MAX_CONST_INDEX; i++)
215 new_intrinsic->const_index[i] = intrinsic->const_index[i];
216
217 new_intrinsic->num_components = intrinsic->num_components;
218
219 b->cursor = nir_before_instr(&intrinsic->instr);
220
221 /* If we managed to propagate the division by 4, just use the new offset
222 * register and don't emit the SHR.
223 */
224 if (new_offset)
225 offset = new_offset;
226 else
227 offset = nir_ushr(b, offset, nir_imm_int(b, 2));
228
229 /* Insert the new intrinsic right before the old one. */
230 nir_builder_instr_insert(b, &new_intrinsic->instr);
231
232 /* Replace the last source of the new intrinsic by the result of
233 * the offset divided by 4.
234 */
235 nir_instr_rewrite_src(&new_intrinsic->instr,
236 target_src,
237 nir_src_for_ssa(offset));
238
239 if (has_dest) {
240 /* Replace the uses of the original destination by that
241 * of the new intrinsic.
242 */
243 nir_ssa_def_rewrite_uses(&intrinsic->dest.ssa,
244 nir_src_for_ssa(new_dest));
245 }
246
247 /* Finally remove the original intrinsic. */
248 nir_instr_remove(&intrinsic->instr);
249
250 return true;
251 }
252
253 static bool
254 lower_io_offsets_block(nir_block *block, nir_builder *b, void *mem_ctx)
255 {
256 bool progress = false;
257
258 nir_foreach_instr_safe(instr, block) {
259 if (instr->type != nir_instr_type_intrinsic)
260 continue;
261
262 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
263
264 /* SSBO */
265 int ir3_intrinsic;
266 uint8_t offset_src_idx;
267 ir3_intrinsic = get_ir3_intrinsic_for_ssbo_intrinsic(intr->intrinsic,
268 &offset_src_idx);
269 if (ir3_intrinsic != -1) {
270 progress |= lower_offset_for_ssbo(intr, b, (unsigned) ir3_intrinsic,
271 offset_src_idx);
272 }
273 }
274
275 return progress;
276 }
277
278 static bool
279 lower_io_offsets_func(nir_function_impl *impl)
280 {
281 void *mem_ctx = ralloc_parent(impl);
282 nir_builder b;
283 nir_builder_init(&b, impl);
284
285 bool progress = false;
286 nir_foreach_block_safe(block, impl) {
287 progress |= lower_io_offsets_block(block, &b, mem_ctx);
288 }
289
290 if (progress) {
291 nir_metadata_preserve(impl, nir_metadata_block_index |
292 nir_metadata_dominance);
293 }
294
295 return progress;
296 }
297
298 bool
299 ir3_nir_lower_io_offsets(nir_shader *shader)
300 {
301 bool progress = false;
302
303 nir_foreach_function(function, shader) {
304 if (function->impl)
305 progress |= lower_io_offsets_func(function->impl);
306 }
307
308 return progress;
309 }