freedreno/ir3: rename depth->dce
[mesa.git] / src / freedreno / ir3 / ir3_print.c
1 /*
2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include <stdarg.h>
28 #include <stdio.h>
29
30 #include "ir3.h"
31
32 #define PTRID(x) ((unsigned long)(x))
33
34 /* ansi escape sequences: */
35 #define RESET "\x1b[0m"
36 #define RED "\x1b[0;31m"
37 #define GREEN "\x1b[0;32m"
38 #define BLUE "\x1b[0;34m"
39 #define MAGENTA "\x1b[0;35m"
40
41 /* syntax coloring, mostly to make it easier to see different sorts of
42 * srcs (immediate, constant, ssa, array, ...)
43 */
44 #define SYN_REG(x) RED x RESET
45 #define SYN_IMMED(x) GREEN x RESET
46 #define SYN_CONST(x) GREEN x RESET
47 #define SYN_SSA(x) BLUE x RESET
48 #define SYN_ARRAY(x) MAGENTA x RESET
49
50 static const char *
51 type_name(type_t type)
52 {
53 static const char *type_names[] = {
54 [TYPE_F16] = "f16",
55 [TYPE_F32] = "f32",
56 [TYPE_U16] = "u16",
57 [TYPE_U32] = "u32",
58 [TYPE_S16] = "s16",
59 [TYPE_S32] = "s32",
60 [TYPE_U8] = "u8",
61 [TYPE_S8] = "s8",
62 };
63 return type_names[type];
64 }
65
66 static void print_instr_name(struct ir3_instruction *instr, bool flags)
67 {
68 if (!instr)
69 return;
70 #ifdef DEBUG
71 printf("%04u:", instr->serialno);
72 #endif
73 printf("%04u:", instr->name);
74 printf("%04u:", instr->ip);
75 if (instr->flags & IR3_INSTR_UNUSED) {
76 printf("XXX: ");
77 } else {
78 printf("%03u: ", instr->use_count);
79 }
80
81 if (flags) {
82 printf("\t");
83 if (instr->flags & IR3_INSTR_SY)
84 printf("(sy)");
85 if (instr->flags & IR3_INSTR_SS)
86 printf("(ss)");
87 if (instr->flags & IR3_INSTR_JP)
88 printf("(jp)");
89 if (instr->repeat)
90 printf("(rpt%d)", instr->repeat);
91 if (instr->nop)
92 printf("(nop%d)", instr->nop);
93 if (instr->flags & IR3_INSTR_UL)
94 printf("(ul)");
95 } else {
96 printf(" ");
97 }
98
99 if (is_meta(instr)) {
100 switch (instr->opc) {
101 case OPC_META_INPUT: printf("_meta:in"); break;
102 case OPC_META_SPLIT: printf("_meta:split"); break;
103 case OPC_META_COLLECT: printf("_meta:collect"); break;
104 case OPC_META_TEX_PREFETCH: printf("_meta:tex_prefetch"); break;
105
106 /* shouldn't hit here.. just for debugging: */
107 default: printf("_meta:%d", instr->opc); break;
108 }
109 } else if (instr->opc == OPC_MOV) {
110 if (instr->cat1.src_type == instr->cat1.dst_type)
111 printf("mov");
112 else
113 printf("cov");
114 printf(".%s%s", type_name(instr->cat1.src_type),
115 type_name(instr->cat1.dst_type));
116 } else {
117 printf("%s", ir3_instr_name(instr));
118 if (instr->flags & IR3_INSTR_3D)
119 printf(".3d");
120 if (instr->flags & IR3_INSTR_A)
121 printf(".a");
122 if (instr->flags & IR3_INSTR_O)
123 printf(".o");
124 if (instr->flags & IR3_INSTR_P)
125 printf(".p");
126 if (instr->flags & IR3_INSTR_S)
127 printf(".s");
128 if (instr->flags & IR3_INSTR_A1EN)
129 printf(".a1en");
130 if (instr->flags & IR3_INSTR_B) {
131 printf(".base%d",
132 is_tex(instr) ? instr->cat5.tex_base : instr->cat6.base);
133 }
134 if (instr->flags & IR3_INSTR_S2EN)
135 printf(".s2en");
136 }
137 }
138
139 static void print_reg_name(struct ir3_register *reg)
140 {
141 if ((reg->flags & (IR3_REG_FABS | IR3_REG_SABS)) &&
142 (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)))
143 printf("(absneg)");
144 else if (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT))
145 printf("(neg)");
146 else if (reg->flags & (IR3_REG_FABS | IR3_REG_SABS))
147 printf("(abs)");
148
149 if (reg->flags & IR3_REG_HIGH)
150 printf("H");
151 if (reg->flags & IR3_REG_HALF)
152 printf("h");
153
154 if (reg->flags & IR3_REG_IMMED) {
155 printf(SYN_IMMED("imm[%f,%d,0x%x]"), reg->fim_val, reg->iim_val, reg->iim_val);
156 } else if (reg->flags & IR3_REG_ARRAY) {
157 printf(SYN_ARRAY("arr[id=%u, offset=%d, size=%u"), reg->array.id,
158 reg->array.offset, reg->size);
159 /* for ARRAY we could have null src, for example first write
160 * instruction..
161 */
162 if (reg->instr) {
163 printf(SYN_ARRAY(", "));
164 printf(SYN_SSA("_["));
165 print_instr_name(reg->instr, false);
166 printf(SYN_SSA("]"));
167 }
168 printf(SYN_ARRAY("]"));
169 } else if (reg->flags & IR3_REG_SSA) {
170 printf(SYN_SSA("_["));
171 print_instr_name(reg->instr, false);
172 printf(SYN_SSA("]"));
173 } else if (reg->flags & IR3_REG_RELATIV) {
174 if (reg->flags & IR3_REG_CONST)
175 printf(SYN_CONST("c<a0.x + %d>"), reg->array.offset);
176 else
177 printf(SYN_REG("r<a0.x + %d>")" (%u)", reg->array.offset, reg->size);
178 } else {
179 if (reg->flags & IR3_REG_CONST)
180 printf(SYN_CONST("c%u.%c"), reg_num(reg), "xyzw"[reg_comp(reg)]);
181 else
182 printf(SYN_REG("r%u.%c"), reg_num(reg), "xyzw"[reg_comp(reg)]);
183 }
184
185 if (reg->wrmask > 0x1)
186 printf(" (wrmask=0x%x)", reg->wrmask);
187 }
188
189 static void
190 tab(int lvl)
191 {
192 for (int i = 0; i < lvl; i++)
193 printf("\t");
194 }
195
196 static void
197 print_instr(struct ir3_instruction *instr, int lvl)
198 {
199 unsigned i;
200
201 tab(lvl);
202
203 print_instr_name(instr, true);
204
205 if (is_tex(instr)) {
206 printf(" (%s)(", type_name(instr->cat5.type));
207 for (i = 0; i < 4; i++)
208 if (instr->regs[0]->wrmask & (1 << i))
209 printf("%c", "xyzw"[i]);
210 printf(")");
211 } else if (instr->regs_count > 0) {
212 printf(" ");
213 }
214
215 for (i = 0; i < instr->regs_count; i++) {
216 struct ir3_register *reg = instr->regs[i];
217
218 printf(i ? ", " : "");
219 print_reg_name(reg);
220 }
221
222 if (is_tex(instr) && !(instr->flags & IR3_INSTR_S2EN)) {
223 if (!!(instr->flags & IR3_INSTR_B)) {
224 if (!!(instr->flags & IR3_INSTR_A1EN)) {
225 printf(", s#%d", instr->cat5.samp);
226 } else {
227 printf(", s#%d, t#%d", instr->cat5.samp & 0xf,
228 instr->cat5.samp >> 4);
229 }
230 } else {
231 printf(", s#%d, t#%d", instr->cat5.samp, instr->cat5.tex);
232 }
233 }
234
235 if (instr->address) {
236 printf(", address=_");
237 printf("[");
238 print_instr_name(instr->address, false);
239 printf("]");
240 }
241
242 if (instr->cp.left) {
243 printf(", left=_");
244 printf("[");
245 print_instr_name(instr->cp.left, false);
246 printf("]");
247 }
248
249 if (instr->cp.right) {
250 printf(", right=_");
251 printf("[");
252 print_instr_name(instr->cp.right, false);
253 printf("]");
254 }
255
256 if (instr->opc == OPC_META_SPLIT) {
257 printf(", off=%d", instr->split.off);
258 } else if (instr->opc == OPC_META_TEX_PREFETCH) {
259 printf(", tex=%d, samp=%d, input_offset=%d", instr->prefetch.tex,
260 instr->prefetch.samp, instr->prefetch.input_offset);
261 }
262
263 if (is_flow(instr) && instr->cat0.target) {
264 /* the predicate register src is implied: */
265 if (instr->opc == OPC_BR) {
266 printf(" %sp0.x", instr->cat0.inv ? "!" : "");
267 }
268 printf(", target=block%u", block_id(instr->cat0.target));
269 }
270
271 if (instr->deps_count) {
272 printf(", false-deps:");
273 for (unsigned i = 0; i < instr->deps_count; i++) {
274 if (i > 0)
275 printf(", ");
276 printf("_[");
277 print_instr_name(instr->deps[i], false);
278 printf("]");
279 }
280 }
281
282 printf("\n");
283 }
284
285 void ir3_print_instr(struct ir3_instruction *instr)
286 {
287 print_instr(instr, 0);
288 }
289
290 static void
291 print_block(struct ir3_block *block, int lvl)
292 {
293 tab(lvl); printf("block%u {\n", block_id(block));
294
295 /* computerator (ir3 assembler) doesn't really use blocks for flow
296 * control, so block->predecessors will be null.
297 */
298 if (block->predecessors && block->predecessors->entries > 0) {
299 unsigned i = 0;
300 tab(lvl+1);
301 printf("pred: ");
302 set_foreach(block->predecessors, entry) {
303 struct ir3_block *pred = (struct ir3_block *)entry->key;
304 if (i++)
305 printf(", ");
306 printf("block%u", block_id(pred));
307 }
308 printf("\n");
309 }
310
311 foreach_instr (instr, &block->instr_list) {
312 print_instr(instr, lvl+1);
313 }
314
315 tab(lvl+1); printf("/* keeps:\n");
316 for (unsigned i = 0; i < block->keeps_count; i++) {
317 print_instr(block->keeps[i], lvl+2);
318 }
319 tab(lvl+1); printf(" */\n");
320
321 if (block->successors[1]) {
322 /* leading into if/else: */
323 tab(lvl+1);
324 printf("/* succs: if _[");
325 print_instr_name(block->condition, false);
326 printf("] block%u; else block%u; */\n",
327 block_id(block->successors[0]),
328 block_id(block->successors[1]));
329 } else if (block->successors[0]) {
330 tab(lvl+1);
331 printf("/* succs: block%u; */\n",
332 block_id(block->successors[0]));
333 }
334 tab(lvl); printf("}\n");
335 }
336
337 void
338 ir3_print(struct ir3 *ir)
339 {
340 foreach_block (block, &ir->block_list)
341 print_block(block, 0);
342
343 struct ir3_instruction *out;
344 foreach_output_n (out, i, ir) {
345 printf("out%d: ", i);
346 print_instr(out, 0);
347 }
348 }