freedreno/ir3: small cleanup and comments
[mesa.git] / src / freedreno / ir3 / ir3_print.c
1 /*
2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include <stdarg.h>
28 #include <stdio.h>
29
30 #include "ir3.h"
31
32 #define PTRID(x) ((unsigned long)(x))
33
34 /* ansi escape sequences: */
35 #define RESET "\x1b[0m"
36 #define RED "\x1b[0;31m"
37 #define GREEN "\x1b[0;32m"
38 #define BLUE "\x1b[0;34m"
39 #define MAGENTA "\x1b[0;35m"
40
41 /* syntax coloring, mostly to make it easier to see different sorts of
42 * srcs (immediate, constant, ssa, array, ...)
43 */
44 #define SYN_REG(x) RED x RESET
45 #define SYN_IMMED(x) GREEN x RESET
46 #define SYN_CONST(x) GREEN x RESET
47 #define SYN_SSA(x) BLUE x RESET
48 #define SYN_ARRAY(x) MAGENTA x RESET
49
50 static const char *
51 type_name(type_t type)
52 {
53 static const char *type_names[] = {
54 [TYPE_F16] = "f16",
55 [TYPE_F32] = "f32",
56 [TYPE_U16] = "u16",
57 [TYPE_U32] = "u32",
58 [TYPE_S16] = "s16",
59 [TYPE_S32] = "s32",
60 [TYPE_U8] = "u8",
61 [TYPE_S8] = "s8",
62 };
63 return type_names[type];
64 }
65
66 static void print_instr_name(struct ir3_instruction *instr, bool flags)
67 {
68 if (!instr)
69 return;
70 #ifdef DEBUG
71 printf("%04u:", instr->serialno);
72 #endif
73 printf("%04u:", instr->name);
74 printf("%04u:", instr->ip);
75 printf("%03d:", instr->depth);
76 printf("%03u: ", instr->use_count);
77
78 if (flags) {
79 printf("\t");
80 if (instr->flags & IR3_INSTR_SY)
81 printf("(sy)");
82 if (instr->flags & IR3_INSTR_SS)
83 printf("(ss)");
84 if (instr->flags & IR3_INSTR_JP)
85 printf("(jp)");
86 if (instr->repeat)
87 printf("(rpt%d)", instr->repeat);
88 if (instr->nop)
89 printf("(nop%d)", instr->nop);
90 if (instr->flags & IR3_INSTR_UL)
91 printf("(ul)");
92 } else {
93 printf(" ");
94 }
95
96 if (is_meta(instr)) {
97 switch (instr->opc) {
98 case OPC_META_INPUT: printf("_meta:in"); break;
99 case OPC_META_SPLIT: printf("_meta:split"); break;
100 case OPC_META_COLLECT: printf("_meta:collect"); break;
101 case OPC_META_TEX_PREFETCH: printf("_meta:tex_prefetch"); break;
102
103 /* shouldn't hit here.. just for debugging: */
104 default: printf("_meta:%d", instr->opc); break;
105 }
106 } else if (instr->opc == OPC_MOV) {
107 if (instr->cat1.src_type == instr->cat1.dst_type)
108 printf("mov");
109 else
110 printf("cov");
111 printf(".%s%s", type_name(instr->cat1.src_type),
112 type_name(instr->cat1.dst_type));
113 } else {
114 printf("%s", ir3_instr_name(instr));
115 if (instr->flags & IR3_INSTR_3D)
116 printf(".3d");
117 if (instr->flags & IR3_INSTR_A)
118 printf(".a");
119 if (instr->flags & IR3_INSTR_O)
120 printf(".o");
121 if (instr->flags & IR3_INSTR_P)
122 printf(".p");
123 if (instr->flags & IR3_INSTR_S)
124 printf(".s");
125 if (instr->flags & IR3_INSTR_S2EN)
126 printf(".s2en");
127 }
128 }
129
130 static void print_reg_name(struct ir3_register *reg)
131 {
132 if ((reg->flags & (IR3_REG_FABS | IR3_REG_SABS)) &&
133 (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)))
134 printf("(absneg)");
135 else if (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT))
136 printf("(neg)");
137 else if (reg->flags & (IR3_REG_FABS | IR3_REG_SABS))
138 printf("(abs)");
139
140 if (reg->flags & IR3_REG_HIGH)
141 printf("H");
142 if (reg->flags & IR3_REG_HALF)
143 printf("h");
144
145 if (reg->flags & IR3_REG_IMMED) {
146 printf(SYN_IMMED("imm[%f,%d,0x%x]"), reg->fim_val, reg->iim_val, reg->iim_val);
147 } else if (reg->flags & IR3_REG_ARRAY) {
148 printf(SYN_ARRAY("arr[id=%u, offset=%d, size=%u"), reg->array.id,
149 reg->array.offset, reg->size);
150 /* for ARRAY we could have null src, for example first write
151 * instruction..
152 */
153 if (reg->instr) {
154 printf(SYN_ARRAY(", "));
155 printf(SYN_SSA("_["));
156 print_instr_name(reg->instr, false);
157 printf(SYN_SSA("]"));
158 }
159 printf(SYN_ARRAY("]"));
160 } else if (reg->flags & IR3_REG_SSA) {
161 printf(SYN_SSA("_["));
162 print_instr_name(reg->instr, false);
163 printf(SYN_SSA("]"));
164 } else if (reg->flags & IR3_REG_RELATIV) {
165 if (reg->flags & IR3_REG_CONST)
166 printf(SYN_CONST("c<a0.x + %d>"), reg->array.offset);
167 else
168 printf(SYN_REG("r<a0.x + %d>")" (%u)", reg->array.offset, reg->size);
169 } else {
170 if (reg->flags & IR3_REG_CONST)
171 printf(SYN_CONST("c%u.%c"), reg_num(reg), "xyzw"[reg_comp(reg)]);
172 else
173 printf(SYN_REG("r%u.%c"), reg_num(reg), "xyzw"[reg_comp(reg)]);
174 }
175
176 if (reg->wrmask > 0x1)
177 printf(" (wrmask=0x%x)", reg->wrmask);
178 }
179
180 static void
181 tab(int lvl)
182 {
183 for (int i = 0; i < lvl; i++)
184 printf("\t");
185 }
186
187 static void
188 print_instr(struct ir3_instruction *instr, int lvl)
189 {
190 unsigned i;
191
192 tab(lvl);
193
194 print_instr_name(instr, true);
195
196 if (is_tex(instr)) {
197 printf(" (%s)(", type_name(instr->cat5.type));
198 for (i = 0; i < 4; i++)
199 if (instr->regs[0]->wrmask & (1 << i))
200 printf("%c", "xyzw"[i]);
201 printf(")");
202 } else if (instr->regs_count > 0) {
203 printf(" ");
204 }
205
206 for (i = 0; i < instr->regs_count; i++) {
207 struct ir3_register *reg = instr->regs[i];
208
209 printf(i ? ", " : "");
210 print_reg_name(reg);
211 }
212
213 if (is_tex(instr) && !(instr->flags & IR3_INSTR_S2EN))
214 printf(", s#%d, t#%d", instr->cat5.samp, instr->cat5.tex);
215
216 if (instr->address) {
217 printf(", address=_");
218 printf("[");
219 print_instr_name(instr->address, false);
220 printf("]");
221 }
222
223 if (instr->cp.left) {
224 printf(", left=_");
225 printf("[");
226 print_instr_name(instr->cp.left, false);
227 printf("]");
228 }
229
230 if (instr->cp.right) {
231 printf(", right=_");
232 printf("[");
233 print_instr_name(instr->cp.right, false);
234 printf("]");
235 }
236
237 if (instr->opc == OPC_META_SPLIT) {
238 printf(", off=%d", instr->split.off);
239 } else if (instr->opc == OPC_META_TEX_PREFETCH) {
240 printf(", tex=%d, samp=%d, input_offset=%d", instr->prefetch.tex,
241 instr->prefetch.samp, instr->prefetch.input_offset);
242 }
243
244 if (is_flow(instr) && instr->cat0.target) {
245 /* the predicate register src is implied: */
246 if (instr->opc == OPC_BR) {
247 printf(" %sp0.x", instr->cat0.inv ? "!" : "");
248 }
249 printf(", target=block%u", block_id(instr->cat0.target));
250 }
251
252 if (instr->deps_count) {
253 printf(", false-deps:");
254 for (unsigned i = 0; i < instr->deps_count; i++) {
255 if (i > 0)
256 printf(", ");
257 printf("_[");
258 print_instr_name(instr->deps[i], false);
259 printf("]");
260 }
261 }
262
263 printf("\n");
264 }
265
266 void ir3_print_instr(struct ir3_instruction *instr)
267 {
268 print_instr(instr, 0);
269 }
270
271 static void
272 print_block(struct ir3_block *block, int lvl)
273 {
274 tab(lvl); printf("block%u {\n", block_id(block));
275
276 /* computerator (ir3 assembler) doesn't really use blocks for flow
277 * control, so block->predecessors will be null.
278 */
279 if (block->predecessors && block->predecessors->entries > 0) {
280 unsigned i = 0;
281 tab(lvl+1);
282 printf("pred: ");
283 set_foreach(block->predecessors, entry) {
284 struct ir3_block *pred = (struct ir3_block *)entry->key;
285 if (i++)
286 printf(", ");
287 printf("block%u", block_id(pred));
288 }
289 printf("\n");
290 }
291
292 foreach_instr (instr, &block->instr_list) {
293 print_instr(instr, lvl+1);
294 }
295
296 tab(lvl+1); printf("/* keeps:\n");
297 for (unsigned i = 0; i < block->keeps_count; i++) {
298 print_instr(block->keeps[i], lvl+2);
299 }
300 tab(lvl+1); printf(" */\n");
301
302 if (block->successors[1]) {
303 /* leading into if/else: */
304 tab(lvl+1);
305 printf("/* succs: if _[");
306 print_instr_name(block->condition, false);
307 printf("] block%u; else block%u; */\n",
308 block_id(block->successors[0]),
309 block_id(block->successors[1]));
310 } else if (block->successors[0]) {
311 tab(lvl+1);
312 printf("/* succs: block%u; */\n",
313 block_id(block->successors[0]));
314 }
315 tab(lvl); printf("}\n");
316 }
317
318 void
319 ir3_print(struct ir3 *ir)
320 {
321 foreach_block (block, &ir->block_list)
322 print_block(block, 0);
323
324 struct ir3_instruction *out;
325 foreach_output_n (out, i, ir) {
326 printf("out%d: ", i);
327 print_instr(out, 0);
328 }
329 }