ir3: Fix LDC offset units
[mesa.git] / src / freedreno / ir3 / ir3_print.c
1 /*
2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include <stdarg.h>
28 #include <stdio.h>
29
30 #include "ir3.h"
31
32 #define PTRID(x) ((unsigned long)(x))
33
34 /* ansi escape sequences: */
35 #define RESET "\x1b[0m"
36 #define RED "\x1b[0;31m"
37 #define GREEN "\x1b[0;32m"
38 #define BLUE "\x1b[0;34m"
39 #define MAGENTA "\x1b[0;35m"
40
41 /* syntax coloring, mostly to make it easier to see different sorts of
42 * srcs (immediate, constant, ssa, array, ...)
43 */
44 #define SYN_REG(x) RED x RESET
45 #define SYN_IMMED(x) GREEN x RESET
46 #define SYN_CONST(x) GREEN x RESET
47 #define SYN_SSA(x) BLUE x RESET
48 #define SYN_ARRAY(x) MAGENTA x RESET
49
50 static const char *
51 type_name(type_t type)
52 {
53 static const char *type_names[] = {
54 [TYPE_F16] = "f16",
55 [TYPE_F32] = "f32",
56 [TYPE_U16] = "u16",
57 [TYPE_U32] = "u32",
58 [TYPE_S16] = "s16",
59 [TYPE_S32] = "s32",
60 [TYPE_U8] = "u8",
61 [TYPE_S8] = "s8",
62 };
63 return type_names[type];
64 }
65
66 static void print_instr_name(struct ir3_instruction *instr, bool flags)
67 {
68 if (!instr)
69 return;
70 #ifdef DEBUG
71 printf("%04u:", instr->serialno);
72 #endif
73 printf("%04u:", instr->name);
74 printf("%04u:", instr->ip);
75 if (instr->flags & IR3_INSTR_UNUSED) {
76 printf("XXX: ");
77 } else {
78 printf("%03u: ", instr->use_count);
79 }
80
81 if (flags) {
82 printf("\t");
83 if (instr->flags & IR3_INSTR_SY)
84 printf("(sy)");
85 if (instr->flags & IR3_INSTR_SS)
86 printf("(ss)");
87 if (instr->flags & IR3_INSTR_JP)
88 printf("(jp)");
89 if (instr->repeat)
90 printf("(rpt%d)", instr->repeat);
91 if (instr->nop)
92 printf("(nop%d)", instr->nop);
93 if (instr->flags & IR3_INSTR_UL)
94 printf("(ul)");
95 } else {
96 printf(" ");
97 }
98
99 if (is_meta(instr)) {
100 switch (instr->opc) {
101 case OPC_META_INPUT: printf("_meta:in"); break;
102 case OPC_META_SPLIT: printf("_meta:split"); break;
103 case OPC_META_COLLECT: printf("_meta:collect"); break;
104 case OPC_META_TEX_PREFETCH: printf("_meta:tex_prefetch"); break;
105
106 /* shouldn't hit here.. just for debugging: */
107 default: printf("_meta:%d", instr->opc); break;
108 }
109 } else if (instr->opc == OPC_MOV) {
110 if (instr->cat1.src_type == instr->cat1.dst_type)
111 printf("mov");
112 else
113 printf("cov");
114 printf(".%s%s", type_name(instr->cat1.src_type),
115 type_name(instr->cat1.dst_type));
116 } else {
117 printf("%s", ir3_instr_name(instr));
118 if (instr->flags & IR3_INSTR_3D)
119 printf(".3d");
120 if (instr->flags & IR3_INSTR_A)
121 printf(".a");
122 if (instr->flags & IR3_INSTR_O)
123 printf(".o");
124 if (instr->flags & IR3_INSTR_P)
125 printf(".p");
126 if (instr->flags & IR3_INSTR_S)
127 printf(".s");
128 if (instr->flags & IR3_INSTR_A1EN)
129 printf(".a1en");
130 if (instr->opc == OPC_LDC)
131 printf(".offset%d", instr->cat6.d);
132 if (instr->flags & IR3_INSTR_B) {
133 printf(".base%d",
134 is_tex(instr) ? instr->cat5.tex_base : instr->cat6.base);
135 }
136 if (instr->flags & IR3_INSTR_S2EN)
137 printf(".s2en");
138 }
139 }
140
141 static void print_reg_name(struct ir3_register *reg)
142 {
143 if ((reg->flags & (IR3_REG_FABS | IR3_REG_SABS)) &&
144 (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)))
145 printf("(absneg)");
146 else if (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT))
147 printf("(neg)");
148 else if (reg->flags & (IR3_REG_FABS | IR3_REG_SABS))
149 printf("(abs)");
150
151 if (reg->flags & IR3_REG_HIGH)
152 printf("H");
153 if (reg->flags & IR3_REG_HALF)
154 printf("h");
155
156 if (reg->flags & IR3_REG_IMMED) {
157 printf(SYN_IMMED("imm[%f,%d,0x%x]"), reg->fim_val, reg->iim_val, reg->iim_val);
158 } else if (reg->flags & IR3_REG_ARRAY) {
159 printf(SYN_ARRAY("arr[id=%u, offset=%d, size=%u"), reg->array.id,
160 reg->array.offset, reg->size);
161 /* for ARRAY we could have null src, for example first write
162 * instruction..
163 */
164 if (reg->instr) {
165 printf(SYN_ARRAY(", "));
166 printf(SYN_SSA("_["));
167 print_instr_name(reg->instr, false);
168 printf(SYN_SSA("]"));
169 }
170 printf(SYN_ARRAY("]"));
171 } else if (reg->flags & IR3_REG_SSA) {
172 printf(SYN_SSA("_["));
173 print_instr_name(reg->instr, false);
174 printf(SYN_SSA("]"));
175 } else if (reg->flags & IR3_REG_RELATIV) {
176 if (reg->flags & IR3_REG_CONST)
177 printf(SYN_CONST("c<a0.x + %d>"), reg->array.offset);
178 else
179 printf(SYN_REG("r<a0.x + %d>")" (%u)", reg->array.offset, reg->size);
180 } else {
181 if (reg->flags & IR3_REG_CONST)
182 printf(SYN_CONST("c%u.%c"), reg_num(reg), "xyzw"[reg_comp(reg)]);
183 else
184 printf(SYN_REG("r%u.%c"), reg_num(reg), "xyzw"[reg_comp(reg)]);
185 }
186
187 if (reg->wrmask > 0x1)
188 printf(" (wrmask=0x%x)", reg->wrmask);
189 }
190
191 static void
192 tab(int lvl)
193 {
194 for (int i = 0; i < lvl; i++)
195 printf("\t");
196 }
197
198 static void
199 print_instr(struct ir3_instruction *instr, int lvl)
200 {
201 unsigned i;
202
203 tab(lvl);
204
205 print_instr_name(instr, true);
206
207 if (is_tex(instr)) {
208 printf(" (%s)(", type_name(instr->cat5.type));
209 for (i = 0; i < 4; i++)
210 if (instr->regs[0]->wrmask & (1 << i))
211 printf("%c", "xyzw"[i]);
212 printf(")");
213 } else if (instr->regs_count > 0) {
214 printf(" ");
215 }
216
217 for (i = 0; i < instr->regs_count; i++) {
218 struct ir3_register *reg = instr->regs[i];
219
220 printf(i ? ", " : "");
221 print_reg_name(reg);
222 }
223
224 if (is_tex(instr) && !(instr->flags & IR3_INSTR_S2EN)) {
225 if (!!(instr->flags & IR3_INSTR_B)) {
226 if (!!(instr->flags & IR3_INSTR_A1EN)) {
227 printf(", s#%d", instr->cat5.samp);
228 } else {
229 printf(", s#%d, t#%d", instr->cat5.samp & 0xf,
230 instr->cat5.samp >> 4);
231 }
232 } else {
233 printf(", s#%d, t#%d", instr->cat5.samp, instr->cat5.tex);
234 }
235 }
236
237 if (instr->address) {
238 printf(", address=_");
239 printf("[");
240 print_instr_name(instr->address, false);
241 printf("]");
242 }
243
244 if (instr->cp.left) {
245 printf(", left=_");
246 printf("[");
247 print_instr_name(instr->cp.left, false);
248 printf("]");
249 }
250
251 if (instr->cp.right) {
252 printf(", right=_");
253 printf("[");
254 print_instr_name(instr->cp.right, false);
255 printf("]");
256 }
257
258 if (instr->opc == OPC_META_SPLIT) {
259 printf(", off=%d", instr->split.off);
260 } else if (instr->opc == OPC_META_TEX_PREFETCH) {
261 printf(", tex=%d, samp=%d, input_offset=%d", instr->prefetch.tex,
262 instr->prefetch.samp, instr->prefetch.input_offset);
263 }
264
265 if (is_flow(instr) && instr->cat0.target) {
266 /* the predicate register src is implied: */
267 if (instr->opc == OPC_BR) {
268 printf(" %sp0.x", instr->cat0.inv ? "!" : "");
269 }
270 printf(", target=block%u", block_id(instr->cat0.target));
271 }
272
273 if (instr->deps_count) {
274 printf(", false-deps:");
275 for (unsigned i = 0; i < instr->deps_count; i++) {
276 if (i > 0)
277 printf(", ");
278 printf("_[");
279 print_instr_name(instr->deps[i], false);
280 printf("]");
281 }
282 }
283
284 printf("\n");
285 }
286
287 void ir3_print_instr(struct ir3_instruction *instr)
288 {
289 print_instr(instr, 0);
290 }
291
292 static void
293 print_block(struct ir3_block *block, int lvl)
294 {
295 tab(lvl); printf("block%u {\n", block_id(block));
296
297 /* computerator (ir3 assembler) doesn't really use blocks for flow
298 * control, so block->predecessors will be null.
299 */
300 if (block->predecessors && block->predecessors->entries > 0) {
301 unsigned i = 0;
302 tab(lvl+1);
303 printf("pred: ");
304 set_foreach(block->predecessors, entry) {
305 struct ir3_block *pred = (struct ir3_block *)entry->key;
306 if (i++)
307 printf(", ");
308 printf("block%u", block_id(pred));
309 }
310 printf("\n");
311 }
312
313 foreach_instr (instr, &block->instr_list) {
314 print_instr(instr, lvl+1);
315 }
316
317 tab(lvl+1); printf("/* keeps:\n");
318 for (unsigned i = 0; i < block->keeps_count; i++) {
319 print_instr(block->keeps[i], lvl+2);
320 }
321 tab(lvl+1); printf(" */\n");
322
323 if (block->successors[1]) {
324 /* leading into if/else: */
325 tab(lvl+1);
326 printf("/* succs: if _[");
327 print_instr_name(block->condition, false);
328 printf("] block%u; else block%u; */\n",
329 block_id(block->successors[0]),
330 block_id(block->successors[1]));
331 } else if (block->successors[0]) {
332 tab(lvl+1);
333 printf("/* succs: block%u; */\n",
334 block_id(block->successors[0]));
335 }
336 tab(lvl); printf("}\n");
337 }
338
339 void
340 ir3_print(struct ir3 *ir)
341 {
342 foreach_block (block, &ir->block_list)
343 print_block(block, 0);
344
345 struct ir3_instruction *out;
346 foreach_output_n (out, i, ir) {
347 printf("out%d: ", i);
348 print_instr(out, 0);
349 }
350 }