src/freedreno/ir3/ir3_validate.c

   1 /*
   2  * Copyright © 2020 Google, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  */
  23
  24 #include <stdlib.h>
  25
  26 #include "util/ralloc.h"
  27
  28 #include "ir3.h"
  29
  30 struct ir3_validate_ctx {
  31         struct ir3 *ir;
  32
  33         /* Current instruction being validated: */
  34         struct ir3_instruction *current_instr;
  35
  36         /* Set of instructions found so far, used to validate that we
  37          * don't have SSA uses that occure before def's
  38          */
  39         struct set *defs;
  40 };
  41
  42 static void
  43 validate_error(struct ir3_validate_ctx *ctx, const char *condstr)
  44 {
  45         fprintf(stderr, "validation fail: %s\n", condstr);
  46         fprintf(stderr, "  -> for instruction: ");
  47         ir3_print_instr(ctx->current_instr);
  48         abort();
  49 }
  50
  51 #define validate_assert(ctx, cond) do { \
  52         if (!(cond)) { \
  53                 validate_error(ctx, #cond); \
  54         } } while (0)
  55
  56 static unsigned
  57 reg_class_flags(struct ir3_register *reg)
  58 {
  59         return reg->flags & (IR3_REG_HALF | IR3_REG_HIGH);
  60 }
  61
  62 static void
  63 validate_src(struct ir3_validate_ctx *ctx, struct ir3_register *reg)
  64 {
  65         struct ir3_instruction *src = ssa(reg);
  66
  67         if (!src)
  68                 return;
  69
  70         validate_assert(ctx, _mesa_set_search(ctx->defs, src));
  71         validate_assert(ctx, src->regs[0]->wrmask == reg->wrmask);
  72         validate_assert(ctx, reg_class_flags(src->regs[0]) == reg_class_flags(reg));
  73 }
  74
  75 static void
  76 validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
  77 {
  78         struct ir3_register *last_reg = NULL;
  79
  80         if (writes_gpr(instr)) {
  81                 if (instr->regs[0]->flags & IR3_REG_RELATIV) {
  82                         validate_assert(ctx, instr->address);
  83                 }
  84         }
  85
  86         foreach_src_n (reg, n, instr) {
  87                 if (reg->flags & IR3_REG_RELATIV)
  88                         validate_assert(ctx, instr->address);
  89
  90                 validate_src(ctx, reg);
  91
  92                 /* Validate that all src's are either half of full.
  93                  *
  94                  * Note: tex instructions w/ .s2en are a bit special in
  95                  * that the tex/samp src reg is half-reg irrespective of
  96                  * the precision of other srcs.  The tex/samp src is the
  97                  * first src reg when .s2en is set
  98                  */
  99                 if ((instr->flags & IR3_INSTR_S2EN) && (n < 2)) {
 100                         if (n == 0) {
 101                                 validate_assert(ctx, reg->flags & IR3_REG_HALF);
 102                         }
 103                 } else if (n > 0) {
 104                         validate_assert(ctx, (last_reg->flags & IR3_REG_HALF) == (reg->flags & IR3_REG_HALF));
 105                 }
 106
 107                 last_reg = reg;
 108         }
 109
 110         _mesa_set_add(ctx->defs, instr);
 111
 112         /* Check that src/dst types match the register types, and for
 113          * instructions that have different opcodes depending on type,
 114          * that the opcodes are correct.
 115          */
 116         switch (opc_cat(instr->opc)) {
 117         case 1: /* move instructions */
 118                 if (instr->regs[0]->flags & IR3_REG_HALF) {
 119                         validate_assert(ctx, instr->cat1.dst_type == half_type(instr->cat1.dst_type));
 120                 } else {
 121                         validate_assert(ctx, instr->cat1.dst_type == full_type(instr->cat1.dst_type));
 122                 }
 123                 if (instr->regs[1]->flags & IR3_REG_HALF) {
 124                         validate_assert(ctx, instr->cat1.src_type == half_type(instr->cat1.src_type));
 125                 } else {
 126                         validate_assert(ctx, instr->cat1.src_type == full_type(instr->cat1.src_type));
 127                 }
 128                 break;
 129         case 3:
 130                 /* Validate that cat3 opc matches the src type.  We've already checked that all
 131                  * the src regs are same type
 132                  */
 133                 if (instr->regs[1]->flags & IR3_REG_HALF) {
 134                         validate_assert(ctx, instr->opc == cat3_half_opc(instr->opc));
 135                 } else {
 136                         validate_assert(ctx, instr->opc == cat3_full_opc(instr->opc));
 137                 }
 138                 break;
 139         case 4:
 140                 /* Validate that cat4 opc matches the dst type: */
 141                 if (instr->regs[0]->flags & IR3_REG_HALF) {
 142                         validate_assert(ctx, instr->opc == cat4_half_opc(instr->opc));
 143                 } else {
 144                         validate_assert(ctx, instr->opc == cat4_full_opc(instr->opc));
 145                 }
 146                 break;
 147         case 5:
 148                 if (instr->regs[0]->flags & IR3_REG_HALF) {
 149                         validate_assert(ctx, instr->cat5.type == half_type(instr->cat5.type));
 150                 } else {
 151                         validate_assert(ctx, instr->cat5.type == full_type(instr->cat5.type));
 152                 }
 153                 break;
 154         }
 155 }
 156
 157 void
 158 ir3_validate(struct ir3 *ir)
 159 {
 160 #ifdef NDEBUG
 161 #  define VALIDATE 0
 162 #else
 163 #  define VALIDATE 1
 164 #endif
 165
 166         if (!VALIDATE)
 167                 return;
 168
 169         struct ir3_validate_ctx *ctx = ralloc_size(NULL, sizeof(*ctx));
 170
 171         ctx->ir = ir;
 172         ctx->defs = _mesa_pointer_set_create(ctx);
 173
 174         foreach_block (block, &ir->block_list) {
 175                 foreach_instr (instr, &block->instr_list) {
 176                         ctx->current_instr = instr;
 177                         validate_instr(ctx, instr);
 178                 }
 179         }
 180
 181         ralloc_free(ctx);
 182 }