freedreno/ir3/validate: add checking for types and opcodes
[mesa.git] / src / freedreno / ir3 / ir3_validate.c
1 /*
2 * Copyright © 2020 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include <stdlib.h>
25
26 #include "util/ralloc.h"
27
28 #include "ir3.h"
29
30 struct ir3_validate_ctx {
31 struct ir3 *ir;
32
33 /* Current instruction being validated: */
34 struct ir3_instruction *current_instr;
35
36 /* Set of instructions found so far, used to validate that we
37 * don't have SSA uses that occure before def's
38 */
39 struct set *defs;
40 };
41
42 static void
43 validate_error(struct ir3_validate_ctx *ctx, const char *condstr)
44 {
45 fprintf(stderr, "validation fail: %s\n", condstr);
46 fprintf(stderr, " -> for instruction: ");
47 ir3_print_instr(ctx->current_instr);
48 abort();
49 }
50
51 #define validate_assert(ctx, cond) do { \
52 if (!(cond)) { \
53 validate_error(ctx, #cond); \
54 } } while (0)
55
56 static unsigned
57 reg_class_flags(struct ir3_register *reg)
58 {
59 return reg->flags & (IR3_REG_HALF | IR3_REG_HIGH);
60 }
61
62 static void
63 validate_src(struct ir3_validate_ctx *ctx, struct ir3_register *reg)
64 {
65 struct ir3_instruction *src = ssa(reg);
66
67 if (!src)
68 return;
69
70 validate_assert(ctx, _mesa_set_search(ctx->defs, src));
71 validate_assert(ctx, src->regs[0]->wrmask == reg->wrmask);
72 validate_assert(ctx, reg_class_flags(src->regs[0]) == reg_class_flags(reg));
73 }
74
75 static void
76 validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
77 {
78 struct ir3_register *last_reg = NULL;
79
80 foreach_src_n (reg, n, instr) {
81 validate_src(ctx, reg);
82
83 /* Validate that all src's are either half of full.
84 *
85 * Note: tex instructions w/ .s2en are a bit special in
86 * that the tex/samp src reg is half-reg irrespective of
87 * the precision of other srcs. The tex/samp src is the
88 * first src reg when .s2en is set
89 */
90 if ((instr->flags & IR3_INSTR_S2EN) && (n < 2)) {
91 if (n == 0) {
92 validate_assert(ctx, reg->flags & IR3_REG_HALF);
93 }
94 } else if (n > 0) {
95 validate_assert(ctx, (last_reg->flags & IR3_REG_HALF) == (reg->flags & IR3_REG_HALF));
96 }
97
98 last_reg = reg;
99 }
100
101 _mesa_set_add(ctx->defs, instr);
102
103 /* Check that src/dst types match the register types, and for
104 * instructions that have different opcodes depending on type,
105 * that the opcodes are correct.
106 */
107 switch (opc_cat(instr->opc)) {
108 case 1: /* move instructions */
109 if (instr->regs[0]->flags & IR3_REG_HALF) {
110 validate_assert(ctx, instr->cat1.dst_type == half_type(instr->cat1.dst_type));
111 } else {
112 validate_assert(ctx, instr->cat1.dst_type == full_type(instr->cat1.dst_type));
113 }
114 if (instr->regs[1]->flags & IR3_REG_HALF) {
115 validate_assert(ctx, instr->cat1.src_type == half_type(instr->cat1.src_type));
116 } else {
117 validate_assert(ctx, instr->cat1.src_type == full_type(instr->cat1.src_type));
118 }
119 break;
120 case 3:
121 /* Validate that cat3 opc matches the src type. We've already checked that all
122 * the src regs are same type
123 */
124 if (instr->regs[1]->flags & IR3_REG_HALF) {
125 validate_assert(ctx, instr->opc == cat3_half_opc(instr->opc));
126 } else {
127 validate_assert(ctx, instr->opc == cat3_full_opc(instr->opc));
128 }
129 break;
130 case 4:
131 /* Validate that cat4 opc matches the dst type: */
132 if (instr->regs[0]->flags & IR3_REG_HALF) {
133 validate_assert(ctx, instr->opc == cat4_half_opc(instr->opc));
134 } else {
135 validate_assert(ctx, instr->opc == cat4_full_opc(instr->opc));
136 }
137 break;
138 case 5:
139 if (instr->regs[0]->flags & IR3_REG_HALF) {
140 validate_assert(ctx, instr->cat5.type == half_type(instr->cat5.type));
141 } else {
142 validate_assert(ctx, instr->cat5.type == full_type(instr->cat5.type));
143 }
144 break;
145 }
146 }
147
148 void
149 ir3_validate(struct ir3 *ir)
150 {
151 #ifdef NDEBUG
152 # define VALIDATE 0
153 #else
154 # define VALIDATE 1
155 #endif
156
157 if (!VALIDATE)
158 return;
159
160 struct ir3_validate_ctx *ctx = ralloc_size(NULL, sizeof(*ctx));
161
162 ctx->ir = ir;
163 ctx->defs = _mesa_pointer_set_create(ctx);
164
165 foreach_block (block, &ir->block_list) {
166 foreach_instr (instr, &block->instr_list) {
167 ctx->current_instr = instr;
168 validate_instr(ctx, instr);
169 }
170 }
171
172 ralloc_free(ctx);
173 }