2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <arpa/inet.h>
35 #include <sys/types.h>
41 #include <libconfig.h>
45 #include "drm/freedreno_drmif.h"
46 #include "drm/freedreno_ringbuffer.h"
48 #include "freedreno_perfcntr.h"
50 #define MAX_CNTR_PER_GROUP 24
52 /* NOTE first counter group should always be CP, since we unconditionally
53 * use CP counter to measure the gpu freq.
56 struct counter_group
{
57 const struct fd_perfcntr_group
*group
;
60 const struct fd_perfcntr_counter
*counter
;
62 volatile uint32_t *val_hi
;
63 volatile uint32_t *val_lo
;
64 } counter
[MAX_CNTR_PER_GROUP
];
66 /* last sample time: */
67 uint32_t stime
[MAX_CNTR_PER_GROUP
];
68 /* for now just care about the low 32b value.. at least then we don't
69 * have to really care that we can't sample both hi and lo regs at the
72 uint32_t last
[MAX_CNTR_PER_GROUP
];
73 /* current value, ie. by how many did the counter increase in last
74 * sampling period divided by the sampling period:
76 float current
[MAX_CNTR_PER_GROUP
];
77 /* name of currently selected counters (for UI): */
78 const char *label
[MAX_CNTR_PER_GROUP
];
83 int address_cells
, size_cells
;
90 /* per-generation table of counters: */
92 struct counter_group
*groups
;
93 /* drm device (for writing select regs via ring): */
94 struct fd_device
*dev
;
96 struct fd_submit
*submit
;
97 struct fd_ringbuffer
*ring
;
100 static void config_save(void);
101 static void config_restore(void);
102 static void restore_counter_groups(void);
111 readfile(const char *path
, int *sz
)
116 fd
= open(path
, O_RDONLY
);
121 buf
= realloc(buf
, n
+ CHUNKSIZE
);
122 ret
= read(fd
, buf
+ n
, CHUNKSIZE
);
128 } else if (ret
< CHUNKSIZE
) {
143 clock_gettime(CLOCK_MONOTONIC
, &ts
);
144 return (ts
.tv_sec
* 1000000) + (ts
.tv_nsec
/ 1000);
148 delta(uint32_t a
, uint32_t b
)
150 /* deal with rollover: */
152 return 0xffffffff - a
+ b
;
158 * TODO de-duplicate OUT_RING() and friends
161 #define CP_WAIT_FOR_IDLE 38
162 #define CP_TYPE0_PKT 0x00000000
163 #define CP_TYPE3_PKT 0xc0000000
164 #define CP_TYPE4_PKT 0x40000000
165 #define CP_TYPE7_PKT 0x70000000
168 OUT_RING(struct fd_ringbuffer
*ring
, uint32_t data
)
170 *(ring
->cur
++) = data
;
174 OUT_PKT0(struct fd_ringbuffer
*ring
, uint16_t regindx
, uint16_t cnt
)
176 OUT_RING(ring
, CP_TYPE0_PKT
| ((cnt
-1) << 16) | (regindx
& 0x7FFF));
180 OUT_PKT3(struct fd_ringbuffer
*ring
, uint8_t opcode
, uint16_t cnt
)
182 OUT_RING(ring
, CP_TYPE3_PKT
| ((cnt
-1) << 16) | ((opcode
& 0xFF) << 8));
187 * Starting with a5xx, pkt4/pkt7 are used instead of pkt0/pkt3
190 static inline unsigned
191 _odd_parity_bit(unsigned val
)
193 /* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel
194 * note that we want odd parity so 0x6996 is inverted.
200 return (~0x6996 >> val
) & 1;
204 OUT_PKT4(struct fd_ringbuffer
*ring
, uint16_t regindx
, uint16_t cnt
)
206 OUT_RING(ring
, CP_TYPE4_PKT
| cnt
|
207 (_odd_parity_bit(cnt
) << 7) |
208 ((regindx
& 0x3ffff) << 8) |
209 ((_odd_parity_bit(regindx
) << 27)));
213 OUT_PKT7(struct fd_ringbuffer
*ring
, uint8_t opcode
, uint16_t cnt
)
215 OUT_RING(ring
, CP_TYPE7_PKT
| cnt
|
216 (_odd_parity_bit(cnt
) << 15) |
217 ((opcode
& 0x7f) << 16) |
218 ((_odd_parity_bit(opcode
) << 23)));
222 * code to find stuff in /proc/device-tree:
224 * NOTE: if we sampled the counters from the cmdstream, we could avoid needing
225 * /dev/mem and /proc/device-tree crawling. OTOH when the GPU is heavily loaded
226 * we would be competing with whatever else is using the GPU.
230 readdt(const char *node
)
236 (void) asprintf(&path
, "%s/%s", dev
.dtnode
, node
);
237 buf
= readfile(path
, &sz
);
244 find_freqs_fn(const char *fpath
, const struct stat
*sb
, int typeflag
, struct FTW
*ftwbuf
)
246 const char *fname
= fpath
+ ftwbuf
->base
;
249 if (strcmp(fname
, "qcom,gpu-freq") == 0) {
250 uint32_t *buf
= readfile(fpath
, &sz
);
251 uint32_t freq
= ntohl(buf
[0]);
253 dev
.max_freq
= MAX2(dev
.max_freq
, freq
);
254 dev
.min_freq
= MIN2(dev
.min_freq
, freq
);
269 (void) asprintf(&path
, "%s/%s", dev
.dtnode
, "qcom,gpu-pwrlevels");
271 ret
= nftw(path
, find_freqs_fn
, 64, 0);
273 err(1, "could not find power levels");
279 find_device_fn(const char *fpath
, const struct stat
*sb
, int typeflag
, struct FTW
*ftwbuf
)
281 const char *fname
= fpath
+ ftwbuf
->base
;
284 if (strcmp(fname
, "compatible") == 0) {
285 char *str
= readfile(fpath
, &sz
);
286 if ((strcmp(str
, "qcom,adreno-3xx") == 0) ||
287 (strcmp(str
, "qcom,kgsl-3d0") == 0) ||
288 (strstr(str
, "amd,imageon") == str
) ||
289 (strstr(str
, "qcom,adreno") == str
)) {
290 int dlen
= strlen(fpath
) - strlen("/compatible");
291 dev
.dtnode
= malloc(dlen
+ 1);
292 memcpy(dev
.dtnode
, fpath
, dlen
);
293 printf("found dt node: %s\n", dev
.dtnode
);
295 char buf
[dlen
+ sizeof("/../#address-cells") + 1];
298 sprintf(buf
, "%s/../#address-cells", dev
.dtnode
);
299 val
= readfile(buf
, &sz
);
300 dev
.address_cells
= ntohl(*val
);
303 sprintf(buf
, "%s/../#size-cells", dev
.dtnode
);
304 val
= readfile(buf
, &sz
);
305 dev
.size_cells
= ntohl(*val
);
308 printf("#address-cells=%d, #size-cells=%d\n",
309 dev
.address_cells
, dev
.size_cells
);
326 ret
= nftw("/proc/device-tree/", find_device_fn
, 64, 0);
328 err(1, "could not find adreno gpu");
331 errx(1, "could not find qcom,adreno-3xx node");
333 fd
= drmOpen("msm", NULL
);
335 err(1, "could not open drm device");
337 dev
.dev
= fd_device_new(fd
);
338 dev
.pipe
= fd_pipe_new(dev
.dev
, FD_PIPE_3D
);
341 ret
= fd_pipe_get_param(dev
.pipe
, FD_CHIP_ID
, &val
);
343 err(1, "could not get gpu-id");
347 #define CHIP_FMT "d%d%d.%d"
348 #define CHIP_ARGS(chipid) \
349 ((chipid) >> 24) & 0xff, \
350 ((chipid) >> 16) & 0xff, \
351 ((chipid) >> 8) & 0xff, \
352 ((chipid) >> 0) & 0xff
353 printf("device: a%"CHIP_FMT
"\n", CHIP_ARGS(dev
.chipid
));
355 b
= buf
= readdt("reg");
357 if (dev
.address_cells
== 2) {
358 uint32_t u
[2] = { ntohl(buf
[0]), ntohl(buf
[1]) };
359 dev
.base
= (((uint64_t)u
[0]) << 32) | u
[1];
362 dev
.base
= ntohl(buf
[0]);
366 if (dev
.size_cells
== 2) {
367 uint32_t u
[2] = { ntohl(buf
[0]), ntohl(buf
[1]) };
368 dev
.size
= (((uint64_t)u
[0]) << 32) | u
[1];
371 dev
.size
= ntohl(buf
[0]);
377 printf("i/o region at %08"PRIu64
" (size: %x)\n", dev
.base
, dev
.size
);
379 /* try MAX_FREQ first as that will work regardless of old dt
380 * dt bindings vs upstream bindings:
382 ret
= fd_pipe_get_param(dev
.pipe
, FD_MAX_FREQ
, &val
);
384 printf("falling back to parsing DT bindings for freq\n");
391 printf("min_freq=%u, max_freq=%u\n", dev
.min_freq
, dev
.max_freq
);
393 fd
= open("/dev/mem", O_RDWR
| O_SYNC
);
395 err(1, "could not open /dev/mem");
397 dev
.io
= mmap(0, dev
.size
, PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, dev
.base
);
400 err(1, "could not map device");
416 ret
= fd_submit_flush(dev
.submit
, -1, NULL
, NULL
);
418 errx(1, "submit failed: %d", ret
);
419 fd_ringbuffer_del(dev
.ring
);
420 fd_submit_del(dev
.submit
);
427 select_counter(struct counter_group
*group
, int ctr
, int n
)
429 assert(n
< group
->group
->num_countables
);
430 assert(ctr
< group
->group
->num_counters
);
432 group
->label
[ctr
] = group
->group
->countables
[n
].name
;
433 group
->counter
[ctr
].select_val
= n
;
436 dev
.submit
= fd_submit_new(dev
.pipe
);
437 dev
.ring
= fd_submit_new_ringbuffer(dev
.submit
, 0x1000,
438 FD_RINGBUFFER_PRIMARY
| FD_RINGBUFFER_GROWABLE
);
441 /* bashing select register directly while gpu is active will end
442 * in tears.. so we need to write it via the ring:
444 * TODO it would help startup time, if gpu is loaded, to batch
445 * all the initial writes and do a single flush.. although that
446 * makes things more complicated for capturing inital sample value
448 struct fd_ringbuffer
*ring
= dev
.ring
;
449 switch (dev
.chipid
>> 24) {
453 OUT_PKT3(ring
, CP_WAIT_FOR_IDLE
, 1);
454 OUT_RING(ring
, 0x00000000);
456 if (group
->group
->counters
[ctr
].enable
) {
457 OUT_PKT0(ring
, group
->group
->counters
[ctr
].enable
, 1);
461 if (group
->group
->counters
[ctr
].clear
) {
462 OUT_PKT0(ring
, group
->group
->counters
[ctr
].clear
, 1);
465 OUT_PKT0(ring
, group
->group
->counters
[ctr
].clear
, 1);
469 OUT_PKT0(ring
, group
->group
->counters
[ctr
].select_reg
, 1);
472 if (group
->group
->counters
[ctr
].enable
) {
473 OUT_PKT0(ring
, group
->group
->counters
[ctr
].enable
, 1);
480 OUT_PKT7(ring
, CP_WAIT_FOR_IDLE
, 0);
482 if (group
->group
->counters
[ctr
].enable
) {
483 OUT_PKT4(ring
, group
->group
->counters
[ctr
].enable
, 1);
487 if (group
->group
->counters
[ctr
].clear
) {
488 OUT_PKT4(ring
, group
->group
->counters
[ctr
].clear
, 1);
491 OUT_PKT4(ring
, group
->group
->counters
[ctr
].clear
, 1);
495 OUT_PKT4(ring
, group
->group
->counters
[ctr
].select_reg
, 1);
498 if (group
->group
->counters
[ctr
].enable
) {
499 OUT_PKT4(ring
, group
->group
->counters
[ctr
].enable
, 1);
506 group
->last
[ctr
] = *group
->counter
[ctr
].val_lo
;
507 group
->stime
[ctr
] = gettime_us();
511 resample_counter(struct counter_group
*group
, int ctr
)
513 uint32_t val
= *group
->counter
[ctr
].val_lo
;
514 uint32_t t
= gettime_us();
515 uint32_t dt
= delta(group
->stime
[ctr
], t
);
516 uint32_t dval
= delta(group
->last
[ctr
], val
);
517 group
->current
[ctr
] = (float)dval
* 1000000.0 / (float)dt
;
518 group
->last
[ctr
] = val
;
519 group
->stime
[ctr
] = t
;
522 #define REFRESH_MS 500
524 /* sample all the counters: */
528 static uint64_t last_time
;
529 uint64_t current_time
= gettime_us();
531 if ((current_time
- last_time
) < (REFRESH_MS
* 1000 / 2))
534 last_time
= current_time
;
536 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
537 struct counter_group
*group
= &dev
.groups
[i
];
538 for (unsigned j
= 0; j
< group
->group
->num_counters
; j
++) {
539 resample_counter(group
, j
);
548 #define COLOR_GROUP_HEADER 1
549 #define COLOR_FOOTER 2
550 #define COLOR_INVERSE 3
553 static int ctr_width
;
554 static int max_rows
, current_cntr
= 1;
557 redraw_footer(WINDOW
*win
)
562 n
= asprintf(&footer
, " fdperf: a%"CHIP_FMT
" (%.2fMHz..%.2fMHz)",
563 CHIP_ARGS(dev
.chipid
),
564 ((float)dev
.min_freq
) / 1000000.0,
565 ((float)dev
.max_freq
) / 1000000.0);
567 wmove(win
, h
- 1, 0);
568 wattron(win
, COLOR_PAIR(COLOR_FOOTER
));
569 waddstr(win
, footer
);
570 whline(win
, ' ', w
- n
);
571 wattroff(win
, COLOR_PAIR(COLOR_FOOTER
));
577 redraw_group_header(WINDOW
*win
, int row
, const char *name
)
580 wattron(win
, A_BOLD
);
581 wattron(win
, COLOR_PAIR(COLOR_GROUP_HEADER
));
583 whline(win
, ' ', w
- strlen(name
));
584 wattroff(win
, COLOR_PAIR(COLOR_GROUP_HEADER
));
585 wattroff(win
, A_BOLD
);
589 redraw_counter_label(WINDOW
*win
, int row
, const char *name
, bool selected
)
591 int n
= strlen(name
);
592 assert(n
<= ctr_width
);
594 whline(win
, ' ', ctr_width
- n
);
595 wmove(win
, row
, ctr_width
- n
);
597 wattron(win
, COLOR_PAIR(COLOR_INVERSE
));
600 wattroff(win
, COLOR_PAIR(COLOR_INVERSE
));
605 redraw_counter_value_cycles(WINDOW
*win
, float val
)
608 int x
= getcurx(win
);
609 int valwidth
= w
- x
;
612 /* convert to fraction of max freq: */
613 val
= val
/ (float)dev
.max_freq
;
615 /* figure out percentage-bar width: */
616 barwidth
= (int)(val
* valwidth
);
618 /* sometimes things go over 100%.. idk why, could be
619 * things running faster than base clock, or counter
620 * summing up cycles in multiple cores?
622 barwidth
= MIN2(barwidth
, valwidth
- 1);
624 n
= asprintf(&str
, "%.2f%%", 100.0 * val
);
625 wattron(win
, COLOR_PAIR(COLOR_INVERSE
));
626 waddnstr(win
, str
, barwidth
);
628 whline(win
, ' ', barwidth
- n
);
629 wmove(win
, getcury(win
), x
+ barwidth
);
631 wattroff(win
, COLOR_PAIR(COLOR_INVERSE
));
633 waddstr(win
, str
+ barwidth
);
634 whline(win
, ' ', w
- getcurx(win
));
640 redraw_counter_value_raw(WINDOW
*win
, float val
)
643 (void) asprintf(&str
, "%'.2f", val
);
645 whline(win
, ' ', w
- getcurx(win
));
650 redraw_counter(WINDOW
*win
, int row
, struct counter_group
*group
,
651 int ctr
, bool selected
)
653 redraw_counter_label(win
, row
, group
->label
[ctr
], selected
);
655 /* quick hack, if the label has "CYCLE" in the name, it is
656 * probably a cycle counter ;-)
657 * Perhaps add more info in rnndb schema to know how to
658 * treat individual counters (ie. which are cycles, and
659 * for those we want to present as a percentage do we
660 * need to scale the result.. ie. is it running at some
661 * multiple or divisor of core clk, etc)
663 * TODO it would be much more clever to get this from xml
664 * Also.. in some cases I think we want to know how many
665 * units the counter is counting for, ie. if a320 has 2x
666 * shader as a306 we might need to scale the result..
668 if (strstr(group
->label
[ctr
], "CYCLE") ||
669 strstr(group
->label
[ctr
], "BUSY") ||
670 strstr(group
->label
[ctr
], "IDLE"))
671 redraw_counter_value_cycles(win
, group
->current
[ctr
]);
673 redraw_counter_value_raw(win
, group
->current
[ctr
]);
679 static int scroll
= 0;
687 if ((current_cntr
- scroll
) > (max
- 1)) {
688 scroll
= current_cntr
- (max
- 1);
689 } else if ((current_cntr
- 1) < scroll
) {
690 scroll
= current_cntr
- 1;
693 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
694 struct counter_group
*group
= &dev
.groups
[i
];
697 /* NOTE skip CP the first CP counter */
701 if (j
< group
->group
->num_counters
) {
702 if ((scroll
<= row
) && ((row
- scroll
) < max
))
703 redraw_group_header(win
, row
- scroll
, group
->group
->name
);
707 for (; j
< group
->group
->num_counters
; j
++) {
708 if ((scroll
<= row
) && ((row
- scroll
) < max
))
709 redraw_counter(win
, row
- scroll
, group
, j
, row
== current_cntr
);
714 /* convert back to physical (unscrolled) offset: */
717 redraw_group_header(win
, row
, "Status");
720 /* Draw GPU freq row: */
721 redraw_counter_label(win
, row
, "Freq (MHz)", false);
722 redraw_counter_value_raw(win
, dev
.groups
[0].current
[0] / 1000000.0);
730 static struct counter_group
*
731 current_counter(int *ctr
)
735 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
736 struct counter_group
*group
= &dev
.groups
[i
];
739 /* NOTE skip the first CP counter (CP_ALWAYS_COUNT) */
743 /* account for group header: */
744 if (j
< group
->group
->num_counters
) {
745 /* cannot select group header.. return null to indicate this
748 if (n
== current_cntr
)
754 for (; j
< group
->group
->num_counters
; j
++) {
755 if (n
== current_cntr
) {
772 struct counter_group
*group
;
773 int cnt
, current
= 0, scroll
;
775 /* figure out dialog size: */
777 int dw
= ctr_width
+ 2;
779 group
= current_counter(&cnt
);
781 /* find currently selected idx (note there can be discontinuities
782 * so the selected value does not map 1:1 to current idx)
784 uint32_t selected
= group
->counter
[cnt
].select_val
;
785 for (int i
= 0; i
< group
->group
->num_countables
; i
++) {
786 if (group
->group
->countables
[i
].selector
== selected
) {
792 /* scrolling offset, if dialog is too small for all the choices: */
795 dialog
= newwin(dh
, dw
, (h
-dh
)/2, (w
-dw
)/2);
798 keypad(dialog
, TRUE
);
801 int max
= MIN2(dh
- 2, group
->group
->num_countables
);
804 if ((current
- scroll
) >= (dh
- 3)) {
805 scroll
= current
- (dh
- 3);
806 } else if (current
< scroll
) {
810 for (int i
= 0; i
< max
; i
++) {
812 wmove(dialog
, i
+1, 1);
814 assert (n
< group
->group
->num_countables
);
815 selector
= group
->group
->countables
[n
].selector
;
816 wattron(dialog
, COLOR_PAIR(COLOR_INVERSE
));
818 if (n
< group
->group
->num_countables
)
819 waddstr(dialog
, group
->group
->countables
[n
].name
);
820 whline(dialog
, ' ', dw
- getcurx(dialog
) - 1);
822 wattroff(dialog
, COLOR_PAIR(COLOR_INVERSE
));
825 assert (selector
>= 0);
827 switch (wgetch(dialog
)) {
829 current
= MAX2(0, current
- 1);
832 current
= MIN2(group
->group
->num_countables
- 1, current
+ 1);
836 /* select new sampler */
837 select_counter(group
, cnt
, selector
);
852 wborder(dialog
, ' ', ' ', ' ',' ',' ',' ',' ',' ');
857 scroll_cntr(int amount
)
860 current_cntr
= MAX2(1, current_cntr
+ amount
);
861 if (current_counter(NULL
) == NULL
) {
862 current_cntr
= MAX2(1, current_cntr
- 1);
865 current_cntr
= MIN2(max_rows
- 1, current_cntr
+ amount
);
866 if (current_counter(NULL
) == NULL
)
867 current_cntr
= MIN2(max_rows
- 1, current_cntr
+ 1);
875 uint32_t last_time
= gettime_us();
883 wtimeout(mainwin
, REFRESH_MS
);
885 keypad(mainwin
, TRUE
);
888 init_pair(COLOR_GROUP_HEADER
, COLOR_WHITE
, COLOR_GREEN
);
889 init_pair(COLOR_FOOTER
, COLOR_WHITE
, COLOR_BLUE
);
890 init_pair(COLOR_INVERSE
, COLOR_BLACK
, COLOR_WHITE
);
893 switch (wgetch(mainwin
)) {
900 case KEY_NPAGE
: /* page-down */
901 /* TODO figure out # of rows visible? */
904 case KEY_PPAGE
: /* page-up */
905 /* TODO figure out # of rows visible? */
921 /* restore the counters every 0.5s in case the GPU has suspended,
922 * in which case the current selected countables will have reset:
924 uint32_t t
= gettime_us();
925 if (delta(last_time
, t
) > 500000) {
926 restore_counter_groups();
932 /* restore settings.. maybe we need an atexit()??*/
940 restore_counter_groups(void)
942 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
943 struct counter_group
*group
= &dev
.groups
[i
];
946 /* NOTE skip CP the first CP counter */
950 for (; j
< group
->group
->num_counters
; j
++) {
951 select_counter(group
, j
, group
->counter
[j
].select_val
);
957 setup_counter_groups(const struct fd_perfcntr_group
*groups
)
959 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
960 struct counter_group
*group
= &dev
.groups
[i
];
962 group
->group
= &groups
[i
];
964 max_rows
+= group
->group
->num_counters
+ 1;
966 /* the first CP counter is hidden: */
969 if (group
->group
->num_counters
<= 1)
973 for (unsigned j
= 0; j
< group
->group
->num_counters
; j
++) {
974 group
->counter
[j
].counter
= &group
->group
->counters
[j
];
976 group
->counter
[j
].val_hi
= dev
.io
+ (group
->counter
[j
].counter
->counter_reg_hi
* 4);
977 group
->counter
[j
].val_lo
= dev
.io
+ (group
->counter
[j
].counter
->counter_reg_lo
* 4);
979 group
->counter
[j
].select_val
= j
;
982 for (unsigned j
= 0; j
< group
->group
->num_countables
; j
++) {
983 ctr_width
= MAX2(ctr_width
, strlen(group
->group
->countables
[j
].name
) + 1);
989 * configuration / persistence
993 static config_setting_t
*setting
;
998 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
999 struct counter_group
*group
= &dev
.groups
[i
];
1002 /* NOTE skip CP the first CP counter */
1006 config_setting_t
*sect
=
1007 config_setting_get_member(setting
, group
->group
->name
);
1009 for (; j
< group
->group
->num_counters
; j
++) {
1010 char name
[] = "counter0000";
1011 sprintf(name
, "counter%d", j
);
1012 config_setting_t
*s
=
1013 config_setting_lookup(sect
, name
);
1014 config_setting_set_int(s
, group
->counter
[j
].select_val
);
1018 config_write_file(&cfg
, "fdperf.cfg");
1022 config_restore(void)
1028 /* Read the file. If there is an error, report it and exit. */
1029 if(!config_read_file(&cfg
, "fdperf.cfg")) {
1030 warn("could not restore settings");
1033 config_setting_t
*root
= config_root_setting(&cfg
);
1035 /* per device settings: */
1036 (void) asprintf(&str
, "a%dxx", dev
.chipid
>> 24);
1037 setting
= config_setting_get_member(root
, str
);
1039 setting
= config_setting_add(root
, str
, CONFIG_TYPE_GROUP
);
1042 for (unsigned i
= 0; i
< dev
.ngroups
; i
++) {
1043 struct counter_group
*group
= &dev
.groups
[i
];
1046 /* NOTE skip CP the first CP counter */
1050 config_setting_t
*sect
=
1051 config_setting_get_member(setting
, group
->group
->name
);
1054 sect
= config_setting_add(setting
, group
->group
->name
,
1058 for (; j
< group
->group
->num_counters
; j
++) {
1059 char name
[] = "counter0000";
1060 sprintf(name
, "counter%d", j
);
1061 config_setting_t
*s
= config_setting_lookup(sect
, name
);
1063 config_setting_add(sect
, name
, CONFIG_TYPE_INT
);
1066 select_counter(group
, j
, config_setting_get_int(s
));
1076 main(int argc
, char **argv
)
1080 const struct fd_perfcntr_group
*groups
;
1081 groups
= fd_perfcntrs((dev
.chipid
>> 24) * 100, &dev
.ngroups
);
1083 errx(1, "no perfcntr support");
1086 dev
.groups
= calloc(dev
.ngroups
, sizeof(struct counter_group
));
1088 setup_counter_groups(groups
);
1089 restore_counter_groups();