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21 * DEALINGS IN THE SOFTWARE.
26 #include "tu_private.h"
28 #include "registers/adreno_pm4.xml.h"
31 tu_cs_init(struct tu_cs
*cs
, enum tu_cs_mode mode
, uint32_t initial_size
);
34 tu_cs_init_external(struct tu_cs
*cs
, uint32_t *start
, uint32_t *end
);
37 tu_cs_finish(struct tu_device
*dev
, struct tu_cs
*cs
);
40 tu_cs_begin(struct tu_cs
*cs
);
43 tu_cs_end(struct tu_cs
*cs
);
46 tu_cs_begin_sub_stream(struct tu_device
*dev
,
49 struct tu_cs
*sub_cs
);
52 tu_cs_alloc(struct tu_device
*dev
,
56 struct ts_cs_memory
*memory
);
59 tu_cs_end_sub_stream(struct tu_cs
*cs
, struct tu_cs
*sub_cs
);
62 tu_cs_reserve_space(struct tu_device
*dev
,
64 uint32_t reserved_size
);
67 tu_cs_reset(struct tu_device
*dev
, struct tu_cs
*cs
);
70 tu_cs_add_entries(struct tu_cs
*cs
, struct tu_cs
*target
);
73 * Discard all entries. This allows \a cs to be reused while keeping the
74 * existing BOs and command packets intact.
77 tu_cs_discard_entries(struct tu_cs
*cs
)
79 assert(cs
->mode
== TU_CS_MODE_GROW
);
84 * Get the size needed for tu_cs_emit_call.
86 static inline uint32_t
87 tu_cs_get_call_size(const struct tu_cs
*cs
)
89 assert(cs
->mode
== TU_CS_MODE_GROW
);
90 /* each CP_INDIRECT_BUFFER needs 4 dwords */
91 return cs
->entry_count
* 4;
95 * Assert that we did not exceed the reserved space.
98 tu_cs_sanity_check(const struct tu_cs
*cs
)
100 assert(cs
->start
<= cs
->cur
);
101 assert(cs
->cur
<= cs
->reserved_end
);
102 assert(cs
->reserved_end
<= cs
->end
);
106 * Emit a uint32_t value into a command stream, without boundary checking.
109 tu_cs_emit(struct tu_cs
*cs
, uint32_t value
)
111 assert(cs
->cur
< cs
->reserved_end
);
117 * Emit an array of uint32_t into a command stream, without boundary checking.
120 tu_cs_emit_array(struct tu_cs
*cs
, const uint32_t *values
, uint32_t length
)
122 assert(cs
->cur
+ length
<= cs
->reserved_end
);
123 memcpy(cs
->cur
, values
, sizeof(uint32_t) * length
);
127 static inline unsigned
128 tu_odd_parity_bit(unsigned val
)
130 /* See: http://graphics.stanford.edu/~seander/bithacks.html#ParityParallel
131 * note that we want odd parity so 0x6996 is inverted.
137 return (~0x6996 >> val
) & 1;
141 * Emit a type-4 command packet header into a command stream.
144 tu_cs_emit_pkt4(struct tu_cs
*cs
, uint16_t regindx
, uint16_t cnt
)
146 tu_cs_emit(cs
, CP_TYPE4_PKT
| cnt
| (tu_odd_parity_bit(cnt
) << 7) |
147 ((regindx
& 0x3ffff) << 8) |
148 ((tu_odd_parity_bit(regindx
) << 27)));
152 * Emit a type-7 command packet header into a command stream.
155 tu_cs_emit_pkt7(struct tu_cs
*cs
, uint8_t opcode
, uint16_t cnt
)
157 tu_cs_emit(cs
, CP_TYPE7_PKT
| cnt
| (tu_odd_parity_bit(cnt
) << 15) |
158 ((opcode
& 0x7f) << 16) |
159 ((tu_odd_parity_bit(opcode
) << 23)));
163 tu_cs_emit_wfi(struct tu_cs
*cs
)
165 tu_cs_emit_pkt7(cs
, CP_WAIT_FOR_IDLE
, 0);
169 tu_cs_emit_qw(struct tu_cs
*cs
, uint64_t value
)
171 tu_cs_emit(cs
, (uint32_t) value
);
172 tu_cs_emit(cs
, (uint32_t) (value
>> 32));
176 tu_cs_emit_write_reg(struct tu_cs
*cs
, uint16_t reg
, uint32_t value
)
178 tu_cs_emit_pkt4(cs
, reg
, 1);
179 tu_cs_emit(cs
, value
);
183 * Emit a CP_INDIRECT_BUFFER command packet.
186 tu_cs_emit_ib(struct tu_cs
*cs
, const struct tu_cs_entry
*entry
)
189 assert(entry
->size
&& entry
->offset
+ entry
->size
<= entry
->bo
->size
);
190 assert(entry
->size
% sizeof(uint32_t) == 0);
191 assert(entry
->offset
% sizeof(uint32_t) == 0);
193 tu_cs_emit_pkt7(cs
, CP_INDIRECT_BUFFER
, 3);
194 tu_cs_emit_qw(cs
, entry
->bo
->iova
+ entry
->offset
);
195 tu_cs_emit(cs
, entry
->size
/ sizeof(uint32_t));
199 * Emit a CP_INDIRECT_BUFFER command packet for each entry in the target
203 tu_cs_emit_call(struct tu_cs
*cs
, const struct tu_cs
*target
)
205 assert(target
->mode
== TU_CS_MODE_GROW
);
206 for (uint32_t i
= 0; i
< target
->entry_count
; i
++)
207 tu_cs_emit_ib(cs
, target
->entries
+ i
);
210 #define fd_reg_pair tu_reg_value
211 #define __bo_type struct tu_bo *
213 #include "a6xx.xml.h"
214 #include "a6xx-pack.xml.h"
216 #define __assert_eq(a, b) \
219 fprintf(stderr, "assert failed: " #a " (0x%x) != " #b " (0x%x)\n", a, b); \
220 assert((a) == (b)); \
224 #define __ONE_REG(i, regs) \
226 if (i < ARRAY_SIZE(regs) && regs[i].reg > 0) { \
227 __assert_eq(regs[0].reg + i, regs[i].reg); \
229 uint64_t v = regs[i].bo->iova + regs[i].bo_offset; \
230 v >>= regs[i].bo_shift; \
231 v |= regs[i].value; \
236 *p++ = regs[i].value; \
237 if (regs[i].is_address) \
238 *p++ = regs[i].value >> 32; \
243 /* Emits a sequence of register writes in order using a pkt4. This will check
244 * (at runtime on a !NDEBUG build) that the registers were actually set up in
247 * Note that references to buffers aren't automatically added to the CS,
248 * unlike in freedreno. We are clever in various places to avoid duplicating
249 * the reference add work.
251 * Also, 64-bit address registers don't have a way (currently) to set a 64-bit
252 * address without having a reference to a BO, since the .dword field in the
253 * register's struct is only 32-bit wide. We should fix this in the pack
256 #define tu_cs_emit_regs(cs, ...) do { \
257 const struct fd_reg_pair regs[] = { __VA_ARGS__ }; \
258 unsigned count = ARRAY_SIZE(regs); \
260 STATIC_ASSERT(count > 0); \
261 STATIC_ASSERT(count <= 16); \
263 uint32_t *p = cs->cur; \
264 *p++ = CP_TYPE4_PKT | count | \
265 (tu_odd_parity_bit(count) << 7) | \
266 ((regs[0].reg & 0x3ffff) << 8) | \
267 ((tu_odd_parity_bit(regs[0].reg) << 27)); \
269 __ONE_REG( 0, regs); \
270 __ONE_REG( 1, regs); \
271 __ONE_REG( 2, regs); \
272 __ONE_REG( 3, regs); \
273 __ONE_REG( 4, regs); \
274 __ONE_REG( 5, regs); \
275 __ONE_REG( 6, regs); \
276 __ONE_REG( 7, regs); \
277 __ONE_REG( 8, regs); \
278 __ONE_REG( 9, regs); \
279 __ONE_REG(10, regs); \
280 __ONE_REG(11, regs); \
281 __ONE_REG(12, regs); \
282 __ONE_REG(13, regs); \
283 __ONE_REG(14, regs); \
284 __ONE_REG(15, regs); \