turnip: constify tu_device in tu_gem_*
[mesa.git] / src / freedreno / vulkan / tu_drm.c
1 /*
2 * Copyright © 2018 Google, Inc.
3 * Copyright © 2015 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25 #include "tu_private.h"
26
27 #include <errno.h>
28 #include <stdint.h>
29 #include <sys/ioctl.h>
30 #include <xf86drm.h>
31
32 #include "drm/msm_drm.h"
33
34 static int
35 tu_drm_get_param(const struct tu_physical_device *dev,
36 uint32_t param,
37 uint64_t *value)
38 {
39 /* Technically this requires a pipe, but the kernel only supports one pipe
40 * anyway at the time of writing and most of these are clearly pipe
41 * independent. */
42 struct drm_msm_param req = {
43 .pipe = MSM_PIPE_3D0,
44 .param = param,
45 };
46
47 int ret = drmCommandWriteRead(dev->local_fd, DRM_MSM_GET_PARAM, &req,
48 sizeof(req));
49 if (ret)
50 return ret;
51
52 *value = req.value;
53
54 return 0;
55 }
56
57 int
58 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id)
59 {
60 uint64_t value;
61 int ret = tu_drm_get_param(dev, MSM_PARAM_GPU_ID, &value);
62 if (ret)
63 return ret;
64
65 *id = value;
66 return 0;
67 }
68
69 int
70 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size)
71 {
72 uint64_t value;
73 int ret = tu_drm_get_param(dev, MSM_PARAM_GMEM_SIZE, &value);
74 if (ret)
75 return ret;
76
77 *size = value;
78 return 0;
79 }
80
81 int
82 tu_drm_submitqueue_new(const struct tu_device *dev,
83 int priority,
84 uint32_t *queue_id)
85 {
86 struct drm_msm_submitqueue req = {
87 .flags = 0,
88 .prio = priority,
89 };
90
91 int ret = drmCommandWriteRead(dev->physical_device->local_fd,
92 DRM_MSM_SUBMITQUEUE_NEW, &req, sizeof(req));
93 if (ret)
94 return ret;
95
96 *queue_id = req.id;
97 return 0;
98 }
99
100 void
101 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id)
102 {
103 drmCommandWrite(dev->physical_device->local_fd, DRM_MSM_SUBMITQUEUE_CLOSE,
104 &queue_id, sizeof(uint32_t));
105 }
106
107 /**
108 * Return gem handle on success. Return 0 on failure.
109 */
110 uint32_t
111 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags)
112 {
113 struct drm_msm_gem_new req = {
114 .size = size,
115 .flags = flags,
116 };
117
118 int ret = drmCommandWriteRead(dev->physical_device->local_fd,
119 DRM_MSM_GEM_NEW, &req, sizeof(req));
120 if (ret)
121 return 0;
122
123 return req.handle;
124 }
125
126 void
127 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle)
128 {
129 struct drm_gem_close req = {
130 .handle = gem_handle,
131 };
132
133 drmIoctl(dev->physical_device->local_fd, DRM_IOCTL_GEM_CLOSE, &req);
134 }
135
136 /** Return UINT64_MAX on error. */
137 static uint64_t
138 tu_gem_info(const struct tu_device *dev, uint32_t gem_handle, uint32_t info)
139 {
140 struct drm_msm_gem_info req = {
141 .handle = gem_handle,
142 .info = info,
143 };
144
145 int ret = drmCommandWriteRead(dev->physical_device->local_fd,
146 DRM_MSM_GEM_INFO, &req, sizeof(req));
147 if (ret == -1)
148 return UINT64_MAX;
149
150 return req.value;
151 }
152
153 /** Return UINT64_MAX on error. */
154 uint64_t
155 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle)
156 {
157 return tu_gem_info(dev, gem_handle, MSM_INFO_GET_OFFSET);
158 }
159
160 /** Return UINT64_MAX on error. */
161 uint64_t
162 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle)
163 {
164 return tu_gem_info(dev, gem_handle, MSM_INFO_GET_IOVA);
165 }