src/freedreno/vulkan/tu_image.c

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  *
   5  * based in part on anv driver which is:
   6  * Copyright © 2015 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  24  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  25  * DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include "tu_private.h"
  29
  30 #include "util/debug.h"
  31 #include "util/u_atomic.h"
  32 #include "util/format/u_format.h"
  33 #include "vk_format.h"
  34 #include "vk_util.h"
  35 #include "drm-uapi/drm_fourcc.h"
  36
  37 #include "tu_cs.h"
  38
  39 VkResult
  40 tu_image_create(VkDevice _device,
  41                 const VkImageCreateInfo *pCreateInfo,
  42                 const VkAllocationCallbacks *alloc,
  43                 VkImage *pImage,
  44                 uint64_t modifier)
  45 {
  46    TU_FROM_HANDLE(tu_device, device, _device);
  47    struct tu_image *image = NULL;
  48    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
  49
  50    tu_assert(pCreateInfo->mipLevels > 0);
  51    tu_assert(pCreateInfo->arrayLayers > 0);
  52    tu_assert(pCreateInfo->samples > 0);
  53    tu_assert(pCreateInfo->extent.width > 0);
  54    tu_assert(pCreateInfo->extent.height > 0);
  55    tu_assert(pCreateInfo->extent.depth > 0);
  56
  57    image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
  58                       VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
  59    if (!image)
  60       return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
  61
  62    image->type = pCreateInfo->imageType;
  63
  64    image->vk_format = pCreateInfo->format;
  65    image->tiling = pCreateInfo->tiling;
  66    image->usage = pCreateInfo->usage;
  67    image->flags = pCreateInfo->flags;
  68    image->extent = pCreateInfo->extent;
  69    image->level_count = pCreateInfo->mipLevels;
  70    image->layer_count = pCreateInfo->arrayLayers;
  71    image->samples = pCreateInfo->samples;
  72
  73    image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE;
  74    if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) {
  75       for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i)
  76          if (pCreateInfo->pQueueFamilyIndices[i] ==
  77              VK_QUEUE_FAMILY_EXTERNAL)
  78             image->queue_family_mask |= (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
  79          else
  80             image->queue_family_mask |=
  81                1u << pCreateInfo->pQueueFamilyIndices[i];
  82    }
  83
  84    image->shareable =
  85       vk_find_struct_const(pCreateInfo->pNext,
  86                            EXTERNAL_MEMORY_IMAGE_CREATE_INFO) != NULL;
  87
  88    image->layout.tile_mode = TILE6_3;
  89    bool ubwc_enabled =
  90       !(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);
  91
  92    /* disable tiling when linear is requested and for YUYV/UYVY */
  93    if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR ||
  94        modifier == DRM_FORMAT_MOD_LINEAR ||
  95        vk_format_description(image->vk_format)->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED) {
  96       image->layout.tile_mode = TILE6_LINEAR;
  97       ubwc_enabled = false;
  98    }
  99
 100    /* don't use UBWC with compressed formats */
 101    if (vk_format_is_compressed(image->vk_format))
 102       ubwc_enabled = false;
 103
 104    /* UBWC can't be used with E5B9G9R9 */
 105    if (image->vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32)
 106       ubwc_enabled = false;
 107
 108    /* separate stencil doesn't have a UBWC enable bit */
 109    if (image->vk_format == VK_FORMAT_S8_UINT)
 110       ubwc_enabled = false;
 111
 112    if (image->extent.depth > 1) {
 113       tu_finishme("UBWC with 3D textures");
 114       ubwc_enabled = false;
 115    }
 116
 117    /* Disable UBWC for storage images.
 118     *
 119     * The closed GL driver skips UBWC for storage images (and additionally
 120     * uses linear for writeonly images).  We seem to have image tiling working
 121     * in freedreno in general, so turnip matches that.  freedreno also enables
 122     * UBWC on images, but it's not really tested due to the lack of
 123     * UBWC-enabled mipmaps in freedreno currently.  Just match the closed GL
 124     * behavior of no UBWC.
 125    */
 126    if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)
 127       ubwc_enabled = false;
 128
 129    uint32_t ubwc_blockwidth, ubwc_blockheight;
 130    fdl6_get_ubwc_blockwidth(&image->layout,
 131                             &ubwc_blockwidth, &ubwc_blockheight);
 132    if (!ubwc_blockwidth) {
 133       tu_finishme("UBWC for cpp=%d", image->layout.cpp);
 134       ubwc_enabled = false;
 135    }
 136
 137    /* expect UBWC enabled if we asked for it */
 138    assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
 139
 140    image->layout.ubwc = ubwc_enabled;
 141
 142    fdl6_layout(&image->layout, vk_format_to_pipe_format(image->vk_format),
 143                image->samples,
 144                pCreateInfo->extent.width,
 145                pCreateInfo->extent.height,
 146                pCreateInfo->extent.depth,
 147                pCreateInfo->mipLevels,
 148                pCreateInfo->arrayLayers,
 149                pCreateInfo->imageType == VK_IMAGE_TYPE_3D);
 150
 151    *pImage = tu_image_to_handle(image);
 152
 153    return VK_SUCCESS;
 154 }
 155
 156 enum a6xx_tex_fetchsize
 157 tu6_fetchsize(VkFormat format)
 158 {
 159    switch (vk_format_get_blocksize(format)) {
 160    case 1: return TFETCH6_1_BYTE;
 161    case 2: return TFETCH6_2_BYTE;
 162    case 4: return TFETCH6_4_BYTE;
 163    case 8: return TFETCH6_8_BYTE;
 164    case 16: return TFETCH6_16_BYTE;
 165    default:
 166       unreachable("bad block size");
 167    }
 168 }
 169
 170 static void
 171 compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)
 172 {
 173    unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };
 174    VkComponentSwizzle vk_swiz[4] = {
 175       mapping->r, mapping->g, mapping->b, mapping->a
 176    };
 177    for (int i = 0; i < 4; i++) {
 178       switch (vk_swiz[i]) {
 179       case VK_COMPONENT_SWIZZLE_IDENTITY:
 180          swiz[i] = src_swiz[i];
 181          break;
 182       case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:
 183          swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];
 184          break;
 185       case VK_COMPONENT_SWIZZLE_ZERO:
 186          swiz[i] = A6XX_TEX_ZERO;
 187          break;
 188       case VK_COMPONENT_SWIZZLE_ONE:
 189          swiz[i] = A6XX_TEX_ONE;
 190          break;
 191       default:
 192          unreachable("unexpected swizzle");
 193       }
 194    }
 195 }
 196
 197 static uint32_t
 198 tu6_texswiz(const VkComponentMapping *comps,
 199             const struct tu_sampler_ycbcr_conversion *conversion,
 200             VkFormat format,
 201             VkImageAspectFlagBits aspect_mask)
 202 {
 203    unsigned char swiz[4] = {
 204       A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,
 205    };
 206
 207    switch (format) {
 208    case VK_FORMAT_G8B8G8R8_422_UNORM:
 209    case VK_FORMAT_B8G8R8G8_422_UNORM:
 210       swiz[0] = A6XX_TEX_Z;
 211       swiz[1] = A6XX_TEX_X;
 212       swiz[2] = A6XX_TEX_Y;
 213       break;
 214    case VK_FORMAT_BC1_RGB_UNORM_BLOCK:
 215    case VK_FORMAT_BC1_RGB_SRGB_BLOCK:
 216       /* same hardware format is used for BC1_RGB / BC1_RGBA */
 217       swiz[3] = A6XX_TEX_ONE;
 218       break;
 219    case VK_FORMAT_D24_UNORM_S8_UINT:
 220       /* for D24S8, stencil is in the 2nd channel of the hardware format */
 221       if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
 222          swiz[0] = A6XX_TEX_Y;
 223          swiz[1] = A6XX_TEX_ZERO;
 224       }
 225    default:
 226       break;
 227    }
 228
 229    compose_swizzle(swiz, comps);
 230    if (conversion)
 231       compose_swizzle(swiz, &conversion->components);
 232
 233    return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
 234           A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
 235           A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
 236           A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
 237 }
 238
 239 static enum a6xx_tex_type
 240 tu6_tex_type(VkImageViewType type, bool storage)
 241 {
 242    switch (type) {
 243    default:
 244    case VK_IMAGE_VIEW_TYPE_1D:
 245    case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
 246       return A6XX_TEX_1D;
 247    case VK_IMAGE_VIEW_TYPE_2D:
 248    case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
 249       return A6XX_TEX_2D;
 250    case VK_IMAGE_VIEW_TYPE_3D:
 251       return A6XX_TEX_3D;
 252    case VK_IMAGE_VIEW_TYPE_CUBE:
 253    case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
 254       return storage ? A6XX_TEX_2D : A6XX_TEX_CUBE;
 255    }
 256 }
 257
 258 void
 259 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
 260 {
 261    tu_cs_emit(cs, iview->PITCH);
 262    tu_cs_emit(cs, iview->layer_size >> 6);
 263    tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
 264 }
 265
 266 void
 267 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
 268 {
 269    tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
 270    /* SP_PS_2D_SRC_PITCH has shifted pitch field */
 271    tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
 272 }
 273
 274 void
 275 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
 276 {
 277    tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
 278    tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
 279 }
 280
 281 void
 282 tu_image_view_init(struct tu_image_view *iview,
 283                    const VkImageViewCreateInfo *pCreateInfo)
 284 {
 285    TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
 286    const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
 287    VkFormat format = pCreateInfo->format;
 288    VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
 289
 290    const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =
 291       vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
 292    const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?
 293       tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;
 294
 295    switch (image->type) {
 296    case VK_IMAGE_TYPE_1D:
 297    case VK_IMAGE_TYPE_2D:
 298       assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
 299              image->layer_count);
 300       break;
 301    case VK_IMAGE_TYPE_3D:
 302       assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
 303              tu_minify(image->extent.depth, range->baseMipLevel));
 304       break;
 305    default:
 306       unreachable("bad VkImageType");
 307    }
 308
 309    iview->image = image;
 310
 311    memset(iview->descriptor, 0, sizeof(iview->descriptor));
 312
 313    struct fdl_layout *layout = &image->layout;
 314
 315    uint32_t width = u_minify(image->extent.width, range->baseMipLevel);
 316    uint32_t height = u_minify(image->extent.height, range->baseMipLevel);
 317    uint32_t storage_depth = tu_get_layerCount(image, range);
 318    if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
 319       storage_depth = u_minify(image->extent.depth, range->baseMipLevel);
 320    }
 321
 322    uint32_t depth = storage_depth;
 323    if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
 324        pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
 325       /* Cubes are treated as 2D arrays for storage images, so only divide the
 326        * depth by 6 for the texture descriptor.
 327        */
 328       depth /= 6;
 329    }
 330
 331    uint64_t base_addr = image->bo->iova + image->bo_offset +
 332       fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
 333    uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
 334       fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
 335
 336    uint32_t pitch = layout->slices[range->baseMipLevel].pitch;
 337    uint32_t ubwc_pitch = layout->ubwc_slices[range->baseMipLevel].pitch;
 338    uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
 339
 340    struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
 341    /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC
 342     * this means smaller mipmap levels have a linear tile mode
 343     */
 344    fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
 345
 346    bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
 347
 348    unsigned fmt_tex = fmt.fmt;
 349    if (fmt_tex == FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8) {
 350       if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
 351          fmt_tex = FMT6_Z24_UNORM_S8_UINT;
 352       if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
 353          fmt_tex = FMT6_S8Z24_UINT;
 354       /* TODO: also use this format with storage descriptor ? */
 355    }
 356
 357    iview->descriptor[0] =
 358       A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
 359       COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
 360       A6XX_TEX_CONST_0_FMT(fmt_tex) |
 361       A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image->samples)) |
 362       A6XX_TEX_CONST_0_SWAP(fmt.swap) |
 363       tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask) |
 364       A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
 365    iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
 366    iview->descriptor[2] =
 367       A6XX_TEX_CONST_2_FETCHSIZE(tu6_fetchsize(format)) |
 368       A6XX_TEX_CONST_2_PITCH(pitch) |
 369       A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));
 370    iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
 371    iview->descriptor[4] = base_addr;
 372    iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
 373
 374    if (ubwc_enabled) {
 375       uint32_t block_width, block_height;
 376       fdl6_get_ubwc_blockwidth(&image->layout,
 377                                &block_width, &block_height);
 378
 379       iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
 380       iview->descriptor[7] = ubwc_addr;
 381       iview->descriptor[8] = ubwc_addr >> 32;
 382       iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
 383       iview->descriptor[10] |=
 384          A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
 385          A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
 386          A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
 387    }
 388
 389    if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
 390       iview->descriptor[3] |=
 391          A6XX_TEX_CONST_3_MIN_LAYERSZ(image->layout.slices[image->level_count - 1].size0);
 392    }
 393
 394    iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
 395       .color_format = fmt.fmt,
 396       .tile_mode = fmt.tile_mode,
 397       .color_swap = fmt.swap,
 398       .flags = ubwc_enabled,
 399       .srgb = vk_format_is_srgb(format),
 400       .samples = tu_msaa_samples(image->samples),
 401       .samples_average = image->samples > 1 &&
 402                            !vk_format_is_int(format) &&
 403                            !vk_format_is_depth_or_stencil(format),
 404       .unk20 = 1,
 405       .unk22 = 1).value;
 406    iview->SP_PS_2D_SRC_SIZE =
 407       A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
 408
 409    /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
 410    iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
 411    iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
 412       .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
 413
 414    iview->base_addr = base_addr;
 415    iview->ubwc_addr = ubwc_addr;
 416    iview->layer_size = layer_size;
 417    iview->ubwc_layer_size = layout->ubwc_layer_size;
 418
 419    /* Don't set fields that are only used for attachments/blit dest if COLOR
 420     * is unsupported.
 421     */
 422    if (!(fmt.supported & FMT_COLOR))
 423       return;
 424
 425    struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
 426    cfmt.tile_mode = fmt.tile_mode;
 427
 428    if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
 429       memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
 430
 431       iview->storage_descriptor[0] =
 432          A6XX_IBO_0_FMT(fmt.fmt) |
 433          A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
 434       iview->storage_descriptor[1] =
 435          A6XX_IBO_1_WIDTH(width) |
 436          A6XX_IBO_1_HEIGHT(height);
 437       iview->storage_descriptor[2] =
 438          A6XX_IBO_2_PITCH(pitch) |
 439          A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));
 440       iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
 441
 442       iview->storage_descriptor[4] = base_addr;
 443       iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);
 444
 445       if (ubwc_enabled) {
 446          iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
 447          iview->storage_descriptor[7] |= ubwc_addr;
 448          iview->storage_descriptor[8] |= ubwc_addr >> 32;
 449          iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
 450          iview->storage_descriptor[10] =
 451             A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
 452       }
 453    }
 454
 455    iview->extent.width = width;
 456    iview->extent.height = height;
 457    iview->need_y2_align =
 458       (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
 459
 460    iview->ubwc_enabled = ubwc_enabled;
 461
 462    iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
 463                               .color_tile_mode = cfmt.tile_mode,
 464                               .color_format = cfmt.fmt,
 465                               .color_swap = cfmt.swap).value;
 466    iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
 467                               .color_format = cfmt.fmt,
 468                               .color_sint = vk_format_is_sint(format),
 469                               .color_uint = vk_format_is_uint(format)).value;
 470
 471    iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
 472       .color_format = cfmt.fmt,
 473       .tile_mode = cfmt.tile_mode,
 474       .color_swap = cfmt.swap,
 475       .flags = ubwc_enabled,
 476       .srgb = vk_format_is_srgb(format)).value;
 477
 478    iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
 479       .tile_mode = cfmt.tile_mode,
 480       .samples = tu_msaa_samples(iview->image->samples),
 481       .color_format = cfmt.fmt,
 482       .color_swap = cfmt.swap,
 483       .flags = ubwc_enabled).value;
 484 }
 485
 486 unsigned
 487 tu_image_queue_family_mask(const struct tu_image *image,
 488                            uint32_t family,
 489                            uint32_t queue_family)
 490 {
 491    if (!image->exclusive)
 492       return image->queue_family_mask;
 493    if (family == VK_QUEUE_FAMILY_EXTERNAL)
 494       return (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
 495    if (family == VK_QUEUE_FAMILY_IGNORED)
 496       return 1u << queue_family;
 497    return 1u << family;
 498 }
 499
 500 VkResult
 501 tu_CreateImage(VkDevice device,
 502                const VkImageCreateInfo *pCreateInfo,
 503                const VkAllocationCallbacks *pAllocator,
 504                VkImage *pImage)
 505 {
 506 #ifdef ANDROID
 507    const VkNativeBufferANDROID *gralloc_info =
 508       vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
 509
 510    if (gralloc_info)
 511       return tu_image_from_gralloc(device, pCreateInfo, gralloc_info,
 512                                    pAllocator, pImage);
 513 #endif
 514
 515    uint64_t modifier = DRM_FORMAT_MOD_INVALID;
 516    if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
 517       const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
 518          vk_find_struct_const(pCreateInfo->pNext,
 519                               IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
 520
 521       modifier = DRM_FORMAT_MOD_LINEAR;
 522       for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
 523          if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
 524             modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
 525       }
 526    } else {
 527       const struct wsi_image_create_info *wsi_info =
 528          vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
 529       if (wsi_info && wsi_info->scanout)
 530          modifier = DRM_FORMAT_MOD_LINEAR;
 531    }
 532
 533    return tu_image_create(device, pCreateInfo, pAllocator, pImage, modifier);
 534 }
 535
 536 void
 537 tu_DestroyImage(VkDevice _device,
 538                 VkImage _image,
 539                 const VkAllocationCallbacks *pAllocator)
 540 {
 541    TU_FROM_HANDLE(tu_device, device, _device);
 542    TU_FROM_HANDLE(tu_image, image, _image);
 543
 544    if (!image)
 545       return;
 546
 547    if (image->owned_memory != VK_NULL_HANDLE)
 548       tu_FreeMemory(_device, image->owned_memory, pAllocator);
 549
 550    vk_free2(&device->alloc, pAllocator, image);
 551 }
 552
 553 void
 554 tu_GetImageSubresourceLayout(VkDevice _device,
 555                              VkImage _image,
 556                              const VkImageSubresource *pSubresource,
 557                              VkSubresourceLayout *pLayout)
 558 {
 559    TU_FROM_HANDLE(tu_image, image, _image);
 560
 561    const struct fdl_slice *slice = image->layout.slices + pSubresource->mipLevel;
 562
 563    pLayout->offset = fdl_surface_offset(&image->layout,
 564                                         pSubresource->mipLevel,
 565                                         pSubresource->arrayLayer);
 566    pLayout->size = slice->size0;
 567    pLayout->rowPitch = slice->pitch;
 568    pLayout->arrayPitch = image->layout.layer_size;
 569    pLayout->depthPitch = slice->size0;
 570
 571    if (image->layout.ubwc_layer_size) {
 572       /* UBWC starts at offset 0 */
 573       pLayout->offset = 0;
 574       /* UBWC scanout won't match what the kernel wants if we have levels/layers */
 575       assert(image->level_count == 1 && image->layer_count == 1);
 576    }
 577 }
 578
 579 VkResult tu_GetImageDrmFormatModifierPropertiesEXT(
 580     VkDevice                                    device,
 581     VkImage                                     _image,
 582     VkImageDrmFormatModifierPropertiesEXT*      pProperties)
 583 {
 584    TU_FROM_HANDLE(tu_image, image, _image);
 585
 586    assert(pProperties->sType ==
 587           VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
 588
 589    /* TODO invent a modifier for tiled but not UBWC buffers */
 590
 591    if (!image->layout.tile_mode)
 592       pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
 593    else if (image->layout.ubwc_layer_size)
 594       pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
 595    else
 596       pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
 597
 598    return VK_SUCCESS;
 599 }
 600
 601
 602 VkResult
 603 tu_CreateImageView(VkDevice _device,
 604                    const VkImageViewCreateInfo *pCreateInfo,
 605                    const VkAllocationCallbacks *pAllocator,
 606                    VkImageView *pView)
 607 {
 608    TU_FROM_HANDLE(tu_device, device, _device);
 609    struct tu_image_view *view;
 610
 611    view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
 612                     VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 613    if (view == NULL)
 614       return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
 615
 616    tu_image_view_init(view, pCreateInfo);
 617
 618    *pView = tu_image_view_to_handle(view);
 619
 620    return VK_SUCCESS;
 621 }
 622
 623 void
 624 tu_DestroyImageView(VkDevice _device,
 625                     VkImageView _iview,
 626                     const VkAllocationCallbacks *pAllocator)
 627 {
 628    TU_FROM_HANDLE(tu_device, device, _device);
 629    TU_FROM_HANDLE(tu_image_view, iview, _iview);
 630
 631    if (!iview)
 632       return;
 633    vk_free2(&device->alloc, pAllocator, iview);
 634 }
 635
 636 void
 637 tu_buffer_view_init(struct tu_buffer_view *view,
 638                     struct tu_device *device,
 639                     const VkBufferViewCreateInfo *pCreateInfo)
 640 {
 641    TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
 642
 643    view->buffer = buffer;
 644
 645    enum VkFormat vfmt = pCreateInfo->format;
 646    enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
 647    const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
 648
 649    uint32_t range;
 650    if (pCreateInfo->range == VK_WHOLE_SIZE)
 651       range = buffer->size - pCreateInfo->offset;
 652    else
 653       range = pCreateInfo->range;
 654    uint32_t elements = range / util_format_get_blocksize(pfmt);
 655
 656    static const VkComponentMapping components = {
 657       .r = VK_COMPONENT_SWIZZLE_R,
 658       .g = VK_COMPONENT_SWIZZLE_G,
 659       .b = VK_COMPONENT_SWIZZLE_B,
 660       .a = VK_COMPONENT_SWIZZLE_A,
 661    };
 662
 663    uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
 664
 665    memset(&view->descriptor, 0, sizeof(view->descriptor));
 666
 667    view->descriptor[0] =
 668       A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
 669       A6XX_TEX_CONST_0_SWAP(fmt.swap) |
 670       A6XX_TEX_CONST_0_FMT(fmt.fmt) |
 671       A6XX_TEX_CONST_0_MIPLVLS(0) |
 672       tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT);
 673       COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
 674    view->descriptor[1] =
 675       A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
 676       A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
 677    view->descriptor[2] =
 678       A6XX_TEX_CONST_2_UNK4 |
 679       A6XX_TEX_CONST_2_UNK31;
 680    view->descriptor[4] = iova;
 681    view->descriptor[5] = iova >> 32;
 682 }
 683
 684 VkResult
 685 tu_CreateBufferView(VkDevice _device,
 686                     const VkBufferViewCreateInfo *pCreateInfo,
 687                     const VkAllocationCallbacks *pAllocator,
 688                     VkBufferView *pView)
 689 {
 690    TU_FROM_HANDLE(tu_device, device, _device);
 691    struct tu_buffer_view *view;
 692
 693    view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
 694                     VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 695    if (!view)
 696       return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
 697
 698    tu_buffer_view_init(view, device, pCreateInfo);
 699
 700    *pView = tu_buffer_view_to_handle(view);
 701
 702    return VK_SUCCESS;
 703 }
 704
 705 void
 706 tu_DestroyBufferView(VkDevice _device,
 707                      VkBufferView bufferView,
 708                      const VkAllocationCallbacks *pAllocator)
 709 {
 710    TU_FROM_HANDLE(tu_device, device, _device);
 711    TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
 712
 713    if (!view)
 714       return;
 715
 716    vk_free2(&device->alloc, pAllocator, view);
 717 }