freedreno/a6xx: FETCHSIZE is PITCHALIGN
[mesa.git] / src / freedreno / vulkan / tu_image.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #include "tu_private.h"
29
30 #include "util/debug.h"
31 #include "util/u_atomic.h"
32 #include "util/format/u_format.h"
33 #include "vk_format.h"
34 #include "vk_util.h"
35 #include "drm-uapi/drm_fourcc.h"
36
37 #include "tu_cs.h"
38
39 VkResult
40 tu_image_create(VkDevice _device,
41 const VkImageCreateInfo *pCreateInfo,
42 const VkAllocationCallbacks *alloc,
43 VkImage *pImage,
44 uint64_t modifier,
45 const VkSubresourceLayout *plane_layouts)
46 {
47 TU_FROM_HANDLE(tu_device, device, _device);
48 struct tu_image *image = NULL;
49 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
50
51 assert(pCreateInfo->mipLevels > 0);
52 assert(pCreateInfo->arrayLayers > 0);
53 assert(pCreateInfo->samples > 0);
54 assert(pCreateInfo->extent.width > 0);
55 assert(pCreateInfo->extent.height > 0);
56 assert(pCreateInfo->extent.depth > 0);
57
58 image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
59 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
60 if (!image)
61 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
62
63 image->type = pCreateInfo->imageType;
64
65 image->vk_format = pCreateInfo->format;
66 image->tiling = pCreateInfo->tiling;
67 image->usage = pCreateInfo->usage;
68 image->flags = pCreateInfo->flags;
69 image->extent = pCreateInfo->extent;
70 image->level_count = pCreateInfo->mipLevels;
71 image->layer_count = pCreateInfo->arrayLayers;
72 image->samples = pCreateInfo->samples;
73
74 image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE;
75 if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) {
76 for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i)
77 if (pCreateInfo->pQueueFamilyIndices[i] ==
78 VK_QUEUE_FAMILY_EXTERNAL)
79 image->queue_family_mask |= (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
80 else
81 image->queue_family_mask |=
82 1u << pCreateInfo->pQueueFamilyIndices[i];
83 }
84
85 image->shareable =
86 vk_find_struct_const(pCreateInfo->pNext,
87 EXTERNAL_MEMORY_IMAGE_CREATE_INFO) != NULL;
88
89 image->layout.tile_mode = TILE6_3;
90 bool ubwc_enabled =
91 !(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);
92
93 /* disable tiling when linear is requested, for YUYV/UYVY, and for mutable
94 * images. Mutable images can be reinterpreted as any other compatible
95 * format, including swapped formats which aren't supported with tiling.
96 * This means that we have to fall back to linear almost always. However
97 * depth and stencil formats cannot be reintepreted as another format, and
98 * cannot be linear with sysmem rendering, so don't fall back for those.
99 *
100 * TODO: Be smarter and use usage bits and VK_KHR_image_format_list to
101 * enable tiling and/or UBWC when possible.
102 */
103 if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR ||
104 modifier == DRM_FORMAT_MOD_LINEAR ||
105 vk_format_description(image->vk_format)->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED ||
106 (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT &&
107 !vk_format_is_depth_or_stencil(image->vk_format))) {
108 image->layout.tile_mode = TILE6_LINEAR;
109 ubwc_enabled = false;
110 }
111
112 /* don't use UBWC with compressed formats */
113 if (vk_format_is_compressed(image->vk_format))
114 ubwc_enabled = false;
115
116 /* UBWC can't be used with E5B9G9R9 */
117 if (image->vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32)
118 ubwc_enabled = false;
119
120 /* separate stencil doesn't have a UBWC enable bit */
121 if (image->vk_format == VK_FORMAT_S8_UINT)
122 ubwc_enabled = false;
123
124 if (image->extent.depth > 1) {
125 tu_finishme("UBWC with 3D textures");
126 ubwc_enabled = false;
127 }
128
129 /* Disable UBWC for storage images.
130 *
131 * The closed GL driver skips UBWC for storage images (and additionally
132 * uses linear for writeonly images). We seem to have image tiling working
133 * in freedreno in general, so turnip matches that. freedreno also enables
134 * UBWC on images, but it's not really tested due to the lack of
135 * UBWC-enabled mipmaps in freedreno currently. Just match the closed GL
136 * behavior of no UBWC.
137 */
138 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)
139 ubwc_enabled = false;
140
141 uint32_t ubwc_blockwidth, ubwc_blockheight;
142 fdl6_get_ubwc_blockwidth(&image->layout,
143 &ubwc_blockwidth, &ubwc_blockheight);
144 if (!ubwc_blockwidth) {
145 tu_finishme("UBWC for cpp=%d", image->layout.cpp);
146 ubwc_enabled = false;
147 }
148
149 /* expect UBWC enabled if we asked for it */
150 assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
151
152 image->layout.ubwc = ubwc_enabled;
153
154 struct fdl_slice plane_layout;
155
156 if (plane_layouts) {
157 /* only expect simple 2D images for now */
158 if (pCreateInfo->mipLevels != 1 ||
159 pCreateInfo->arrayLayers != 1 ||
160 image->extent.depth != 1)
161 goto invalid_layout;
162
163 plane_layout.offset = plane_layouts[0].offset;
164 plane_layout.pitch = plane_layouts[0].rowPitch;
165 /* note: use plane_layouts[0].arrayPitch to support array formats */
166 }
167
168 if (!fdl6_layout(&image->layout, vk_format_to_pipe_format(image->vk_format),
169 image->samples,
170 pCreateInfo->extent.width,
171 pCreateInfo->extent.height,
172 pCreateInfo->extent.depth,
173 pCreateInfo->mipLevels,
174 pCreateInfo->arrayLayers,
175 pCreateInfo->imageType == VK_IMAGE_TYPE_3D,
176 plane_layouts ? &plane_layout : NULL)) {
177 assert(plane_layouts); /* can only fail with explicit layout */
178 goto invalid_layout;
179 }
180
181 *pImage = tu_image_to_handle(image);
182
183 return VK_SUCCESS;
184
185 invalid_layout:
186 vk_free2(&device->alloc, alloc, image);
187 return vk_error(device->instance, VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT);
188 }
189
190 static void
191 compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)
192 {
193 unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };
194 VkComponentSwizzle vk_swiz[4] = {
195 mapping->r, mapping->g, mapping->b, mapping->a
196 };
197 for (int i = 0; i < 4; i++) {
198 switch (vk_swiz[i]) {
199 case VK_COMPONENT_SWIZZLE_IDENTITY:
200 swiz[i] = src_swiz[i];
201 break;
202 case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:
203 swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];
204 break;
205 case VK_COMPONENT_SWIZZLE_ZERO:
206 swiz[i] = A6XX_TEX_ZERO;
207 break;
208 case VK_COMPONENT_SWIZZLE_ONE:
209 swiz[i] = A6XX_TEX_ONE;
210 break;
211 default:
212 unreachable("unexpected swizzle");
213 }
214 }
215 }
216
217 static uint32_t
218 tu6_texswiz(const VkComponentMapping *comps,
219 const struct tu_sampler_ycbcr_conversion *conversion,
220 VkFormat format,
221 VkImageAspectFlagBits aspect_mask)
222 {
223 unsigned char swiz[4] = {
224 A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,
225 };
226
227 switch (format) {
228 case VK_FORMAT_G8B8G8R8_422_UNORM:
229 case VK_FORMAT_B8G8R8G8_422_UNORM:
230 swiz[0] = A6XX_TEX_Z;
231 swiz[1] = A6XX_TEX_X;
232 swiz[2] = A6XX_TEX_Y;
233 break;
234 case VK_FORMAT_BC1_RGB_UNORM_BLOCK:
235 case VK_FORMAT_BC1_RGB_SRGB_BLOCK:
236 /* same hardware format is used for BC1_RGB / BC1_RGBA */
237 swiz[3] = A6XX_TEX_ONE;
238 break;
239 case VK_FORMAT_D24_UNORM_S8_UINT:
240 /* for D24S8, stencil is in the 2nd channel of the hardware format */
241 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
242 swiz[0] = A6XX_TEX_Y;
243 swiz[1] = A6XX_TEX_ZERO;
244 }
245 default:
246 break;
247 }
248
249 compose_swizzle(swiz, comps);
250 if (conversion)
251 compose_swizzle(swiz, &conversion->components);
252
253 return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
254 A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
255 A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
256 A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
257 }
258
259 static enum a6xx_tex_type
260 tu6_tex_type(VkImageViewType type, bool storage)
261 {
262 switch (type) {
263 default:
264 case VK_IMAGE_VIEW_TYPE_1D:
265 case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
266 return A6XX_TEX_1D;
267 case VK_IMAGE_VIEW_TYPE_2D:
268 case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
269 return A6XX_TEX_2D;
270 case VK_IMAGE_VIEW_TYPE_3D:
271 return A6XX_TEX_3D;
272 case VK_IMAGE_VIEW_TYPE_CUBE:
273 case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
274 return storage ? A6XX_TEX_2D : A6XX_TEX_CUBE;
275 }
276 }
277
278 void
279 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
280 {
281 tu_cs_emit(cs, iview->PITCH);
282 tu_cs_emit(cs, iview->layer_size >> 6);
283 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
284 }
285
286 void
287 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
288 {
289 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
290 /* SP_PS_2D_SRC_PITCH has shifted pitch field */
291 tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
292 }
293
294 void
295 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
296 {
297 tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
298 tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
299 }
300
301 void
302 tu_image_view_init(struct tu_image_view *iview,
303 const VkImageViewCreateInfo *pCreateInfo)
304 {
305 TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
306 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
307 VkFormat format = pCreateInfo->format;
308 VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
309
310 const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =
311 vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
312 const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?
313 tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;
314
315 switch (image->type) {
316 case VK_IMAGE_TYPE_1D:
317 case VK_IMAGE_TYPE_2D:
318 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
319 image->layer_count);
320 break;
321 case VK_IMAGE_TYPE_3D:
322 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
323 tu_minify(image->extent.depth, range->baseMipLevel));
324 break;
325 default:
326 unreachable("bad VkImageType");
327 }
328
329 iview->image = image;
330
331 memset(iview->descriptor, 0, sizeof(iview->descriptor));
332
333 struct fdl_layout *layout = &image->layout;
334
335 uint32_t width = u_minify(image->extent.width, range->baseMipLevel);
336 uint32_t height = u_minify(image->extent.height, range->baseMipLevel);
337 uint32_t storage_depth = tu_get_layerCount(image, range);
338 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
339 storage_depth = u_minify(image->extent.depth, range->baseMipLevel);
340 }
341
342 uint32_t depth = storage_depth;
343 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
344 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
345 /* Cubes are treated as 2D arrays for storage images, so only divide the
346 * depth by 6 for the texture descriptor.
347 */
348 depth /= 6;
349 }
350
351 uint64_t base_addr = image->bo->iova + image->bo_offset +
352 fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
353 uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
354 fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
355
356 uint32_t pitch = layout->slices[range->baseMipLevel].pitch;
357 uint32_t ubwc_pitch = layout->ubwc_slices[range->baseMipLevel].pitch;
358 uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
359
360 struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
361 /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC
362 * this means smaller mipmap levels have a linear tile mode
363 */
364 fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
365
366 bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
367
368 unsigned fmt_tex = fmt.fmt;
369 if (fmt_tex == FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8) {
370 if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
371 fmt_tex = FMT6_Z24_UNORM_S8_UINT;
372 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
373 fmt_tex = FMT6_S8Z24_UINT;
374 /* TODO: also use this format with storage descriptor ? */
375 }
376
377 iview->descriptor[0] =
378 A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
379 COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
380 A6XX_TEX_CONST_0_FMT(fmt_tex) |
381 A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image->samples)) |
382 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
383 tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask) |
384 A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
385 iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
386 iview->descriptor[2] =
387 A6XX_TEX_CONST_2_PITCHALIGN(layout->pitchalign) |
388 A6XX_TEX_CONST_2_PITCH(pitch) |
389 A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));
390 iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
391 iview->descriptor[4] = base_addr;
392 iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
393
394 if (ubwc_enabled) {
395 uint32_t block_width, block_height;
396 fdl6_get_ubwc_blockwidth(&image->layout,
397 &block_width, &block_height);
398
399 iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
400 iview->descriptor[7] = ubwc_addr;
401 iview->descriptor[8] = ubwc_addr >> 32;
402 iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
403 iview->descriptor[10] |=
404 A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
405 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
406 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
407 }
408
409 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
410 iview->descriptor[3] |=
411 A6XX_TEX_CONST_3_MIN_LAYERSZ(image->layout.slices[image->level_count - 1].size0);
412 }
413
414 iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
415 .color_format = fmt.fmt,
416 .tile_mode = fmt.tile_mode,
417 .color_swap = fmt.swap,
418 .flags = ubwc_enabled,
419 .srgb = vk_format_is_srgb(format),
420 .samples = tu_msaa_samples(image->samples),
421 .samples_average = image->samples > 1 &&
422 !vk_format_is_int(format) &&
423 !vk_format_is_depth_or_stencil(format),
424 .unk20 = 1,
425 .unk22 = 1).value;
426 iview->SP_PS_2D_SRC_SIZE =
427 A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
428
429 /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
430 iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
431 iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
432 .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
433
434 iview->base_addr = base_addr;
435 iview->ubwc_addr = ubwc_addr;
436 iview->layer_size = layer_size;
437 iview->ubwc_layer_size = layout->ubwc_layer_size;
438
439 /* Don't set fields that are only used for attachments/blit dest if COLOR
440 * is unsupported.
441 */
442 if (!(fmt.supported & FMT_COLOR))
443 return;
444
445 struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
446 cfmt.tile_mode = fmt.tile_mode;
447
448 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
449 memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
450
451 iview->storage_descriptor[0] =
452 A6XX_IBO_0_FMT(fmt.fmt) |
453 A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
454 iview->storage_descriptor[1] =
455 A6XX_IBO_1_WIDTH(width) |
456 A6XX_IBO_1_HEIGHT(height);
457 iview->storage_descriptor[2] =
458 A6XX_IBO_2_PITCH(pitch) |
459 A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));
460 iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
461
462 iview->storage_descriptor[4] = base_addr;
463 iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);
464
465 if (ubwc_enabled) {
466 iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
467 iview->storage_descriptor[7] |= ubwc_addr;
468 iview->storage_descriptor[8] |= ubwc_addr >> 32;
469 iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
470 iview->storage_descriptor[10] =
471 A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
472 }
473 }
474
475 iview->extent.width = width;
476 iview->extent.height = height;
477 iview->need_y2_align =
478 (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
479
480 iview->ubwc_enabled = ubwc_enabled;
481
482 iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
483 .color_tile_mode = cfmt.tile_mode,
484 .color_format = cfmt.fmt,
485 .color_swap = cfmt.swap).value;
486 iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
487 .color_format = cfmt.fmt,
488 .color_sint = vk_format_is_sint(format),
489 .color_uint = vk_format_is_uint(format)).value;
490
491 iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
492 .color_format = cfmt.fmt,
493 .tile_mode = cfmt.tile_mode,
494 .color_swap = cfmt.swap,
495 .flags = ubwc_enabled,
496 .srgb = vk_format_is_srgb(format)).value;
497
498 iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
499 .tile_mode = cfmt.tile_mode,
500 .samples = tu_msaa_samples(iview->image->samples),
501 .color_format = cfmt.fmt,
502 .color_swap = cfmt.swap,
503 .flags = ubwc_enabled).value;
504 }
505
506 VkResult
507 tu_CreateImage(VkDevice device,
508 const VkImageCreateInfo *pCreateInfo,
509 const VkAllocationCallbacks *pAllocator,
510 VkImage *pImage)
511 {
512 #ifdef ANDROID
513 const VkNativeBufferANDROID *gralloc_info =
514 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
515
516 if (gralloc_info)
517 return tu_image_from_gralloc(device, pCreateInfo, gralloc_info,
518 pAllocator, pImage);
519 #endif
520
521 uint64_t modifier = DRM_FORMAT_MOD_INVALID;
522 const VkSubresourceLayout *plane_layouts = NULL;
523
524 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
525 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
526 vk_find_struct_const(pCreateInfo->pNext,
527 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
528 const VkImageDrmFormatModifierExplicitCreateInfoEXT *drm_explicit_info =
529 vk_find_struct_const(pCreateInfo->pNext,
530 IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT);
531
532 assert(mod_info || drm_explicit_info);
533
534 if (mod_info) {
535 modifier = DRM_FORMAT_MOD_LINEAR;
536 for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
537 if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
538 modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
539 }
540 } else {
541 modifier = drm_explicit_info->drmFormatModifier;
542 assert(modifier == DRM_FORMAT_MOD_LINEAR ||
543 modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED);
544 plane_layouts = drm_explicit_info->pPlaneLayouts;
545 }
546 } else {
547 const struct wsi_image_create_info *wsi_info =
548 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
549 if (wsi_info && wsi_info->scanout)
550 modifier = DRM_FORMAT_MOD_LINEAR;
551 }
552
553 return tu_image_create(device, pCreateInfo, pAllocator, pImage, modifier, plane_layouts);
554 }
555
556 void
557 tu_DestroyImage(VkDevice _device,
558 VkImage _image,
559 const VkAllocationCallbacks *pAllocator)
560 {
561 TU_FROM_HANDLE(tu_device, device, _device);
562 TU_FROM_HANDLE(tu_image, image, _image);
563
564 if (!image)
565 return;
566
567 if (image->owned_memory != VK_NULL_HANDLE)
568 tu_FreeMemory(_device, image->owned_memory, pAllocator);
569
570 vk_free2(&device->alloc, pAllocator, image);
571 }
572
573 void
574 tu_GetImageSubresourceLayout(VkDevice _device,
575 VkImage _image,
576 const VkImageSubresource *pSubresource,
577 VkSubresourceLayout *pLayout)
578 {
579 TU_FROM_HANDLE(tu_image, image, _image);
580
581 const struct fdl_slice *slice = image->layout.slices + pSubresource->mipLevel;
582
583 pLayout->offset = fdl_surface_offset(&image->layout,
584 pSubresource->mipLevel,
585 pSubresource->arrayLayer);
586 pLayout->size = slice->size0;
587 pLayout->rowPitch = slice->pitch;
588 pLayout->arrayPitch = image->layout.layer_size;
589 pLayout->depthPitch = slice->size0;
590
591 if (image->layout.ubwc_layer_size) {
592 /* UBWC starts at offset 0 */
593 pLayout->offset = 0;
594 /* UBWC scanout won't match what the kernel wants if we have levels/layers */
595 assert(image->level_count == 1 && image->layer_count == 1);
596 }
597 }
598
599 VkResult tu_GetImageDrmFormatModifierPropertiesEXT(
600 VkDevice device,
601 VkImage _image,
602 VkImageDrmFormatModifierPropertiesEXT* pProperties)
603 {
604 TU_FROM_HANDLE(tu_image, image, _image);
605
606 assert(pProperties->sType ==
607 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
608
609 /* TODO invent a modifier for tiled but not UBWC buffers */
610
611 if (!image->layout.tile_mode)
612 pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
613 else if (image->layout.ubwc_layer_size)
614 pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
615 else
616 pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
617
618 return VK_SUCCESS;
619 }
620
621
622 VkResult
623 tu_CreateImageView(VkDevice _device,
624 const VkImageViewCreateInfo *pCreateInfo,
625 const VkAllocationCallbacks *pAllocator,
626 VkImageView *pView)
627 {
628 TU_FROM_HANDLE(tu_device, device, _device);
629 struct tu_image_view *view;
630
631 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
632 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
633 if (view == NULL)
634 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
635
636 tu_image_view_init(view, pCreateInfo);
637
638 *pView = tu_image_view_to_handle(view);
639
640 return VK_SUCCESS;
641 }
642
643 void
644 tu_DestroyImageView(VkDevice _device,
645 VkImageView _iview,
646 const VkAllocationCallbacks *pAllocator)
647 {
648 TU_FROM_HANDLE(tu_device, device, _device);
649 TU_FROM_HANDLE(tu_image_view, iview, _iview);
650
651 if (!iview)
652 return;
653 vk_free2(&device->alloc, pAllocator, iview);
654 }
655
656 void
657 tu_buffer_view_init(struct tu_buffer_view *view,
658 struct tu_device *device,
659 const VkBufferViewCreateInfo *pCreateInfo)
660 {
661 TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
662
663 view->buffer = buffer;
664
665 enum VkFormat vfmt = pCreateInfo->format;
666 enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
667 const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
668
669 uint32_t range;
670 if (pCreateInfo->range == VK_WHOLE_SIZE)
671 range = buffer->size - pCreateInfo->offset;
672 else
673 range = pCreateInfo->range;
674 uint32_t elements = range / util_format_get_blocksize(pfmt);
675
676 static const VkComponentMapping components = {
677 .r = VK_COMPONENT_SWIZZLE_R,
678 .g = VK_COMPONENT_SWIZZLE_G,
679 .b = VK_COMPONENT_SWIZZLE_B,
680 .a = VK_COMPONENT_SWIZZLE_A,
681 };
682
683 uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
684
685 memset(&view->descriptor, 0, sizeof(view->descriptor));
686
687 view->descriptor[0] =
688 A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
689 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
690 A6XX_TEX_CONST_0_FMT(fmt.fmt) |
691 A6XX_TEX_CONST_0_MIPLVLS(0) |
692 tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT);
693 COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
694 view->descriptor[1] =
695 A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
696 A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
697 view->descriptor[2] =
698 A6XX_TEX_CONST_2_UNK4 |
699 A6XX_TEX_CONST_2_UNK31;
700 view->descriptor[4] = iova;
701 view->descriptor[5] = iova >> 32;
702 }
703
704 VkResult
705 tu_CreateBufferView(VkDevice _device,
706 const VkBufferViewCreateInfo *pCreateInfo,
707 const VkAllocationCallbacks *pAllocator,
708 VkBufferView *pView)
709 {
710 TU_FROM_HANDLE(tu_device, device, _device);
711 struct tu_buffer_view *view;
712
713 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
714 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
715 if (!view)
716 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
717
718 tu_buffer_view_init(view, device, pCreateInfo);
719
720 *pView = tu_buffer_view_to_handle(view);
721
722 return VK_SUCCESS;
723 }
724
725 void
726 tu_DestroyBufferView(VkDevice _device,
727 VkBufferView bufferView,
728 const VkAllocationCallbacks *pAllocator)
729 {
730 TU_FROM_HANDLE(tu_device, device, _device);
731 TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
732
733 if (!view)
734 return;
735
736 vk_free2(&device->alloc, pAllocator, view);
737 }