2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
28 #include "tu_private.h"
30 #include "util/debug.h"
31 #include "util/u_atomic.h"
32 #include "util/format/u_format.h"
33 #include "vk_format.h"
35 #include "drm-uapi/drm_fourcc.h"
38 image_level_linear(struct tu_image
*image
, int level
, bool ubwc
)
40 unsigned w
= u_minify(image
->extent
.width
, level
);
41 /* all levels are tiled/compressed with UBWC */
42 return ubwc
? false : (w
< 16);
46 tu6_get_image_tile_mode(struct tu_image
*image
, int level
)
48 if (image_level_linear(image
, level
, !!image
->layout
.ubwc_layer_size
))
51 return image
->layout
.tile_mode
;
55 tu_image_create(VkDevice _device
,
56 const VkImageCreateInfo
*pCreateInfo
,
57 const VkAllocationCallbacks
*alloc
,
61 TU_FROM_HANDLE(tu_device
, device
, _device
);
62 struct tu_image
*image
= NULL
;
63 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
65 tu_assert(pCreateInfo
->mipLevels
> 0);
66 tu_assert(pCreateInfo
->arrayLayers
> 0);
67 tu_assert(pCreateInfo
->samples
> 0);
68 tu_assert(pCreateInfo
->extent
.width
> 0);
69 tu_assert(pCreateInfo
->extent
.height
> 0);
70 tu_assert(pCreateInfo
->extent
.depth
> 0);
72 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
73 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
75 return vk_error(device
->instance
, VK_ERROR_OUT_OF_HOST_MEMORY
);
77 image
->type
= pCreateInfo
->imageType
;
79 image
->vk_format
= pCreateInfo
->format
;
80 image
->tiling
= pCreateInfo
->tiling
;
81 image
->usage
= pCreateInfo
->usage
;
82 image
->flags
= pCreateInfo
->flags
;
83 image
->extent
= pCreateInfo
->extent
;
84 image
->level_count
= pCreateInfo
->mipLevels
;
85 image
->layer_count
= pCreateInfo
->arrayLayers
;
86 image
->samples
= pCreateInfo
->samples
;
88 image
->exclusive
= pCreateInfo
->sharingMode
== VK_SHARING_MODE_EXCLUSIVE
;
89 if (pCreateInfo
->sharingMode
== VK_SHARING_MODE_CONCURRENT
) {
90 for (uint32_t i
= 0; i
< pCreateInfo
->queueFamilyIndexCount
; ++i
)
91 if (pCreateInfo
->pQueueFamilyIndices
[i
] ==
92 VK_QUEUE_FAMILY_EXTERNAL
)
93 image
->queue_family_mask
|= (1u << TU_MAX_QUEUE_FAMILIES
) - 1u;
95 image
->queue_family_mask
|=
96 1u << pCreateInfo
->pQueueFamilyIndices
[i
];
100 vk_find_struct_const(pCreateInfo
->pNext
,
101 EXTERNAL_MEMORY_IMAGE_CREATE_INFO
) != NULL
;
103 image
->layout
.tile_mode
= TILE6_3
;
104 bool ubwc_enabled
= true;
106 /* disable tiling when linear is requested and for compressed formats */
107 if (pCreateInfo
->tiling
== VK_IMAGE_TILING_LINEAR
||
108 modifier
== DRM_FORMAT_MOD_LINEAR
||
109 vk_format_is_compressed(image
->vk_format
)) {
110 image
->layout
.tile_mode
= TILE6_LINEAR
;
111 ubwc_enabled
= false;
114 /* using UBWC with D24S8 breaks the "stencil read" copy path (why?)
115 * (causes any deqp tests that need to check stencil to fail)
116 * disable UBWC for this format until we properly support copy aspect masks
118 if (image
->vk_format
== VK_FORMAT_D24_UNORM_S8_UINT
)
119 ubwc_enabled
= false;
121 /* UBWC can't be used with E5B9G9R9 */
122 if (image
->vk_format
== VK_FORMAT_E5B9G9R9_UFLOAT_PACK32
)
123 ubwc_enabled
= false;
125 if (image
->extent
.depth
> 1) {
126 tu_finishme("UBWC with 3D textures");
127 ubwc_enabled
= false;
130 /* Disable UBWC for storage images.
132 * The closed GL driver skips UBWC for storage images (and additionally
133 * uses linear for writeonly images). We seem to have image tiling working
134 * in freedreno in general, so turnip matches that. freedreno also enables
135 * UBWC on images, but it's not really tested due to the lack of
136 * UBWC-enabled mipmaps in freedreno currently. Just match the closed GL
137 * behavior of no UBWC.
139 if (image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
)
140 ubwc_enabled
= false;
142 uint32_t ubwc_blockwidth
, ubwc_blockheight
;
143 fdl6_get_ubwc_blockwidth(&image
->layout
,
144 &ubwc_blockwidth
, &ubwc_blockheight
);
145 if (!ubwc_blockwidth
) {
146 tu_finishme("UBWC for cpp=%d", image
->layout
.cpp
);
147 ubwc_enabled
= false;
150 /* expect UBWC enabled if we asked for it */
151 assert(modifier
!= DRM_FORMAT_MOD_QCOM_COMPRESSED
|| ubwc_enabled
);
153 image
->layout
.ubwc
= ubwc_enabled
;
155 fdl6_layout(&image
->layout
, vk_format_to_pipe_format(image
->vk_format
),
157 pCreateInfo
->extent
.width
,
158 pCreateInfo
->extent
.height
,
159 pCreateInfo
->extent
.depth
,
160 pCreateInfo
->mipLevels
,
161 pCreateInfo
->arrayLayers
,
162 pCreateInfo
->imageType
== VK_IMAGE_TYPE_3D
);
164 *pImage
= tu_image_to_handle(image
);
169 static enum a6xx_tex_fetchsize
170 tu6_fetchsize(VkFormat format
)
172 if (vk_format_description(format
)->layout
== UTIL_FORMAT_LAYOUT_ASTC
)
173 return TFETCH6_16_BYTE
;
175 switch (vk_format_get_blocksize(format
) / vk_format_get_blockwidth(format
)) {
176 case 1: return TFETCH6_1_BYTE
;
177 case 2: return TFETCH6_2_BYTE
;
178 case 4: return TFETCH6_4_BYTE
;
179 case 8: return TFETCH6_8_BYTE
;
180 case 16: return TFETCH6_16_BYTE
;
182 unreachable("bad block size");
187 tu6_texswiz(const VkComponentMapping
*comps
,
189 VkImageAspectFlagBits aspect_mask
)
191 unsigned char swiz
[4] = {comps
->r
, comps
->g
, comps
->b
, comps
->a
};
192 unsigned char vk_swizzle
[] = {
193 [VK_COMPONENT_SWIZZLE_ZERO
] = A6XX_TEX_ZERO
,
194 [VK_COMPONENT_SWIZZLE_ONE
] = A6XX_TEX_ONE
,
195 [VK_COMPONENT_SWIZZLE_R
] = A6XX_TEX_X
,
196 [VK_COMPONENT_SWIZZLE_G
] = A6XX_TEX_Y
,
197 [VK_COMPONENT_SWIZZLE_B
] = A6XX_TEX_Z
,
198 [VK_COMPONENT_SWIZZLE_A
] = A6XX_TEX_W
,
200 const unsigned char *fmt_swiz
= vk_format_description(format
)->swizzle
;
202 for (unsigned i
= 0; i
< 4; i
++) {
203 swiz
[i
] = (swiz
[i
] == VK_COMPONENT_SWIZZLE_IDENTITY
) ? i
: vk_swizzle
[swiz
[i
]];
204 /* if format has 0/1 in channel, use that (needed for bc1_rgb) */
206 if (aspect_mask
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
207 format
== VK_FORMAT_D24_UNORM_S8_UINT
)
208 swiz
[i
] = A6XX_TEX_Y
;
209 switch (fmt_swiz
[swiz
[i
]]) {
210 case PIPE_SWIZZLE_0
: swiz
[i
] = A6XX_TEX_ZERO
; break;
211 case PIPE_SWIZZLE_1
: swiz
[i
] = A6XX_TEX_ONE
; break;
216 return A6XX_TEX_CONST_0_SWIZ_X(swiz
[0]) |
217 A6XX_TEX_CONST_0_SWIZ_Y(swiz
[1]) |
218 A6XX_TEX_CONST_0_SWIZ_Z(swiz
[2]) |
219 A6XX_TEX_CONST_0_SWIZ_W(swiz
[3]);
222 static enum a6xx_tex_type
223 tu6_tex_type(VkImageViewType type
)
227 case VK_IMAGE_VIEW_TYPE_1D
:
228 case VK_IMAGE_VIEW_TYPE_1D_ARRAY
:
230 case VK_IMAGE_VIEW_TYPE_2D
:
231 case VK_IMAGE_VIEW_TYPE_2D_ARRAY
:
233 case VK_IMAGE_VIEW_TYPE_3D
:
235 case VK_IMAGE_VIEW_TYPE_CUBE
:
236 case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
:
237 return A6XX_TEX_CUBE
;
242 tu_image_view_init(struct tu_image_view
*iview
,
243 struct tu_device
*device
,
244 const VkImageViewCreateInfo
*pCreateInfo
)
246 TU_FROM_HANDLE(tu_image
, image
, pCreateInfo
->image
);
247 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
249 switch (image
->type
) {
250 case VK_IMAGE_TYPE_1D
:
251 case VK_IMAGE_TYPE_2D
:
252 assert(range
->baseArrayLayer
+ tu_get_layerCount(image
, range
) <=
255 case VK_IMAGE_TYPE_3D
:
256 assert(range
->baseArrayLayer
+ tu_get_layerCount(image
, range
) <=
257 tu_minify(image
->extent
.depth
, range
->baseMipLevel
));
260 unreachable("bad VkImageType");
263 iview
->image
= image
;
264 iview
->type
= pCreateInfo
->viewType
;
265 iview
->vk_format
= pCreateInfo
->format
;
266 iview
->aspect_mask
= pCreateInfo
->subresourceRange
.aspectMask
;
268 iview
->base_layer
= range
->baseArrayLayer
;
269 iview
->layer_count
= tu_get_layerCount(image
, range
);
270 iview
->base_mip
= range
->baseMipLevel
;
271 iview
->level_count
= tu_get_levelCount(image
, range
);
273 iview
->extent
.width
= u_minify(image
->extent
.width
, iview
->base_mip
);
274 iview
->extent
.height
= u_minify(image
->extent
.height
, iview
->base_mip
);
275 iview
->extent
.depth
= u_minify(image
->extent
.depth
, iview
->base_mip
);
277 memset(iview
->descriptor
, 0, sizeof(iview
->descriptor
));
279 struct tu_native_format fmt
=
280 tu6_format_texture(iview
->vk_format
, image
->layout
.tile_mode
);
281 uint64_t base_addr
= tu_image_base(image
, iview
->base_mip
, iview
->base_layer
);
282 uint64_t ubwc_addr
= tu_image_ubwc_base(image
, iview
->base_mip
, iview
->base_layer
);
284 uint32_t pitch
= tu_image_stride(image
, iview
->base_mip
) / vk_format_get_blockwidth(iview
->vk_format
);
285 enum a6xx_tile_mode tile_mode
= tu6_get_image_tile_mode(image
, iview
->base_mip
);
286 uint32_t width
= iview
->extent
.width
;
287 uint32_t height
= iview
->extent
.height
;
288 uint32_t depth
= pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
?
289 iview
->extent
.depth
: iview
->layer_count
;
291 unsigned fmt_tex
= fmt
.fmt
;
292 if (iview
->aspect_mask
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
293 iview
->vk_format
== VK_FORMAT_D24_UNORM_S8_UINT
)
294 fmt_tex
= FMT6_S8Z24_UINT
;
296 iview
->descriptor
[0] =
297 A6XX_TEX_CONST_0_TILE_MODE(tile_mode
) |
298 COND(vk_format_is_srgb(iview
->vk_format
), A6XX_TEX_CONST_0_SRGB
) |
299 A6XX_TEX_CONST_0_FMT(fmt_tex
) |
300 A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image
->samples
)) |
301 A6XX_TEX_CONST_0_SWAP(fmt
.swap
) |
302 tu6_texswiz(&pCreateInfo
->components
, iview
->vk_format
, iview
->aspect_mask
) |
303 A6XX_TEX_CONST_0_MIPLVLS(iview
->level_count
- 1);
304 iview
->descriptor
[1] = A6XX_TEX_CONST_1_WIDTH(width
) | A6XX_TEX_CONST_1_HEIGHT(height
);
305 iview
->descriptor
[2] =
306 A6XX_TEX_CONST_2_FETCHSIZE(tu6_fetchsize(iview
->vk_format
)) |
307 A6XX_TEX_CONST_2_PITCH(pitch
) |
308 A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo
->viewType
));
309 iview
->descriptor
[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(tu_layer_size(image
, iview
->base_mip
));
310 iview
->descriptor
[4] = base_addr
;
311 iview
->descriptor
[5] = (base_addr
>> 32) | A6XX_TEX_CONST_5_DEPTH(depth
);
313 if (image
->layout
.ubwc_layer_size
) {
314 uint32_t block_width
, block_height
;
315 fdl6_get_ubwc_blockwidth(&image
->layout
,
316 &block_width
, &block_height
);
318 iview
->descriptor
[3] |= A6XX_TEX_CONST_3_FLAG
| A6XX_TEX_CONST_3_TILE_ALL
;
319 iview
->descriptor
[7] = ubwc_addr
;
320 iview
->descriptor
[8] = ubwc_addr
>> 32;
321 iview
->descriptor
[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(tu_image_ubwc_size(image
, iview
->base_mip
) >> 2);
322 iview
->descriptor
[10] |=
323 A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(tu_image_ubwc_pitch(image
, iview
->base_mip
)) |
324 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width
, block_width
))) |
325 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height
, block_height
)));
328 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
329 iview
->descriptor
[3] |=
330 A6XX_TEX_CONST_3_MIN_LAYERSZ(image
->layout
.slices
[image
->level_count
- 1].size0
);
333 if (image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
334 memset(iview
->storage_descriptor
, 0, sizeof(iview
->storage_descriptor
));
336 iview
->storage_descriptor
[0] =
337 A6XX_IBO_0_FMT(fmt
.fmt
) |
338 A6XX_IBO_0_TILE_MODE(tile_mode
);
339 iview
->storage_descriptor
[1] =
340 A6XX_IBO_1_WIDTH(width
) |
341 A6XX_IBO_1_HEIGHT(height
);
342 iview
->storage_descriptor
[2] =
343 A6XX_IBO_2_PITCH(pitch
) |
344 A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo
->viewType
));
345 iview
->storage_descriptor
[3] = A6XX_IBO_3_ARRAY_PITCH(tu_layer_size(image
, iview
->base_mip
));
347 iview
->storage_descriptor
[4] = base_addr
;
348 iview
->storage_descriptor
[5] = (base_addr
>> 32) | A6XX_IBO_5_DEPTH(depth
);
350 if (image
->layout
.ubwc_layer_size
) {
351 iview
->storage_descriptor
[3] |= A6XX_IBO_3_FLAG
| A6XX_IBO_3_UNK27
;
352 iview
->storage_descriptor
[7] |= ubwc_addr
;
353 iview
->storage_descriptor
[8] |= ubwc_addr
>> 32;
354 iview
->storage_descriptor
[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(tu_image_ubwc_size(image
, iview
->base_mip
) >> 2);
355 iview
->storage_descriptor
[10] =
356 A6XX_IBO_10_FLAG_BUFFER_PITCH(tu_image_ubwc_pitch(image
, iview
->base_mip
));
362 tu_image_queue_family_mask(const struct tu_image
*image
,
364 uint32_t queue_family
)
366 if (!image
->exclusive
)
367 return image
->queue_family_mask
;
368 if (family
== VK_QUEUE_FAMILY_EXTERNAL
)
369 return (1u << TU_MAX_QUEUE_FAMILIES
) - 1u;
370 if (family
== VK_QUEUE_FAMILY_IGNORED
)
371 return 1u << queue_family
;
376 tu_CreateImage(VkDevice device
,
377 const VkImageCreateInfo
*pCreateInfo
,
378 const VkAllocationCallbacks
*pAllocator
,
382 const VkNativeBufferANDROID
*gralloc_info
=
383 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
386 return tu_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
390 uint64_t modifier
= DRM_FORMAT_MOD_INVALID
;
391 if (pCreateInfo
->tiling
== VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
) {
392 const VkImageDrmFormatModifierListCreateInfoEXT
*mod_info
=
393 vk_find_struct_const(pCreateInfo
->pNext
,
394 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT
);
396 modifier
= DRM_FORMAT_MOD_LINEAR
;
397 for (unsigned i
= 0; i
< mod_info
->drmFormatModifierCount
; i
++) {
398 if (mod_info
->pDrmFormatModifiers
[i
] == DRM_FORMAT_MOD_QCOM_COMPRESSED
)
399 modifier
= DRM_FORMAT_MOD_QCOM_COMPRESSED
;
402 const struct wsi_image_create_info
*wsi_info
=
403 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
404 if (wsi_info
&& wsi_info
->scanout
)
405 modifier
= DRM_FORMAT_MOD_LINEAR
;
408 return tu_image_create(device
, pCreateInfo
, pAllocator
, pImage
, modifier
);
412 tu_DestroyImage(VkDevice _device
,
414 const VkAllocationCallbacks
*pAllocator
)
416 TU_FROM_HANDLE(tu_device
, device
, _device
);
417 TU_FROM_HANDLE(tu_image
, image
, _image
);
422 if (image
->owned_memory
!= VK_NULL_HANDLE
)
423 tu_FreeMemory(_device
, image
->owned_memory
, pAllocator
);
425 vk_free2(&device
->alloc
, pAllocator
, image
);
429 tu_GetImageSubresourceLayout(VkDevice _device
,
431 const VkImageSubresource
*pSubresource
,
432 VkSubresourceLayout
*pLayout
)
434 TU_FROM_HANDLE(tu_image
, image
, _image
);
436 const struct fdl_slice
*slice
= image
->layout
.slices
+ pSubresource
->mipLevel
;
438 pLayout
->offset
= fdl_surface_offset(&image
->layout
,
439 pSubresource
->mipLevel
,
440 pSubresource
->arrayLayer
);
441 pLayout
->size
= slice
->size0
;
443 slice
->pitch
* vk_format_get_blocksize(image
->vk_format
);
444 pLayout
->arrayPitch
= image
->layout
.layer_size
;
445 pLayout
->depthPitch
= slice
->size0
;
447 if (image
->layout
.ubwc_layer_size
) {
448 /* UBWC starts at offset 0 */
450 /* UBWC scanout won't match what the kernel wants if we have levels/layers */
451 assert(image
->level_count
== 1 && image
->layer_count
== 1);
455 VkResult
tu_GetImageDrmFormatModifierPropertiesEXT(
458 VkImageDrmFormatModifierPropertiesEXT
* pProperties
)
460 TU_FROM_HANDLE(tu_image
, image
, _image
);
462 assert(pProperties
->sType
==
463 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT
);
465 /* TODO invent a modifier for tiled but not UBWC buffers */
467 if (!image
->layout
.tile_mode
)
468 pProperties
->drmFormatModifier
= DRM_FORMAT_MOD_LINEAR
;
469 else if (image
->layout
.ubwc_layer_size
)
470 pProperties
->drmFormatModifier
= DRM_FORMAT_MOD_QCOM_COMPRESSED
;
472 pProperties
->drmFormatModifier
= DRM_FORMAT_MOD_INVALID
;
479 tu_CreateImageView(VkDevice _device
,
480 const VkImageViewCreateInfo
*pCreateInfo
,
481 const VkAllocationCallbacks
*pAllocator
,
484 TU_FROM_HANDLE(tu_device
, device
, _device
);
485 struct tu_image_view
*view
;
487 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
488 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
490 return vk_error(device
->instance
, VK_ERROR_OUT_OF_HOST_MEMORY
);
492 tu_image_view_init(view
, device
, pCreateInfo
);
494 *pView
= tu_image_view_to_handle(view
);
500 tu_DestroyImageView(VkDevice _device
,
502 const VkAllocationCallbacks
*pAllocator
)
504 TU_FROM_HANDLE(tu_device
, device
, _device
);
505 TU_FROM_HANDLE(tu_image_view
, iview
, _iview
);
509 vk_free2(&device
->alloc
, pAllocator
, iview
);
513 tu_buffer_view_init(struct tu_buffer_view
*view
,
514 struct tu_device
*device
,
515 const VkBufferViewCreateInfo
*pCreateInfo
)
517 TU_FROM_HANDLE(tu_buffer
, buffer
, pCreateInfo
->buffer
);
519 view
->buffer
= buffer
;
521 enum VkFormat vfmt
= pCreateInfo
->format
;
522 enum pipe_format pfmt
= vk_format_to_pipe_format(vfmt
);
523 const struct tu_native_format fmt
= tu6_format_texture(vfmt
, TILE6_LINEAR
);
526 if (pCreateInfo
->range
== VK_WHOLE_SIZE
)
527 range
= buffer
->size
- pCreateInfo
->offset
;
529 range
= pCreateInfo
->range
;
530 uint32_t elements
= range
/ util_format_get_blocksize(pfmt
);
532 static const VkComponentMapping components
= {
533 .r
= VK_COMPONENT_SWIZZLE_R
,
534 .g
= VK_COMPONENT_SWIZZLE_G
,
535 .b
= VK_COMPONENT_SWIZZLE_B
,
536 .a
= VK_COMPONENT_SWIZZLE_A
,
539 uint64_t iova
= tu_buffer_iova(buffer
) + pCreateInfo
->offset
;
541 memset(&view
->descriptor
, 0, sizeof(view
->descriptor
));
543 view
->descriptor
[0] =
544 A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR
) |
545 A6XX_TEX_CONST_0_SWAP(fmt
.swap
) |
546 A6XX_TEX_CONST_0_FMT(fmt
.fmt
) |
547 A6XX_TEX_CONST_0_MIPLVLS(0) |
548 tu6_texswiz(&components
, vfmt
, VK_IMAGE_ASPECT_COLOR_BIT
);
549 COND(vk_format_is_srgb(vfmt
), A6XX_TEX_CONST_0_SRGB
);
550 view
->descriptor
[1] =
551 A6XX_TEX_CONST_1_WIDTH(elements
& MASK(15)) |
552 A6XX_TEX_CONST_1_HEIGHT(elements
>> 15);
553 view
->descriptor
[2] =
554 A6XX_TEX_CONST_2_UNK4
|
555 A6XX_TEX_CONST_2_UNK31
;
556 view
->descriptor
[4] = iova
;
557 view
->descriptor
[5] = iova
>> 32;
561 tu_CreateBufferView(VkDevice _device
,
562 const VkBufferViewCreateInfo
*pCreateInfo
,
563 const VkAllocationCallbacks
*pAllocator
,
566 TU_FROM_HANDLE(tu_device
, device
, _device
);
567 struct tu_buffer_view
*view
;
569 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
570 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
572 return vk_error(device
->instance
, VK_ERROR_OUT_OF_HOST_MEMORY
);
574 tu_buffer_view_init(view
, device
, pCreateInfo
);
576 *pView
= tu_buffer_view_to_handle(view
);
582 tu_DestroyBufferView(VkDevice _device
,
583 VkBufferView bufferView
,
584 const VkAllocationCallbacks
*pAllocator
)
586 TU_FROM_HANDLE(tu_device
, device
, _device
);
587 TU_FROM_HANDLE(tu_buffer_view
, view
, bufferView
);
592 vk_free2(&device
->alloc
, pAllocator
, view
);