turnip: support VkImageDrmFormatModifierExplicitCreateInfoEXT
[mesa.git] / src / freedreno / vulkan / tu_image.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #include "tu_private.h"
29
30 #include "util/debug.h"
31 #include "util/u_atomic.h"
32 #include "util/format/u_format.h"
33 #include "vk_format.h"
34 #include "vk_util.h"
35 #include "drm-uapi/drm_fourcc.h"
36
37 #include "tu_cs.h"
38
39 VkResult
40 tu_image_create(VkDevice _device,
41 const VkImageCreateInfo *pCreateInfo,
42 const VkAllocationCallbacks *alloc,
43 VkImage *pImage,
44 uint64_t modifier,
45 const VkSubresourceLayout *plane_layouts)
46 {
47 TU_FROM_HANDLE(tu_device, device, _device);
48 struct tu_image *image = NULL;
49 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
50
51 tu_assert(pCreateInfo->mipLevels > 0);
52 tu_assert(pCreateInfo->arrayLayers > 0);
53 tu_assert(pCreateInfo->samples > 0);
54 tu_assert(pCreateInfo->extent.width > 0);
55 tu_assert(pCreateInfo->extent.height > 0);
56 tu_assert(pCreateInfo->extent.depth > 0);
57
58 image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
59 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
60 if (!image)
61 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
62
63 image->type = pCreateInfo->imageType;
64
65 image->vk_format = pCreateInfo->format;
66 image->tiling = pCreateInfo->tiling;
67 image->usage = pCreateInfo->usage;
68 image->flags = pCreateInfo->flags;
69 image->extent = pCreateInfo->extent;
70 image->level_count = pCreateInfo->mipLevels;
71 image->layer_count = pCreateInfo->arrayLayers;
72 image->samples = pCreateInfo->samples;
73
74 image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE;
75 if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) {
76 for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i)
77 if (pCreateInfo->pQueueFamilyIndices[i] ==
78 VK_QUEUE_FAMILY_EXTERNAL)
79 image->queue_family_mask |= (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
80 else
81 image->queue_family_mask |=
82 1u << pCreateInfo->pQueueFamilyIndices[i];
83 }
84
85 image->shareable =
86 vk_find_struct_const(pCreateInfo->pNext,
87 EXTERNAL_MEMORY_IMAGE_CREATE_INFO) != NULL;
88
89 image->layout.tile_mode = TILE6_3;
90 bool ubwc_enabled =
91 !(device->physical_device->instance->debug_flags & TU_DEBUG_NOUBWC);
92
93 /* disable tiling when linear is requested, for YUYV/UYVY, and for mutable
94 * images. Mutable images can be reinterpreted as any other compatible
95 * format, including swapped formats which aren't supported with tiling.
96 * This means that we have to fall back to linear almost always. However
97 * depth and stencil formats cannot be reintepreted as another format, and
98 * cannot be linear with sysmem rendering, so don't fall back for those.
99 *
100 * TODO: Be smarter and use usage bits and VK_KHR_image_format_list to
101 * enable tiling and/or UBWC when possible.
102 */
103 if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR ||
104 modifier == DRM_FORMAT_MOD_LINEAR ||
105 vk_format_description(image->vk_format)->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED ||
106 (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT &&
107 !vk_format_is_depth_or_stencil(image->vk_format))) {
108 image->layout.tile_mode = TILE6_LINEAR;
109 ubwc_enabled = false;
110 }
111
112 /* don't use UBWC with compressed formats */
113 if (vk_format_is_compressed(image->vk_format))
114 ubwc_enabled = false;
115
116 /* UBWC can't be used with E5B9G9R9 */
117 if (image->vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32)
118 ubwc_enabled = false;
119
120 /* separate stencil doesn't have a UBWC enable bit */
121 if (image->vk_format == VK_FORMAT_S8_UINT)
122 ubwc_enabled = false;
123
124 if (image->extent.depth > 1) {
125 tu_finishme("UBWC with 3D textures");
126 ubwc_enabled = false;
127 }
128
129 /* Disable UBWC for storage images.
130 *
131 * The closed GL driver skips UBWC for storage images (and additionally
132 * uses linear for writeonly images). We seem to have image tiling working
133 * in freedreno in general, so turnip matches that. freedreno also enables
134 * UBWC on images, but it's not really tested due to the lack of
135 * UBWC-enabled mipmaps in freedreno currently. Just match the closed GL
136 * behavior of no UBWC.
137 */
138 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)
139 ubwc_enabled = false;
140
141 uint32_t ubwc_blockwidth, ubwc_blockheight;
142 fdl6_get_ubwc_blockwidth(&image->layout,
143 &ubwc_blockwidth, &ubwc_blockheight);
144 if (!ubwc_blockwidth) {
145 tu_finishme("UBWC for cpp=%d", image->layout.cpp);
146 ubwc_enabled = false;
147 }
148
149 /* expect UBWC enabled if we asked for it */
150 assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
151
152 image->layout.ubwc = ubwc_enabled;
153
154 struct fdl_slice plane_layout;
155
156 if (plane_layouts) {
157 /* only expect simple 2D images for now */
158 if (pCreateInfo->mipLevels != 1 ||
159 pCreateInfo->arrayLayers != 1 ||
160 image->extent.depth != 1)
161 goto invalid_layout;
162
163 plane_layout.offset = plane_layouts[0].offset;
164 plane_layout.pitch = plane_layouts[0].rowPitch;
165 /* note: use plane_layouts[0].arrayPitch to support array formats */
166 }
167
168 if (!fdl6_layout(&image->layout, vk_format_to_pipe_format(image->vk_format),
169 image->samples,
170 pCreateInfo->extent.width,
171 pCreateInfo->extent.height,
172 pCreateInfo->extent.depth,
173 pCreateInfo->mipLevels,
174 pCreateInfo->arrayLayers,
175 pCreateInfo->imageType == VK_IMAGE_TYPE_3D,
176 plane_layouts ? &plane_layout : NULL)) {
177 assert(plane_layouts); /* can only fail with explicit layout */
178 goto invalid_layout;
179 }
180
181 *pImage = tu_image_to_handle(image);
182
183 return VK_SUCCESS;
184
185 invalid_layout:
186 vk_free2(&device->alloc, alloc, image);
187 return vk_error(device->instance, VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT);
188 }
189
190 enum a6xx_tex_fetchsize
191 tu6_fetchsize(VkFormat format)
192 {
193 switch (vk_format_get_blocksize(format)) {
194 case 1: return TFETCH6_1_BYTE;
195 case 2: return TFETCH6_2_BYTE;
196 case 4: return TFETCH6_4_BYTE;
197 case 8: return TFETCH6_8_BYTE;
198 case 16: return TFETCH6_16_BYTE;
199 default:
200 unreachable("bad block size");
201 }
202 }
203
204 static void
205 compose_swizzle(unsigned char *swiz, const VkComponentMapping *mapping)
206 {
207 unsigned char src_swiz[4] = { swiz[0], swiz[1], swiz[2], swiz[3] };
208 VkComponentSwizzle vk_swiz[4] = {
209 mapping->r, mapping->g, mapping->b, mapping->a
210 };
211 for (int i = 0; i < 4; i++) {
212 switch (vk_swiz[i]) {
213 case VK_COMPONENT_SWIZZLE_IDENTITY:
214 swiz[i] = src_swiz[i];
215 break;
216 case VK_COMPONENT_SWIZZLE_R...VK_COMPONENT_SWIZZLE_A:
217 swiz[i] = src_swiz[vk_swiz[i] - VK_COMPONENT_SWIZZLE_R];
218 break;
219 case VK_COMPONENT_SWIZZLE_ZERO:
220 swiz[i] = A6XX_TEX_ZERO;
221 break;
222 case VK_COMPONENT_SWIZZLE_ONE:
223 swiz[i] = A6XX_TEX_ONE;
224 break;
225 default:
226 unreachable("unexpected swizzle");
227 }
228 }
229 }
230
231 static uint32_t
232 tu6_texswiz(const VkComponentMapping *comps,
233 const struct tu_sampler_ycbcr_conversion *conversion,
234 VkFormat format,
235 VkImageAspectFlagBits aspect_mask)
236 {
237 unsigned char swiz[4] = {
238 A6XX_TEX_X, A6XX_TEX_Y, A6XX_TEX_Z, A6XX_TEX_W,
239 };
240
241 switch (format) {
242 case VK_FORMAT_G8B8G8R8_422_UNORM:
243 case VK_FORMAT_B8G8R8G8_422_UNORM:
244 swiz[0] = A6XX_TEX_Z;
245 swiz[1] = A6XX_TEX_X;
246 swiz[2] = A6XX_TEX_Y;
247 break;
248 case VK_FORMAT_BC1_RGB_UNORM_BLOCK:
249 case VK_FORMAT_BC1_RGB_SRGB_BLOCK:
250 /* same hardware format is used for BC1_RGB / BC1_RGBA */
251 swiz[3] = A6XX_TEX_ONE;
252 break;
253 case VK_FORMAT_D24_UNORM_S8_UINT:
254 /* for D24S8, stencil is in the 2nd channel of the hardware format */
255 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT) {
256 swiz[0] = A6XX_TEX_Y;
257 swiz[1] = A6XX_TEX_ZERO;
258 }
259 default:
260 break;
261 }
262
263 compose_swizzle(swiz, comps);
264 if (conversion)
265 compose_swizzle(swiz, &conversion->components);
266
267 return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
268 A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
269 A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
270 A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
271 }
272
273 static enum a6xx_tex_type
274 tu6_tex_type(VkImageViewType type, bool storage)
275 {
276 switch (type) {
277 default:
278 case VK_IMAGE_VIEW_TYPE_1D:
279 case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
280 return A6XX_TEX_1D;
281 case VK_IMAGE_VIEW_TYPE_2D:
282 case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
283 return A6XX_TEX_2D;
284 case VK_IMAGE_VIEW_TYPE_3D:
285 return A6XX_TEX_3D;
286 case VK_IMAGE_VIEW_TYPE_CUBE:
287 case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
288 return storage ? A6XX_TEX_2D : A6XX_TEX_CUBE;
289 }
290 }
291
292 void
293 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
294 {
295 tu_cs_emit(cs, iview->PITCH);
296 tu_cs_emit(cs, iview->layer_size >> 6);
297 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
298 }
299
300 void
301 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
302 {
303 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
304 /* SP_PS_2D_SRC_PITCH has shifted pitch field */
305 tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
306 }
307
308 void
309 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
310 {
311 tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
312 tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
313 }
314
315 void
316 tu_image_view_init(struct tu_image_view *iview,
317 const VkImageViewCreateInfo *pCreateInfo)
318 {
319 TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
320 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
321 VkFormat format = pCreateInfo->format;
322 VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
323
324 const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion =
325 vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
326 const struct tu_sampler_ycbcr_conversion *conversion = ycbcr_conversion ?
327 tu_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion) : NULL;
328
329 switch (image->type) {
330 case VK_IMAGE_TYPE_1D:
331 case VK_IMAGE_TYPE_2D:
332 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
333 image->layer_count);
334 break;
335 case VK_IMAGE_TYPE_3D:
336 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
337 tu_minify(image->extent.depth, range->baseMipLevel));
338 break;
339 default:
340 unreachable("bad VkImageType");
341 }
342
343 iview->image = image;
344
345 memset(iview->descriptor, 0, sizeof(iview->descriptor));
346
347 struct fdl_layout *layout = &image->layout;
348
349 uint32_t width = u_minify(image->extent.width, range->baseMipLevel);
350 uint32_t height = u_minify(image->extent.height, range->baseMipLevel);
351 uint32_t storage_depth = tu_get_layerCount(image, range);
352 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
353 storage_depth = u_minify(image->extent.depth, range->baseMipLevel);
354 }
355
356 uint32_t depth = storage_depth;
357 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
358 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
359 /* Cubes are treated as 2D arrays for storage images, so only divide the
360 * depth by 6 for the texture descriptor.
361 */
362 depth /= 6;
363 }
364
365 uint64_t base_addr = image->bo->iova + image->bo_offset +
366 fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
367 uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
368 fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
369
370 uint32_t pitch = layout->slices[range->baseMipLevel].pitch;
371 uint32_t ubwc_pitch = layout->ubwc_slices[range->baseMipLevel].pitch;
372 uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
373
374 struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
375 /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC
376 * this means smaller mipmap levels have a linear tile mode
377 */
378 fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
379
380 bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
381
382 unsigned fmt_tex = fmt.fmt;
383 if (fmt_tex == FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8) {
384 if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
385 fmt_tex = FMT6_Z24_UNORM_S8_UINT;
386 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
387 fmt_tex = FMT6_S8Z24_UINT;
388 /* TODO: also use this format with storage descriptor ? */
389 }
390
391 iview->descriptor[0] =
392 A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
393 COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
394 A6XX_TEX_CONST_0_FMT(fmt_tex) |
395 A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image->samples)) |
396 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
397 tu6_texswiz(&pCreateInfo->components, conversion, format, aspect_mask) |
398 A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
399 iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
400 iview->descriptor[2] =
401 A6XX_TEX_CONST_2_FETCHSIZE(tu6_fetchsize(format)) |
402 A6XX_TEX_CONST_2_PITCH(pitch) |
403 A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType, false));
404 iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
405 iview->descriptor[4] = base_addr;
406 iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
407
408 if (ubwc_enabled) {
409 uint32_t block_width, block_height;
410 fdl6_get_ubwc_blockwidth(&image->layout,
411 &block_width, &block_height);
412
413 iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
414 iview->descriptor[7] = ubwc_addr;
415 iview->descriptor[8] = ubwc_addr >> 32;
416 iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
417 iview->descriptor[10] |=
418 A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
419 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
420 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
421 }
422
423 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
424 iview->descriptor[3] |=
425 A6XX_TEX_CONST_3_MIN_LAYERSZ(image->layout.slices[image->level_count - 1].size0);
426 }
427
428 iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
429 .color_format = fmt.fmt,
430 .tile_mode = fmt.tile_mode,
431 .color_swap = fmt.swap,
432 .flags = ubwc_enabled,
433 .srgb = vk_format_is_srgb(format),
434 .samples = tu_msaa_samples(image->samples),
435 .samples_average = image->samples > 1 &&
436 !vk_format_is_int(format) &&
437 !vk_format_is_depth_or_stencil(format),
438 .unk20 = 1,
439 .unk22 = 1).value;
440 iview->SP_PS_2D_SRC_SIZE =
441 A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
442
443 /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
444 iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
445 iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
446 .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
447
448 iview->base_addr = base_addr;
449 iview->ubwc_addr = ubwc_addr;
450 iview->layer_size = layer_size;
451 iview->ubwc_layer_size = layout->ubwc_layer_size;
452
453 /* Don't set fields that are only used for attachments/blit dest if COLOR
454 * is unsupported.
455 */
456 if (!(fmt.supported & FMT_COLOR))
457 return;
458
459 struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
460 cfmt.tile_mode = fmt.tile_mode;
461
462 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
463 memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
464
465 iview->storage_descriptor[0] =
466 A6XX_IBO_0_FMT(fmt.fmt) |
467 A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
468 iview->storage_descriptor[1] =
469 A6XX_IBO_1_WIDTH(width) |
470 A6XX_IBO_1_HEIGHT(height);
471 iview->storage_descriptor[2] =
472 A6XX_IBO_2_PITCH(pitch) |
473 A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType, true));
474 iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
475
476 iview->storage_descriptor[4] = base_addr;
477 iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(storage_depth);
478
479 if (ubwc_enabled) {
480 iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
481 iview->storage_descriptor[7] |= ubwc_addr;
482 iview->storage_descriptor[8] |= ubwc_addr >> 32;
483 iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
484 iview->storage_descriptor[10] =
485 A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
486 }
487 }
488
489 iview->extent.width = width;
490 iview->extent.height = height;
491 iview->need_y2_align =
492 (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
493
494 iview->ubwc_enabled = ubwc_enabled;
495
496 iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
497 .color_tile_mode = cfmt.tile_mode,
498 .color_format = cfmt.fmt,
499 .color_swap = cfmt.swap).value;
500 iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
501 .color_format = cfmt.fmt,
502 .color_sint = vk_format_is_sint(format),
503 .color_uint = vk_format_is_uint(format)).value;
504
505 iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
506 .color_format = cfmt.fmt,
507 .tile_mode = cfmt.tile_mode,
508 .color_swap = cfmt.swap,
509 .flags = ubwc_enabled,
510 .srgb = vk_format_is_srgb(format)).value;
511
512 iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
513 .tile_mode = cfmt.tile_mode,
514 .samples = tu_msaa_samples(iview->image->samples),
515 .color_format = cfmt.fmt,
516 .color_swap = cfmt.swap,
517 .flags = ubwc_enabled).value;
518 }
519
520 unsigned
521 tu_image_queue_family_mask(const struct tu_image *image,
522 uint32_t family,
523 uint32_t queue_family)
524 {
525 if (!image->exclusive)
526 return image->queue_family_mask;
527 if (family == VK_QUEUE_FAMILY_EXTERNAL)
528 return (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
529 if (family == VK_QUEUE_FAMILY_IGNORED)
530 return 1u << queue_family;
531 return 1u << family;
532 }
533
534 VkResult
535 tu_CreateImage(VkDevice device,
536 const VkImageCreateInfo *pCreateInfo,
537 const VkAllocationCallbacks *pAllocator,
538 VkImage *pImage)
539 {
540 #ifdef ANDROID
541 const VkNativeBufferANDROID *gralloc_info =
542 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
543
544 if (gralloc_info)
545 return tu_image_from_gralloc(device, pCreateInfo, gralloc_info,
546 pAllocator, pImage);
547 #endif
548
549 uint64_t modifier = DRM_FORMAT_MOD_INVALID;
550 const VkSubresourceLayout *plane_layouts = NULL;
551
552 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
553 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
554 vk_find_struct_const(pCreateInfo->pNext,
555 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
556 const VkImageDrmFormatModifierExplicitCreateInfoEXT *drm_explicit_info =
557 vk_find_struct_const(pCreateInfo->pNext,
558 IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT);
559
560 assert(mod_info || drm_explicit_info);
561
562 if (mod_info) {
563 modifier = DRM_FORMAT_MOD_LINEAR;
564 for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
565 if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
566 modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
567 }
568 } else {
569 modifier = drm_explicit_info->drmFormatModifier;
570 assert(modifier == DRM_FORMAT_MOD_LINEAR ||
571 modifier == DRM_FORMAT_MOD_QCOM_COMPRESSED);
572 plane_layouts = drm_explicit_info->pPlaneLayouts;
573 }
574 } else {
575 const struct wsi_image_create_info *wsi_info =
576 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
577 if (wsi_info && wsi_info->scanout)
578 modifier = DRM_FORMAT_MOD_LINEAR;
579 }
580
581 return tu_image_create(device, pCreateInfo, pAllocator, pImage, modifier, plane_layouts);
582 }
583
584 void
585 tu_DestroyImage(VkDevice _device,
586 VkImage _image,
587 const VkAllocationCallbacks *pAllocator)
588 {
589 TU_FROM_HANDLE(tu_device, device, _device);
590 TU_FROM_HANDLE(tu_image, image, _image);
591
592 if (!image)
593 return;
594
595 if (image->owned_memory != VK_NULL_HANDLE)
596 tu_FreeMemory(_device, image->owned_memory, pAllocator);
597
598 vk_free2(&device->alloc, pAllocator, image);
599 }
600
601 void
602 tu_GetImageSubresourceLayout(VkDevice _device,
603 VkImage _image,
604 const VkImageSubresource *pSubresource,
605 VkSubresourceLayout *pLayout)
606 {
607 TU_FROM_HANDLE(tu_image, image, _image);
608
609 const struct fdl_slice *slice = image->layout.slices + pSubresource->mipLevel;
610
611 pLayout->offset = fdl_surface_offset(&image->layout,
612 pSubresource->mipLevel,
613 pSubresource->arrayLayer);
614 pLayout->size = slice->size0;
615 pLayout->rowPitch = slice->pitch;
616 pLayout->arrayPitch = image->layout.layer_size;
617 pLayout->depthPitch = slice->size0;
618
619 if (image->layout.ubwc_layer_size) {
620 /* UBWC starts at offset 0 */
621 pLayout->offset = 0;
622 /* UBWC scanout won't match what the kernel wants if we have levels/layers */
623 assert(image->level_count == 1 && image->layer_count == 1);
624 }
625 }
626
627 VkResult tu_GetImageDrmFormatModifierPropertiesEXT(
628 VkDevice device,
629 VkImage _image,
630 VkImageDrmFormatModifierPropertiesEXT* pProperties)
631 {
632 TU_FROM_HANDLE(tu_image, image, _image);
633
634 assert(pProperties->sType ==
635 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
636
637 /* TODO invent a modifier for tiled but not UBWC buffers */
638
639 if (!image->layout.tile_mode)
640 pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
641 else if (image->layout.ubwc_layer_size)
642 pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
643 else
644 pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
645
646 return VK_SUCCESS;
647 }
648
649
650 VkResult
651 tu_CreateImageView(VkDevice _device,
652 const VkImageViewCreateInfo *pCreateInfo,
653 const VkAllocationCallbacks *pAllocator,
654 VkImageView *pView)
655 {
656 TU_FROM_HANDLE(tu_device, device, _device);
657 struct tu_image_view *view;
658
659 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
660 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
661 if (view == NULL)
662 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
663
664 tu_image_view_init(view, pCreateInfo);
665
666 *pView = tu_image_view_to_handle(view);
667
668 return VK_SUCCESS;
669 }
670
671 void
672 tu_DestroyImageView(VkDevice _device,
673 VkImageView _iview,
674 const VkAllocationCallbacks *pAllocator)
675 {
676 TU_FROM_HANDLE(tu_device, device, _device);
677 TU_FROM_HANDLE(tu_image_view, iview, _iview);
678
679 if (!iview)
680 return;
681 vk_free2(&device->alloc, pAllocator, iview);
682 }
683
684 void
685 tu_buffer_view_init(struct tu_buffer_view *view,
686 struct tu_device *device,
687 const VkBufferViewCreateInfo *pCreateInfo)
688 {
689 TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
690
691 view->buffer = buffer;
692
693 enum VkFormat vfmt = pCreateInfo->format;
694 enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
695 const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
696
697 uint32_t range;
698 if (pCreateInfo->range == VK_WHOLE_SIZE)
699 range = buffer->size - pCreateInfo->offset;
700 else
701 range = pCreateInfo->range;
702 uint32_t elements = range / util_format_get_blocksize(pfmt);
703
704 static const VkComponentMapping components = {
705 .r = VK_COMPONENT_SWIZZLE_R,
706 .g = VK_COMPONENT_SWIZZLE_G,
707 .b = VK_COMPONENT_SWIZZLE_B,
708 .a = VK_COMPONENT_SWIZZLE_A,
709 };
710
711 uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
712
713 memset(&view->descriptor, 0, sizeof(view->descriptor));
714
715 view->descriptor[0] =
716 A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
717 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
718 A6XX_TEX_CONST_0_FMT(fmt.fmt) |
719 A6XX_TEX_CONST_0_MIPLVLS(0) |
720 tu6_texswiz(&components, NULL, vfmt, VK_IMAGE_ASPECT_COLOR_BIT);
721 COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
722 view->descriptor[1] =
723 A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
724 A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
725 view->descriptor[2] =
726 A6XX_TEX_CONST_2_UNK4 |
727 A6XX_TEX_CONST_2_UNK31;
728 view->descriptor[4] = iova;
729 view->descriptor[5] = iova >> 32;
730 }
731
732 VkResult
733 tu_CreateBufferView(VkDevice _device,
734 const VkBufferViewCreateInfo *pCreateInfo,
735 const VkAllocationCallbacks *pAllocator,
736 VkBufferView *pView)
737 {
738 TU_FROM_HANDLE(tu_device, device, _device);
739 struct tu_buffer_view *view;
740
741 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
742 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
743 if (!view)
744 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
745
746 tu_buffer_view_init(view, device, pCreateInfo);
747
748 *pView = tu_buffer_view_to_handle(view);
749
750 return VK_SUCCESS;
751 }
752
753 void
754 tu_DestroyBufferView(VkDevice _device,
755 VkBufferView bufferView,
756 const VkAllocationCallbacks *pAllocator)
757 {
758 TU_FROM_HANDLE(tu_device, device, _device);
759 TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
760
761 if (!view)
762 return;
763
764 vk_free2(&device->alloc, pAllocator, view);
765 }