turnip: update "fetchsize" value to match fdl6_layout changes
[mesa.git] / src / freedreno / vulkan / tu_image.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #include "tu_private.h"
29
30 #include "util/debug.h"
31 #include "util/u_atomic.h"
32 #include "util/format/u_format.h"
33 #include "vk_format.h"
34 #include "vk_util.h"
35 #include "drm-uapi/drm_fourcc.h"
36
37 #include "tu_cs.h"
38
39 VkResult
40 tu_image_create(VkDevice _device,
41 const VkImageCreateInfo *pCreateInfo,
42 const VkAllocationCallbacks *alloc,
43 VkImage *pImage,
44 uint64_t modifier)
45 {
46 TU_FROM_HANDLE(tu_device, device, _device);
47 struct tu_image *image = NULL;
48 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
49
50 tu_assert(pCreateInfo->mipLevels > 0);
51 tu_assert(pCreateInfo->arrayLayers > 0);
52 tu_assert(pCreateInfo->samples > 0);
53 tu_assert(pCreateInfo->extent.width > 0);
54 tu_assert(pCreateInfo->extent.height > 0);
55 tu_assert(pCreateInfo->extent.depth > 0);
56
57 image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
58 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
59 if (!image)
60 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
61
62 image->type = pCreateInfo->imageType;
63
64 image->vk_format = pCreateInfo->format;
65 image->tiling = pCreateInfo->tiling;
66 image->usage = pCreateInfo->usage;
67 image->flags = pCreateInfo->flags;
68 image->extent = pCreateInfo->extent;
69 image->level_count = pCreateInfo->mipLevels;
70 image->layer_count = pCreateInfo->arrayLayers;
71 image->samples = pCreateInfo->samples;
72
73 image->exclusive = pCreateInfo->sharingMode == VK_SHARING_MODE_EXCLUSIVE;
74 if (pCreateInfo->sharingMode == VK_SHARING_MODE_CONCURRENT) {
75 for (uint32_t i = 0; i < pCreateInfo->queueFamilyIndexCount; ++i)
76 if (pCreateInfo->pQueueFamilyIndices[i] ==
77 VK_QUEUE_FAMILY_EXTERNAL)
78 image->queue_family_mask |= (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
79 else
80 image->queue_family_mask |=
81 1u << pCreateInfo->pQueueFamilyIndices[i];
82 }
83
84 image->shareable =
85 vk_find_struct_const(pCreateInfo->pNext,
86 EXTERNAL_MEMORY_IMAGE_CREATE_INFO) != NULL;
87
88 image->layout.tile_mode = TILE6_3;
89 bool ubwc_enabled = true;
90
91 /* disable tiling when linear is requested and for compressed formats */
92 if (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR ||
93 modifier == DRM_FORMAT_MOD_LINEAR ||
94 vk_format_is_compressed(image->vk_format)) {
95 image->layout.tile_mode = TILE6_LINEAR;
96 ubwc_enabled = false;
97 }
98
99 /* UBWC can't be used with E5B9G9R9 */
100 if (image->vk_format == VK_FORMAT_E5B9G9R9_UFLOAT_PACK32)
101 ubwc_enabled = false;
102
103 /* separate stencil doesn't have a UBWC enable bit */
104 if (image->vk_format == VK_FORMAT_S8_UINT)
105 ubwc_enabled = false;
106
107 if (image->extent.depth > 1) {
108 tu_finishme("UBWC with 3D textures");
109 ubwc_enabled = false;
110 }
111
112 /* Disable UBWC for storage images.
113 *
114 * The closed GL driver skips UBWC for storage images (and additionally
115 * uses linear for writeonly images). We seem to have image tiling working
116 * in freedreno in general, so turnip matches that. freedreno also enables
117 * UBWC on images, but it's not really tested due to the lack of
118 * UBWC-enabled mipmaps in freedreno currently. Just match the closed GL
119 * behavior of no UBWC.
120 */
121 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT)
122 ubwc_enabled = false;
123
124 uint32_t ubwc_blockwidth, ubwc_blockheight;
125 fdl6_get_ubwc_blockwidth(&image->layout,
126 &ubwc_blockwidth, &ubwc_blockheight);
127 if (!ubwc_blockwidth) {
128 tu_finishme("UBWC for cpp=%d", image->layout.cpp);
129 ubwc_enabled = false;
130 }
131
132 /* expect UBWC enabled if we asked for it */
133 assert(modifier != DRM_FORMAT_MOD_QCOM_COMPRESSED || ubwc_enabled);
134
135 image->layout.ubwc = ubwc_enabled;
136
137 fdl6_layout(&image->layout, vk_format_to_pipe_format(image->vk_format),
138 image->samples,
139 pCreateInfo->extent.width,
140 pCreateInfo->extent.height,
141 pCreateInfo->extent.depth,
142 pCreateInfo->mipLevels,
143 pCreateInfo->arrayLayers,
144 pCreateInfo->imageType == VK_IMAGE_TYPE_3D);
145
146 *pImage = tu_image_to_handle(image);
147
148 return VK_SUCCESS;
149 }
150
151 enum a6xx_tex_fetchsize
152 tu6_fetchsize(VkFormat format)
153 {
154 switch (vk_format_get_blocksize(format)) {
155 case 1: return TFETCH6_1_BYTE;
156 case 2: return TFETCH6_2_BYTE;
157 case 4: return TFETCH6_4_BYTE;
158 case 8: return TFETCH6_8_BYTE;
159 case 16: return TFETCH6_16_BYTE;
160 default:
161 unreachable("bad block size");
162 }
163 }
164
165 static uint32_t
166 tu6_texswiz(const VkComponentMapping *comps,
167 VkFormat format,
168 VkImageAspectFlagBits aspect_mask)
169 {
170 unsigned char swiz[4] = {comps->r, comps->g, comps->b, comps->a};
171 unsigned char vk_swizzle[] = {
172 [VK_COMPONENT_SWIZZLE_ZERO] = A6XX_TEX_ZERO,
173 [VK_COMPONENT_SWIZZLE_ONE] = A6XX_TEX_ONE,
174 [VK_COMPONENT_SWIZZLE_R] = A6XX_TEX_X,
175 [VK_COMPONENT_SWIZZLE_G] = A6XX_TEX_Y,
176 [VK_COMPONENT_SWIZZLE_B] = A6XX_TEX_Z,
177 [VK_COMPONENT_SWIZZLE_A] = A6XX_TEX_W,
178 };
179 const unsigned char *fmt_swiz = vk_format_description(format)->swizzle;
180
181 for (unsigned i = 0; i < 4; i++) {
182 swiz[i] = (swiz[i] == VK_COMPONENT_SWIZZLE_IDENTITY) ? i : vk_swizzle[swiz[i]];
183 /* if format has 0/1 in channel, use that (needed for bc1_rgb) */
184 if (swiz[i] < 4) {
185 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT &&
186 format == VK_FORMAT_D24_UNORM_S8_UINT)
187 swiz[i] = A6XX_TEX_Y;
188 switch (fmt_swiz[swiz[i]]) {
189 case PIPE_SWIZZLE_0: swiz[i] = A6XX_TEX_ZERO; break;
190 case PIPE_SWIZZLE_1: swiz[i] = A6XX_TEX_ONE; break;
191 }
192 }
193 }
194
195 return A6XX_TEX_CONST_0_SWIZ_X(swiz[0]) |
196 A6XX_TEX_CONST_0_SWIZ_Y(swiz[1]) |
197 A6XX_TEX_CONST_0_SWIZ_Z(swiz[2]) |
198 A6XX_TEX_CONST_0_SWIZ_W(swiz[3]);
199 }
200
201 static enum a6xx_tex_type
202 tu6_tex_type(VkImageViewType type)
203 {
204 switch (type) {
205 default:
206 case VK_IMAGE_VIEW_TYPE_1D:
207 case VK_IMAGE_VIEW_TYPE_1D_ARRAY:
208 return A6XX_TEX_1D;
209 case VK_IMAGE_VIEW_TYPE_2D:
210 case VK_IMAGE_VIEW_TYPE_2D_ARRAY:
211 return A6XX_TEX_2D;
212 case VK_IMAGE_VIEW_TYPE_3D:
213 return A6XX_TEX_3D;
214 case VK_IMAGE_VIEW_TYPE_CUBE:
215 case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
216 return A6XX_TEX_CUBE;
217 }
218 }
219
220 void
221 tu_cs_image_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
222 {
223 tu_cs_emit(cs, iview->PITCH);
224 tu_cs_emit(cs, iview->layer_size >> 6);
225 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
226 }
227
228 void
229 tu_cs_image_ref_2d(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer, bool src)
230 {
231 tu_cs_emit_qw(cs, iview->base_addr + iview->layer_size * layer);
232 /* SP_PS_2D_SRC_PITCH has shifted pitch field */
233 tu_cs_emit(cs, iview->PITCH << (src ? 9 : 0));
234 }
235
236 void
237 tu_cs_image_flag_ref(struct tu_cs *cs, const struct tu_image_view *iview, uint32_t layer)
238 {
239 tu_cs_emit_qw(cs, iview->ubwc_addr + iview->ubwc_layer_size * layer);
240 tu_cs_emit(cs, iview->FLAG_BUFFER_PITCH);
241 }
242
243 void
244 tu_image_view_init(struct tu_image_view *iview,
245 const VkImageViewCreateInfo *pCreateInfo)
246 {
247 TU_FROM_HANDLE(tu_image, image, pCreateInfo->image);
248 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
249 VkFormat format = pCreateInfo->format;
250 VkImageAspectFlagBits aspect_mask = pCreateInfo->subresourceRange.aspectMask;
251
252 switch (image->type) {
253 case VK_IMAGE_TYPE_1D:
254 case VK_IMAGE_TYPE_2D:
255 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
256 image->layer_count);
257 break;
258 case VK_IMAGE_TYPE_3D:
259 assert(range->baseArrayLayer + tu_get_layerCount(image, range) <=
260 tu_minify(image->extent.depth, range->baseMipLevel));
261 break;
262 default:
263 unreachable("bad VkImageType");
264 }
265
266 iview->image = image;
267
268 memset(iview->descriptor, 0, sizeof(iview->descriptor));
269
270 struct fdl_layout *layout = &image->layout;
271
272 uint32_t width = u_minify(image->extent.width, range->baseMipLevel);
273 uint32_t height = u_minify(image->extent.height, range->baseMipLevel);
274 uint32_t depth = tu_get_layerCount(image, range);
275 switch (pCreateInfo->viewType) {
276 case VK_IMAGE_VIEW_TYPE_3D:
277 depth = u_minify(image->extent.depth, range->baseMipLevel);
278 break;
279 case VK_IMAGE_VIEW_TYPE_CUBE:
280 case VK_IMAGE_VIEW_TYPE_CUBE_ARRAY:
281 depth /= 6;
282 break;
283 default:
284 break;
285 }
286
287 uint64_t base_addr = image->bo->iova + image->bo_offset +
288 fdl_surface_offset(layout, range->baseMipLevel, range->baseArrayLayer);
289 uint64_t ubwc_addr = image->bo->iova + image->bo_offset +
290 fdl_ubwc_offset(layout, range->baseMipLevel, range->baseArrayLayer);
291
292 uint32_t pitch = layout->slices[range->baseMipLevel].pitch;
293 uint32_t ubwc_pitch = layout->ubwc_slices[range->baseMipLevel].pitch;
294 uint32_t layer_size = fdl_layer_stride(layout, range->baseMipLevel);
295
296 struct tu_native_format fmt = tu6_format_texture(format, layout->tile_mode);
297 /* note: freedreno layout assumes no TILE_ALL bit for non-UBWC
298 * this means smaller mipmap levels have a linear tile mode
299 */
300 fmt.tile_mode = fdl_tile_mode(layout, range->baseMipLevel);
301
302 bool ubwc_enabled = fdl_ubwc_enabled(layout, range->baseMipLevel);
303
304 unsigned fmt_tex = fmt.fmt;
305 if (fmt_tex == FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8) {
306 if (aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT)
307 fmt_tex = FMT6_Z24_UNORM_S8_UINT;
308 if (aspect_mask == VK_IMAGE_ASPECT_STENCIL_BIT)
309 fmt_tex = FMT6_S8Z24_UINT;
310 /* TODO: also use this format with storage descriptor ? */
311 }
312
313 iview->descriptor[0] =
314 A6XX_TEX_CONST_0_TILE_MODE(fmt.tile_mode) |
315 COND(vk_format_is_srgb(format), A6XX_TEX_CONST_0_SRGB) |
316 A6XX_TEX_CONST_0_FMT(fmt_tex) |
317 A6XX_TEX_CONST_0_SAMPLES(tu_msaa_samples(image->samples)) |
318 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
319 tu6_texswiz(&pCreateInfo->components, format, aspect_mask) |
320 A6XX_TEX_CONST_0_MIPLVLS(tu_get_levelCount(image, range) - 1);
321 iview->descriptor[1] = A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height);
322 iview->descriptor[2] =
323 A6XX_TEX_CONST_2_FETCHSIZE(tu6_fetchsize(format)) |
324 A6XX_TEX_CONST_2_PITCH(pitch) |
325 A6XX_TEX_CONST_2_TYPE(tu6_tex_type(pCreateInfo->viewType));
326 iview->descriptor[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(layer_size);
327 iview->descriptor[4] = base_addr;
328 iview->descriptor[5] = (base_addr >> 32) | A6XX_TEX_CONST_5_DEPTH(depth);
329
330 if (ubwc_enabled) {
331 uint32_t block_width, block_height;
332 fdl6_get_ubwc_blockwidth(&image->layout,
333 &block_width, &block_height);
334
335 iview->descriptor[3] |= A6XX_TEX_CONST_3_FLAG | A6XX_TEX_CONST_3_TILE_ALL;
336 iview->descriptor[7] = ubwc_addr;
337 iview->descriptor[8] = ubwc_addr >> 32;
338 iview->descriptor[9] |= A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
339 iview->descriptor[10] |=
340 A6XX_TEX_CONST_10_FLAG_BUFFER_PITCH(ubwc_pitch) |
341 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGW(util_logbase2_ceil(DIV_ROUND_UP(width, block_width))) |
342 A6XX_TEX_CONST_10_FLAG_BUFFER_LOGH(util_logbase2_ceil(DIV_ROUND_UP(height, block_height)));
343 }
344
345 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
346 iview->descriptor[3] |=
347 A6XX_TEX_CONST_3_MIN_LAYERSZ(image->layout.slices[image->level_count - 1].size0);
348 }
349
350 /* only texture descriptor is valid for TEXTURE-only formats */
351 if (!(fmt.supported & FMT_COLOR))
352 return;
353
354 struct tu_native_format cfmt = tu6_format_color(format, layout->tile_mode);
355 cfmt.tile_mode = fmt.tile_mode;
356
357 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
358 memset(iview->storage_descriptor, 0, sizeof(iview->storage_descriptor));
359
360 iview->storage_descriptor[0] =
361 A6XX_IBO_0_FMT(fmt.fmt) |
362 A6XX_IBO_0_TILE_MODE(fmt.tile_mode);
363 iview->storage_descriptor[1] =
364 A6XX_IBO_1_WIDTH(width) |
365 A6XX_IBO_1_HEIGHT(height);
366 iview->storage_descriptor[2] =
367 A6XX_IBO_2_PITCH(pitch) |
368 A6XX_IBO_2_TYPE(tu6_tex_type(pCreateInfo->viewType));
369 iview->storage_descriptor[3] = A6XX_IBO_3_ARRAY_PITCH(layer_size);
370
371 iview->storage_descriptor[4] = base_addr;
372 iview->storage_descriptor[5] = (base_addr >> 32) | A6XX_IBO_5_DEPTH(depth);
373
374 if (ubwc_enabled) {
375 iview->storage_descriptor[3] |= A6XX_IBO_3_FLAG | A6XX_IBO_3_UNK27;
376 iview->storage_descriptor[7] |= ubwc_addr;
377 iview->storage_descriptor[8] |= ubwc_addr >> 32;
378 iview->storage_descriptor[9] = A6XX_IBO_9_FLAG_BUFFER_ARRAY_PITCH(layout->ubwc_layer_size >> 2);
379 iview->storage_descriptor[10] =
380 A6XX_IBO_10_FLAG_BUFFER_PITCH(ubwc_pitch);
381 }
382 }
383
384 iview->base_addr = base_addr;
385 iview->ubwc_addr = ubwc_addr;
386 iview->layer_size = layer_size;
387 iview->ubwc_layer_size = layout->ubwc_layer_size;
388
389 iview->extent.width = width;
390 iview->extent.height = height;
391 iview->need_y2_align =
392 (fmt.tile_mode == TILE6_LINEAR && range->baseMipLevel != image->level_count - 1);
393
394 iview->ubwc_enabled = ubwc_enabled;
395
396 /* note: these have same encoding for MRT and 2D (except 2D PITCH src) */
397 iview->PITCH = A6XX_RB_DEPTH_BUFFER_PITCH(pitch).value;
398 iview->FLAG_BUFFER_PITCH = A6XX_RB_DEPTH_FLAG_BUFFER_PITCH(
399 .pitch = ubwc_pitch, .array_pitch = layout->ubwc_layer_size >> 2).value;
400
401 iview->RB_MRT_BUF_INFO = A6XX_RB_MRT_BUF_INFO(0,
402 .color_tile_mode = cfmt.tile_mode,
403 .color_format = cfmt.fmt,
404 .color_swap = cfmt.swap).value;
405 iview->SP_FS_MRT_REG = A6XX_SP_FS_MRT_REG(0,
406 .color_format = cfmt.fmt,
407 .color_sint = vk_format_is_sint(format),
408 .color_uint = vk_format_is_uint(format)).value;
409
410 iview->SP_PS_2D_SRC_INFO = A6XX_SP_PS_2D_SRC_INFO(
411 .color_format = fmt.fmt,
412 .tile_mode = fmt.tile_mode,
413 .color_swap = fmt.swap,
414 .flags = ubwc_enabled,
415 .srgb = vk_format_is_srgb(format),
416 .samples = tu_msaa_samples(image->samples),
417 .samples_average = image->samples > 1 &&
418 !vk_format_is_int(format) &&
419 !vk_format_is_depth_or_stencil(format),
420 .unk20 = 1,
421 .unk22 = 1).value;
422 iview->SP_PS_2D_SRC_SIZE =
423 A6XX_SP_PS_2D_SRC_SIZE(.width = width, .height = height).value;
424
425 iview->RB_2D_DST_INFO = A6XX_RB_2D_DST_INFO(
426 .color_format = cfmt.fmt,
427 .tile_mode = cfmt.tile_mode,
428 .color_swap = cfmt.swap,
429 .flags = ubwc_enabled,
430 .srgb = vk_format_is_srgb(format)).value;
431
432 iview->RB_BLIT_DST_INFO = A6XX_RB_BLIT_DST_INFO(
433 .tile_mode = cfmt.tile_mode,
434 .samples = tu_msaa_samples(iview->image->samples),
435 .color_format = cfmt.fmt,
436 .color_swap = cfmt.swap,
437 .flags = ubwc_enabled).value;
438 }
439
440 unsigned
441 tu_image_queue_family_mask(const struct tu_image *image,
442 uint32_t family,
443 uint32_t queue_family)
444 {
445 if (!image->exclusive)
446 return image->queue_family_mask;
447 if (family == VK_QUEUE_FAMILY_EXTERNAL)
448 return (1u << TU_MAX_QUEUE_FAMILIES) - 1u;
449 if (family == VK_QUEUE_FAMILY_IGNORED)
450 return 1u << queue_family;
451 return 1u << family;
452 }
453
454 VkResult
455 tu_CreateImage(VkDevice device,
456 const VkImageCreateInfo *pCreateInfo,
457 const VkAllocationCallbacks *pAllocator,
458 VkImage *pImage)
459 {
460 #ifdef ANDROID
461 const VkNativeBufferANDROID *gralloc_info =
462 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
463
464 if (gralloc_info)
465 return tu_image_from_gralloc(device, pCreateInfo, gralloc_info,
466 pAllocator, pImage);
467 #endif
468
469 uint64_t modifier = DRM_FORMAT_MOD_INVALID;
470 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
471 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
472 vk_find_struct_const(pCreateInfo->pNext,
473 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
474
475 modifier = DRM_FORMAT_MOD_LINEAR;
476 for (unsigned i = 0; i < mod_info->drmFormatModifierCount; i++) {
477 if (mod_info->pDrmFormatModifiers[i] == DRM_FORMAT_MOD_QCOM_COMPRESSED)
478 modifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
479 }
480 } else {
481 const struct wsi_image_create_info *wsi_info =
482 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
483 if (wsi_info && wsi_info->scanout)
484 modifier = DRM_FORMAT_MOD_LINEAR;
485 }
486
487 return tu_image_create(device, pCreateInfo, pAllocator, pImage, modifier);
488 }
489
490 void
491 tu_DestroyImage(VkDevice _device,
492 VkImage _image,
493 const VkAllocationCallbacks *pAllocator)
494 {
495 TU_FROM_HANDLE(tu_device, device, _device);
496 TU_FROM_HANDLE(tu_image, image, _image);
497
498 if (!image)
499 return;
500
501 if (image->owned_memory != VK_NULL_HANDLE)
502 tu_FreeMemory(_device, image->owned_memory, pAllocator);
503
504 vk_free2(&device->alloc, pAllocator, image);
505 }
506
507 void
508 tu_GetImageSubresourceLayout(VkDevice _device,
509 VkImage _image,
510 const VkImageSubresource *pSubresource,
511 VkSubresourceLayout *pLayout)
512 {
513 TU_FROM_HANDLE(tu_image, image, _image);
514
515 const struct fdl_slice *slice = image->layout.slices + pSubresource->mipLevel;
516
517 pLayout->offset = fdl_surface_offset(&image->layout,
518 pSubresource->mipLevel,
519 pSubresource->arrayLayer);
520 pLayout->size = slice->size0;
521 pLayout->rowPitch =
522 slice->pitch * vk_format_get_blockheight(image->vk_format);
523 pLayout->arrayPitch = image->layout.layer_size;
524 pLayout->depthPitch = slice->size0;
525
526 if (image->layout.ubwc_layer_size) {
527 /* UBWC starts at offset 0 */
528 pLayout->offset = 0;
529 /* UBWC scanout won't match what the kernel wants if we have levels/layers */
530 assert(image->level_count == 1 && image->layer_count == 1);
531 }
532 }
533
534 VkResult tu_GetImageDrmFormatModifierPropertiesEXT(
535 VkDevice device,
536 VkImage _image,
537 VkImageDrmFormatModifierPropertiesEXT* pProperties)
538 {
539 TU_FROM_HANDLE(tu_image, image, _image);
540
541 assert(pProperties->sType ==
542 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
543
544 /* TODO invent a modifier for tiled but not UBWC buffers */
545
546 if (!image->layout.tile_mode)
547 pProperties->drmFormatModifier = DRM_FORMAT_MOD_LINEAR;
548 else if (image->layout.ubwc_layer_size)
549 pProperties->drmFormatModifier = DRM_FORMAT_MOD_QCOM_COMPRESSED;
550 else
551 pProperties->drmFormatModifier = DRM_FORMAT_MOD_INVALID;
552
553 return VK_SUCCESS;
554 }
555
556
557 VkResult
558 tu_CreateImageView(VkDevice _device,
559 const VkImageViewCreateInfo *pCreateInfo,
560 const VkAllocationCallbacks *pAllocator,
561 VkImageView *pView)
562 {
563 TU_FROM_HANDLE(tu_device, device, _device);
564 struct tu_image_view *view;
565
566 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
567 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
568 if (view == NULL)
569 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
570
571 tu_image_view_init(view, pCreateInfo);
572
573 *pView = tu_image_view_to_handle(view);
574
575 return VK_SUCCESS;
576 }
577
578 void
579 tu_DestroyImageView(VkDevice _device,
580 VkImageView _iview,
581 const VkAllocationCallbacks *pAllocator)
582 {
583 TU_FROM_HANDLE(tu_device, device, _device);
584 TU_FROM_HANDLE(tu_image_view, iview, _iview);
585
586 if (!iview)
587 return;
588 vk_free2(&device->alloc, pAllocator, iview);
589 }
590
591 void
592 tu_buffer_view_init(struct tu_buffer_view *view,
593 struct tu_device *device,
594 const VkBufferViewCreateInfo *pCreateInfo)
595 {
596 TU_FROM_HANDLE(tu_buffer, buffer, pCreateInfo->buffer);
597
598 view->buffer = buffer;
599
600 enum VkFormat vfmt = pCreateInfo->format;
601 enum pipe_format pfmt = vk_format_to_pipe_format(vfmt);
602 const struct tu_native_format fmt = tu6_format_texture(vfmt, TILE6_LINEAR);
603
604 uint32_t range;
605 if (pCreateInfo->range == VK_WHOLE_SIZE)
606 range = buffer->size - pCreateInfo->offset;
607 else
608 range = pCreateInfo->range;
609 uint32_t elements = range / util_format_get_blocksize(pfmt);
610
611 static const VkComponentMapping components = {
612 .r = VK_COMPONENT_SWIZZLE_R,
613 .g = VK_COMPONENT_SWIZZLE_G,
614 .b = VK_COMPONENT_SWIZZLE_B,
615 .a = VK_COMPONENT_SWIZZLE_A,
616 };
617
618 uint64_t iova = tu_buffer_iova(buffer) + pCreateInfo->offset;
619
620 memset(&view->descriptor, 0, sizeof(view->descriptor));
621
622 view->descriptor[0] =
623 A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR) |
624 A6XX_TEX_CONST_0_SWAP(fmt.swap) |
625 A6XX_TEX_CONST_0_FMT(fmt.fmt) |
626 A6XX_TEX_CONST_0_MIPLVLS(0) |
627 tu6_texswiz(&components, vfmt, VK_IMAGE_ASPECT_COLOR_BIT);
628 COND(vk_format_is_srgb(vfmt), A6XX_TEX_CONST_0_SRGB);
629 view->descriptor[1] =
630 A6XX_TEX_CONST_1_WIDTH(elements & MASK(15)) |
631 A6XX_TEX_CONST_1_HEIGHT(elements >> 15);
632 view->descriptor[2] =
633 A6XX_TEX_CONST_2_UNK4 |
634 A6XX_TEX_CONST_2_UNK31;
635 view->descriptor[4] = iova;
636 view->descriptor[5] = iova >> 32;
637 }
638
639 VkResult
640 tu_CreateBufferView(VkDevice _device,
641 const VkBufferViewCreateInfo *pCreateInfo,
642 const VkAllocationCallbacks *pAllocator,
643 VkBufferView *pView)
644 {
645 TU_FROM_HANDLE(tu_device, device, _device);
646 struct tu_buffer_view *view;
647
648 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
649 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
650 if (!view)
651 return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
652
653 tu_buffer_view_init(view, device, pCreateInfo);
654
655 *pView = tu_buffer_view_to_handle(view);
656
657 return VK_SUCCESS;
658 }
659
660 void
661 tu_DestroyBufferView(VkDevice _device,
662 VkBufferView bufferView,
663 const VkAllocationCallbacks *pAllocator)
664 {
665 TU_FROM_HANDLE(tu_device, device, _device);
666 TU_FROM_HANDLE(tu_buffer_view, view, bufferView);
667
668 if (!view)
669 return;
670
671 vk_free2(&device->alloc, pAllocator, view);
672 }