549d1de8b8711ab7da092f37e1ba272f42146804
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x) ((void)0)
44 #endif
45
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
50 #include "vk_alloc.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
53
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
57
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
60 #include "a6xx.xml.h"
61
62 #include "tu_descriptor_set.h"
63 #include "tu_extensions.h"
64
65 /* Pre-declarations needed for WSI entrypoints */
66 struct wl_surface;
67 struct wl_display;
68 typedef struct xcb_connection_t xcb_connection_t;
69 typedef uint32_t xcb_visualid_t;
70 typedef uint32_t xcb_window_t;
71
72 #include <vulkan/vk_android_native_buffer.h>
73 #include <vulkan/vk_icd.h>
74 #include <vulkan/vulkan.h>
75 #include <vulkan/vulkan_intel.h>
76
77 #include "tu_entrypoints.h"
78
79 #define MAX_VBS 32
80 #define MAX_VERTEX_ATTRIBS 32
81 #define MAX_RTS 8
82 #define MAX_VSC_PIPES 32
83 #define MAX_VIEWPORTS 1
84 #define MAX_SCISSORS 16
85 #define MAX_DISCARD_RECTANGLES 4
86 #define MAX_PUSH_CONSTANTS_SIZE 128
87 #define MAX_PUSH_DESCRIPTORS 32
88 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
89 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
90 #define MAX_DYNAMIC_BUFFERS \
91 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
92 #define MAX_SAMPLES_LOG2 4
93 #define NUM_META_FS_KEYS 13
94 #define TU_MAX_DRM_DEVICES 8
95 #define MAX_VIEWS 8
96
97 #define NUM_DEPTH_CLEAR_PIPELINES 3
98
99 /*
100 * This is the point we switch from using CP to compute shader
101 * for certain buffer operations.
102 */
103 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
104
105 #define A6XX_TEX_CONST_DWORDS 16
106 #define A6XX_TEX_SAMP_DWORDS 4
107
108 enum tu_mem_heap
109 {
110 TU_MEM_HEAP_VRAM,
111 TU_MEM_HEAP_VRAM_CPU_ACCESS,
112 TU_MEM_HEAP_GTT,
113 TU_MEM_HEAP_COUNT
114 };
115
116 enum tu_mem_type
117 {
118 TU_MEM_TYPE_VRAM,
119 TU_MEM_TYPE_GTT_WRITE_COMBINE,
120 TU_MEM_TYPE_VRAM_CPU_ACCESS,
121 TU_MEM_TYPE_GTT_CACHED,
122 TU_MEM_TYPE_COUNT
123 };
124
125 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
126
127 static inline uint32_t
128 align_u32(uint32_t v, uint32_t a)
129 {
130 assert(a != 0 && a == (a & -a));
131 return (v + a - 1) & ~(a - 1);
132 }
133
134 static inline uint32_t
135 align_u32_npot(uint32_t v, uint32_t a)
136 {
137 return (v + a - 1) / a * a;
138 }
139
140 static inline uint64_t
141 align_u64(uint64_t v, uint64_t a)
142 {
143 assert(a != 0 && a == (a & -a));
144 return (v + a - 1) & ~(a - 1);
145 }
146
147 static inline int32_t
148 align_i32(int32_t v, int32_t a)
149 {
150 assert(a != 0 && a == (a & -a));
151 return (v + a - 1) & ~(a - 1);
152 }
153
154 /** Alignment must be a power of 2. */
155 static inline bool
156 tu_is_aligned(uintmax_t n, uintmax_t a)
157 {
158 assert(a == (a & -a));
159 return (n & (a - 1)) == 0;
160 }
161
162 static inline uint32_t
163 round_up_u32(uint32_t v, uint32_t a)
164 {
165 return (v + a - 1) / a;
166 }
167
168 static inline uint64_t
169 round_up_u64(uint64_t v, uint64_t a)
170 {
171 return (v + a - 1) / a;
172 }
173
174 static inline uint32_t
175 tu_minify(uint32_t n, uint32_t levels)
176 {
177 if (unlikely(n == 0))
178 return 0;
179 else
180 return MAX2(n >> levels, 1);
181 }
182 static inline float
183 tu_clamp_f(float f, float min, float max)
184 {
185 assert(min < max);
186
187 if (f > max)
188 return max;
189 else if (f < min)
190 return min;
191 else
192 return f;
193 }
194
195 static inline bool
196 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
197 {
198 if (*inout_mask & clear_mask) {
199 *inout_mask &= ~clear_mask;
200 return true;
201 } else {
202 return false;
203 }
204 }
205
206 #define for_each_bit(b, dword) \
207 for (uint32_t __dword = (dword); \
208 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
209
210 #define typed_memcpy(dest, src, count) \
211 ({ \
212 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
213 memcpy((dest), (src), (count) * sizeof(*(src))); \
214 })
215
216 #define COND(bool, val) ((bool) ? (val) : 0)
217
218 /* Whenever we generate an error, pass it through this function. Useful for
219 * debugging, where we can break on it. Only call at error site, not when
220 * propagating errors. Might be useful to plug in a stack trace here.
221 */
222
223 struct tu_instance;
224
225 VkResult
226 __vk_errorf(struct tu_instance *instance,
227 VkResult error,
228 const char *file,
229 int line,
230 const char *format,
231 ...);
232
233 #define vk_error(instance, error) \
234 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
235 #define vk_errorf(instance, error, format, ...) \
236 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
237
238 void
239 __tu_finishme(const char *file, int line, const char *format, ...)
240 tu_printflike(3, 4);
241 void
242 tu_loge(const char *format, ...) tu_printflike(1, 2);
243 void
244 tu_loge_v(const char *format, va_list va);
245 void
246 tu_logi(const char *format, ...) tu_printflike(1, 2);
247 void
248 tu_logi_v(const char *format, va_list va);
249
250 /**
251 * Print a FINISHME message, including its source location.
252 */
253 #define tu_finishme(format, ...) \
254 do { \
255 static bool reported = false; \
256 if (!reported) { \
257 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
258 reported = true; \
259 } \
260 } while (0)
261
262 /* A non-fatal assert. Useful for debugging. */
263 #ifdef DEBUG
264 #define tu_assert(x) \
265 ({ \
266 if (unlikely(!(x))) \
267 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
268 })
269 #else
270 #define tu_assert(x)
271 #endif
272
273 /* Suppress -Wunused in stub functions */
274 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
275 static inline void
276 __tu_use_args(int ignore, ...)
277 {
278 }
279
280 #define tu_stub() \
281 do { \
282 tu_finishme("stub %s", __func__); \
283 } while (0)
284
285 void *
286 tu_lookup_entrypoint_unchecked(const char *name);
287 void *
288 tu_lookup_entrypoint_checked(
289 const char *name,
290 uint32_t core_version,
291 const struct tu_instance_extension_table *instance,
292 const struct tu_device_extension_table *device);
293
294 struct tu_physical_device
295 {
296 VK_LOADER_DATA _loader_data;
297
298 struct tu_instance *instance;
299
300 char path[20];
301 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
302 uint8_t driver_uuid[VK_UUID_SIZE];
303 uint8_t device_uuid[VK_UUID_SIZE];
304 uint8_t cache_uuid[VK_UUID_SIZE];
305
306 struct wsi_device wsi_device;
307
308 int local_fd;
309 int master_fd;
310
311 unsigned gpu_id;
312 uint32_t gmem_size;
313 uint32_t tile_align_w;
314 uint32_t tile_align_h;
315
316 /* This is the drivers on-disk cache used as a fallback as opposed to
317 * the pipeline cache defined by apps.
318 */
319 struct disk_cache *disk_cache;
320
321 struct tu_device_extension_table supported_extensions;
322 };
323
324 enum tu_debug_flags
325 {
326 TU_DEBUG_STARTUP = 1 << 0,
327 TU_DEBUG_NIR = 1 << 1,
328 TU_DEBUG_IR3 = 1 << 2,
329 };
330
331 struct tu_instance
332 {
333 VK_LOADER_DATA _loader_data;
334
335 VkAllocationCallbacks alloc;
336
337 uint32_t api_version;
338 int physical_device_count;
339 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
340
341 enum tu_debug_flags debug_flags;
342
343 struct vk_debug_report_instance debug_report_callbacks;
344
345 struct tu_instance_extension_table enabled_extensions;
346 };
347
348 VkResult
349 tu_wsi_init(struct tu_physical_device *physical_device);
350 void
351 tu_wsi_finish(struct tu_physical_device *physical_device);
352
353 bool
354 tu_instance_extension_supported(const char *name);
355 uint32_t
356 tu_physical_device_api_version(struct tu_physical_device *dev);
357 bool
358 tu_physical_device_extension_supported(struct tu_physical_device *dev,
359 const char *name);
360
361 struct cache_entry;
362
363 struct tu_pipeline_cache
364 {
365 struct tu_device *device;
366 pthread_mutex_t mutex;
367
368 uint32_t total_size;
369 uint32_t table_size;
370 uint32_t kernel_count;
371 struct cache_entry **hash_table;
372 bool modified;
373
374 VkAllocationCallbacks alloc;
375 };
376
377 struct tu_pipeline_key
378 {
379 };
380
381 void
382 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
383 struct tu_device *device);
384 void
385 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
386 void
387 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
388 const void *data,
389 size_t size);
390
391 struct tu_shader_variant;
392
393 bool
394 tu_create_shader_variants_from_pipeline_cache(
395 struct tu_device *device,
396 struct tu_pipeline_cache *cache,
397 const unsigned char *sha1,
398 struct tu_shader_variant **variants);
399
400 void
401 tu_pipeline_cache_insert_shaders(struct tu_device *device,
402 struct tu_pipeline_cache *cache,
403 const unsigned char *sha1,
404 struct tu_shader_variant **variants,
405 const void *const *codes,
406 const unsigned *code_sizes);
407
408 struct tu_meta_state
409 {
410 VkAllocationCallbacks alloc;
411
412 struct tu_pipeline_cache cache;
413 };
414
415 /* queue types */
416 #define TU_QUEUE_GENERAL 0
417
418 #define TU_MAX_QUEUE_FAMILIES 1
419
420 struct tu_fence
421 {
422 struct wsi_fence *fence_wsi;
423 bool signaled;
424 int fd;
425 };
426
427 void
428 tu_fence_init(struct tu_fence *fence, bool signaled);
429 void
430 tu_fence_finish(struct tu_fence *fence);
431 void
432 tu_fence_update_fd(struct tu_fence *fence, int fd);
433 void
434 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
435 void
436 tu_fence_signal(struct tu_fence *fence);
437 void
438 tu_fence_wait_idle(struct tu_fence *fence);
439
440 struct tu_queue
441 {
442 VK_LOADER_DATA _loader_data;
443 struct tu_device *device;
444 uint32_t queue_family_index;
445 int queue_idx;
446 VkDeviceQueueCreateFlags flags;
447
448 uint32_t msm_queue_id;
449 struct tu_fence submit_fence;
450 };
451
452 struct tu_device
453 {
454 VK_LOADER_DATA _loader_data;
455
456 VkAllocationCallbacks alloc;
457
458 struct tu_instance *instance;
459
460 struct tu_meta_state meta_state;
461
462 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
463 int queue_count[TU_MAX_QUEUE_FAMILIES];
464
465 struct tu_physical_device *physical_device;
466
467 struct ir3_compiler *compiler;
468
469 /* Backup in-memory cache to be used if the app doesn't provide one */
470 struct tu_pipeline_cache *mem_cache;
471
472 struct list_head shader_slabs;
473 mtx_t shader_slab_mutex;
474
475 struct tu_device_extension_table enabled_extensions;
476 };
477
478 struct tu_bo
479 {
480 uint32_t gem_handle;
481 uint64_t size;
482 uint64_t iova;
483 void *map;
484 };
485
486 VkResult
487 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
488 VkResult
489 tu_bo_init_dmabuf(struct tu_device *dev,
490 struct tu_bo *bo,
491 uint64_t size,
492 int fd);
493 int
494 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
495 void
496 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
497 VkResult
498 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
499
500 struct tu_cs_entry
501 {
502 /* No ownership */
503 const struct tu_bo *bo;
504
505 uint32_t size;
506 uint32_t offset;
507 };
508
509 enum tu_cs_mode
510 {
511
512 /*
513 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
514 * is full. tu_cs_begin must be called before command packet emission and
515 * tu_cs_end must be called after.
516 *
517 * This mode may create multiple entries internally. The entries must be
518 * submitted together.
519 */
520 TU_CS_MODE_GROW,
521
522 /*
523 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
524 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
525 * effect on it.
526 *
527 * This mode does not create any entry or any BO.
528 */
529 TU_CS_MODE_EXTERNAL,
530
531 /*
532 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
533 * command packet emission. tu_cs_begin_sub_stream must be called to get a
534 * sub-stream to emit comamnd packets to. When done with the sub-stream,
535 * tu_cs_end_sub_stream must be called.
536 *
537 * This mode does not create any entry internally.
538 */
539 TU_CS_MODE_SUB_STREAM,
540 };
541
542 struct tu_cs
543 {
544 uint32_t *start;
545 uint32_t *cur;
546 uint32_t *reserved_end;
547 uint32_t *end;
548
549 enum tu_cs_mode mode;
550 uint32_t next_bo_size;
551
552 struct tu_cs_entry *entries;
553 uint32_t entry_count;
554 uint32_t entry_capacity;
555
556 struct tu_bo **bos;
557 uint32_t bo_count;
558 uint32_t bo_capacity;
559 };
560
561 struct tu_device_memory
562 {
563 struct tu_bo bo;
564 VkDeviceSize size;
565
566 /* for dedicated allocations */
567 struct tu_image *image;
568 struct tu_buffer *buffer;
569
570 uint32_t type_index;
571 void *map;
572 void *user_ptr;
573 };
574
575 struct tu_descriptor_range
576 {
577 uint64_t va;
578 uint32_t size;
579 };
580
581 struct tu_descriptor_set
582 {
583 const struct tu_descriptor_set_layout *layout;
584 uint32_t size;
585
586 uint64_t va;
587 uint32_t *mapped_ptr;
588 struct tu_descriptor_range *dynamic_descriptors;
589
590 struct tu_bo *descriptors[0];
591 };
592
593 struct tu_push_descriptor_set
594 {
595 struct tu_descriptor_set set;
596 uint32_t capacity;
597 };
598
599 struct tu_descriptor_pool_entry
600 {
601 uint32_t offset;
602 uint32_t size;
603 struct tu_descriptor_set *set;
604 };
605
606 struct tu_descriptor_pool
607 {
608 struct tu_bo bo;
609 uint64_t current_offset;
610 uint64_t size;
611
612 uint8_t *host_memory_base;
613 uint8_t *host_memory_ptr;
614 uint8_t *host_memory_end;
615
616 uint32_t entry_count;
617 uint32_t max_entry_count;
618 struct tu_descriptor_pool_entry entries[0];
619 };
620
621 struct tu_descriptor_update_template_entry
622 {
623 VkDescriptorType descriptor_type;
624
625 /* The number of descriptors to update */
626 uint32_t descriptor_count;
627
628 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
629 */
630 uint32_t dst_offset;
631
632 /* In dwords. Not valid/used for dynamic descriptors */
633 uint32_t dst_stride;
634
635 uint32_t buffer_offset;
636
637 /* Only valid for combined image samplers and samplers */
638 uint16_t has_sampler;
639
640 /* In bytes */
641 size_t src_offset;
642 size_t src_stride;
643
644 /* For push descriptors */
645 const uint32_t *immutable_samplers;
646 };
647
648 struct tu_descriptor_update_template
649 {
650 uint32_t entry_count;
651 VkPipelineBindPoint bind_point;
652 struct tu_descriptor_update_template_entry entry[0];
653 };
654
655 struct tu_buffer
656 {
657 VkDeviceSize size;
658
659 VkBufferUsageFlags usage;
660 VkBufferCreateFlags flags;
661
662 struct tu_bo *bo;
663 VkDeviceSize bo_offset;
664 };
665
666 enum tu_dynamic_state_bits
667 {
668 TU_DYNAMIC_VIEWPORT = 1 << 0,
669 TU_DYNAMIC_SCISSOR = 1 << 1,
670 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
671 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
672 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
673 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
674 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
675 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
676 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
677 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
678 TU_DYNAMIC_ALL = (1 << 10) - 1,
679 };
680
681 struct tu_vertex_binding
682 {
683 struct tu_buffer *buffer;
684 VkDeviceSize offset;
685 };
686
687 struct tu_viewport_state
688 {
689 uint32_t count;
690 VkViewport viewports[MAX_VIEWPORTS];
691 };
692
693 struct tu_scissor_state
694 {
695 uint32_t count;
696 VkRect2D scissors[MAX_SCISSORS];
697 };
698
699 struct tu_discard_rectangle_state
700 {
701 uint32_t count;
702 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
703 };
704
705 struct tu_dynamic_state
706 {
707 /**
708 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
709 * Defines the set of saved dynamic state.
710 */
711 uint32_t mask;
712
713 struct tu_viewport_state viewport;
714
715 struct tu_scissor_state scissor;
716
717 float line_width;
718
719 struct
720 {
721 float bias;
722 float clamp;
723 float slope;
724 } depth_bias;
725
726 float blend_constants[4];
727
728 struct
729 {
730 float min;
731 float max;
732 } depth_bounds;
733
734 struct
735 {
736 uint32_t front;
737 uint32_t back;
738 } stencil_compare_mask;
739
740 struct
741 {
742 uint32_t front;
743 uint32_t back;
744 } stencil_write_mask;
745
746 struct
747 {
748 uint32_t front;
749 uint32_t back;
750 } stencil_reference;
751
752 struct tu_discard_rectangle_state discard_rectangle;
753 };
754
755 extern const struct tu_dynamic_state default_dynamic_state;
756
757 const char *
758 tu_get_debug_option_name(int id);
759
760 const char *
761 tu_get_perftest_option_name(int id);
762
763 /**
764 * Attachment state when recording a renderpass instance.
765 *
766 * The clear value is valid only if there exists a pending clear.
767 */
768 struct tu_attachment_state
769 {
770 VkImageAspectFlags pending_clear_aspects;
771 uint32_t cleared_views;
772 VkClearValue clear_value;
773 VkImageLayout current_layout;
774 };
775
776 struct tu_descriptor_state
777 {
778 struct tu_descriptor_set *sets[MAX_SETS];
779 uint32_t dirty;
780 uint32_t valid;
781 struct tu_push_descriptor_set push_set;
782 bool push_dirty;
783 uint64_t dynamic_buffers[MAX_DYNAMIC_BUFFERS];
784 };
785
786 struct tu_tile
787 {
788 uint8_t pipe;
789 uint8_t slot;
790 VkOffset2D begin;
791 VkOffset2D end;
792 };
793
794 struct tu_tiling_config
795 {
796 VkRect2D render_area;
797 uint32_t buffer_cpp[MAX_RTS + 2];
798 uint32_t buffer_count;
799
800 /* position and size of the first tile */
801 VkRect2D tile0;
802 /* number of tiles */
803 VkExtent2D tile_count;
804
805 uint32_t gmem_offsets[MAX_RTS + 2];
806
807 /* size of the first VSC pipe */
808 VkExtent2D pipe0;
809 /* number of VSC pipes */
810 VkExtent2D pipe_count;
811
812 /* pipe register values */
813 uint32_t pipe_config[MAX_VSC_PIPES];
814 uint32_t pipe_sizes[MAX_VSC_PIPES];
815 };
816
817 enum tu_cmd_dirty_bits
818 {
819 TU_CMD_DIRTY_PIPELINE = 1 << 0,
820 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1,
821 TU_CMD_DIRTY_DESCRIPTOR_SETS = 1 << 2,
822
823 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
824 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
825 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18,
826 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19,
827 };
828
829 struct tu_cmd_state
830 {
831 uint32_t dirty;
832
833 struct tu_pipeline *pipeline;
834
835 /* Vertex buffers */
836 struct
837 {
838 struct tu_buffer *buffers[MAX_VBS];
839 VkDeviceSize offsets[MAX_VBS];
840 } vb;
841
842 struct tu_dynamic_state dynamic;
843
844 /* Index buffer */
845 struct tu_buffer *index_buffer;
846 uint64_t index_offset;
847 uint32_t index_type;
848 uint32_t max_index_count;
849 uint64_t index_va;
850
851 const struct tu_render_pass *pass;
852 const struct tu_subpass *subpass;
853 const struct tu_framebuffer *framebuffer;
854 struct tu_attachment_state *attachments;
855
856 struct tu_tiling_config tiling_config;
857
858 struct tu_cs_entry tile_load_ib;
859 struct tu_cs_entry tile_store_ib;
860 };
861
862 struct tu_cmd_pool
863 {
864 VkAllocationCallbacks alloc;
865 struct list_head cmd_buffers;
866 struct list_head free_cmd_buffers;
867 uint32_t queue_family_index;
868 };
869
870 struct tu_cmd_buffer_upload
871 {
872 uint8_t *map;
873 unsigned offset;
874 uint64_t size;
875 struct list_head list;
876 };
877
878 enum tu_cmd_buffer_status
879 {
880 TU_CMD_BUFFER_STATUS_INVALID,
881 TU_CMD_BUFFER_STATUS_INITIAL,
882 TU_CMD_BUFFER_STATUS_RECORDING,
883 TU_CMD_BUFFER_STATUS_EXECUTABLE,
884 TU_CMD_BUFFER_STATUS_PENDING,
885 };
886
887 struct tu_bo_list
888 {
889 uint32_t count;
890 uint32_t capacity;
891 struct drm_msm_gem_submit_bo *bo_infos;
892 };
893
894 #define TU_BO_LIST_FAILED (~0)
895
896 void
897 tu_bo_list_init(struct tu_bo_list *list);
898 void
899 tu_bo_list_destroy(struct tu_bo_list *list);
900 void
901 tu_bo_list_reset(struct tu_bo_list *list);
902 uint32_t
903 tu_bo_list_add(struct tu_bo_list *list,
904 const struct tu_bo *bo,
905 uint32_t flags);
906 VkResult
907 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
908
909 struct tu_cmd_buffer
910 {
911 VK_LOADER_DATA _loader_data;
912
913 struct tu_device *device;
914
915 struct tu_cmd_pool *pool;
916 struct list_head pool_link;
917
918 VkCommandBufferUsageFlags usage_flags;
919 VkCommandBufferLevel level;
920 enum tu_cmd_buffer_status status;
921
922 struct tu_cmd_state state;
923 struct tu_vertex_binding vertex_bindings[MAX_VBS];
924 uint32_t queue_family_index;
925
926 uint32_t push_constants[MAX_PUSH_CONSTANTS_SIZE / 4];
927 VkShaderStageFlags push_constant_stages;
928 struct tu_descriptor_set meta_push_descriptors;
929
930 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
931
932 struct tu_cmd_buffer_upload upload;
933
934 VkResult record_result;
935
936 struct tu_bo_list bo_list;
937 struct tu_cs cs;
938 struct tu_cs draw_cs;
939 struct tu_cs draw_state;
940 struct tu_cs tile_cs;
941
942 uint16_t marker_reg;
943 uint32_t marker_seqno;
944
945 struct tu_bo scratch_bo;
946 uint32_t scratch_seqno;
947
948 bool wait_for_idle;
949 };
950
951 void
952 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
953 struct tu_cs *cs,
954 enum vgt_event_type event,
955 bool need_seqno);
956
957 bool
958 tu_get_memory_fd(struct tu_device *device,
959 struct tu_device_memory *memory,
960 int *pFD);
961
962 static inline struct tu_descriptor_state *
963 tu_get_descriptors_state(struct tu_cmd_buffer *cmd_buffer,
964 VkPipelineBindPoint bind_point)
965 {
966 return &cmd_buffer->descriptors[bind_point];
967 }
968
969 /*
970 * Takes x,y,z as exact numbers of invocations, instead of blocks.
971 *
972 * Limitations: Can't call normal dispatch functions without binding or
973 * rebinding
974 * the compute pipeline.
975 */
976 void
977 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
978 uint32_t x,
979 uint32_t y,
980 uint32_t z);
981
982 struct tu_event
983 {
984 struct tu_bo bo;
985 };
986
987 struct tu_shader_module;
988
989 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
990 #define TU_HASH_SHADER_SISCHED (1 << 1)
991 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
992 void
993 tu_hash_shaders(unsigned char *hash,
994 const VkPipelineShaderStageCreateInfo **stages,
995 const struct tu_pipeline_layout *layout,
996 const struct tu_pipeline_key *key,
997 uint32_t flags);
998
999 static inline gl_shader_stage
1000 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1001 {
1002 assert(__builtin_popcount(vk_stage) == 1);
1003 return ffs(vk_stage) - 1;
1004 }
1005
1006 static inline VkShaderStageFlagBits
1007 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1008 {
1009 return (1 << mesa_stage);
1010 }
1011
1012 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1013
1014 #define tu_foreach_stage(stage, stage_bits) \
1015 for (gl_shader_stage stage, \
1016 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1017 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1018
1019 struct tu_shader_module
1020 {
1021 unsigned char sha1[20];
1022
1023 uint32_t code_size;
1024 const uint32_t *code[0];
1025 };
1026
1027 struct tu_shader_compile_options
1028 {
1029 struct ir3_shader_key key;
1030
1031 bool optimize;
1032 bool include_binning_pass;
1033 };
1034
1035 struct tu_descriptor_map
1036 {
1037 /* TODO: avoid fixed size array/justify the size */
1038 unsigned num;
1039 int set[64];
1040 int binding[64];
1041 };
1042
1043 struct tu_shader
1044 {
1045 struct ir3_shader ir3_shader;
1046
1047 struct tu_descriptor_map texture_map;
1048 struct tu_descriptor_map sampler_map;
1049 struct tu_descriptor_map ubo_map;
1050 struct tu_descriptor_map ssbo_map;
1051
1052 /* This may be true for vertex shaders. When true, variants[1] is the
1053 * binning variant and binning_binary is non-NULL.
1054 */
1055 bool has_binning_pass;
1056
1057 void *binary;
1058 void *binning_binary;
1059
1060 struct ir3_shader_variant variants[0];
1061 };
1062
1063 struct tu_shader *
1064 tu_shader_create(struct tu_device *dev,
1065 gl_shader_stage stage,
1066 const VkPipelineShaderStageCreateInfo *stage_info,
1067 const VkAllocationCallbacks *alloc);
1068
1069 void
1070 tu_shader_destroy(struct tu_device *dev,
1071 struct tu_shader *shader,
1072 const VkAllocationCallbacks *alloc);
1073
1074 void
1075 tu_shader_compile_options_init(
1076 struct tu_shader_compile_options *options,
1077 const VkGraphicsPipelineCreateInfo *pipeline_info);
1078
1079 VkResult
1080 tu_shader_compile(struct tu_device *dev,
1081 struct tu_shader *shader,
1082 const struct tu_shader *next_stage,
1083 const struct tu_shader_compile_options *options,
1084 const VkAllocationCallbacks *alloc);
1085
1086 struct tu_program_descriptor_linkage
1087 {
1088 struct ir3_ubo_analysis_state ubo_state;
1089 struct ir3_const_state const_state;
1090
1091 uint32_t constlen;
1092
1093 struct tu_descriptor_map texture_map;
1094 struct tu_descriptor_map sampler_map;
1095 struct tu_descriptor_map ubo_map;
1096 struct tu_descriptor_map ssbo_map;
1097 struct ir3_ibo_mapping image_mapping;
1098 };
1099
1100 struct tu_pipeline
1101 {
1102 struct tu_cs cs;
1103
1104 struct tu_dynamic_state dynamic_state;
1105
1106 struct tu_pipeline_layout *layout;
1107
1108 bool need_indirect_descriptor_sets;
1109 VkShaderStageFlags active_stages;
1110
1111 struct
1112 {
1113 struct tu_bo binary_bo;
1114 struct tu_cs_entry state_ib;
1115 struct tu_cs_entry binning_state_ib;
1116
1117 struct tu_program_descriptor_linkage link[MESA_SHADER_STAGES];
1118 } program;
1119
1120 struct
1121 {
1122 uint8_t bindings[MAX_VERTEX_ATTRIBS];
1123 uint16_t strides[MAX_VERTEX_ATTRIBS];
1124 uint16_t offsets[MAX_VERTEX_ATTRIBS];
1125 uint32_t count;
1126
1127 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS];
1128 uint16_t binning_strides[MAX_VERTEX_ATTRIBS];
1129 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS];
1130 uint32_t binning_count;
1131
1132 struct tu_cs_entry state_ib;
1133 struct tu_cs_entry binning_state_ib;
1134 } vi;
1135
1136 struct
1137 {
1138 enum pc_di_primtype primtype;
1139 bool primitive_restart;
1140 } ia;
1141
1142 struct
1143 {
1144 struct tu_cs_entry state_ib;
1145 } vp;
1146
1147 struct
1148 {
1149 uint32_t gras_su_cntl;
1150 struct tu_cs_entry state_ib;
1151 } rast;
1152
1153 struct
1154 {
1155 struct tu_cs_entry state_ib;
1156 } ds;
1157
1158 struct
1159 {
1160 struct tu_cs_entry state_ib;
1161 } blend;
1162 };
1163
1164 void
1165 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1166
1167 void
1168 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1169
1170 void
1171 tu6_emit_gras_su_cntl(struct tu_cs *cs,
1172 uint32_t gras_su_cntl,
1173 float line_width);
1174
1175 void
1176 tu6_emit_depth_bias(struct tu_cs *cs,
1177 float constant_factor,
1178 float clamp,
1179 float slope_factor);
1180
1181 void
1182 tu6_emit_stencil_compare_mask(struct tu_cs *cs,
1183 uint32_t front,
1184 uint32_t back);
1185
1186 void
1187 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back);
1188
1189 void
1190 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back);
1191
1192 void
1193 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]);
1194
1195 struct tu_userdata_info *
1196 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1197 gl_shader_stage stage,
1198 int idx);
1199
1200 struct tu_shader_variant *
1201 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1202
1203 struct tu_graphics_pipeline_create_info
1204 {
1205 bool use_rectlist;
1206 bool db_depth_clear;
1207 bool db_stencil_clear;
1208 bool db_depth_disable_expclear;
1209 bool db_stencil_disable_expclear;
1210 bool db_flush_depth_inplace;
1211 bool db_flush_stencil_inplace;
1212 bool db_resummarize;
1213 uint32_t custom_blend_mode;
1214 };
1215
1216 struct tu_native_format
1217 {
1218 int vtx; /* VFMTn_xxx or -1 */
1219 int tex; /* TFMTn_xxx or -1 */
1220 int rb; /* RBn_xxx or -1 */
1221 int swap; /* enum a3xx_color_swap */
1222 bool present; /* internal only; always true to external users */
1223 };
1224
1225 const struct tu_native_format *
1226 tu6_get_native_format(VkFormat format);
1227
1228 void
1229 tu_pack_clear_value(const VkClearValue *val,
1230 VkFormat format,
1231 uint32_t buf[4]);
1232
1233 void
1234 tu_2d_clear_color(const VkClearColorValue *val, VkFormat format, uint32_t buf[4]);
1235
1236 void
1237 tu_2d_clear_zs(const VkClearDepthStencilValue *val, VkFormat format, uint32_t buf[4]);
1238
1239 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1240 enum a6xx_depth_format tu6_pipe2depth(VkFormat format);
1241
1242 struct tu_image_level
1243 {
1244 VkDeviceSize offset;
1245 VkDeviceSize size;
1246 uint32_t pitch;
1247 };
1248
1249 struct tu_image
1250 {
1251 VkImageType type;
1252 /* The original VkFormat provided by the client. This may not match any
1253 * of the actual surface formats.
1254 */
1255 VkFormat vk_format;
1256 VkImageAspectFlags aspects;
1257 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1258 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1259 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1260 VkExtent3D extent;
1261 uint32_t level_count;
1262 uint32_t layer_count;
1263 VkSampleCountFlagBits samples;
1264
1265
1266 VkDeviceSize size;
1267 uint32_t alignment;
1268
1269 /* memory layout */
1270 VkDeviceSize layer_size;
1271 struct tu_image_level levels[15];
1272 unsigned tile_mode;
1273 unsigned cpp;
1274 struct tu_image_level ubwc_levels[15];
1275 uint32_t ubwc_size;
1276
1277 unsigned queue_family_mask;
1278 bool exclusive;
1279 bool shareable;
1280
1281 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1282 VkDeviceMemory owned_memory;
1283
1284 /* Set when bound */
1285 struct tu_bo *bo;
1286 VkDeviceSize bo_offset;
1287 };
1288
1289 unsigned
1290 tu_image_queue_family_mask(const struct tu_image *image,
1291 uint32_t family,
1292 uint32_t queue_family);
1293
1294 static inline uint32_t
1295 tu_get_layerCount(const struct tu_image *image,
1296 const VkImageSubresourceRange *range)
1297 {
1298 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1299 ? image->layer_count - range->baseArrayLayer
1300 : range->layerCount;
1301 }
1302
1303 static inline uint32_t
1304 tu_get_levelCount(const struct tu_image *image,
1305 const VkImageSubresourceRange *range)
1306 {
1307 return range->levelCount == VK_REMAINING_MIP_LEVELS
1308 ? image->level_count - range->baseMipLevel
1309 : range->levelCount;
1310 }
1311
1312 static inline VkDeviceSize
1313 tu_layer_size(struct tu_image *image, int level)
1314 {
1315 if (image->type == VK_IMAGE_TYPE_3D)
1316 return image->levels[level].size;
1317 return image->layer_size;
1318 }
1319
1320 static inline uint32_t
1321 tu_image_stride(struct tu_image *image, int level)
1322 {
1323 return image->levels[level].pitch * image->cpp;
1324 }
1325
1326 static inline uint64_t
1327 tu_image_base(struct tu_image *image, int level, int layer)
1328 {
1329 return image->bo->iova + image->bo_offset + image->levels[level].offset +
1330 layer * tu_layer_size(image, level);
1331 }
1332
1333 static inline VkDeviceSize
1334 tu_image_ubwc_size(struct tu_image *image, int level)
1335 {
1336 return image->ubwc_size;
1337 }
1338
1339 static inline uint32_t
1340 tu_image_ubwc_pitch(struct tu_image *image, int level)
1341 {
1342 return image->ubwc_levels[level].pitch;
1343 }
1344
1345 static inline uint64_t
1346 tu_image_ubwc_base(struct tu_image *image, int level, int layer)
1347 {
1348 return image->bo->iova + image->bo_offset + image->ubwc_levels[level].offset +
1349 layer * tu_image_ubwc_size(image, level);
1350 }
1351
1352 enum a6xx_tile_mode
1353 tu6_get_image_tile_mode(struct tu_image *image, int level);
1354 enum a3xx_msaa_samples
1355 tu_msaa_samples(uint32_t samples);
1356
1357 struct tu_image_view
1358 {
1359 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1360
1361 VkImageViewType type;
1362 VkImageAspectFlags aspect_mask;
1363 VkFormat vk_format;
1364 uint32_t base_layer;
1365 uint32_t layer_count;
1366 uint32_t base_mip;
1367 uint32_t level_count;
1368 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1369
1370 uint32_t descriptor[A6XX_TEX_CONST_DWORDS];
1371
1372 /* Descriptor for use as a storage image as opposed to a sampled image.
1373 * This has a few differences for cube maps (e.g. type).
1374 */
1375 uint32_t storage_descriptor[A6XX_TEX_CONST_DWORDS];
1376 };
1377
1378 struct tu_sampler
1379 {
1380 uint32_t state[A6XX_TEX_SAMP_DWORDS];
1381
1382 bool needs_border;
1383 };
1384
1385 VkResult
1386 tu_image_create(VkDevice _device,
1387 const VkImageCreateInfo *pCreateInfo,
1388 const VkAllocationCallbacks *alloc,
1389 VkImage *pImage,
1390 uint64_t modifier);
1391
1392 VkResult
1393 tu_image_from_gralloc(VkDevice device_h,
1394 const VkImageCreateInfo *base_info,
1395 const VkNativeBufferANDROID *gralloc_info,
1396 const VkAllocationCallbacks *alloc,
1397 VkImage *out_image_h);
1398
1399 void
1400 tu_image_view_init(struct tu_image_view *view,
1401 struct tu_device *device,
1402 const VkImageViewCreateInfo *pCreateInfo);
1403
1404 struct tu_buffer_view
1405 {
1406 VkFormat vk_format;
1407 uint64_t range; /**< VkBufferViewCreateInfo::range */
1408 uint32_t state[4];
1409 };
1410 void
1411 tu_buffer_view_init(struct tu_buffer_view *view,
1412 struct tu_device *device,
1413 const VkBufferViewCreateInfo *pCreateInfo);
1414
1415 static inline struct VkExtent3D
1416 tu_sanitize_image_extent(const VkImageType imageType,
1417 const struct VkExtent3D imageExtent)
1418 {
1419 switch (imageType) {
1420 case VK_IMAGE_TYPE_1D:
1421 return (VkExtent3D) { imageExtent.width, 1, 1 };
1422 case VK_IMAGE_TYPE_2D:
1423 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1424 case VK_IMAGE_TYPE_3D:
1425 return imageExtent;
1426 default:
1427 unreachable("invalid image type");
1428 }
1429 }
1430
1431 static inline struct VkOffset3D
1432 tu_sanitize_image_offset(const VkImageType imageType,
1433 const struct VkOffset3D imageOffset)
1434 {
1435 switch (imageType) {
1436 case VK_IMAGE_TYPE_1D:
1437 return (VkOffset3D) { imageOffset.x, 0, 0 };
1438 case VK_IMAGE_TYPE_2D:
1439 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1440 case VK_IMAGE_TYPE_3D:
1441 return imageOffset;
1442 default:
1443 unreachable("invalid image type");
1444 }
1445 }
1446
1447 struct tu_attachment_info
1448 {
1449 struct tu_image_view *attachment;
1450 };
1451
1452 struct tu_framebuffer
1453 {
1454 uint32_t width;
1455 uint32_t height;
1456 uint32_t layers;
1457
1458 uint32_t attachment_count;
1459 struct tu_attachment_info attachments[0];
1460 };
1461
1462 struct tu_subpass_barrier
1463 {
1464 VkPipelineStageFlags src_stage_mask;
1465 VkAccessFlags src_access_mask;
1466 VkAccessFlags dst_access_mask;
1467 };
1468
1469 void
1470 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1471 const struct tu_subpass_barrier *barrier);
1472
1473 struct tu_subpass_attachment
1474 {
1475 uint32_t attachment;
1476 VkImageLayout layout;
1477 };
1478
1479 struct tu_subpass
1480 {
1481 uint32_t input_count;
1482 uint32_t color_count;
1483 struct tu_subpass_attachment *input_attachments;
1484 struct tu_subpass_attachment *color_attachments;
1485 struct tu_subpass_attachment *resolve_attachments;
1486 struct tu_subpass_attachment depth_stencil_attachment;
1487
1488 /** Subpass has at least one resolve attachment */
1489 bool has_resolve;
1490
1491 struct tu_subpass_barrier start_barrier;
1492
1493 uint32_t view_mask;
1494 VkSampleCountFlagBits max_sample_count;
1495 };
1496
1497 struct tu_render_pass_attachment
1498 {
1499 VkFormat format;
1500 uint32_t samples;
1501 VkAttachmentLoadOp load_op;
1502 VkAttachmentLoadOp stencil_load_op;
1503 VkImageLayout initial_layout;
1504 VkImageLayout final_layout;
1505 uint32_t view_mask;
1506 };
1507
1508 struct tu_render_pass
1509 {
1510 uint32_t attachment_count;
1511 uint32_t subpass_count;
1512 struct tu_subpass_attachment *subpass_attachments;
1513 struct tu_render_pass_attachment *attachments;
1514 struct tu_subpass_barrier end_barrier;
1515 struct tu_subpass subpasses[0];
1516 };
1517
1518 VkResult
1519 tu_device_init_meta(struct tu_device *device);
1520 void
1521 tu_device_finish_meta(struct tu_device *device);
1522
1523 struct tu_query_pool
1524 {
1525 uint32_t stride;
1526 uint32_t availability_offset;
1527 uint64_t size;
1528 char *ptr;
1529 VkQueryType type;
1530 uint32_t pipeline_stats_mask;
1531 };
1532
1533 struct tu_semaphore
1534 {
1535 uint32_t syncobj;
1536 uint32_t temp_syncobj;
1537 };
1538
1539 void
1540 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1541 VkPipelineBindPoint bind_point,
1542 struct tu_descriptor_set *set,
1543 unsigned idx);
1544
1545 void
1546 tu_update_descriptor_sets(struct tu_device *device,
1547 struct tu_cmd_buffer *cmd_buffer,
1548 VkDescriptorSet overrideSet,
1549 uint32_t descriptorWriteCount,
1550 const VkWriteDescriptorSet *pDescriptorWrites,
1551 uint32_t descriptorCopyCount,
1552 const VkCopyDescriptorSet *pDescriptorCopies);
1553
1554 void
1555 tu_update_descriptor_set_with_template(
1556 struct tu_device *device,
1557 struct tu_cmd_buffer *cmd_buffer,
1558 struct tu_descriptor_set *set,
1559 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1560 const void *pData);
1561
1562 void
1563 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1564 VkPipelineBindPoint pipelineBindPoint,
1565 VkPipelineLayout _layout,
1566 uint32_t set,
1567 uint32_t descriptorWriteCount,
1568 const VkWriteDescriptorSet *pDescriptorWrites);
1569
1570 int
1571 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1572
1573 int
1574 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1575
1576 int
1577 tu_drm_submitqueue_new(const struct tu_device *dev,
1578 int priority,
1579 uint32_t *queue_id);
1580
1581 void
1582 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1583
1584 uint32_t
1585 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1586 uint32_t
1587 tu_gem_import_dmabuf(const struct tu_device *dev,
1588 int prime_fd,
1589 uint64_t size);
1590 int
1591 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1592 void
1593 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1594 uint64_t
1595 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1596 uint64_t
1597 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1598
1599 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1600 \
1601 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1602 { \
1603 return (struct __tu_type *) _handle; \
1604 } \
1605 \
1606 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1607 { \
1608 return (__VkType) _obj; \
1609 }
1610
1611 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1612 \
1613 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1614 { \
1615 return (struct __tu_type *) (uintptr_t) _handle; \
1616 } \
1617 \
1618 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1619 { \
1620 return (__VkType)(uintptr_t) _obj; \
1621 }
1622
1623 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1624 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1625
1626 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1627 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1628 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1629 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1630 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1631
1632 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1633 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1634 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1635 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1636 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1637 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1638 VkDescriptorSetLayout)
1639 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1640 VkDescriptorUpdateTemplate)
1641 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1642 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1643 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1644 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1645 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1646 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1647 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1648 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1649 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1650 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1651 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1652 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1653 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1654 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1655
1656 #endif /* TU_PRIVATE_H */