turnip: add hw binning
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x) ((void)0)
44 #endif
45
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
50 #include "vk_alloc.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
53
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
57
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
60 #include "a6xx.xml.h"
61
62 #include "tu_descriptor_set.h"
63 #include "tu_extensions.h"
64
65 /* Pre-declarations needed for WSI entrypoints */
66 struct wl_surface;
67 struct wl_display;
68 typedef struct xcb_connection_t xcb_connection_t;
69 typedef uint32_t xcb_visualid_t;
70 typedef uint32_t xcb_window_t;
71
72 #include <vulkan/vk_android_native_buffer.h>
73 #include <vulkan/vk_icd.h>
74 #include <vulkan/vulkan.h>
75 #include <vulkan/vulkan_intel.h>
76
77 #include "tu_entrypoints.h"
78
79 #define MAX_VBS 32
80 #define MAX_VERTEX_ATTRIBS 32
81 #define MAX_RTS 8
82 #define MAX_VSC_PIPES 32
83 #define MAX_VIEWPORTS 1
84 #define MAX_SCISSORS 16
85 #define MAX_DISCARD_RECTANGLES 4
86 #define MAX_PUSH_CONSTANTS_SIZE 128
87 #define MAX_PUSH_DESCRIPTORS 32
88 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
89 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
90 #define MAX_DYNAMIC_BUFFERS \
91 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
92 #define MAX_SAMPLES_LOG2 4
93 #define NUM_META_FS_KEYS 13
94 #define TU_MAX_DRM_DEVICES 8
95 #define MAX_VIEWS 8
96 /* The Qualcomm driver exposes 0x20000058 */
97 #define MAX_STORAGE_BUFFER_RANGE 0x20000000
98
99 #define NUM_DEPTH_CLEAR_PIPELINES 3
100
101 /*
102 * This is the point we switch from using CP to compute shader
103 * for certain buffer operations.
104 */
105 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
106
107 #define A6XX_TEX_CONST_DWORDS 16
108 #define A6XX_TEX_SAMP_DWORDS 4
109
110 enum tu_mem_heap
111 {
112 TU_MEM_HEAP_VRAM,
113 TU_MEM_HEAP_VRAM_CPU_ACCESS,
114 TU_MEM_HEAP_GTT,
115 TU_MEM_HEAP_COUNT
116 };
117
118 enum tu_mem_type
119 {
120 TU_MEM_TYPE_VRAM,
121 TU_MEM_TYPE_GTT_WRITE_COMBINE,
122 TU_MEM_TYPE_VRAM_CPU_ACCESS,
123 TU_MEM_TYPE_GTT_CACHED,
124 TU_MEM_TYPE_COUNT
125 };
126
127 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
128
129 static inline uint32_t
130 align_u32(uint32_t v, uint32_t a)
131 {
132 assert(a != 0 && a == (a & -a));
133 return (v + a - 1) & ~(a - 1);
134 }
135
136 static inline uint32_t
137 align_u32_npot(uint32_t v, uint32_t a)
138 {
139 return (v + a - 1) / a * a;
140 }
141
142 static inline uint64_t
143 align_u64(uint64_t v, uint64_t a)
144 {
145 assert(a != 0 && a == (a & -a));
146 return (v + a - 1) & ~(a - 1);
147 }
148
149 static inline int32_t
150 align_i32(int32_t v, int32_t a)
151 {
152 assert(a != 0 && a == (a & -a));
153 return (v + a - 1) & ~(a - 1);
154 }
155
156 /** Alignment must be a power of 2. */
157 static inline bool
158 tu_is_aligned(uintmax_t n, uintmax_t a)
159 {
160 assert(a == (a & -a));
161 return (n & (a - 1)) == 0;
162 }
163
164 static inline uint32_t
165 round_up_u32(uint32_t v, uint32_t a)
166 {
167 return (v + a - 1) / a;
168 }
169
170 static inline uint64_t
171 round_up_u64(uint64_t v, uint64_t a)
172 {
173 return (v + a - 1) / a;
174 }
175
176 static inline uint32_t
177 tu_minify(uint32_t n, uint32_t levels)
178 {
179 if (unlikely(n == 0))
180 return 0;
181 else
182 return MAX2(n >> levels, 1);
183 }
184 static inline float
185 tu_clamp_f(float f, float min, float max)
186 {
187 assert(min < max);
188
189 if (f > max)
190 return max;
191 else if (f < min)
192 return min;
193 else
194 return f;
195 }
196
197 static inline bool
198 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
199 {
200 if (*inout_mask & clear_mask) {
201 *inout_mask &= ~clear_mask;
202 return true;
203 } else {
204 return false;
205 }
206 }
207
208 #define for_each_bit(b, dword) \
209 for (uint32_t __dword = (dword); \
210 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
211
212 #define typed_memcpy(dest, src, count) \
213 ({ \
214 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
215 memcpy((dest), (src), (count) * sizeof(*(src))); \
216 })
217
218 #define COND(bool, val) ((bool) ? (val) : 0)
219
220 /* Whenever we generate an error, pass it through this function. Useful for
221 * debugging, where we can break on it. Only call at error site, not when
222 * propagating errors. Might be useful to plug in a stack trace here.
223 */
224
225 struct tu_instance;
226
227 VkResult
228 __vk_errorf(struct tu_instance *instance,
229 VkResult error,
230 const char *file,
231 int line,
232 const char *format,
233 ...);
234
235 #define vk_error(instance, error) \
236 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
237 #define vk_errorf(instance, error, format, ...) \
238 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
239
240 void
241 __tu_finishme(const char *file, int line, const char *format, ...)
242 tu_printflike(3, 4);
243 void
244 tu_loge(const char *format, ...) tu_printflike(1, 2);
245 void
246 tu_loge_v(const char *format, va_list va);
247 void
248 tu_logi(const char *format, ...) tu_printflike(1, 2);
249 void
250 tu_logi_v(const char *format, va_list va);
251
252 /**
253 * Print a FINISHME message, including its source location.
254 */
255 #define tu_finishme(format, ...) \
256 do { \
257 static bool reported = false; \
258 if (!reported) { \
259 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
260 reported = true; \
261 } \
262 } while (0)
263
264 /* A non-fatal assert. Useful for debugging. */
265 #ifdef DEBUG
266 #define tu_assert(x) \
267 ({ \
268 if (unlikely(!(x))) \
269 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
270 })
271 #else
272 #define tu_assert(x)
273 #endif
274
275 /* Suppress -Wunused in stub functions */
276 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
277 static inline void
278 __tu_use_args(int ignore, ...)
279 {
280 }
281
282 #define tu_stub() \
283 do { \
284 tu_finishme("stub %s", __func__); \
285 } while (0)
286
287 void *
288 tu_lookup_entrypoint_unchecked(const char *name);
289 void *
290 tu_lookup_entrypoint_checked(
291 const char *name,
292 uint32_t core_version,
293 const struct tu_instance_extension_table *instance,
294 const struct tu_device_extension_table *device);
295
296 struct tu_physical_device
297 {
298 VK_LOADER_DATA _loader_data;
299
300 struct tu_instance *instance;
301
302 char path[20];
303 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
304 uint8_t driver_uuid[VK_UUID_SIZE];
305 uint8_t device_uuid[VK_UUID_SIZE];
306 uint8_t cache_uuid[VK_UUID_SIZE];
307
308 struct wsi_device wsi_device;
309
310 int local_fd;
311 int master_fd;
312
313 unsigned gpu_id;
314 uint32_t gmem_size;
315 uint32_t tile_align_w;
316 uint32_t tile_align_h;
317
318 /* This is the drivers on-disk cache used as a fallback as opposed to
319 * the pipeline cache defined by apps.
320 */
321 struct disk_cache *disk_cache;
322
323 struct tu_device_extension_table supported_extensions;
324 };
325
326 enum tu_debug_flags
327 {
328 TU_DEBUG_STARTUP = 1 << 0,
329 TU_DEBUG_NIR = 1 << 1,
330 TU_DEBUG_IR3 = 1 << 2,
331 TU_DEBUG_NOBIN = 1 << 3,
332 };
333
334 struct tu_instance
335 {
336 VK_LOADER_DATA _loader_data;
337
338 VkAllocationCallbacks alloc;
339
340 uint32_t api_version;
341 int physical_device_count;
342 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
343
344 enum tu_debug_flags debug_flags;
345
346 struct vk_debug_report_instance debug_report_callbacks;
347
348 struct tu_instance_extension_table enabled_extensions;
349 };
350
351 VkResult
352 tu_wsi_init(struct tu_physical_device *physical_device);
353 void
354 tu_wsi_finish(struct tu_physical_device *physical_device);
355
356 bool
357 tu_instance_extension_supported(const char *name);
358 uint32_t
359 tu_physical_device_api_version(struct tu_physical_device *dev);
360 bool
361 tu_physical_device_extension_supported(struct tu_physical_device *dev,
362 const char *name);
363
364 struct cache_entry;
365
366 struct tu_pipeline_cache
367 {
368 struct tu_device *device;
369 pthread_mutex_t mutex;
370
371 uint32_t total_size;
372 uint32_t table_size;
373 uint32_t kernel_count;
374 struct cache_entry **hash_table;
375 bool modified;
376
377 VkAllocationCallbacks alloc;
378 };
379
380 struct tu_pipeline_key
381 {
382 };
383
384 void
385 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
386 struct tu_device *device);
387 void
388 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
389 void
390 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
391 const void *data,
392 size_t size);
393
394 struct tu_shader_variant;
395
396 bool
397 tu_create_shader_variants_from_pipeline_cache(
398 struct tu_device *device,
399 struct tu_pipeline_cache *cache,
400 const unsigned char *sha1,
401 struct tu_shader_variant **variants);
402
403 void
404 tu_pipeline_cache_insert_shaders(struct tu_device *device,
405 struct tu_pipeline_cache *cache,
406 const unsigned char *sha1,
407 struct tu_shader_variant **variants,
408 const void *const *codes,
409 const unsigned *code_sizes);
410
411 struct tu_meta_state
412 {
413 VkAllocationCallbacks alloc;
414
415 struct tu_pipeline_cache cache;
416 };
417
418 /* queue types */
419 #define TU_QUEUE_GENERAL 0
420
421 #define TU_MAX_QUEUE_FAMILIES 1
422
423 struct tu_fence
424 {
425 struct wsi_fence *fence_wsi;
426 bool signaled;
427 int fd;
428 };
429
430 void
431 tu_fence_init(struct tu_fence *fence, bool signaled);
432 void
433 tu_fence_finish(struct tu_fence *fence);
434 void
435 tu_fence_update_fd(struct tu_fence *fence, int fd);
436 void
437 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
438 void
439 tu_fence_signal(struct tu_fence *fence);
440 void
441 tu_fence_wait_idle(struct tu_fence *fence);
442
443 struct tu_queue
444 {
445 VK_LOADER_DATA _loader_data;
446 struct tu_device *device;
447 uint32_t queue_family_index;
448 int queue_idx;
449 VkDeviceQueueCreateFlags flags;
450
451 uint32_t msm_queue_id;
452 struct tu_fence submit_fence;
453 };
454
455 struct tu_device
456 {
457 VK_LOADER_DATA _loader_data;
458
459 VkAllocationCallbacks alloc;
460
461 struct tu_instance *instance;
462
463 struct tu_meta_state meta_state;
464
465 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
466 int queue_count[TU_MAX_QUEUE_FAMILIES];
467
468 struct tu_physical_device *physical_device;
469
470 struct ir3_compiler *compiler;
471
472 /* Backup in-memory cache to be used if the app doesn't provide one */
473 struct tu_pipeline_cache *mem_cache;
474
475 struct list_head shader_slabs;
476 mtx_t shader_slab_mutex;
477
478 struct tu_device_extension_table enabled_extensions;
479 };
480
481 struct tu_bo
482 {
483 uint32_t gem_handle;
484 uint64_t size;
485 uint64_t iova;
486 void *map;
487 };
488
489 VkResult
490 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
491 VkResult
492 tu_bo_init_dmabuf(struct tu_device *dev,
493 struct tu_bo *bo,
494 uint64_t size,
495 int fd);
496 int
497 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
498 void
499 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
500 VkResult
501 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
502
503 struct tu_cs_entry
504 {
505 /* No ownership */
506 const struct tu_bo *bo;
507
508 uint32_t size;
509 uint32_t offset;
510 };
511
512 struct ts_cs_memory {
513 uint32_t *map;
514 uint64_t iova;
515 };
516
517 enum tu_cs_mode
518 {
519
520 /*
521 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
522 * is full. tu_cs_begin must be called before command packet emission and
523 * tu_cs_end must be called after.
524 *
525 * This mode may create multiple entries internally. The entries must be
526 * submitted together.
527 */
528 TU_CS_MODE_GROW,
529
530 /*
531 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
532 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
533 * effect on it.
534 *
535 * This mode does not create any entry or any BO.
536 */
537 TU_CS_MODE_EXTERNAL,
538
539 /*
540 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
541 * command packet emission. tu_cs_begin_sub_stream must be called to get a
542 * sub-stream to emit comamnd packets to. When done with the sub-stream,
543 * tu_cs_end_sub_stream must be called.
544 *
545 * This mode does not create any entry internally.
546 */
547 TU_CS_MODE_SUB_STREAM,
548 };
549
550 struct tu_cs
551 {
552 uint32_t *start;
553 uint32_t *cur;
554 uint32_t *reserved_end;
555 uint32_t *end;
556
557 enum tu_cs_mode mode;
558 uint32_t next_bo_size;
559
560 struct tu_cs_entry *entries;
561 uint32_t entry_count;
562 uint32_t entry_capacity;
563
564 struct tu_bo **bos;
565 uint32_t bo_count;
566 uint32_t bo_capacity;
567 };
568
569 struct tu_device_memory
570 {
571 struct tu_bo bo;
572 VkDeviceSize size;
573
574 /* for dedicated allocations */
575 struct tu_image *image;
576 struct tu_buffer *buffer;
577
578 uint32_t type_index;
579 void *map;
580 void *user_ptr;
581 };
582
583 struct tu_descriptor_range
584 {
585 uint64_t va;
586 uint32_t size;
587 };
588
589 struct tu_descriptor_set
590 {
591 const struct tu_descriptor_set_layout *layout;
592 uint32_t size;
593
594 uint64_t va;
595 uint32_t *mapped_ptr;
596 struct tu_descriptor_range *dynamic_descriptors;
597
598 struct tu_bo *descriptors[0];
599 };
600
601 struct tu_push_descriptor_set
602 {
603 struct tu_descriptor_set set;
604 uint32_t capacity;
605 };
606
607 struct tu_descriptor_pool_entry
608 {
609 uint32_t offset;
610 uint32_t size;
611 struct tu_descriptor_set *set;
612 };
613
614 struct tu_descriptor_pool
615 {
616 struct tu_bo bo;
617 uint64_t current_offset;
618 uint64_t size;
619
620 uint8_t *host_memory_base;
621 uint8_t *host_memory_ptr;
622 uint8_t *host_memory_end;
623
624 uint32_t entry_count;
625 uint32_t max_entry_count;
626 struct tu_descriptor_pool_entry entries[0];
627 };
628
629 struct tu_descriptor_update_template_entry
630 {
631 VkDescriptorType descriptor_type;
632
633 /* The number of descriptors to update */
634 uint32_t descriptor_count;
635
636 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
637 */
638 uint32_t dst_offset;
639
640 /* In dwords. Not valid/used for dynamic descriptors */
641 uint32_t dst_stride;
642
643 uint32_t buffer_offset;
644
645 /* Only valid for combined image samplers and samplers */
646 uint16_t has_sampler;
647
648 /* In bytes */
649 size_t src_offset;
650 size_t src_stride;
651
652 /* For push descriptors */
653 const uint32_t *immutable_samplers;
654 };
655
656 struct tu_descriptor_update_template
657 {
658 uint32_t entry_count;
659 VkPipelineBindPoint bind_point;
660 struct tu_descriptor_update_template_entry entry[0];
661 };
662
663 struct tu_buffer
664 {
665 VkDeviceSize size;
666
667 VkBufferUsageFlags usage;
668 VkBufferCreateFlags flags;
669
670 struct tu_bo *bo;
671 VkDeviceSize bo_offset;
672 };
673
674 static inline uint64_t
675 tu_buffer_iova(struct tu_buffer *buffer)
676 {
677 return buffer->bo->iova + buffer->bo_offset;
678 }
679
680 enum tu_dynamic_state_bits
681 {
682 TU_DYNAMIC_VIEWPORT = 1 << 0,
683 TU_DYNAMIC_SCISSOR = 1 << 1,
684 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
685 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
686 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
687 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
688 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
689 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
690 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
691 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
692 TU_DYNAMIC_ALL = (1 << 10) - 1,
693 };
694
695 struct tu_vertex_binding
696 {
697 struct tu_buffer *buffer;
698 VkDeviceSize offset;
699 };
700
701 struct tu_viewport_state
702 {
703 uint32_t count;
704 VkViewport viewports[MAX_VIEWPORTS];
705 };
706
707 struct tu_scissor_state
708 {
709 uint32_t count;
710 VkRect2D scissors[MAX_SCISSORS];
711 };
712
713 struct tu_discard_rectangle_state
714 {
715 uint32_t count;
716 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
717 };
718
719 struct tu_dynamic_state
720 {
721 /**
722 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
723 * Defines the set of saved dynamic state.
724 */
725 uint32_t mask;
726
727 struct tu_viewport_state viewport;
728
729 struct tu_scissor_state scissor;
730
731 float line_width;
732
733 struct
734 {
735 float bias;
736 float clamp;
737 float slope;
738 } depth_bias;
739
740 float blend_constants[4];
741
742 struct
743 {
744 float min;
745 float max;
746 } depth_bounds;
747
748 struct
749 {
750 uint32_t front;
751 uint32_t back;
752 } stencil_compare_mask;
753
754 struct
755 {
756 uint32_t front;
757 uint32_t back;
758 } stencil_write_mask;
759
760 struct
761 {
762 uint32_t front;
763 uint32_t back;
764 } stencil_reference;
765
766 struct tu_discard_rectangle_state discard_rectangle;
767 };
768
769 extern const struct tu_dynamic_state default_dynamic_state;
770
771 const char *
772 tu_get_debug_option_name(int id);
773
774 const char *
775 tu_get_perftest_option_name(int id);
776
777 /**
778 * Attachment state when recording a renderpass instance.
779 *
780 * The clear value is valid only if there exists a pending clear.
781 */
782 struct tu_attachment_state
783 {
784 VkImageAspectFlags pending_clear_aspects;
785 uint32_t cleared_views;
786 VkClearValue clear_value;
787 VkImageLayout current_layout;
788 };
789
790 struct tu_descriptor_state
791 {
792 struct tu_descriptor_set *sets[MAX_SETS];
793 uint32_t dirty;
794 uint32_t valid;
795 struct tu_push_descriptor_set push_set;
796 bool push_dirty;
797 uint64_t dynamic_buffers[MAX_DYNAMIC_BUFFERS];
798 };
799
800 struct tu_tile
801 {
802 uint8_t pipe;
803 uint8_t slot;
804 VkOffset2D begin;
805 VkOffset2D end;
806 };
807
808 struct tu_tiling_config
809 {
810 VkRect2D render_area;
811 uint32_t buffer_cpp[MAX_RTS + 2];
812 uint32_t buffer_count;
813
814 /* position and size of the first tile */
815 VkRect2D tile0;
816 /* number of tiles */
817 VkExtent2D tile_count;
818
819 uint32_t gmem_offsets[MAX_RTS + 2];
820
821 /* size of the first VSC pipe */
822 VkExtent2D pipe0;
823 /* number of VSC pipes */
824 VkExtent2D pipe_count;
825
826 /* pipe register values */
827 uint32_t pipe_config[MAX_VSC_PIPES];
828 uint32_t pipe_sizes[MAX_VSC_PIPES];
829 };
830
831 enum tu_cmd_dirty_bits
832 {
833 TU_CMD_DIRTY_PIPELINE = 1 << 0,
834 TU_CMD_DIRTY_COMPUTE_PIPELINE = 1 << 1,
835 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 2,
836 TU_CMD_DIRTY_DESCRIPTOR_SETS = 1 << 3,
837
838 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
839 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
840 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18,
841 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19,
842 };
843
844 struct tu_cmd_state
845 {
846 uint32_t dirty;
847
848 struct tu_pipeline *pipeline;
849 struct tu_pipeline *compute_pipeline;
850
851 /* Vertex buffers */
852 struct
853 {
854 struct tu_buffer *buffers[MAX_VBS];
855 VkDeviceSize offsets[MAX_VBS];
856 } vb;
857
858 struct tu_dynamic_state dynamic;
859
860 /* Index buffer */
861 struct tu_buffer *index_buffer;
862 uint64_t index_offset;
863 uint32_t index_type;
864 uint32_t max_index_count;
865 uint64_t index_va;
866
867 const struct tu_render_pass *pass;
868 const struct tu_subpass *subpass;
869 const struct tu_framebuffer *framebuffer;
870 struct tu_attachment_state *attachments;
871
872 struct tu_tiling_config tiling_config;
873
874 struct tu_cs_entry tile_load_ib;
875 struct tu_cs_entry tile_store_ib;
876 };
877
878 struct tu_cmd_pool
879 {
880 VkAllocationCallbacks alloc;
881 struct list_head cmd_buffers;
882 struct list_head free_cmd_buffers;
883 uint32_t queue_family_index;
884 };
885
886 struct tu_cmd_buffer_upload
887 {
888 uint8_t *map;
889 unsigned offset;
890 uint64_t size;
891 struct list_head list;
892 };
893
894 enum tu_cmd_buffer_status
895 {
896 TU_CMD_BUFFER_STATUS_INVALID,
897 TU_CMD_BUFFER_STATUS_INITIAL,
898 TU_CMD_BUFFER_STATUS_RECORDING,
899 TU_CMD_BUFFER_STATUS_EXECUTABLE,
900 TU_CMD_BUFFER_STATUS_PENDING,
901 };
902
903 struct tu_bo_list
904 {
905 uint32_t count;
906 uint32_t capacity;
907 struct drm_msm_gem_submit_bo *bo_infos;
908 };
909
910 #define TU_BO_LIST_FAILED (~0)
911
912 void
913 tu_bo_list_init(struct tu_bo_list *list);
914 void
915 tu_bo_list_destroy(struct tu_bo_list *list);
916 void
917 tu_bo_list_reset(struct tu_bo_list *list);
918 uint32_t
919 tu_bo_list_add(struct tu_bo_list *list,
920 const struct tu_bo *bo,
921 uint32_t flags);
922 VkResult
923 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
924
925 struct tu_cmd_buffer
926 {
927 VK_LOADER_DATA _loader_data;
928
929 struct tu_device *device;
930
931 struct tu_cmd_pool *pool;
932 struct list_head pool_link;
933
934 VkCommandBufferUsageFlags usage_flags;
935 VkCommandBufferLevel level;
936 enum tu_cmd_buffer_status status;
937
938 struct tu_cmd_state state;
939 struct tu_vertex_binding vertex_bindings[MAX_VBS];
940 uint32_t queue_family_index;
941
942 uint32_t push_constants[MAX_PUSH_CONSTANTS_SIZE / 4];
943 VkShaderStageFlags push_constant_stages;
944 struct tu_descriptor_set meta_push_descriptors;
945
946 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
947
948 struct tu_cmd_buffer_upload upload;
949
950 VkResult record_result;
951
952 struct tu_bo_list bo_list;
953 struct tu_cs cs;
954 struct tu_cs draw_cs;
955 struct tu_cs draw_state;
956 struct tu_cs tile_cs;
957
958 uint16_t marker_reg;
959 uint32_t marker_seqno;
960
961 struct tu_bo scratch_bo;
962 uint32_t scratch_seqno;
963 #define VSC_OVERFLOW 0x8
964 #define VSC_SCRATCH 0x10
965
966 struct tu_bo vsc_data;
967 struct tu_bo vsc_data2;
968 uint32_t vsc_data_pitch;
969 uint32_t vsc_data2_pitch;
970 bool use_vsc_data;
971
972 bool wait_for_idle;
973 };
974
975 unsigned
976 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
977 struct tu_cs *cs,
978 enum vgt_event_type event,
979 bool need_seqno);
980
981 bool
982 tu_get_memory_fd(struct tu_device *device,
983 struct tu_device_memory *memory,
984 int *pFD);
985
986 static inline struct tu_descriptor_state *
987 tu_get_descriptors_state(struct tu_cmd_buffer *cmd_buffer,
988 VkPipelineBindPoint bind_point)
989 {
990 return &cmd_buffer->descriptors[bind_point];
991 }
992
993 /*
994 * Takes x,y,z as exact numbers of invocations, instead of blocks.
995 *
996 * Limitations: Can't call normal dispatch functions without binding or
997 * rebinding
998 * the compute pipeline.
999 */
1000 void
1001 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
1002 uint32_t x,
1003 uint32_t y,
1004 uint32_t z);
1005
1006 struct tu_event
1007 {
1008 struct tu_bo bo;
1009 };
1010
1011 struct tu_shader_module;
1012
1013 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
1014 #define TU_HASH_SHADER_SISCHED (1 << 1)
1015 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
1016 void
1017 tu_hash_shaders(unsigned char *hash,
1018 const VkPipelineShaderStageCreateInfo **stages,
1019 const struct tu_pipeline_layout *layout,
1020 const struct tu_pipeline_key *key,
1021 uint32_t flags);
1022
1023 static inline gl_shader_stage
1024 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1025 {
1026 assert(__builtin_popcount(vk_stage) == 1);
1027 return ffs(vk_stage) - 1;
1028 }
1029
1030 static inline VkShaderStageFlagBits
1031 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1032 {
1033 return (1 << mesa_stage);
1034 }
1035
1036 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1037
1038 #define tu_foreach_stage(stage, stage_bits) \
1039 for (gl_shader_stage stage, \
1040 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1041 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1042
1043 struct tu_shader_module
1044 {
1045 unsigned char sha1[20];
1046
1047 uint32_t code_size;
1048 const uint32_t *code[0];
1049 };
1050
1051 struct tu_shader_compile_options
1052 {
1053 struct ir3_shader_key key;
1054
1055 bool optimize;
1056 bool include_binning_pass;
1057 };
1058
1059 struct tu_descriptor_map
1060 {
1061 /* TODO: avoid fixed size array/justify the size */
1062 unsigned num;
1063 int set[64];
1064 int binding[64];
1065 };
1066
1067 struct tu_shader
1068 {
1069 struct ir3_shader ir3_shader;
1070
1071 struct tu_descriptor_map texture_map;
1072 struct tu_descriptor_map sampler_map;
1073 struct tu_descriptor_map ubo_map;
1074 struct tu_descriptor_map ssbo_map;
1075
1076 /* This may be true for vertex shaders. When true, variants[1] is the
1077 * binning variant and binning_binary is non-NULL.
1078 */
1079 bool has_binning_pass;
1080
1081 void *binary;
1082 void *binning_binary;
1083
1084 struct ir3_shader_variant variants[0];
1085 };
1086
1087 struct tu_shader *
1088 tu_shader_create(struct tu_device *dev,
1089 gl_shader_stage stage,
1090 const VkPipelineShaderStageCreateInfo *stage_info,
1091 const VkAllocationCallbacks *alloc);
1092
1093 void
1094 tu_shader_destroy(struct tu_device *dev,
1095 struct tu_shader *shader,
1096 const VkAllocationCallbacks *alloc);
1097
1098 void
1099 tu_shader_compile_options_init(
1100 struct tu_shader_compile_options *options,
1101 const VkGraphicsPipelineCreateInfo *pipeline_info);
1102
1103 VkResult
1104 tu_shader_compile(struct tu_device *dev,
1105 struct tu_shader *shader,
1106 const struct tu_shader *next_stage,
1107 const struct tu_shader_compile_options *options,
1108 const VkAllocationCallbacks *alloc);
1109
1110 struct tu_program_descriptor_linkage
1111 {
1112 struct ir3_ubo_analysis_state ubo_state;
1113 struct ir3_const_state const_state;
1114
1115 uint32_t constlen;
1116
1117 struct tu_descriptor_map texture_map;
1118 struct tu_descriptor_map sampler_map;
1119 struct tu_descriptor_map ubo_map;
1120 struct tu_descriptor_map ssbo_map;
1121 struct ir3_ibo_mapping image_mapping;
1122 };
1123
1124 struct tu_pipeline
1125 {
1126 struct tu_cs cs;
1127
1128 struct tu_dynamic_state dynamic_state;
1129
1130 struct tu_pipeline_layout *layout;
1131
1132 bool need_indirect_descriptor_sets;
1133 VkShaderStageFlags active_stages;
1134
1135 struct
1136 {
1137 struct tu_bo binary_bo;
1138 struct tu_cs_entry state_ib;
1139 struct tu_cs_entry binning_state_ib;
1140
1141 struct tu_program_descriptor_linkage link[MESA_SHADER_STAGES];
1142 } program;
1143
1144 struct
1145 {
1146 uint8_t bindings[MAX_VERTEX_ATTRIBS];
1147 uint16_t strides[MAX_VERTEX_ATTRIBS];
1148 uint16_t offsets[MAX_VERTEX_ATTRIBS];
1149 uint32_t count;
1150
1151 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS];
1152 uint16_t binning_strides[MAX_VERTEX_ATTRIBS];
1153 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS];
1154 uint32_t binning_count;
1155
1156 struct tu_cs_entry state_ib;
1157 struct tu_cs_entry binning_state_ib;
1158 } vi;
1159
1160 struct
1161 {
1162 enum pc_di_primtype primtype;
1163 bool primitive_restart;
1164 } ia;
1165
1166 struct
1167 {
1168 struct tu_cs_entry state_ib;
1169 } vp;
1170
1171 struct
1172 {
1173 uint32_t gras_su_cntl;
1174 struct tu_cs_entry state_ib;
1175 } rast;
1176
1177 struct
1178 {
1179 struct tu_cs_entry state_ib;
1180 } ds;
1181
1182 struct
1183 {
1184 struct tu_cs_entry state_ib;
1185 } blend;
1186
1187 struct
1188 {
1189 uint32_t local_size[3];
1190 } compute;
1191 };
1192
1193 void
1194 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1195
1196 void
1197 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1198
1199 void
1200 tu6_emit_gras_su_cntl(struct tu_cs *cs,
1201 uint32_t gras_su_cntl,
1202 float line_width);
1203
1204 void
1205 tu6_emit_depth_bias(struct tu_cs *cs,
1206 float constant_factor,
1207 float clamp,
1208 float slope_factor);
1209
1210 void
1211 tu6_emit_stencil_compare_mask(struct tu_cs *cs,
1212 uint32_t front,
1213 uint32_t back);
1214
1215 void
1216 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back);
1217
1218 void
1219 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back);
1220
1221 void
1222 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]);
1223
1224 struct tu_userdata_info *
1225 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1226 gl_shader_stage stage,
1227 int idx);
1228
1229 struct tu_shader_variant *
1230 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1231
1232 struct tu_graphics_pipeline_create_info
1233 {
1234 bool use_rectlist;
1235 bool db_depth_clear;
1236 bool db_stencil_clear;
1237 bool db_depth_disable_expclear;
1238 bool db_stencil_disable_expclear;
1239 bool db_flush_depth_inplace;
1240 bool db_flush_stencil_inplace;
1241 bool db_resummarize;
1242 uint32_t custom_blend_mode;
1243 };
1244
1245 struct tu_native_format
1246 {
1247 int vtx; /* VFMTn_xxx or -1 */
1248 int tex; /* TFMTn_xxx or -1 */
1249 int rb; /* RBn_xxx or -1 */
1250 int swap; /* enum a3xx_color_swap */
1251 bool present; /* internal only; always true to external users */
1252 };
1253
1254 const struct tu_native_format *
1255 tu6_get_native_format(VkFormat format);
1256
1257 void
1258 tu_pack_clear_value(const VkClearValue *val,
1259 VkFormat format,
1260 uint32_t buf[4]);
1261
1262 void
1263 tu_2d_clear_color(const VkClearColorValue *val, VkFormat format, uint32_t buf[4]);
1264
1265 void
1266 tu_2d_clear_zs(const VkClearDepthStencilValue *val, VkFormat format, uint32_t buf[4]);
1267
1268 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1269 enum a6xx_depth_format tu6_pipe2depth(VkFormat format);
1270
1271 struct tu_image_level
1272 {
1273 VkDeviceSize offset;
1274 VkDeviceSize size;
1275 uint32_t pitch;
1276 };
1277
1278 struct tu_image
1279 {
1280 VkImageType type;
1281 /* The original VkFormat provided by the client. This may not match any
1282 * of the actual surface formats.
1283 */
1284 VkFormat vk_format;
1285 VkImageAspectFlags aspects;
1286 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1287 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1288 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1289 VkExtent3D extent;
1290 uint32_t level_count;
1291 uint32_t layer_count;
1292 VkSampleCountFlagBits samples;
1293
1294
1295 VkDeviceSize size;
1296 uint32_t alignment;
1297
1298 /* memory layout */
1299 VkDeviceSize layer_size;
1300 struct tu_image_level levels[15];
1301 unsigned tile_mode;
1302 unsigned cpp;
1303 struct tu_image_level ubwc_levels[15];
1304 uint32_t ubwc_size;
1305
1306 unsigned queue_family_mask;
1307 bool exclusive;
1308 bool shareable;
1309
1310 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1311 VkDeviceMemory owned_memory;
1312
1313 /* Set when bound */
1314 struct tu_bo *bo;
1315 VkDeviceSize bo_offset;
1316 };
1317
1318 unsigned
1319 tu_image_queue_family_mask(const struct tu_image *image,
1320 uint32_t family,
1321 uint32_t queue_family);
1322
1323 static inline uint32_t
1324 tu_get_layerCount(const struct tu_image *image,
1325 const VkImageSubresourceRange *range)
1326 {
1327 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1328 ? image->layer_count - range->baseArrayLayer
1329 : range->layerCount;
1330 }
1331
1332 static inline uint32_t
1333 tu_get_levelCount(const struct tu_image *image,
1334 const VkImageSubresourceRange *range)
1335 {
1336 return range->levelCount == VK_REMAINING_MIP_LEVELS
1337 ? image->level_count - range->baseMipLevel
1338 : range->levelCount;
1339 }
1340
1341 static inline VkDeviceSize
1342 tu_layer_size(struct tu_image *image, int level)
1343 {
1344 if (image->type == VK_IMAGE_TYPE_3D)
1345 return image->levels[level].size;
1346 return image->layer_size;
1347 }
1348
1349 static inline uint32_t
1350 tu_image_stride(struct tu_image *image, int level)
1351 {
1352 return image->levels[level].pitch * image->cpp;
1353 }
1354
1355 static inline uint64_t
1356 tu_image_base(struct tu_image *image, int level, int layer)
1357 {
1358 return image->bo->iova + image->bo_offset + image->levels[level].offset +
1359 layer * tu_layer_size(image, level);
1360 }
1361
1362 static inline VkDeviceSize
1363 tu_image_ubwc_size(struct tu_image *image, int level)
1364 {
1365 return image->ubwc_size;
1366 }
1367
1368 static inline uint32_t
1369 tu_image_ubwc_pitch(struct tu_image *image, int level)
1370 {
1371 return image->ubwc_levels[level].pitch;
1372 }
1373
1374 static inline uint64_t
1375 tu_image_ubwc_base(struct tu_image *image, int level, int layer)
1376 {
1377 return image->bo->iova + image->bo_offset + image->ubwc_levels[level].offset +
1378 layer * tu_image_ubwc_size(image, level);
1379 }
1380
1381 enum a6xx_tile_mode
1382 tu6_get_image_tile_mode(struct tu_image *image, int level);
1383 enum a3xx_msaa_samples
1384 tu_msaa_samples(uint32_t samples);
1385
1386 struct tu_image_view
1387 {
1388 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1389
1390 VkImageViewType type;
1391 VkImageAspectFlags aspect_mask;
1392 VkFormat vk_format;
1393 uint32_t base_layer;
1394 uint32_t layer_count;
1395 uint32_t base_mip;
1396 uint32_t level_count;
1397 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1398
1399 uint32_t descriptor[A6XX_TEX_CONST_DWORDS];
1400
1401 /* Descriptor for use as a storage image as opposed to a sampled image.
1402 * This has a few differences for cube maps (e.g. type).
1403 */
1404 uint32_t storage_descriptor[A6XX_TEX_CONST_DWORDS];
1405 };
1406
1407 struct tu_sampler
1408 {
1409 uint32_t state[A6XX_TEX_SAMP_DWORDS];
1410
1411 bool needs_border;
1412 VkBorderColor border;
1413 };
1414
1415 VkResult
1416 tu_image_create(VkDevice _device,
1417 const VkImageCreateInfo *pCreateInfo,
1418 const VkAllocationCallbacks *alloc,
1419 VkImage *pImage,
1420 uint64_t modifier);
1421
1422 VkResult
1423 tu_image_from_gralloc(VkDevice device_h,
1424 const VkImageCreateInfo *base_info,
1425 const VkNativeBufferANDROID *gralloc_info,
1426 const VkAllocationCallbacks *alloc,
1427 VkImage *out_image_h);
1428
1429 void
1430 tu_image_view_init(struct tu_image_view *view,
1431 struct tu_device *device,
1432 const VkImageViewCreateInfo *pCreateInfo);
1433
1434 struct tu_buffer_view
1435 {
1436 VkFormat vk_format;
1437 uint64_t range; /**< VkBufferViewCreateInfo::range */
1438 uint32_t state[4];
1439 };
1440 void
1441 tu_buffer_view_init(struct tu_buffer_view *view,
1442 struct tu_device *device,
1443 const VkBufferViewCreateInfo *pCreateInfo);
1444
1445 static inline struct VkExtent3D
1446 tu_sanitize_image_extent(const VkImageType imageType,
1447 const struct VkExtent3D imageExtent)
1448 {
1449 switch (imageType) {
1450 case VK_IMAGE_TYPE_1D:
1451 return (VkExtent3D) { imageExtent.width, 1, 1 };
1452 case VK_IMAGE_TYPE_2D:
1453 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1454 case VK_IMAGE_TYPE_3D:
1455 return imageExtent;
1456 default:
1457 unreachable("invalid image type");
1458 }
1459 }
1460
1461 static inline struct VkOffset3D
1462 tu_sanitize_image_offset(const VkImageType imageType,
1463 const struct VkOffset3D imageOffset)
1464 {
1465 switch (imageType) {
1466 case VK_IMAGE_TYPE_1D:
1467 return (VkOffset3D) { imageOffset.x, 0, 0 };
1468 case VK_IMAGE_TYPE_2D:
1469 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1470 case VK_IMAGE_TYPE_3D:
1471 return imageOffset;
1472 default:
1473 unreachable("invalid image type");
1474 }
1475 }
1476
1477 struct tu_attachment_info
1478 {
1479 struct tu_image_view *attachment;
1480 };
1481
1482 struct tu_framebuffer
1483 {
1484 uint32_t width;
1485 uint32_t height;
1486 uint32_t layers;
1487
1488 uint32_t attachment_count;
1489 struct tu_attachment_info attachments[0];
1490 };
1491
1492 struct tu_subpass_barrier
1493 {
1494 VkPipelineStageFlags src_stage_mask;
1495 VkAccessFlags src_access_mask;
1496 VkAccessFlags dst_access_mask;
1497 };
1498
1499 void
1500 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1501 const struct tu_subpass_barrier *barrier);
1502
1503 struct tu_subpass_attachment
1504 {
1505 uint32_t attachment;
1506 VkImageLayout layout;
1507 };
1508
1509 struct tu_subpass
1510 {
1511 uint32_t input_count;
1512 uint32_t color_count;
1513 struct tu_subpass_attachment *input_attachments;
1514 struct tu_subpass_attachment *color_attachments;
1515 struct tu_subpass_attachment *resolve_attachments;
1516 struct tu_subpass_attachment depth_stencil_attachment;
1517
1518 struct tu_subpass_barrier start_barrier;
1519
1520 uint32_t view_mask;
1521 VkSampleCountFlagBits max_sample_count;
1522 };
1523
1524 struct tu_render_pass_attachment
1525 {
1526 VkFormat format;
1527 uint32_t samples;
1528 VkAttachmentLoadOp load_op;
1529 VkAttachmentLoadOp stencil_load_op;
1530 VkImageLayout initial_layout;
1531 VkImageLayout final_layout;
1532 uint32_t view_mask;
1533 };
1534
1535 struct tu_render_pass
1536 {
1537 uint32_t attachment_count;
1538 uint32_t subpass_count;
1539 struct tu_subpass_attachment *subpass_attachments;
1540 struct tu_render_pass_attachment *attachments;
1541 struct tu_subpass_barrier end_barrier;
1542 struct tu_subpass subpasses[0];
1543 };
1544
1545 VkResult
1546 tu_device_init_meta(struct tu_device *device);
1547 void
1548 tu_device_finish_meta(struct tu_device *device);
1549
1550 struct tu_query_pool
1551 {
1552 uint32_t stride;
1553 uint32_t availability_offset;
1554 uint64_t size;
1555 char *ptr;
1556 VkQueryType type;
1557 uint32_t pipeline_stats_mask;
1558 };
1559
1560 struct tu_semaphore
1561 {
1562 uint32_t syncobj;
1563 uint32_t temp_syncobj;
1564 };
1565
1566 void
1567 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1568 VkPipelineBindPoint bind_point,
1569 struct tu_descriptor_set *set,
1570 unsigned idx);
1571
1572 void
1573 tu_update_descriptor_sets(struct tu_device *device,
1574 struct tu_cmd_buffer *cmd_buffer,
1575 VkDescriptorSet overrideSet,
1576 uint32_t descriptorWriteCount,
1577 const VkWriteDescriptorSet *pDescriptorWrites,
1578 uint32_t descriptorCopyCount,
1579 const VkCopyDescriptorSet *pDescriptorCopies);
1580
1581 void
1582 tu_update_descriptor_set_with_template(
1583 struct tu_device *device,
1584 struct tu_cmd_buffer *cmd_buffer,
1585 struct tu_descriptor_set *set,
1586 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1587 const void *pData);
1588
1589 void
1590 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1591 VkPipelineBindPoint pipelineBindPoint,
1592 VkPipelineLayout _layout,
1593 uint32_t set,
1594 uint32_t descriptorWriteCount,
1595 const VkWriteDescriptorSet *pDescriptorWrites);
1596
1597 int
1598 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1599
1600 int
1601 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1602
1603 int
1604 tu_drm_submitqueue_new(const struct tu_device *dev,
1605 int priority,
1606 uint32_t *queue_id);
1607
1608 void
1609 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1610
1611 uint32_t
1612 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1613 uint32_t
1614 tu_gem_import_dmabuf(const struct tu_device *dev,
1615 int prime_fd,
1616 uint64_t size);
1617 int
1618 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1619 void
1620 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1621 uint64_t
1622 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1623 uint64_t
1624 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1625
1626 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1627 \
1628 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1629 { \
1630 return (struct __tu_type *) _handle; \
1631 } \
1632 \
1633 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1634 { \
1635 return (__VkType) _obj; \
1636 }
1637
1638 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1639 \
1640 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1641 { \
1642 return (struct __tu_type *) (uintptr_t) _handle; \
1643 } \
1644 \
1645 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1646 { \
1647 return (__VkType)(uintptr_t) _obj; \
1648 }
1649
1650 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1651 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1652
1653 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1654 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1655 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1656 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1657 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1658
1659 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1660 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1661 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1662 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1663 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1664 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1665 VkDescriptorSetLayout)
1666 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1667 VkDescriptorUpdateTemplate)
1668 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1669 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1670 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1671 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1672 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1673 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1674 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1675 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1676 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1677 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1678 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1679 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1680 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1681 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1682
1683 #endif /* TU_PRIVATE_H */