eb043ccf5624d1e875f12a7a65b15a2dc0993599
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "main/macros.h"
48 #include "util/list.h"
49 #include "util/macros.h"
50 #include "vk_alloc.h"
51 #include "vk_debug_report.h"
52 #include "wsi_common.h"
53
54 #include "drm-uapi/msm_drm.h"
55 #include "ir3/ir3_compiler.h"
56 #include "ir3/ir3_shader.h"
57
58 #include "adreno_common.xml.h"
59 #include "adreno_pm4.xml.h"
60 #include "a6xx.xml.h"
61
62 #include "tu_descriptor_set.h"
63 #include "tu_extensions.h"
64
65 /* Pre-declarations needed for WSI entrypoints */
66 struct wl_surface;
67 struct wl_display;
68 typedef struct xcb_connection_t xcb_connection_t;
69 typedef uint32_t xcb_visualid_t;
70 typedef uint32_t xcb_window_t;
71
72 #include <vulkan/vk_android_native_buffer.h>
73 #include <vulkan/vk_icd.h>
74 #include <vulkan/vulkan.h>
75 #include <vulkan/vulkan_intel.h>
76
77 #include "tu_entrypoints.h"
78
79 #define MAX_VBS 32
80 #define MAX_VERTEX_ATTRIBS 32
81 #define MAX_RTS 8
82 #define MAX_VSC_PIPES 32
83 #define MAX_VIEWPORTS 1
84 #define MAX_SCISSORS 16
85 #define MAX_DISCARD_RECTANGLES 4
86 #define MAX_PUSH_CONSTANTS_SIZE 128
87 #define MAX_PUSH_DESCRIPTORS 32
88 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
89 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
90 #define MAX_DYNAMIC_BUFFERS \
91 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
92 #define MAX_SAMPLES_LOG2 4
93 #define NUM_META_FS_KEYS 13
94 #define TU_MAX_DRM_DEVICES 8
95 #define MAX_VIEWS 8
96
97 #define NUM_DEPTH_CLEAR_PIPELINES 3
98
99 /*
100 * This is the point we switch from using CP to compute shader
101 * for certain buffer operations.
102 */
103 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
104
105 #define A6XX_TEX_CONST_DWORDS 16
106 #define A6XX_TEX_SAMP_DWORDS 4
107
108 enum tu_mem_heap
109 {
110 TU_MEM_HEAP_VRAM,
111 TU_MEM_HEAP_VRAM_CPU_ACCESS,
112 TU_MEM_HEAP_GTT,
113 TU_MEM_HEAP_COUNT
114 };
115
116 enum tu_mem_type
117 {
118 TU_MEM_TYPE_VRAM,
119 TU_MEM_TYPE_GTT_WRITE_COMBINE,
120 TU_MEM_TYPE_VRAM_CPU_ACCESS,
121 TU_MEM_TYPE_GTT_CACHED,
122 TU_MEM_TYPE_COUNT
123 };
124
125 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
126
127 static inline uint32_t
128 align_u32(uint32_t v, uint32_t a)
129 {
130 assert(a != 0 && a == (a & -a));
131 return (v + a - 1) & ~(a - 1);
132 }
133
134 static inline uint32_t
135 align_u32_npot(uint32_t v, uint32_t a)
136 {
137 return (v + a - 1) / a * a;
138 }
139
140 static inline uint64_t
141 align_u64(uint64_t v, uint64_t a)
142 {
143 assert(a != 0 && a == (a & -a));
144 return (v + a - 1) & ~(a - 1);
145 }
146
147 static inline int32_t
148 align_i32(int32_t v, int32_t a)
149 {
150 assert(a != 0 && a == (a & -a));
151 return (v + a - 1) & ~(a - 1);
152 }
153
154 /** Alignment must be a power of 2. */
155 static inline bool
156 tu_is_aligned(uintmax_t n, uintmax_t a)
157 {
158 assert(a == (a & -a));
159 return (n & (a - 1)) == 0;
160 }
161
162 static inline uint32_t
163 round_up_u32(uint32_t v, uint32_t a)
164 {
165 return (v + a - 1) / a;
166 }
167
168 static inline uint64_t
169 round_up_u64(uint64_t v, uint64_t a)
170 {
171 return (v + a - 1) / a;
172 }
173
174 static inline uint32_t
175 tu_minify(uint32_t n, uint32_t levels)
176 {
177 if (unlikely(n == 0))
178 return 0;
179 else
180 return MAX2(n >> levels, 1);
181 }
182 static inline float
183 tu_clamp_f(float f, float min, float max)
184 {
185 assert(min < max);
186
187 if (f > max)
188 return max;
189 else if (f < min)
190 return min;
191 else
192 return f;
193 }
194
195 static inline bool
196 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
197 {
198 if (*inout_mask & clear_mask) {
199 *inout_mask &= ~clear_mask;
200 return true;
201 } else {
202 return false;
203 }
204 }
205
206 #define for_each_bit(b, dword) \
207 for (uint32_t __dword = (dword); \
208 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
209
210 #define typed_memcpy(dest, src, count) \
211 ({ \
212 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
213 memcpy((dest), (src), (count) * sizeof(*(src))); \
214 })
215
216 #define COND(bool, val) ((bool) ? (val) : 0)
217
218 /* Whenever we generate an error, pass it through this function. Useful for
219 * debugging, where we can break on it. Only call at error site, not when
220 * propagating errors. Might be useful to plug in a stack trace here.
221 */
222
223 struct tu_instance;
224
225 VkResult
226 __vk_errorf(struct tu_instance *instance,
227 VkResult error,
228 const char *file,
229 int line,
230 const char *format,
231 ...);
232
233 #define vk_error(instance, error) \
234 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
235 #define vk_errorf(instance, error, format, ...) \
236 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
237
238 void
239 __tu_finishme(const char *file, int line, const char *format, ...)
240 tu_printflike(3, 4);
241 void
242 tu_loge(const char *format, ...) tu_printflike(1, 2);
243 void
244 tu_loge_v(const char *format, va_list va);
245 void
246 tu_logi(const char *format, ...) tu_printflike(1, 2);
247 void
248 tu_logi_v(const char *format, va_list va);
249
250 /**
251 * Print a FINISHME message, including its source location.
252 */
253 #define tu_finishme(format, ...) \
254 do { \
255 static bool reported = false; \
256 if (!reported) { \
257 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
258 reported = true; \
259 } \
260 } while (0)
261
262 /* A non-fatal assert. Useful for debugging. */
263 #ifdef DEBUG
264 #define tu_assert(x) \
265 ({ \
266 if (unlikely(!(x))) \
267 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
268 })
269 #else
270 #define tu_assert(x)
271 #endif
272
273 /* Suppress -Wunused in stub functions */
274 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
275 static inline void
276 __tu_use_args(int ignore, ...)
277 {
278 }
279
280 #define tu_stub() \
281 do { \
282 tu_finishme("stub %s", __func__); \
283 } while (0)
284
285 void *
286 tu_lookup_entrypoint_unchecked(const char *name);
287 void *
288 tu_lookup_entrypoint_checked(
289 const char *name,
290 uint32_t core_version,
291 const struct tu_instance_extension_table *instance,
292 const struct tu_device_extension_table *device);
293
294 struct tu_physical_device
295 {
296 VK_LOADER_DATA _loader_data;
297
298 struct tu_instance *instance;
299
300 char path[20];
301 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
302 uint8_t driver_uuid[VK_UUID_SIZE];
303 uint8_t device_uuid[VK_UUID_SIZE];
304 uint8_t cache_uuid[VK_UUID_SIZE];
305
306 struct wsi_device wsi_device;
307
308 int local_fd;
309 int master_fd;
310
311 unsigned gpu_id;
312 uint32_t gmem_size;
313 uint32_t tile_align_w;
314 uint32_t tile_align_h;
315
316 /* This is the drivers on-disk cache used as a fallback as opposed to
317 * the pipeline cache defined by apps.
318 */
319 struct disk_cache *disk_cache;
320
321 struct tu_device_extension_table supported_extensions;
322 };
323
324 enum tu_debug_flags
325 {
326 TU_DEBUG_STARTUP = 1 << 0,
327 TU_DEBUG_NIR = 1 << 1,
328 TU_DEBUG_IR3 = 1 << 2,
329 };
330
331 struct tu_instance
332 {
333 VK_LOADER_DATA _loader_data;
334
335 VkAllocationCallbacks alloc;
336
337 uint32_t api_version;
338 int physical_device_count;
339 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
340
341 enum tu_debug_flags debug_flags;
342
343 struct vk_debug_report_instance debug_report_callbacks;
344
345 struct tu_instance_extension_table enabled_extensions;
346 };
347
348 VkResult
349 tu_wsi_init(struct tu_physical_device *physical_device);
350 void
351 tu_wsi_finish(struct tu_physical_device *physical_device);
352
353 bool
354 tu_instance_extension_supported(const char *name);
355 uint32_t
356 tu_physical_device_api_version(struct tu_physical_device *dev);
357 bool
358 tu_physical_device_extension_supported(struct tu_physical_device *dev,
359 const char *name);
360
361 struct cache_entry;
362
363 struct tu_pipeline_cache
364 {
365 struct tu_device *device;
366 pthread_mutex_t mutex;
367
368 uint32_t total_size;
369 uint32_t table_size;
370 uint32_t kernel_count;
371 struct cache_entry **hash_table;
372 bool modified;
373
374 VkAllocationCallbacks alloc;
375 };
376
377 struct tu_pipeline_key
378 {
379 };
380
381 void
382 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
383 struct tu_device *device);
384 void
385 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
386 void
387 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
388 const void *data,
389 size_t size);
390
391 struct tu_shader_variant;
392
393 bool
394 tu_create_shader_variants_from_pipeline_cache(
395 struct tu_device *device,
396 struct tu_pipeline_cache *cache,
397 const unsigned char *sha1,
398 struct tu_shader_variant **variants);
399
400 void
401 tu_pipeline_cache_insert_shaders(struct tu_device *device,
402 struct tu_pipeline_cache *cache,
403 const unsigned char *sha1,
404 struct tu_shader_variant **variants,
405 const void *const *codes,
406 const unsigned *code_sizes);
407
408 struct tu_meta_state
409 {
410 VkAllocationCallbacks alloc;
411
412 struct tu_pipeline_cache cache;
413 };
414
415 /* queue types */
416 #define TU_QUEUE_GENERAL 0
417
418 #define TU_MAX_QUEUE_FAMILIES 1
419
420 struct tu_fence
421 {
422 bool signaled;
423 int fd;
424 };
425
426 void
427 tu_fence_init(struct tu_fence *fence, bool signaled);
428 void
429 tu_fence_finish(struct tu_fence *fence);
430 void
431 tu_fence_update_fd(struct tu_fence *fence, int fd);
432 void
433 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
434 void
435 tu_fence_signal(struct tu_fence *fence);
436 void
437 tu_fence_wait_idle(struct tu_fence *fence);
438
439 struct tu_queue
440 {
441 VK_LOADER_DATA _loader_data;
442 struct tu_device *device;
443 uint32_t queue_family_index;
444 int queue_idx;
445 VkDeviceQueueCreateFlags flags;
446
447 uint32_t msm_queue_id;
448 struct tu_fence submit_fence;
449 };
450
451 struct tu_device
452 {
453 VK_LOADER_DATA _loader_data;
454
455 VkAllocationCallbacks alloc;
456
457 struct tu_instance *instance;
458
459 struct tu_meta_state meta_state;
460
461 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
462 int queue_count[TU_MAX_QUEUE_FAMILIES];
463
464 struct tu_physical_device *physical_device;
465
466 struct ir3_compiler *compiler;
467
468 /* Backup in-memory cache to be used if the app doesn't provide one */
469 struct tu_pipeline_cache *mem_cache;
470
471 struct list_head shader_slabs;
472 mtx_t shader_slab_mutex;
473
474 struct tu_device_extension_table enabled_extensions;
475 };
476
477 struct tu_bo
478 {
479 uint32_t gem_handle;
480 uint64_t size;
481 uint64_t iova;
482 void *map;
483 };
484
485 VkResult
486 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
487 VkResult
488 tu_bo_init_dmabuf(struct tu_device *dev,
489 struct tu_bo *bo,
490 uint64_t size,
491 int fd);
492 int
493 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
494 void
495 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
496 VkResult
497 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
498
499 struct tu_cs_entry
500 {
501 /* No ownership */
502 const struct tu_bo *bo;
503
504 uint32_t size;
505 uint32_t offset;
506 };
507
508 enum tu_cs_mode
509 {
510
511 /*
512 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
513 * is full. tu_cs_begin must be called before command packet emission and
514 * tu_cs_end must be called after.
515 *
516 * This mode may create multiple entries internally. The entries must be
517 * submitted together.
518 */
519 TU_CS_MODE_GROW,
520
521 /*
522 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
523 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
524 * effect on it.
525 *
526 * This mode does not create any entry or any BO.
527 */
528 TU_CS_MODE_EXTERNAL,
529
530 /*
531 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
532 * command packet emission. tu_cs_begin_sub_stream must be called to get a
533 * sub-stream to emit comamnd packets to. When done with the sub-stream,
534 * tu_cs_end_sub_stream must be called.
535 *
536 * This mode does not create any entry internally.
537 */
538 TU_CS_MODE_SUB_STREAM,
539 };
540
541 struct tu_cs
542 {
543 uint32_t *start;
544 uint32_t *cur;
545 uint32_t *reserved_end;
546 uint32_t *end;
547
548 enum tu_cs_mode mode;
549 uint32_t next_bo_size;
550
551 struct tu_cs_entry *entries;
552 uint32_t entry_count;
553 uint32_t entry_capacity;
554
555 struct tu_bo **bos;
556 uint32_t bo_count;
557 uint32_t bo_capacity;
558 };
559
560 struct tu_device_memory
561 {
562 struct tu_bo bo;
563 VkDeviceSize size;
564
565 /* for dedicated allocations */
566 struct tu_image *image;
567 struct tu_buffer *buffer;
568
569 uint32_t type_index;
570 void *map;
571 void *user_ptr;
572 };
573
574 struct tu_descriptor_range
575 {
576 uint64_t va;
577 uint32_t size;
578 };
579
580 struct tu_descriptor_set
581 {
582 const struct tu_descriptor_set_layout *layout;
583 uint32_t size;
584
585 uint64_t va;
586 uint32_t *mapped_ptr;
587 struct tu_descriptor_range *dynamic_descriptors;
588
589 struct tu_bo *descriptors[0];
590 };
591
592 struct tu_push_descriptor_set
593 {
594 struct tu_descriptor_set set;
595 uint32_t capacity;
596 };
597
598 struct tu_descriptor_pool_entry
599 {
600 uint32_t offset;
601 uint32_t size;
602 struct tu_descriptor_set *set;
603 };
604
605 struct tu_descriptor_pool
606 {
607 struct tu_bo bo;
608 uint64_t current_offset;
609 uint64_t size;
610
611 uint8_t *host_memory_base;
612 uint8_t *host_memory_ptr;
613 uint8_t *host_memory_end;
614
615 uint32_t entry_count;
616 uint32_t max_entry_count;
617 struct tu_descriptor_pool_entry entries[0];
618 };
619
620 struct tu_descriptor_update_template_entry
621 {
622 VkDescriptorType descriptor_type;
623
624 /* The number of descriptors to update */
625 uint32_t descriptor_count;
626
627 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
628 */
629 uint32_t dst_offset;
630
631 /* In dwords. Not valid/used for dynamic descriptors */
632 uint32_t dst_stride;
633
634 uint32_t buffer_offset;
635
636 /* Only valid for combined image samplers and samplers */
637 uint16_t has_sampler;
638
639 /* In bytes */
640 size_t src_offset;
641 size_t src_stride;
642
643 /* For push descriptors */
644 const uint32_t *immutable_samplers;
645 };
646
647 struct tu_descriptor_update_template
648 {
649 uint32_t entry_count;
650 VkPipelineBindPoint bind_point;
651 struct tu_descriptor_update_template_entry entry[0];
652 };
653
654 struct tu_buffer
655 {
656 VkDeviceSize size;
657
658 VkBufferUsageFlags usage;
659 VkBufferCreateFlags flags;
660
661 struct tu_bo *bo;
662 VkDeviceSize bo_offset;
663 };
664
665 enum tu_dynamic_state_bits
666 {
667 TU_DYNAMIC_VIEWPORT = 1 << 0,
668 TU_DYNAMIC_SCISSOR = 1 << 1,
669 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
670 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
671 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
672 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
673 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
674 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
675 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
676 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
677 TU_DYNAMIC_ALL = (1 << 10) - 1,
678 };
679
680 struct tu_vertex_binding
681 {
682 struct tu_buffer *buffer;
683 VkDeviceSize offset;
684 };
685
686 struct tu_viewport_state
687 {
688 uint32_t count;
689 VkViewport viewports[MAX_VIEWPORTS];
690 };
691
692 struct tu_scissor_state
693 {
694 uint32_t count;
695 VkRect2D scissors[MAX_SCISSORS];
696 };
697
698 struct tu_discard_rectangle_state
699 {
700 uint32_t count;
701 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
702 };
703
704 struct tu_dynamic_state
705 {
706 /**
707 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
708 * Defines the set of saved dynamic state.
709 */
710 uint32_t mask;
711
712 struct tu_viewport_state viewport;
713
714 struct tu_scissor_state scissor;
715
716 float line_width;
717
718 struct
719 {
720 float bias;
721 float clamp;
722 float slope;
723 } depth_bias;
724
725 float blend_constants[4];
726
727 struct
728 {
729 float min;
730 float max;
731 } depth_bounds;
732
733 struct
734 {
735 uint32_t front;
736 uint32_t back;
737 } stencil_compare_mask;
738
739 struct
740 {
741 uint32_t front;
742 uint32_t back;
743 } stencil_write_mask;
744
745 struct
746 {
747 uint32_t front;
748 uint32_t back;
749 } stencil_reference;
750
751 struct tu_discard_rectangle_state discard_rectangle;
752 };
753
754 extern const struct tu_dynamic_state default_dynamic_state;
755
756 const char *
757 tu_get_debug_option_name(int id);
758
759 const char *
760 tu_get_perftest_option_name(int id);
761
762 /**
763 * Attachment state when recording a renderpass instance.
764 *
765 * The clear value is valid only if there exists a pending clear.
766 */
767 struct tu_attachment_state
768 {
769 VkImageAspectFlags pending_clear_aspects;
770 uint32_t cleared_views;
771 VkClearValue clear_value;
772 VkImageLayout current_layout;
773 };
774
775 struct tu_descriptor_state
776 {
777 struct tu_descriptor_set *sets[MAX_SETS];
778 uint32_t dirty;
779 uint32_t valid;
780 struct tu_push_descriptor_set push_set;
781 bool push_dirty;
782 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
783 };
784
785 struct tu_tile
786 {
787 uint8_t pipe;
788 uint8_t slot;
789 VkOffset2D begin;
790 VkOffset2D end;
791 };
792
793 struct tu_tiling_config
794 {
795 VkRect2D render_area;
796 uint32_t buffer_cpp[MAX_RTS + 2];
797 uint32_t buffer_count;
798
799 /* position and size of the first tile */
800 VkRect2D tile0;
801 /* number of tiles */
802 VkExtent2D tile_count;
803
804 uint32_t gmem_offsets[MAX_RTS + 2];
805
806 /* size of the first VSC pipe */
807 VkExtent2D pipe0;
808 /* number of VSC pipes */
809 VkExtent2D pipe_count;
810
811 /* pipe register values */
812 uint32_t pipe_config[MAX_VSC_PIPES];
813 uint32_t pipe_sizes[MAX_VSC_PIPES];
814 };
815
816 enum tu_cmd_dirty_bits
817 {
818 TU_CMD_DIRTY_PIPELINE = 1 << 0,
819 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1,
820 TU_CMD_DIRTY_DESCRIPTOR_SETS = 1 << 2,
821
822 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
823 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
824 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18,
825 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19,
826 };
827
828 struct tu_cmd_state
829 {
830 uint32_t dirty;
831
832 struct tu_pipeline *pipeline;
833
834 /* Vertex buffers */
835 struct
836 {
837 struct tu_buffer *buffers[MAX_VBS];
838 VkDeviceSize offsets[MAX_VBS];
839 } vb;
840
841 struct tu_dynamic_state dynamic;
842
843 /* Index buffer */
844 struct tu_buffer *index_buffer;
845 uint64_t index_offset;
846 uint32_t index_type;
847 uint32_t max_index_count;
848 uint64_t index_va;
849
850 const struct tu_render_pass *pass;
851 const struct tu_subpass *subpass;
852 const struct tu_framebuffer *framebuffer;
853 struct tu_attachment_state *attachments;
854
855 struct tu_tiling_config tiling_config;
856
857 struct tu_cs_entry tile_load_ib;
858 struct tu_cs_entry tile_store_ib;
859 };
860
861 struct tu_cmd_pool
862 {
863 VkAllocationCallbacks alloc;
864 struct list_head cmd_buffers;
865 struct list_head free_cmd_buffers;
866 uint32_t queue_family_index;
867 };
868
869 struct tu_cmd_buffer_upload
870 {
871 uint8_t *map;
872 unsigned offset;
873 uint64_t size;
874 struct list_head list;
875 };
876
877 enum tu_cmd_buffer_status
878 {
879 TU_CMD_BUFFER_STATUS_INVALID,
880 TU_CMD_BUFFER_STATUS_INITIAL,
881 TU_CMD_BUFFER_STATUS_RECORDING,
882 TU_CMD_BUFFER_STATUS_EXECUTABLE,
883 TU_CMD_BUFFER_STATUS_PENDING,
884 };
885
886 struct tu_bo_list
887 {
888 uint32_t count;
889 uint32_t capacity;
890 struct drm_msm_gem_submit_bo *bo_infos;
891 };
892
893 #define TU_BO_LIST_FAILED (~0)
894
895 void
896 tu_bo_list_init(struct tu_bo_list *list);
897 void
898 tu_bo_list_destroy(struct tu_bo_list *list);
899 void
900 tu_bo_list_reset(struct tu_bo_list *list);
901 uint32_t
902 tu_bo_list_add(struct tu_bo_list *list,
903 const struct tu_bo *bo,
904 uint32_t flags);
905 VkResult
906 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
907
908 struct tu_cmd_buffer
909 {
910 VK_LOADER_DATA _loader_data;
911
912 struct tu_device *device;
913
914 struct tu_cmd_pool *pool;
915 struct list_head pool_link;
916
917 VkCommandBufferUsageFlags usage_flags;
918 VkCommandBufferLevel level;
919 enum tu_cmd_buffer_status status;
920
921 struct tu_cmd_state state;
922 struct tu_vertex_binding vertex_bindings[MAX_VBS];
923 uint32_t queue_family_index;
924
925 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
926 VkShaderStageFlags push_constant_stages;
927 struct tu_descriptor_set meta_push_descriptors;
928
929 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
930
931 struct tu_cmd_buffer_upload upload;
932
933 VkResult record_result;
934
935 struct tu_bo_list bo_list;
936 struct tu_cs cs;
937 struct tu_cs draw_cs;
938 struct tu_cs draw_state;
939 struct tu_cs tile_cs;
940
941 uint16_t marker_reg;
942 uint32_t marker_seqno;
943
944 struct tu_bo scratch_bo;
945 uint32_t scratch_seqno;
946
947 bool wait_for_idle;
948 };
949
950 void
951 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
952 struct tu_cs *cs,
953 enum vgt_event_type event,
954 bool need_seqno);
955
956 bool
957 tu_get_memory_fd(struct tu_device *device,
958 struct tu_device_memory *memory,
959 int *pFD);
960
961 static inline struct tu_descriptor_state *
962 tu_get_descriptors_state(struct tu_cmd_buffer *cmd_buffer,
963 VkPipelineBindPoint bind_point)
964 {
965 assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
966 return &cmd_buffer->descriptors[bind_point];
967 }
968
969 /*
970 * Takes x,y,z as exact numbers of invocations, instead of blocks.
971 *
972 * Limitations: Can't call normal dispatch functions without binding or
973 * rebinding
974 * the compute pipeline.
975 */
976 void
977 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
978 uint32_t x,
979 uint32_t y,
980 uint32_t z);
981
982 struct tu_event
983 {
984 struct tu_bo bo;
985 };
986
987 struct tu_shader_module;
988
989 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
990 #define TU_HASH_SHADER_SISCHED (1 << 1)
991 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
992 void
993 tu_hash_shaders(unsigned char *hash,
994 const VkPipelineShaderStageCreateInfo **stages,
995 const struct tu_pipeline_layout *layout,
996 const struct tu_pipeline_key *key,
997 uint32_t flags);
998
999 static inline gl_shader_stage
1000 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1001 {
1002 assert(__builtin_popcount(vk_stage) == 1);
1003 return ffs(vk_stage) - 1;
1004 }
1005
1006 static inline VkShaderStageFlagBits
1007 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1008 {
1009 return (1 << mesa_stage);
1010 }
1011
1012 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1013
1014 #define tu_foreach_stage(stage, stage_bits) \
1015 for (gl_shader_stage stage, \
1016 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1017 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1018
1019 struct tu_shader_module
1020 {
1021 unsigned char sha1[20];
1022
1023 uint32_t code_size;
1024 const uint32_t *code[0];
1025 };
1026
1027 struct tu_shader_compile_options
1028 {
1029 struct ir3_shader_key key;
1030
1031 bool optimize;
1032 bool include_binning_pass;
1033 };
1034
1035 struct tu_descriptor_map
1036 {
1037 unsigned num;
1038 int set[32];
1039 int binding[32];
1040 };
1041
1042 struct tu_shader
1043 {
1044 struct ir3_shader ir3_shader;
1045
1046 struct tu_descriptor_map texture_map;
1047 struct tu_descriptor_map sampler_map;
1048 struct tu_descriptor_map ubo_map;
1049
1050 /* This may be true for vertex shaders. When true, variants[1] is the
1051 * binning variant and binning_binary is non-NULL.
1052 */
1053 bool has_binning_pass;
1054
1055 void *binary;
1056 void *binning_binary;
1057
1058 struct ir3_shader_variant variants[0];
1059 };
1060
1061 struct tu_shader *
1062 tu_shader_create(struct tu_device *dev,
1063 gl_shader_stage stage,
1064 const VkPipelineShaderStageCreateInfo *stage_info,
1065 const VkAllocationCallbacks *alloc);
1066
1067 void
1068 tu_shader_destroy(struct tu_device *dev,
1069 struct tu_shader *shader,
1070 const VkAllocationCallbacks *alloc);
1071
1072 void
1073 tu_shader_compile_options_init(
1074 struct tu_shader_compile_options *options,
1075 const VkGraphicsPipelineCreateInfo *pipeline_info);
1076
1077 VkResult
1078 tu_shader_compile(struct tu_device *dev,
1079 struct tu_shader *shader,
1080 const struct tu_shader *next_stage,
1081 const struct tu_shader_compile_options *options,
1082 const VkAllocationCallbacks *alloc);
1083
1084 struct tu_program_descriptor_linkage
1085 {
1086 struct ir3_ubo_analysis_state ubo_state;
1087
1088 uint32_t constlen;
1089
1090 uint32_t offset_ubo; /* ubo pointers const offset */
1091 uint32_t num_ubo; /* number of ubo pointers */
1092
1093 struct tu_descriptor_map texture_map;
1094 struct tu_descriptor_map sampler_map;
1095 struct tu_descriptor_map ubo_map;
1096 };
1097
1098 struct tu_pipeline
1099 {
1100 struct tu_cs cs;
1101
1102 struct tu_dynamic_state dynamic_state;
1103
1104 struct tu_pipeline_layout *layout;
1105
1106 bool need_indirect_descriptor_sets;
1107 VkShaderStageFlags active_stages;
1108
1109 struct
1110 {
1111 struct tu_bo binary_bo;
1112 struct tu_cs_entry state_ib;
1113 struct tu_cs_entry binning_state_ib;
1114
1115 struct tu_program_descriptor_linkage link[MESA_SHADER_STAGES];
1116 } program;
1117
1118 struct
1119 {
1120 uint8_t bindings[MAX_VERTEX_ATTRIBS];
1121 uint16_t strides[MAX_VERTEX_ATTRIBS];
1122 uint16_t offsets[MAX_VERTEX_ATTRIBS];
1123 uint32_t count;
1124
1125 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS];
1126 uint16_t binning_strides[MAX_VERTEX_ATTRIBS];
1127 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS];
1128 uint32_t binning_count;
1129
1130 struct tu_cs_entry state_ib;
1131 struct tu_cs_entry binning_state_ib;
1132 } vi;
1133
1134 struct
1135 {
1136 enum pc_di_primtype primtype;
1137 bool primitive_restart;
1138 } ia;
1139
1140 struct
1141 {
1142 struct tu_cs_entry state_ib;
1143 } vp;
1144
1145 struct
1146 {
1147 uint32_t gras_su_cntl;
1148 struct tu_cs_entry state_ib;
1149 } rast;
1150
1151 struct
1152 {
1153 struct tu_cs_entry state_ib;
1154 } ds;
1155
1156 struct
1157 {
1158 struct tu_cs_entry state_ib;
1159 } blend;
1160 };
1161
1162 void
1163 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1164
1165 void
1166 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1167
1168 void
1169 tu6_emit_gras_su_cntl(struct tu_cs *cs,
1170 uint32_t gras_su_cntl,
1171 float line_width);
1172
1173 void
1174 tu6_emit_depth_bias(struct tu_cs *cs,
1175 float constant_factor,
1176 float clamp,
1177 float slope_factor);
1178
1179 void
1180 tu6_emit_stencil_compare_mask(struct tu_cs *cs,
1181 uint32_t front,
1182 uint32_t back);
1183
1184 void
1185 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back);
1186
1187 void
1188 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back);
1189
1190 void
1191 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]);
1192
1193 struct tu_userdata_info *
1194 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1195 gl_shader_stage stage,
1196 int idx);
1197
1198 struct tu_shader_variant *
1199 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1200
1201 struct tu_graphics_pipeline_create_info
1202 {
1203 bool use_rectlist;
1204 bool db_depth_clear;
1205 bool db_stencil_clear;
1206 bool db_depth_disable_expclear;
1207 bool db_stencil_disable_expclear;
1208 bool db_flush_depth_inplace;
1209 bool db_flush_stencil_inplace;
1210 bool db_resummarize;
1211 uint32_t custom_blend_mode;
1212 };
1213
1214 struct tu_native_format
1215 {
1216 int vtx; /* VFMTn_xxx or -1 */
1217 int tex; /* TFMTn_xxx or -1 */
1218 int rb; /* RBn_xxx or -1 */
1219 int swap; /* enum a3xx_color_swap */
1220 bool present; /* internal only; always true to external users */
1221 };
1222
1223 const struct tu_native_format *
1224 tu6_get_native_format(VkFormat format);
1225
1226 void
1227 tu_pack_clear_value(const VkClearValue *val,
1228 VkFormat format,
1229 uint32_t buf[4]);
1230 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1231
1232 struct tu_image_level
1233 {
1234 VkDeviceSize offset;
1235 VkDeviceSize size;
1236 uint32_t pitch;
1237 };
1238
1239 struct tu_image
1240 {
1241 VkImageType type;
1242 /* The original VkFormat provided by the client. This may not match any
1243 * of the actual surface formats.
1244 */
1245 VkFormat vk_format;
1246 VkImageAspectFlags aspects;
1247 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1248 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1249 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1250 VkExtent3D extent;
1251 uint32_t level_count;
1252 uint32_t layer_count;
1253 VkSampleCountFlagBits samples;
1254
1255
1256 VkDeviceSize size;
1257 uint32_t alignment;
1258
1259 /* memory layout */
1260 VkDeviceSize layer_size;
1261 struct tu_image_level levels[15];
1262 unsigned tile_mode;
1263 unsigned cpp;
1264
1265 unsigned queue_family_mask;
1266 bool exclusive;
1267 bool shareable;
1268
1269 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1270 VkDeviceMemory owned_memory;
1271
1272 /* Set when bound */
1273 struct tu_bo *bo;
1274 VkDeviceSize bo_offset;
1275 };
1276
1277 unsigned
1278 tu_image_queue_family_mask(const struct tu_image *image,
1279 uint32_t family,
1280 uint32_t queue_family);
1281
1282 static inline uint32_t
1283 tu_get_layerCount(const struct tu_image *image,
1284 const VkImageSubresourceRange *range)
1285 {
1286 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1287 ? image->layer_count - range->baseArrayLayer
1288 : range->layerCount;
1289 }
1290
1291 static inline uint32_t
1292 tu_get_levelCount(const struct tu_image *image,
1293 const VkImageSubresourceRange *range)
1294 {
1295 return range->levelCount == VK_REMAINING_MIP_LEVELS
1296 ? image->level_count - range->baseMipLevel
1297 : range->levelCount;
1298 }
1299
1300 enum a6xx_tile_mode
1301 tu6_get_image_tile_mode(struct tu_image *image, int level);
1302 enum a3xx_msaa_samples
1303 tu_msaa_samples(uint32_t samples);
1304
1305 struct tu_image_view
1306 {
1307 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1308
1309 VkImageViewType type;
1310 VkImageAspectFlags aspect_mask;
1311 VkFormat vk_format;
1312 uint32_t base_layer;
1313 uint32_t layer_count;
1314 uint32_t base_mip;
1315 uint32_t level_count;
1316 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1317
1318 uint32_t descriptor[A6XX_TEX_CONST_DWORDS];
1319
1320 /* Descriptor for use as a storage image as opposed to a sampled image.
1321 * This has a few differences for cube maps (e.g. type).
1322 */
1323 uint32_t storage_descriptor[A6XX_TEX_CONST_DWORDS];
1324 };
1325
1326 struct tu_sampler
1327 {
1328 uint32_t state[A6XX_TEX_SAMP_DWORDS];
1329
1330 bool needs_border;
1331 };
1332
1333 struct tu_image_create_info
1334 {
1335 const VkImageCreateInfo *vk_info;
1336 bool scanout;
1337 bool no_metadata_planes;
1338 };
1339
1340 VkResult
1341 tu_image_create(VkDevice _device,
1342 const struct tu_image_create_info *info,
1343 const VkAllocationCallbacks *alloc,
1344 VkImage *pImage);
1345
1346 VkResult
1347 tu_image_from_gralloc(VkDevice device_h,
1348 const VkImageCreateInfo *base_info,
1349 const VkNativeBufferANDROID *gralloc_info,
1350 const VkAllocationCallbacks *alloc,
1351 VkImage *out_image_h);
1352
1353 void
1354 tu_image_view_init(struct tu_image_view *view,
1355 struct tu_device *device,
1356 const VkImageViewCreateInfo *pCreateInfo);
1357
1358 struct tu_buffer_view
1359 {
1360 VkFormat vk_format;
1361 uint64_t range; /**< VkBufferViewCreateInfo::range */
1362 uint32_t state[4];
1363 };
1364 void
1365 tu_buffer_view_init(struct tu_buffer_view *view,
1366 struct tu_device *device,
1367 const VkBufferViewCreateInfo *pCreateInfo);
1368
1369 static inline struct VkExtent3D
1370 tu_sanitize_image_extent(const VkImageType imageType,
1371 const struct VkExtent3D imageExtent)
1372 {
1373 switch (imageType) {
1374 case VK_IMAGE_TYPE_1D:
1375 return (VkExtent3D) { imageExtent.width, 1, 1 };
1376 case VK_IMAGE_TYPE_2D:
1377 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1378 case VK_IMAGE_TYPE_3D:
1379 return imageExtent;
1380 default:
1381 unreachable("invalid image type");
1382 }
1383 }
1384
1385 static inline struct VkOffset3D
1386 tu_sanitize_image_offset(const VkImageType imageType,
1387 const struct VkOffset3D imageOffset)
1388 {
1389 switch (imageType) {
1390 case VK_IMAGE_TYPE_1D:
1391 return (VkOffset3D) { imageOffset.x, 0, 0 };
1392 case VK_IMAGE_TYPE_2D:
1393 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1394 case VK_IMAGE_TYPE_3D:
1395 return imageOffset;
1396 default:
1397 unreachable("invalid image type");
1398 }
1399 }
1400
1401 struct tu_attachment_info
1402 {
1403 struct tu_image_view *attachment;
1404 };
1405
1406 struct tu_framebuffer
1407 {
1408 uint32_t width;
1409 uint32_t height;
1410 uint32_t layers;
1411
1412 uint32_t attachment_count;
1413 struct tu_attachment_info attachments[0];
1414 };
1415
1416 struct tu_subpass_barrier
1417 {
1418 VkPipelineStageFlags src_stage_mask;
1419 VkAccessFlags src_access_mask;
1420 VkAccessFlags dst_access_mask;
1421 };
1422
1423 void
1424 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1425 const struct tu_subpass_barrier *barrier);
1426
1427 struct tu_subpass_attachment
1428 {
1429 uint32_t attachment;
1430 VkImageLayout layout;
1431 };
1432
1433 struct tu_subpass
1434 {
1435 uint32_t input_count;
1436 uint32_t color_count;
1437 struct tu_subpass_attachment *input_attachments;
1438 struct tu_subpass_attachment *color_attachments;
1439 struct tu_subpass_attachment *resolve_attachments;
1440 struct tu_subpass_attachment depth_stencil_attachment;
1441
1442 /** Subpass has at least one resolve attachment */
1443 bool has_resolve;
1444
1445 struct tu_subpass_barrier start_barrier;
1446
1447 uint32_t view_mask;
1448 VkSampleCountFlagBits max_sample_count;
1449 };
1450
1451 struct tu_render_pass_attachment
1452 {
1453 VkFormat format;
1454 uint32_t samples;
1455 VkAttachmentLoadOp load_op;
1456 VkAttachmentLoadOp stencil_load_op;
1457 VkImageLayout initial_layout;
1458 VkImageLayout final_layout;
1459 uint32_t view_mask;
1460 };
1461
1462 struct tu_render_pass
1463 {
1464 uint32_t attachment_count;
1465 uint32_t subpass_count;
1466 struct tu_subpass_attachment *subpass_attachments;
1467 struct tu_render_pass_attachment *attachments;
1468 struct tu_subpass_barrier end_barrier;
1469 struct tu_subpass subpasses[0];
1470 };
1471
1472 VkResult
1473 tu_device_init_meta(struct tu_device *device);
1474 void
1475 tu_device_finish_meta(struct tu_device *device);
1476
1477 struct tu_query_pool
1478 {
1479 uint32_t stride;
1480 uint32_t availability_offset;
1481 uint64_t size;
1482 char *ptr;
1483 VkQueryType type;
1484 uint32_t pipeline_stats_mask;
1485 };
1486
1487 struct tu_semaphore
1488 {
1489 uint32_t syncobj;
1490 uint32_t temp_syncobj;
1491 };
1492
1493 void
1494 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1495 VkPipelineBindPoint bind_point,
1496 struct tu_descriptor_set *set,
1497 unsigned idx);
1498
1499 void
1500 tu_update_descriptor_sets(struct tu_device *device,
1501 struct tu_cmd_buffer *cmd_buffer,
1502 VkDescriptorSet overrideSet,
1503 uint32_t descriptorWriteCount,
1504 const VkWriteDescriptorSet *pDescriptorWrites,
1505 uint32_t descriptorCopyCount,
1506 const VkCopyDescriptorSet *pDescriptorCopies);
1507
1508 void
1509 tu_update_descriptor_set_with_template(
1510 struct tu_device *device,
1511 struct tu_cmd_buffer *cmd_buffer,
1512 struct tu_descriptor_set *set,
1513 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1514 const void *pData);
1515
1516 void
1517 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1518 VkPipelineBindPoint pipelineBindPoint,
1519 VkPipelineLayout _layout,
1520 uint32_t set,
1521 uint32_t descriptorWriteCount,
1522 const VkWriteDescriptorSet *pDescriptorWrites);
1523
1524 int
1525 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1526
1527 int
1528 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1529
1530 int
1531 tu_drm_submitqueue_new(const struct tu_device *dev,
1532 int priority,
1533 uint32_t *queue_id);
1534
1535 void
1536 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1537
1538 uint32_t
1539 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1540 uint32_t
1541 tu_gem_import_dmabuf(const struct tu_device *dev,
1542 int prime_fd,
1543 uint64_t size);
1544 int
1545 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1546 void
1547 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1548 uint64_t
1549 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1550 uint64_t
1551 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1552
1553 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1554 \
1555 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1556 { \
1557 return (struct __tu_type *) _handle; \
1558 } \
1559 \
1560 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1561 { \
1562 return (__VkType) _obj; \
1563 }
1564
1565 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1566 \
1567 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1568 { \
1569 return (struct __tu_type *) (uintptr_t) _handle; \
1570 } \
1571 \
1572 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1573 { \
1574 return (__VkType)(uintptr_t) _obj; \
1575 }
1576
1577 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1578 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1579
1580 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1581 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1582 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1583 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1584 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1585
1586 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1587 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1588 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1589 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1590 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1591 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1592 VkDescriptorSetLayout)
1593 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1594 VkDescriptorUpdateTemplate)
1595 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1596 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1597 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1598 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1599 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1600 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1601 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1602 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1603 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1604 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1605 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1606 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1607 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1608 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1609
1610 #endif /* TU_PRIVATE_H */