2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
52 #include "vk_debug_report.h"
54 #include "tu_descriptor_set.h"
55 #include "tu_extensions.h"
57 /* Pre-declarations needed for WSI entrypoints */
60 typedef struct xcb_connection_t xcb_connection_t
;
61 typedef uint32_t xcb_visualid_t
;
62 typedef uint32_t xcb_window_t
;
64 #include <vulkan/vk_android_native_buffer.h>
65 #include <vulkan/vk_icd.h>
66 #include <vulkan/vulkan.h>
67 #include <vulkan/vulkan_intel.h>
69 #include "drm/freedreno_ringbuffer.h"
71 #include "tu_entrypoints.h"
74 #define MAX_VERTEX_ATTRIBS 32
76 #define MAX_VIEWPORTS 16
77 #define MAX_SCISSORS 16
78 #define MAX_DISCARD_RECTANGLES 4
79 #define MAX_PUSH_CONSTANTS_SIZE 128
80 #define MAX_PUSH_DESCRIPTORS 32
81 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
82 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
83 #define MAX_DYNAMIC_BUFFERS \
84 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
85 #define MAX_SAMPLES_LOG2 4
86 #define NUM_META_FS_KEYS 13
87 #define TU_MAX_DRM_DEVICES 8
90 #define NUM_DEPTH_CLEAR_PIPELINES 3
93 * This is the point we switch from using CP to compute shader
94 * for certain buffer operations.
96 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
101 TU_MEM_HEAP_VRAM_CPU_ACCESS
,
109 TU_MEM_TYPE_GTT_WRITE_COMBINE
,
110 TU_MEM_TYPE_VRAM_CPU_ACCESS
,
111 TU_MEM_TYPE_GTT_CACHED
,
115 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
117 static inline uint32_t
118 align_u32(uint32_t v
, uint32_t a
)
120 assert(a
!= 0 && a
== (a
& -a
));
121 return (v
+ a
- 1) & ~(a
- 1);
124 static inline uint32_t
125 align_u32_npot(uint32_t v
, uint32_t a
)
127 return (v
+ a
- 1) / a
* a
;
130 static inline uint64_t
131 align_u64(uint64_t v
, uint64_t a
)
133 assert(a
!= 0 && a
== (a
& -a
));
134 return (v
+ a
- 1) & ~(a
- 1);
137 static inline int32_t
138 align_i32(int32_t v
, int32_t a
)
140 assert(a
!= 0 && a
== (a
& -a
));
141 return (v
+ a
- 1) & ~(a
- 1);
144 /** Alignment must be a power of 2. */
146 tu_is_aligned(uintmax_t n
, uintmax_t a
)
148 assert(a
== (a
& -a
));
149 return (n
& (a
- 1)) == 0;
152 static inline uint32_t
153 round_up_u32(uint32_t v
, uint32_t a
)
155 return (v
+ a
- 1) / a
;
158 static inline uint64_t
159 round_up_u64(uint64_t v
, uint64_t a
)
161 return (v
+ a
- 1) / a
;
164 static inline uint32_t
165 tu_minify(uint32_t n
, uint32_t levels
)
167 if (unlikely(n
== 0))
170 return MAX2(n
>> levels
, 1);
173 tu_clamp_f(float f
, float min
, float max
)
186 tu_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
188 if (*inout_mask
& clear_mask
) {
189 *inout_mask
&= ~clear_mask
;
196 #define for_each_bit(b, dword) \
197 for (uint32_t __dword = (dword); (b) = __builtin_ffs(__dword) - 1, __dword; \
198 __dword &= ~(1 << (b)))
200 #define typed_memcpy(dest, src, count) \
202 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
203 memcpy((dest), (src), (count) * sizeof(*(src))); \
206 /* Whenever we generate an error, pass it through this function. Useful for
207 * debugging, where we can break on it. Only call at error site, not when
208 * propagating errors. Might be useful to plug in a stack trace here.
214 __vk_errorf(struct tu_instance
*instance
,
221 #define vk_error(instance, error) \
222 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
223 #define vk_errorf(instance, error, format, ...) \
224 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
227 __tu_finishme(const char *file
, int line
, const char *format
, ...)
230 tu_loge(const char *format
, ...) tu_printflike(1, 2);
232 tu_loge_v(const char *format
, va_list va
);
234 tu_logi(const char *format
, ...) tu_printflike(1, 2);
236 tu_logi_v(const char *format
, va_list va
);
239 * Print a FINISHME message, including its source location.
241 #define tu_finishme(format, ...) \
243 static bool reported = false; \
245 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
250 /* A non-fatal assert. Useful for debugging. */
252 #define tu_assert(x) \
254 if (unlikely(!(x))) \
255 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
261 #define stub_return(v) \
263 tu_finishme("stub %s", __func__); \
269 tu_finishme("stub %s", __func__); \
274 tu_lookup_entrypoint_unchecked(const char *name
);
276 tu_lookup_entrypoint_checked(
278 uint32_t core_version
,
279 const struct tu_instance_extension_table
*instance
,
280 const struct tu_device_extension_table
*device
);
282 struct tu_physical_device
284 VK_LOADER_DATA _loader_data
;
286 struct tu_instance
*instance
;
289 char name
[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE
];
290 uint8_t driver_uuid
[VK_UUID_SIZE
];
291 uint8_t device_uuid
[VK_UUID_SIZE
];
292 uint8_t cache_uuid
[VK_UUID_SIZE
];
297 struct fd_device
*drm_device
;
301 /* This is the drivers on-disk cache used as a fallback as opposed to
302 * the pipeline cache defined by apps.
304 struct disk_cache
*disk_cache
;
306 struct tu_device_extension_table supported_extensions
;
311 TU_DEBUG_STARTUP
= 1 << 0,
316 VK_LOADER_DATA _loader_data
;
318 VkAllocationCallbacks alloc
;
320 uint32_t api_version
;
321 int physical_device_count
;
322 struct tu_physical_device physical_devices
[TU_MAX_DRM_DEVICES
];
324 enum tu_debug_flags debug_flags
;
326 struct vk_debug_report_instance debug_report_callbacks
;
328 struct tu_instance_extension_table enabled_extensions
;
332 tu_instance_extension_supported(const char *name
);
334 tu_physical_device_api_version(struct tu_physical_device
*dev
);
336 tu_physical_device_extension_supported(struct tu_physical_device
*dev
,
341 struct tu_pipeline_cache
343 struct tu_device
*device
;
344 pthread_mutex_t mutex
;
348 uint32_t kernel_count
;
349 struct cache_entry
**hash_table
;
352 VkAllocationCallbacks alloc
;
355 struct tu_pipeline_key
360 tu_pipeline_cache_init(struct tu_pipeline_cache
*cache
,
361 struct tu_device
*device
);
363 tu_pipeline_cache_finish(struct tu_pipeline_cache
*cache
);
365 tu_pipeline_cache_load(struct tu_pipeline_cache
*cache
,
369 struct tu_shader_variant
;
372 tu_create_shader_variants_from_pipeline_cache(
373 struct tu_device
*device
,
374 struct tu_pipeline_cache
*cache
,
375 const unsigned char *sha1
,
376 struct tu_shader_variant
**variants
);
379 tu_pipeline_cache_insert_shaders(struct tu_device
*device
,
380 struct tu_pipeline_cache
*cache
,
381 const unsigned char *sha1
,
382 struct tu_shader_variant
**variants
,
383 const void *const *codes
,
384 const unsigned *code_sizes
);
388 VkAllocationCallbacks alloc
;
390 struct tu_pipeline_cache cache
;
394 #define TU_QUEUE_GENERAL 0
396 #define TU_MAX_QUEUE_FAMILIES 1
400 VK_LOADER_DATA _loader_data
;
401 struct tu_device
*device
;
402 uint32_t queue_family_index
;
404 VkDeviceQueueCreateFlags flags
;
410 pthread_mutex_t mutex
;
415 VK_LOADER_DATA _loader_data
;
417 VkAllocationCallbacks alloc
;
419 struct tu_instance
*instance
;
420 struct radeon_winsys
*ws
;
422 struct tu_meta_state meta_state
;
424 struct tu_queue
*queues
[TU_MAX_QUEUE_FAMILIES
];
425 int queue_count
[TU_MAX_QUEUE_FAMILIES
];
427 struct tu_physical_device
*physical_device
;
429 /* Backup in-memory cache to be used if the app doesn't provide one */
430 struct tu_pipeline_cache
*mem_cache
;
432 struct list_head shader_slabs
;
433 mtx_t shader_slab_mutex
;
435 struct tu_device_extension_table enabled_extensions
;
437 /* Whether the driver uses a global BO list. */
438 bool use_global_bo_list
;
440 struct tu_bo_list bo_list
;
453 tu_bo_init_new(struct tu_device
*dev
, struct tu_bo
*bo
, uint64_t size
);
455 tu_bo_finish(struct tu_device
*dev
, struct tu_bo
*bo
);
457 tu_bo_map(struct tu_device
*dev
, struct tu_bo
*bo
);
459 struct tu_device_memory
464 /* for dedicated allocations */
465 struct tu_image
*image
;
466 struct tu_buffer
*buffer
;
473 struct tu_descriptor_range
479 struct tu_descriptor_set
481 const struct tu_descriptor_set_layout
*layout
;
484 struct radeon_winsys_bo
*bo
;
486 uint32_t *mapped_ptr
;
487 struct tu_descriptor_range
*dynamic_descriptors
;
490 struct tu_push_descriptor_set
492 struct tu_descriptor_set set
;
496 struct tu_descriptor_pool_entry
500 struct tu_descriptor_set
*set
;
503 struct tu_descriptor_pool
505 struct radeon_winsys_bo
*bo
;
507 uint64_t current_offset
;
510 uint8_t *host_memory_base
;
511 uint8_t *host_memory_ptr
;
512 uint8_t *host_memory_end
;
514 uint32_t entry_count
;
515 uint32_t max_entry_count
;
516 struct tu_descriptor_pool_entry entries
[0];
519 struct tu_descriptor_update_template_entry
521 VkDescriptorType descriptor_type
;
523 /* The number of descriptors to update */
524 uint32_t descriptor_count
;
526 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
530 /* In dwords. Not valid/used for dynamic descriptors */
533 uint32_t buffer_offset
;
535 /* Only valid for combined image samplers and samplers */
536 uint16_t has_sampler
;
542 /* For push descriptors */
543 const uint32_t *immutable_samplers
;
546 struct tu_descriptor_update_template
548 uint32_t entry_count
;
549 VkPipelineBindPoint bind_point
;
550 struct tu_descriptor_update_template_entry entry
[0];
557 VkBufferUsageFlags usage
;
558 VkBufferCreateFlags flags
;
561 enum tu_dynamic_state_bits
563 TU_DYNAMIC_VIEWPORT
= 1 << 0,
564 TU_DYNAMIC_SCISSOR
= 1 << 1,
565 TU_DYNAMIC_LINE_WIDTH
= 1 << 2,
566 TU_DYNAMIC_DEPTH_BIAS
= 1 << 3,
567 TU_DYNAMIC_BLEND_CONSTANTS
= 1 << 4,
568 TU_DYNAMIC_DEPTH_BOUNDS
= 1 << 5,
569 TU_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6,
570 TU_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7,
571 TU_DYNAMIC_STENCIL_REFERENCE
= 1 << 8,
572 TU_DYNAMIC_DISCARD_RECTANGLE
= 1 << 9,
573 TU_DYNAMIC_ALL
= (1 << 10) - 1,
576 struct tu_vertex_binding
578 struct tu_buffer
*buffer
;
582 struct tu_viewport_state
585 VkViewport viewports
[MAX_VIEWPORTS
];
588 struct tu_scissor_state
591 VkRect2D scissors
[MAX_SCISSORS
];
594 struct tu_discard_rectangle_state
597 VkRect2D rectangles
[MAX_DISCARD_RECTANGLES
];
600 struct tu_dynamic_state
603 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
604 * Defines the set of saved dynamic state.
608 struct tu_viewport_state viewport
;
610 struct tu_scissor_state scissor
;
621 float blend_constants
[4];
633 } stencil_compare_mask
;
639 } stencil_write_mask
;
647 struct tu_discard_rectangle_state discard_rectangle
;
650 extern const struct tu_dynamic_state default_dynamic_state
;
653 tu_get_debug_option_name(int id
);
656 tu_get_perftest_option_name(int id
);
659 * Attachment state when recording a renderpass instance.
661 * The clear value is valid only if there exists a pending clear.
663 struct tu_attachment_state
665 VkImageAspectFlags pending_clear_aspects
;
666 uint32_t cleared_views
;
667 VkClearValue clear_value
;
668 VkImageLayout current_layout
;
671 struct tu_descriptor_state
673 struct tu_descriptor_set
*sets
[MAX_SETS
];
676 struct tu_push_descriptor_set push_set
;
678 uint32_t dynamic_buffers
[4 * MAX_DYNAMIC_BUFFERS
];
683 /* Vertex descriptors */
687 struct tu_dynamic_state dynamic
;
690 struct tu_buffer
*index_buffer
;
691 uint64_t index_offset
;
693 uint32_t max_index_count
;
699 VkAllocationCallbacks alloc
;
700 struct list_head cmd_buffers
;
701 struct list_head free_cmd_buffers
;
702 uint32_t queue_family_index
;
705 struct tu_cmd_buffer_upload
710 struct radeon_winsys_bo
*upload_bo
;
711 struct list_head list
;
714 enum tu_cmd_buffer_status
716 TU_CMD_BUFFER_STATUS_INVALID
,
717 TU_CMD_BUFFER_STATUS_INITIAL
,
718 TU_CMD_BUFFER_STATUS_RECORDING
,
719 TU_CMD_BUFFER_STATUS_EXECUTABLE
,
720 TU_CMD_BUFFER_STATUS_PENDING
,
725 VK_LOADER_DATA _loader_data
;
727 struct tu_device
*device
;
729 struct tu_cmd_pool
*pool
;
730 struct list_head pool_link
;
732 VkCommandBufferUsageFlags usage_flags
;
733 VkCommandBufferLevel level
;
734 enum tu_cmd_buffer_status status
;
735 struct radeon_cmdbuf
*cs
;
736 struct tu_cmd_state state
;
737 struct tu_vertex_binding vertex_bindings
[MAX_VBS
];
738 uint32_t queue_family_index
;
740 uint8_t push_constants
[MAX_PUSH_CONSTANTS_SIZE
];
741 VkShaderStageFlags push_constant_stages
;
742 struct tu_descriptor_set meta_push_descriptors
;
744 struct tu_descriptor_state descriptors
[VK_PIPELINE_BIND_POINT_RANGE_SIZE
];
746 struct tu_cmd_buffer_upload upload
;
748 uint32_t scratch_size_needed
;
749 uint32_t compute_scratch_size_needed
;
750 uint32_t esgs_ring_size_needed
;
751 uint32_t gsvs_ring_size_needed
;
752 bool tess_rings_needed
;
753 bool sample_positions_needed
;
755 VkResult record_result
;
757 uint32_t gfx9_fence_offset
;
758 struct radeon_winsys_bo
*gfx9_fence_bo
;
759 uint32_t gfx9_fence_idx
;
760 uint64_t gfx9_eop_bug_va
;
763 * Whether a query pool has been resetted and we have to flush caches.
765 bool pending_reset_query
;
769 tu_get_memory_fd(struct tu_device
*device
,
770 struct tu_device_memory
*memory
,
774 * Takes x,y,z as exact numbers of invocations, instead of blocks.
776 * Limitations: Can't call normal dispatch functions without binding or
778 * the compute pipeline.
781 tu_unaligned_dispatch(struct tu_cmd_buffer
*cmd_buffer
,
788 struct radeon_winsys_bo
*bo
;
792 struct tu_shader_module
;
794 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
795 #define TU_HASH_SHADER_SISCHED (1 << 1)
796 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
798 tu_hash_shaders(unsigned char *hash
,
799 const VkPipelineShaderStageCreateInfo
**stages
,
800 const struct tu_pipeline_layout
*layout
,
801 const struct tu_pipeline_key
*key
,
804 static inline gl_shader_stage
805 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
807 assert(__builtin_popcount(vk_stage
) == 1);
808 return ffs(vk_stage
) - 1;
811 static inline VkShaderStageFlagBits
812 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
814 return (1 << mesa_stage
);
817 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
819 #define tu_foreach_stage(stage, stage_bits) \
820 for (gl_shader_stage stage, \
821 __tmp = (gl_shader_stage)((stage_bits)&TU_STAGE_MASK); \
822 stage = __builtin_ffs(__tmp) - 1, __tmp; \
823 __tmp &= ~(1 << (stage)))
825 struct tu_shader_module
827 struct nir_shader
*nir
;
828 unsigned char sha1
[20];
835 struct tu_device
*device
;
836 struct tu_dynamic_state dynamic_state
;
838 struct tu_pipeline_layout
*layout
;
840 bool need_indirect_descriptor_sets
;
841 VkShaderStageFlags active_stages
;
844 struct tu_userdata_info
*
845 tu_lookup_user_sgpr(struct tu_pipeline
*pipeline
,
846 gl_shader_stage stage
,
849 struct tu_shader_variant
*
850 tu_get_shader(struct tu_pipeline
*pipeline
, gl_shader_stage stage
);
852 struct tu_graphics_pipeline_create_info
856 bool db_stencil_clear
;
857 bool db_depth_disable_expclear
;
858 bool db_stencil_disable_expclear
;
859 bool db_flush_depth_inplace
;
860 bool db_flush_stencil_inplace
;
862 uint32_t custom_blend_mode
;
866 tu_graphics_pipeline_create(
868 VkPipelineCache cache
,
869 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
870 const struct tu_graphics_pipeline_create_info
*extra
,
871 const VkAllocationCallbacks
*alloc
,
872 VkPipeline
*pPipeline
);
874 struct vk_format_description
;
876 tu_translate_buffer_dataformat(const struct vk_format_description
*desc
,
879 tu_translate_buffer_numformat(const struct vk_format_description
*desc
,
882 tu_translate_colorformat(VkFormat format
);
884 tu_translate_color_numformat(VkFormat format
,
885 const struct vk_format_description
*desc
,
888 tu_colorformat_endian_swap(uint32_t colorformat
);
890 tu_translate_colorswap(VkFormat format
, bool do_endian_swap
);
892 tu_translate_dbformat(VkFormat format
);
894 tu_translate_tex_dataformat(VkFormat format
,
895 const struct vk_format_description
*desc
,
898 tu_translate_tex_numformat(VkFormat format
,
899 const struct vk_format_description
*desc
,
902 tu_format_pack_clear_color(VkFormat format
,
903 uint32_t clear_vals
[2],
904 VkClearColorValue
*value
);
906 tu_is_colorbuffer_format_supported(VkFormat format
, bool *blendable
);
908 tu_dcc_formats_compatible(VkFormat format1
, VkFormat format2
);
913 /* The original VkFormat provided by the client. This may not match any
914 * of the actual surface formats.
917 VkImageAspectFlags aspects
;
918 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
919 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
920 VkImageCreateFlags flags
; /** VkImageCreateInfo::flags */
925 unsigned queue_family_mask
;
929 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
930 VkDeviceMemory owned_memory
;
934 tu_image_queue_family_mask(const struct tu_image
*image
,
936 uint32_t queue_family
);
938 static inline uint32_t
939 tu_get_layerCount(const struct tu_image
*image
,
940 const VkImageSubresourceRange
*range
)
945 static inline uint32_t
946 tu_get_levelCount(const struct tu_image
*image
,
947 const VkImageSubresourceRange
*range
)
954 struct tu_image
*image
; /**< VkImageViewCreateInfo::image */
956 VkImageViewType type
;
957 VkImageAspectFlags aspect_mask
;
960 uint32_t layer_count
;
962 uint32_t level_count
;
963 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
965 uint32_t descriptor
[16];
967 /* Descriptor for use as a storage image as opposed to a sampled image.
968 * This has a few differences for cube maps (e.g. type).
970 uint32_t storage_descriptor
[16];
977 struct tu_image_create_info
979 const VkImageCreateInfo
*vk_info
;
981 bool no_metadata_planes
;
985 tu_image_create(VkDevice _device
,
986 const struct tu_image_create_info
*info
,
987 const VkAllocationCallbacks
*alloc
,
991 tu_image_from_gralloc(VkDevice device_h
,
992 const VkImageCreateInfo
*base_info
,
993 const VkNativeBufferANDROID
*gralloc_info
,
994 const VkAllocationCallbacks
*alloc
,
995 VkImage
*out_image_h
);
998 tu_image_view_init(struct tu_image_view
*view
,
999 struct tu_device
*device
,
1000 const VkImageViewCreateInfo
*pCreateInfo
);
1002 struct tu_buffer_view
1004 struct radeon_winsys_bo
*bo
;
1006 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1010 tu_buffer_view_init(struct tu_buffer_view
*view
,
1011 struct tu_device
*device
,
1012 const VkBufferViewCreateInfo
*pCreateInfo
);
1014 static inline struct VkExtent3D
1015 tu_sanitize_image_extent(const VkImageType imageType
,
1016 const struct VkExtent3D imageExtent
)
1018 switch (imageType
) {
1019 case VK_IMAGE_TYPE_1D
:
1020 return (VkExtent3D
){ imageExtent
.width
, 1, 1 };
1021 case VK_IMAGE_TYPE_2D
:
1022 return (VkExtent3D
){ imageExtent
.width
, imageExtent
.height
, 1 };
1023 case VK_IMAGE_TYPE_3D
:
1026 unreachable("invalid image type");
1030 static inline struct VkOffset3D
1031 tu_sanitize_image_offset(const VkImageType imageType
,
1032 const struct VkOffset3D imageOffset
)
1034 switch (imageType
) {
1035 case VK_IMAGE_TYPE_1D
:
1036 return (VkOffset3D
){ imageOffset
.x
, 0, 0 };
1037 case VK_IMAGE_TYPE_2D
:
1038 return (VkOffset3D
){ imageOffset
.x
, imageOffset
.y
, 0 };
1039 case VK_IMAGE_TYPE_3D
:
1042 unreachable("invalid image type");
1046 struct tu_attachment_info
1048 struct tu_image_view
*attachment
;
1051 struct tu_framebuffer
1057 uint32_t attachment_count
;
1058 struct tu_attachment_info attachments
[0];
1061 struct tu_subpass_barrier
1063 VkPipelineStageFlags src_stage_mask
;
1064 VkAccessFlags src_access_mask
;
1065 VkAccessFlags dst_access_mask
;
1069 tu_subpass_barrier(struct tu_cmd_buffer
*cmd_buffer
,
1070 const struct tu_subpass_barrier
*barrier
);
1072 struct tu_subpass_attachment
1074 uint32_t attachment
;
1075 VkImageLayout layout
;
1080 uint32_t input_count
;
1081 uint32_t color_count
;
1082 struct tu_subpass_attachment
*input_attachments
;
1083 struct tu_subpass_attachment
*color_attachments
;
1084 struct tu_subpass_attachment
*resolve_attachments
;
1085 struct tu_subpass_attachment depth_stencil_attachment
;
1087 /** Subpass has at least one resolve attachment */
1090 struct tu_subpass_barrier start_barrier
;
1093 VkSampleCountFlagBits max_sample_count
;
1096 struct tu_render_pass_attachment
1100 VkAttachmentLoadOp load_op
;
1101 VkAttachmentLoadOp stencil_load_op
;
1102 VkImageLayout initial_layout
;
1103 VkImageLayout final_layout
;
1107 struct tu_render_pass
1109 uint32_t attachment_count
;
1110 uint32_t subpass_count
;
1111 struct tu_subpass_attachment
*subpass_attachments
;
1112 struct tu_render_pass_attachment
*attachments
;
1113 struct tu_subpass_barrier end_barrier
;
1114 struct tu_subpass subpasses
[0];
1118 tu_device_init_meta(struct tu_device
*device
);
1120 tu_device_finish_meta(struct tu_device
*device
);
1122 struct tu_query_pool
1124 struct radeon_winsys_bo
*bo
;
1126 uint32_t availability_offset
;
1130 uint32_t pipeline_stats_mask
;
1135 /* use a winsys sem for non-exportable */
1136 struct radeon_winsys_sem
*sem
;
1138 uint32_t temp_syncobj
;
1142 tu_set_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1143 VkPipelineBindPoint bind_point
,
1144 struct tu_descriptor_set
*set
,
1148 tu_update_descriptor_sets(struct tu_device
*device
,
1149 struct tu_cmd_buffer
*cmd_buffer
,
1150 VkDescriptorSet overrideSet
,
1151 uint32_t descriptorWriteCount
,
1152 const VkWriteDescriptorSet
*pDescriptorWrites
,
1153 uint32_t descriptorCopyCount
,
1154 const VkCopyDescriptorSet
*pDescriptorCopies
);
1157 tu_update_descriptor_set_with_template(
1158 struct tu_device
*device
,
1159 struct tu_cmd_buffer
*cmd_buffer
,
1160 struct tu_descriptor_set
*set
,
1161 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate
,
1165 tu_meta_push_descriptor_set(struct tu_cmd_buffer
*cmd_buffer
,
1166 VkPipelineBindPoint pipelineBindPoint
,
1167 VkPipelineLayout _layout
,
1169 uint32_t descriptorWriteCount
,
1170 const VkWriteDescriptorSet
*pDescriptorWrites
);
1174 struct radeon_winsys_fence
*fence
;
1179 uint32_t temp_syncobj
;
1182 /* tu_nir_to_llvm.c */
1183 struct tu_shader_variant_info
;
1184 struct tu_nir_compiler_options
;
1186 struct radeon_winsys_sem
;
1189 tu_gem_new(struct tu_device
*dev
, uint64_t size
, uint32_t flags
);
1191 tu_gem_close(struct tu_device
*dev
, uint32_t gem_handle
);
1193 tu_gem_info_offset(struct tu_device
*dev
, uint32_t gem_handle
);
1195 tu_gem_info_iova(struct tu_device
*dev
, uint32_t gem_handle
);
1197 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1199 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1201 return (struct __tu_type *)_handle; \
1204 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1206 return (__VkType)_obj; \
1209 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1211 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1213 return (struct __tu_type *)(uintptr_t)_handle; \
1216 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1218 return (__VkType)(uintptr_t)_obj; \
1221 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1222 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1224 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer
, VkCommandBuffer
)
1225 TU_DEFINE_HANDLE_CASTS(tu_device
, VkDevice
)
1226 TU_DEFINE_HANDLE_CASTS(tu_instance
, VkInstance
)
1227 TU_DEFINE_HANDLE_CASTS(tu_physical_device
, VkPhysicalDevice
)
1228 TU_DEFINE_HANDLE_CASTS(tu_queue
, VkQueue
)
1230 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool
, VkCommandPool
)
1231 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer
, VkBuffer
)
1232 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view
, VkBufferView
)
1233 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool
, VkDescriptorPool
)
1234 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set
, VkDescriptorSet
)
1235 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout
,
1236 VkDescriptorSetLayout
)
1237 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template
,
1238 VkDescriptorUpdateTemplateKHR
)
1239 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory
, VkDeviceMemory
)
1240 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence
, VkFence
)
1241 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event
, VkEvent
)
1242 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer
, VkFramebuffer
)
1243 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image
, VkImage
)
1244 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view
, VkImageView
);
1245 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache
, VkPipelineCache
)
1246 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline
, VkPipeline
)
1247 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout
, VkPipelineLayout
)
1248 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool
, VkQueryPool
)
1249 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass
, VkRenderPass
)
1250 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler
, VkSampler
)
1251 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module
, VkShaderModule
)
1252 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore
, VkSemaphore
)
1254 #endif /* TU_PRIVATE_H */