turnip: Replace fd_bo with tu_bo
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53
54 #include "tu_descriptor_set.h"
55 #include "tu_extensions.h"
56
57 /* Pre-declarations needed for WSI entrypoints */
58 struct wl_surface;
59 struct wl_display;
60 typedef struct xcb_connection_t xcb_connection_t;
61 typedef uint32_t xcb_visualid_t;
62 typedef uint32_t xcb_window_t;
63
64 #include <vulkan/vk_android_native_buffer.h>
65 #include <vulkan/vk_icd.h>
66 #include <vulkan/vulkan.h>
67 #include <vulkan/vulkan_intel.h>
68
69 #include "drm/freedreno_ringbuffer.h"
70
71 #include "tu_entrypoints.h"
72
73 #define MAX_VBS 32
74 #define MAX_VERTEX_ATTRIBS 32
75 #define MAX_RTS 8
76 #define MAX_VIEWPORTS 16
77 #define MAX_SCISSORS 16
78 #define MAX_DISCARD_RECTANGLES 4
79 #define MAX_PUSH_CONSTANTS_SIZE 128
80 #define MAX_PUSH_DESCRIPTORS 32
81 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
82 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
83 #define MAX_DYNAMIC_BUFFERS \
84 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
85 #define MAX_SAMPLES_LOG2 4
86 #define NUM_META_FS_KEYS 13
87 #define TU_MAX_DRM_DEVICES 8
88 #define MAX_VIEWS 8
89
90 #define NUM_DEPTH_CLEAR_PIPELINES 3
91
92 /*
93 * This is the point we switch from using CP to compute shader
94 * for certain buffer operations.
95 */
96 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
97
98 enum tu_mem_heap
99 {
100 TU_MEM_HEAP_VRAM,
101 TU_MEM_HEAP_VRAM_CPU_ACCESS,
102 TU_MEM_HEAP_GTT,
103 TU_MEM_HEAP_COUNT
104 };
105
106 enum tu_mem_type
107 {
108 TU_MEM_TYPE_VRAM,
109 TU_MEM_TYPE_GTT_WRITE_COMBINE,
110 TU_MEM_TYPE_VRAM_CPU_ACCESS,
111 TU_MEM_TYPE_GTT_CACHED,
112 TU_MEM_TYPE_COUNT
113 };
114
115 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
116
117 static inline uint32_t
118 align_u32(uint32_t v, uint32_t a)
119 {
120 assert(a != 0 && a == (a & -a));
121 return (v + a - 1) & ~(a - 1);
122 }
123
124 static inline uint32_t
125 align_u32_npot(uint32_t v, uint32_t a)
126 {
127 return (v + a - 1) / a * a;
128 }
129
130 static inline uint64_t
131 align_u64(uint64_t v, uint64_t a)
132 {
133 assert(a != 0 && a == (a & -a));
134 return (v + a - 1) & ~(a - 1);
135 }
136
137 static inline int32_t
138 align_i32(int32_t v, int32_t a)
139 {
140 assert(a != 0 && a == (a & -a));
141 return (v + a - 1) & ~(a - 1);
142 }
143
144 /** Alignment must be a power of 2. */
145 static inline bool
146 tu_is_aligned(uintmax_t n, uintmax_t a)
147 {
148 assert(a == (a & -a));
149 return (n & (a - 1)) == 0;
150 }
151
152 static inline uint32_t
153 round_up_u32(uint32_t v, uint32_t a)
154 {
155 return (v + a - 1) / a;
156 }
157
158 static inline uint64_t
159 round_up_u64(uint64_t v, uint64_t a)
160 {
161 return (v + a - 1) / a;
162 }
163
164 static inline uint32_t
165 tu_minify(uint32_t n, uint32_t levels)
166 {
167 if (unlikely(n == 0))
168 return 0;
169 else
170 return MAX2(n >> levels, 1);
171 }
172 static inline float
173 tu_clamp_f(float f, float min, float max)
174 {
175 assert(min < max);
176
177 if (f > max)
178 return max;
179 else if (f < min)
180 return min;
181 else
182 return f;
183 }
184
185 static inline bool
186 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
187 {
188 if (*inout_mask & clear_mask) {
189 *inout_mask &= ~clear_mask;
190 return true;
191 } else {
192 return false;
193 }
194 }
195
196 #define for_each_bit(b, dword) \
197 for (uint32_t __dword = (dword); (b) = __builtin_ffs(__dword) - 1, __dword; \
198 __dword &= ~(1 << (b)))
199
200 #define typed_memcpy(dest, src, count) \
201 ({ \
202 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
203 memcpy((dest), (src), (count) * sizeof(*(src))); \
204 })
205
206 /* Whenever we generate an error, pass it through this function. Useful for
207 * debugging, where we can break on it. Only call at error site, not when
208 * propagating errors. Might be useful to plug in a stack trace here.
209 */
210
211 struct tu_instance;
212
213 VkResult
214 __vk_errorf(struct tu_instance *instance,
215 VkResult error,
216 const char *file,
217 int line,
218 const char *format,
219 ...);
220
221 #define vk_error(instance, error) \
222 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
223 #define vk_errorf(instance, error, format, ...) \
224 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
225
226 void
227 __tu_finishme(const char *file, int line, const char *format, ...)
228 tu_printflike(3, 4);
229 void
230 tu_loge(const char *format, ...) tu_printflike(1, 2);
231 void
232 tu_loge_v(const char *format, va_list va);
233 void
234 tu_logi(const char *format, ...) tu_printflike(1, 2);
235 void
236 tu_logi_v(const char *format, va_list va);
237
238 /**
239 * Print a FINISHME message, including its source location.
240 */
241 #define tu_finishme(format, ...) \
242 do { \
243 static bool reported = false; \
244 if (!reported) { \
245 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
246 reported = true; \
247 } \
248 } while (0)
249
250 /* A non-fatal assert. Useful for debugging. */
251 #ifdef DEBUG
252 #define tu_assert(x) \
253 ({ \
254 if (unlikely(!(x))) \
255 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
256 })
257 #else
258 #define tu_assert(x)
259 #endif
260
261 #define stub_return(v) \
262 do { \
263 tu_finishme("stub %s", __func__); \
264 return (v); \
265 } while (0)
266
267 #define stub() \
268 do { \
269 tu_finishme("stub %s", __func__); \
270 return; \
271 } while (0)
272
273 void *
274 tu_lookup_entrypoint_unchecked(const char *name);
275 void *
276 tu_lookup_entrypoint_checked(
277 const char *name,
278 uint32_t core_version,
279 const struct tu_instance_extension_table *instance,
280 const struct tu_device_extension_table *device);
281
282 struct tu_physical_device
283 {
284 VK_LOADER_DATA _loader_data;
285
286 struct tu_instance *instance;
287
288 char path[20];
289 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
290 uint8_t driver_uuid[VK_UUID_SIZE];
291 uint8_t device_uuid[VK_UUID_SIZE];
292 uint8_t cache_uuid[VK_UUID_SIZE];
293
294 int local_fd;
295 int master_fd;
296
297 struct fd_device *drm_device;
298 unsigned gpu_id;
299 uint32_t gmem_size;
300
301 /* This is the drivers on-disk cache used as a fallback as opposed to
302 * the pipeline cache defined by apps.
303 */
304 struct disk_cache *disk_cache;
305
306 struct tu_device_extension_table supported_extensions;
307 };
308
309 enum tu_debug_flags
310 {
311 TU_DEBUG_STARTUP = 1 << 0,
312 };
313
314 struct tu_instance
315 {
316 VK_LOADER_DATA _loader_data;
317
318 VkAllocationCallbacks alloc;
319
320 uint32_t api_version;
321 int physical_device_count;
322 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
323
324 enum tu_debug_flags debug_flags;
325
326 struct vk_debug_report_instance debug_report_callbacks;
327
328 struct tu_instance_extension_table enabled_extensions;
329 };
330
331 bool
332 tu_instance_extension_supported(const char *name);
333 uint32_t
334 tu_physical_device_api_version(struct tu_physical_device *dev);
335 bool
336 tu_physical_device_extension_supported(struct tu_physical_device *dev,
337 const char *name);
338
339 struct cache_entry;
340
341 struct tu_pipeline_cache
342 {
343 struct tu_device *device;
344 pthread_mutex_t mutex;
345
346 uint32_t total_size;
347 uint32_t table_size;
348 uint32_t kernel_count;
349 struct cache_entry **hash_table;
350 bool modified;
351
352 VkAllocationCallbacks alloc;
353 };
354
355 struct tu_pipeline_key
356 {
357 };
358
359 void
360 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
361 struct tu_device *device);
362 void
363 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
364 void
365 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
366 const void *data,
367 size_t size);
368
369 struct tu_shader_variant;
370
371 bool
372 tu_create_shader_variants_from_pipeline_cache(
373 struct tu_device *device,
374 struct tu_pipeline_cache *cache,
375 const unsigned char *sha1,
376 struct tu_shader_variant **variants);
377
378 void
379 tu_pipeline_cache_insert_shaders(struct tu_device *device,
380 struct tu_pipeline_cache *cache,
381 const unsigned char *sha1,
382 struct tu_shader_variant **variants,
383 const void *const *codes,
384 const unsigned *code_sizes);
385
386 struct tu_meta_state
387 {
388 VkAllocationCallbacks alloc;
389
390 struct tu_pipeline_cache cache;
391 };
392
393 /* queue types */
394 #define TU_QUEUE_GENERAL 0
395
396 #define TU_MAX_QUEUE_FAMILIES 1
397
398 struct tu_queue
399 {
400 VK_LOADER_DATA _loader_data;
401 struct tu_device *device;
402 uint32_t queue_family_index;
403 int queue_idx;
404 VkDeviceQueueCreateFlags flags;
405 };
406
407 struct tu_bo_list
408 {
409 unsigned capacity;
410 pthread_mutex_t mutex;
411 };
412
413 struct tu_device
414 {
415 VK_LOADER_DATA _loader_data;
416
417 VkAllocationCallbacks alloc;
418
419 struct tu_instance *instance;
420 struct radeon_winsys *ws;
421
422 struct tu_meta_state meta_state;
423
424 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
425 int queue_count[TU_MAX_QUEUE_FAMILIES];
426
427 struct tu_physical_device *physical_device;
428
429 /* Backup in-memory cache to be used if the app doesn't provide one */
430 struct tu_pipeline_cache *mem_cache;
431
432 struct list_head shader_slabs;
433 mtx_t shader_slab_mutex;
434
435 struct tu_device_extension_table enabled_extensions;
436
437 /* Whether the driver uses a global BO list. */
438 bool use_global_bo_list;
439
440 struct tu_bo_list bo_list;
441 };
442
443 struct tu_bo
444 {
445 uint32_t gem_handle;
446 uint64_t size;
447 uint64_t offset;
448 uint64_t iova;
449 void *map;
450 };
451
452 VkResult
453 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
454 void
455 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
456 VkResult
457 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
458
459 struct tu_device_memory
460 {
461 struct tu_bo bo;
462 VkDeviceSize size;
463
464 /* for dedicated allocations */
465 struct tu_image *image;
466 struct tu_buffer *buffer;
467
468 uint32_t type_index;
469 void *map;
470 void *user_ptr;
471 };
472
473 struct tu_descriptor_range
474 {
475 uint64_t va;
476 uint32_t size;
477 };
478
479 struct tu_descriptor_set
480 {
481 const struct tu_descriptor_set_layout *layout;
482 uint32_t size;
483
484 struct radeon_winsys_bo *bo;
485 uint64_t va;
486 uint32_t *mapped_ptr;
487 struct tu_descriptor_range *dynamic_descriptors;
488 };
489
490 struct tu_push_descriptor_set
491 {
492 struct tu_descriptor_set set;
493 uint32_t capacity;
494 };
495
496 struct tu_descriptor_pool_entry
497 {
498 uint32_t offset;
499 uint32_t size;
500 struct tu_descriptor_set *set;
501 };
502
503 struct tu_descriptor_pool
504 {
505 struct radeon_winsys_bo *bo;
506 uint8_t *mapped_ptr;
507 uint64_t current_offset;
508 uint64_t size;
509
510 uint8_t *host_memory_base;
511 uint8_t *host_memory_ptr;
512 uint8_t *host_memory_end;
513
514 uint32_t entry_count;
515 uint32_t max_entry_count;
516 struct tu_descriptor_pool_entry entries[0];
517 };
518
519 struct tu_descriptor_update_template_entry
520 {
521 VkDescriptorType descriptor_type;
522
523 /* The number of descriptors to update */
524 uint32_t descriptor_count;
525
526 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
527 */
528 uint32_t dst_offset;
529
530 /* In dwords. Not valid/used for dynamic descriptors */
531 uint32_t dst_stride;
532
533 uint32_t buffer_offset;
534
535 /* Only valid for combined image samplers and samplers */
536 uint16_t has_sampler;
537
538 /* In bytes */
539 size_t src_offset;
540 size_t src_stride;
541
542 /* For push descriptors */
543 const uint32_t *immutable_samplers;
544 };
545
546 struct tu_descriptor_update_template
547 {
548 uint32_t entry_count;
549 VkPipelineBindPoint bind_point;
550 struct tu_descriptor_update_template_entry entry[0];
551 };
552
553 struct tu_buffer
554 {
555 VkDeviceSize size;
556
557 VkBufferUsageFlags usage;
558 VkBufferCreateFlags flags;
559 };
560
561 enum tu_dynamic_state_bits
562 {
563 TU_DYNAMIC_VIEWPORT = 1 << 0,
564 TU_DYNAMIC_SCISSOR = 1 << 1,
565 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
566 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
567 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
568 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
569 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
570 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
571 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
572 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
573 TU_DYNAMIC_ALL = (1 << 10) - 1,
574 };
575
576 struct tu_vertex_binding
577 {
578 struct tu_buffer *buffer;
579 VkDeviceSize offset;
580 };
581
582 struct tu_viewport_state
583 {
584 uint32_t count;
585 VkViewport viewports[MAX_VIEWPORTS];
586 };
587
588 struct tu_scissor_state
589 {
590 uint32_t count;
591 VkRect2D scissors[MAX_SCISSORS];
592 };
593
594 struct tu_discard_rectangle_state
595 {
596 uint32_t count;
597 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
598 };
599
600 struct tu_dynamic_state
601 {
602 /**
603 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
604 * Defines the set of saved dynamic state.
605 */
606 uint32_t mask;
607
608 struct tu_viewport_state viewport;
609
610 struct tu_scissor_state scissor;
611
612 float line_width;
613
614 struct
615 {
616 float bias;
617 float clamp;
618 float slope;
619 } depth_bias;
620
621 float blend_constants[4];
622
623 struct
624 {
625 float min;
626 float max;
627 } depth_bounds;
628
629 struct
630 {
631 uint32_t front;
632 uint32_t back;
633 } stencil_compare_mask;
634
635 struct
636 {
637 uint32_t front;
638 uint32_t back;
639 } stencil_write_mask;
640
641 struct
642 {
643 uint32_t front;
644 uint32_t back;
645 } stencil_reference;
646
647 struct tu_discard_rectangle_state discard_rectangle;
648 };
649
650 extern const struct tu_dynamic_state default_dynamic_state;
651
652 const char *
653 tu_get_debug_option_name(int id);
654
655 const char *
656 tu_get_perftest_option_name(int id);
657
658 /**
659 * Attachment state when recording a renderpass instance.
660 *
661 * The clear value is valid only if there exists a pending clear.
662 */
663 struct tu_attachment_state
664 {
665 VkImageAspectFlags pending_clear_aspects;
666 uint32_t cleared_views;
667 VkClearValue clear_value;
668 VkImageLayout current_layout;
669 };
670
671 struct tu_descriptor_state
672 {
673 struct tu_descriptor_set *sets[MAX_SETS];
674 uint32_t dirty;
675 uint32_t valid;
676 struct tu_push_descriptor_set push_set;
677 bool push_dirty;
678 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
679 };
680
681 struct tu_cmd_state
682 {
683 /* Vertex descriptors */
684 uint64_t vb_va;
685 unsigned vb_size;
686
687 struct tu_dynamic_state dynamic;
688
689 /* Index buffer */
690 struct tu_buffer *index_buffer;
691 uint64_t index_offset;
692 uint32_t index_type;
693 uint32_t max_index_count;
694 uint64_t index_va;
695 };
696
697 struct tu_cmd_pool
698 {
699 VkAllocationCallbacks alloc;
700 struct list_head cmd_buffers;
701 struct list_head free_cmd_buffers;
702 uint32_t queue_family_index;
703 };
704
705 struct tu_cmd_buffer_upload
706 {
707 uint8_t *map;
708 unsigned offset;
709 uint64_t size;
710 struct radeon_winsys_bo *upload_bo;
711 struct list_head list;
712 };
713
714 enum tu_cmd_buffer_status
715 {
716 TU_CMD_BUFFER_STATUS_INVALID,
717 TU_CMD_BUFFER_STATUS_INITIAL,
718 TU_CMD_BUFFER_STATUS_RECORDING,
719 TU_CMD_BUFFER_STATUS_EXECUTABLE,
720 TU_CMD_BUFFER_STATUS_PENDING,
721 };
722
723 struct tu_cmd_buffer
724 {
725 VK_LOADER_DATA _loader_data;
726
727 struct tu_device *device;
728
729 struct tu_cmd_pool *pool;
730 struct list_head pool_link;
731
732 VkCommandBufferUsageFlags usage_flags;
733 VkCommandBufferLevel level;
734 enum tu_cmd_buffer_status status;
735 struct radeon_cmdbuf *cs;
736 struct tu_cmd_state state;
737 struct tu_vertex_binding vertex_bindings[MAX_VBS];
738 uint32_t queue_family_index;
739
740 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
741 VkShaderStageFlags push_constant_stages;
742 struct tu_descriptor_set meta_push_descriptors;
743
744 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
745
746 struct tu_cmd_buffer_upload upload;
747
748 uint32_t scratch_size_needed;
749 uint32_t compute_scratch_size_needed;
750 uint32_t esgs_ring_size_needed;
751 uint32_t gsvs_ring_size_needed;
752 bool tess_rings_needed;
753 bool sample_positions_needed;
754
755 VkResult record_result;
756
757 uint32_t gfx9_fence_offset;
758 struct radeon_winsys_bo *gfx9_fence_bo;
759 uint32_t gfx9_fence_idx;
760 uint64_t gfx9_eop_bug_va;
761
762 /**
763 * Whether a query pool has been resetted and we have to flush caches.
764 */
765 bool pending_reset_query;
766 };
767
768 bool
769 tu_get_memory_fd(struct tu_device *device,
770 struct tu_device_memory *memory,
771 int *pFD);
772
773 /*
774 * Takes x,y,z as exact numbers of invocations, instead of blocks.
775 *
776 * Limitations: Can't call normal dispatch functions without binding or
777 * rebinding
778 * the compute pipeline.
779 */
780 void
781 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
782 uint32_t x,
783 uint32_t y,
784 uint32_t z);
785
786 struct tu_event
787 {
788 struct radeon_winsys_bo *bo;
789 uint64_t *map;
790 };
791
792 struct tu_shader_module;
793
794 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
795 #define TU_HASH_SHADER_SISCHED (1 << 1)
796 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
797 void
798 tu_hash_shaders(unsigned char *hash,
799 const VkPipelineShaderStageCreateInfo **stages,
800 const struct tu_pipeline_layout *layout,
801 const struct tu_pipeline_key *key,
802 uint32_t flags);
803
804 static inline gl_shader_stage
805 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
806 {
807 assert(__builtin_popcount(vk_stage) == 1);
808 return ffs(vk_stage) - 1;
809 }
810
811 static inline VkShaderStageFlagBits
812 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
813 {
814 return (1 << mesa_stage);
815 }
816
817 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
818
819 #define tu_foreach_stage(stage, stage_bits) \
820 for (gl_shader_stage stage, \
821 __tmp = (gl_shader_stage)((stage_bits)&TU_STAGE_MASK); \
822 stage = __builtin_ffs(__tmp) - 1, __tmp; \
823 __tmp &= ~(1 << (stage)))
824
825 struct tu_shader_module
826 {
827 struct nir_shader *nir;
828 unsigned char sha1[20];
829 uint32_t size;
830 char data[0];
831 };
832
833 struct tu_pipeline
834 {
835 struct tu_device *device;
836 struct tu_dynamic_state dynamic_state;
837
838 struct tu_pipeline_layout *layout;
839
840 bool need_indirect_descriptor_sets;
841 VkShaderStageFlags active_stages;
842 };
843
844 struct tu_userdata_info *
845 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
846 gl_shader_stage stage,
847 int idx);
848
849 struct tu_shader_variant *
850 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
851
852 struct tu_graphics_pipeline_create_info
853 {
854 bool use_rectlist;
855 bool db_depth_clear;
856 bool db_stencil_clear;
857 bool db_depth_disable_expclear;
858 bool db_stencil_disable_expclear;
859 bool db_flush_depth_inplace;
860 bool db_flush_stencil_inplace;
861 bool db_resummarize;
862 uint32_t custom_blend_mode;
863 };
864
865 VkResult
866 tu_graphics_pipeline_create(
867 VkDevice device,
868 VkPipelineCache cache,
869 const VkGraphicsPipelineCreateInfo *pCreateInfo,
870 const struct tu_graphics_pipeline_create_info *extra,
871 const VkAllocationCallbacks *alloc,
872 VkPipeline *pPipeline);
873
874 struct vk_format_description;
875 uint32_t
876 tu_translate_buffer_dataformat(const struct vk_format_description *desc,
877 int first_non_void);
878 uint32_t
879 tu_translate_buffer_numformat(const struct vk_format_description *desc,
880 int first_non_void);
881 uint32_t
882 tu_translate_colorformat(VkFormat format);
883 uint32_t
884 tu_translate_color_numformat(VkFormat format,
885 const struct vk_format_description *desc,
886 int first_non_void);
887 uint32_t
888 tu_colorformat_endian_swap(uint32_t colorformat);
889 unsigned
890 tu_translate_colorswap(VkFormat format, bool do_endian_swap);
891 uint32_t
892 tu_translate_dbformat(VkFormat format);
893 uint32_t
894 tu_translate_tex_dataformat(VkFormat format,
895 const struct vk_format_description *desc,
896 int first_non_void);
897 uint32_t
898 tu_translate_tex_numformat(VkFormat format,
899 const struct vk_format_description *desc,
900 int first_non_void);
901 bool
902 tu_format_pack_clear_color(VkFormat format,
903 uint32_t clear_vals[2],
904 VkClearColorValue *value);
905 bool
906 tu_is_colorbuffer_format_supported(VkFormat format, bool *blendable);
907 bool
908 tu_dcc_formats_compatible(VkFormat format1, VkFormat format2);
909
910 struct tu_image
911 {
912 VkImageType type;
913 /* The original VkFormat provided by the client. This may not match any
914 * of the actual surface formats.
915 */
916 VkFormat vk_format;
917 VkImageAspectFlags aspects;
918 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
919 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
920 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
921
922 VkDeviceSize size;
923 uint32_t alignment;
924
925 unsigned queue_family_mask;
926 bool exclusive;
927 bool shareable;
928
929 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
930 VkDeviceMemory owned_memory;
931 };
932
933 unsigned
934 tu_image_queue_family_mask(const struct tu_image *image,
935 uint32_t family,
936 uint32_t queue_family);
937
938 static inline uint32_t
939 tu_get_layerCount(const struct tu_image *image,
940 const VkImageSubresourceRange *range)
941 {
942 abort();
943 }
944
945 static inline uint32_t
946 tu_get_levelCount(const struct tu_image *image,
947 const VkImageSubresourceRange *range)
948 {
949 abort();
950 }
951
952 struct tu_image_view
953 {
954 struct tu_image *image; /**< VkImageViewCreateInfo::image */
955
956 VkImageViewType type;
957 VkImageAspectFlags aspect_mask;
958 VkFormat vk_format;
959 uint32_t base_layer;
960 uint32_t layer_count;
961 uint32_t base_mip;
962 uint32_t level_count;
963 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
964
965 uint32_t descriptor[16];
966
967 /* Descriptor for use as a storage image as opposed to a sampled image.
968 * This has a few differences for cube maps (e.g. type).
969 */
970 uint32_t storage_descriptor[16];
971 };
972
973 struct tu_sampler
974 {
975 };
976
977 struct tu_image_create_info
978 {
979 const VkImageCreateInfo *vk_info;
980 bool scanout;
981 bool no_metadata_planes;
982 };
983
984 VkResult
985 tu_image_create(VkDevice _device,
986 const struct tu_image_create_info *info,
987 const VkAllocationCallbacks *alloc,
988 VkImage *pImage);
989
990 VkResult
991 tu_image_from_gralloc(VkDevice device_h,
992 const VkImageCreateInfo *base_info,
993 const VkNativeBufferANDROID *gralloc_info,
994 const VkAllocationCallbacks *alloc,
995 VkImage *out_image_h);
996
997 void
998 tu_image_view_init(struct tu_image_view *view,
999 struct tu_device *device,
1000 const VkImageViewCreateInfo *pCreateInfo);
1001
1002 struct tu_buffer_view
1003 {
1004 struct radeon_winsys_bo *bo;
1005 VkFormat vk_format;
1006 uint64_t range; /**< VkBufferViewCreateInfo::range */
1007 uint32_t state[4];
1008 };
1009 void
1010 tu_buffer_view_init(struct tu_buffer_view *view,
1011 struct tu_device *device,
1012 const VkBufferViewCreateInfo *pCreateInfo);
1013
1014 static inline struct VkExtent3D
1015 tu_sanitize_image_extent(const VkImageType imageType,
1016 const struct VkExtent3D imageExtent)
1017 {
1018 switch (imageType) {
1019 case VK_IMAGE_TYPE_1D:
1020 return (VkExtent3D){ imageExtent.width, 1, 1 };
1021 case VK_IMAGE_TYPE_2D:
1022 return (VkExtent3D){ imageExtent.width, imageExtent.height, 1 };
1023 case VK_IMAGE_TYPE_3D:
1024 return imageExtent;
1025 default:
1026 unreachable("invalid image type");
1027 }
1028 }
1029
1030 static inline struct VkOffset3D
1031 tu_sanitize_image_offset(const VkImageType imageType,
1032 const struct VkOffset3D imageOffset)
1033 {
1034 switch (imageType) {
1035 case VK_IMAGE_TYPE_1D:
1036 return (VkOffset3D){ imageOffset.x, 0, 0 };
1037 case VK_IMAGE_TYPE_2D:
1038 return (VkOffset3D){ imageOffset.x, imageOffset.y, 0 };
1039 case VK_IMAGE_TYPE_3D:
1040 return imageOffset;
1041 default:
1042 unreachable("invalid image type");
1043 }
1044 }
1045
1046 struct tu_attachment_info
1047 {
1048 struct tu_image_view *attachment;
1049 };
1050
1051 struct tu_framebuffer
1052 {
1053 uint32_t width;
1054 uint32_t height;
1055 uint32_t layers;
1056
1057 uint32_t attachment_count;
1058 struct tu_attachment_info attachments[0];
1059 };
1060
1061 struct tu_subpass_barrier
1062 {
1063 VkPipelineStageFlags src_stage_mask;
1064 VkAccessFlags src_access_mask;
1065 VkAccessFlags dst_access_mask;
1066 };
1067
1068 void
1069 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1070 const struct tu_subpass_barrier *barrier);
1071
1072 struct tu_subpass_attachment
1073 {
1074 uint32_t attachment;
1075 VkImageLayout layout;
1076 };
1077
1078 struct tu_subpass
1079 {
1080 uint32_t input_count;
1081 uint32_t color_count;
1082 struct tu_subpass_attachment *input_attachments;
1083 struct tu_subpass_attachment *color_attachments;
1084 struct tu_subpass_attachment *resolve_attachments;
1085 struct tu_subpass_attachment depth_stencil_attachment;
1086
1087 /** Subpass has at least one resolve attachment */
1088 bool has_resolve;
1089
1090 struct tu_subpass_barrier start_barrier;
1091
1092 uint32_t view_mask;
1093 VkSampleCountFlagBits max_sample_count;
1094 };
1095
1096 struct tu_render_pass_attachment
1097 {
1098 VkFormat format;
1099 uint32_t samples;
1100 VkAttachmentLoadOp load_op;
1101 VkAttachmentLoadOp stencil_load_op;
1102 VkImageLayout initial_layout;
1103 VkImageLayout final_layout;
1104 uint32_t view_mask;
1105 };
1106
1107 struct tu_render_pass
1108 {
1109 uint32_t attachment_count;
1110 uint32_t subpass_count;
1111 struct tu_subpass_attachment *subpass_attachments;
1112 struct tu_render_pass_attachment *attachments;
1113 struct tu_subpass_barrier end_barrier;
1114 struct tu_subpass subpasses[0];
1115 };
1116
1117 VkResult
1118 tu_device_init_meta(struct tu_device *device);
1119 void
1120 tu_device_finish_meta(struct tu_device *device);
1121
1122 struct tu_query_pool
1123 {
1124 struct radeon_winsys_bo *bo;
1125 uint32_t stride;
1126 uint32_t availability_offset;
1127 uint64_t size;
1128 char *ptr;
1129 VkQueryType type;
1130 uint32_t pipeline_stats_mask;
1131 };
1132
1133 struct tu_semaphore
1134 {
1135 /* use a winsys sem for non-exportable */
1136 struct radeon_winsys_sem *sem;
1137 uint32_t syncobj;
1138 uint32_t temp_syncobj;
1139 };
1140
1141 void
1142 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1143 VkPipelineBindPoint bind_point,
1144 struct tu_descriptor_set *set,
1145 unsigned idx);
1146
1147 void
1148 tu_update_descriptor_sets(struct tu_device *device,
1149 struct tu_cmd_buffer *cmd_buffer,
1150 VkDescriptorSet overrideSet,
1151 uint32_t descriptorWriteCount,
1152 const VkWriteDescriptorSet *pDescriptorWrites,
1153 uint32_t descriptorCopyCount,
1154 const VkCopyDescriptorSet *pDescriptorCopies);
1155
1156 void
1157 tu_update_descriptor_set_with_template(
1158 struct tu_device *device,
1159 struct tu_cmd_buffer *cmd_buffer,
1160 struct tu_descriptor_set *set,
1161 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
1162 const void *pData);
1163
1164 void
1165 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1166 VkPipelineBindPoint pipelineBindPoint,
1167 VkPipelineLayout _layout,
1168 uint32_t set,
1169 uint32_t descriptorWriteCount,
1170 const VkWriteDescriptorSet *pDescriptorWrites);
1171
1172 struct tu_fence
1173 {
1174 struct radeon_winsys_fence *fence;
1175 bool submitted;
1176 bool signalled;
1177
1178 uint32_t syncobj;
1179 uint32_t temp_syncobj;
1180 };
1181
1182 /* tu_nir_to_llvm.c */
1183 struct tu_shader_variant_info;
1184 struct tu_nir_compiler_options;
1185
1186 struct radeon_winsys_sem;
1187
1188 uint32_t
1189 tu_gem_new(struct tu_device *dev, uint64_t size, uint32_t flags);
1190 void
1191 tu_gem_close(struct tu_device *dev, uint32_t gem_handle);
1192 uint64_t
1193 tu_gem_info_offset(struct tu_device *dev, uint32_t gem_handle);
1194 uint64_t
1195 tu_gem_info_iova(struct tu_device *dev, uint32_t gem_handle);
1196
1197 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1198 \
1199 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1200 { \
1201 return (struct __tu_type *)_handle; \
1202 } \
1203 \
1204 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1205 { \
1206 return (__VkType)_obj; \
1207 }
1208
1209 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1210 \
1211 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1212 { \
1213 return (struct __tu_type *)(uintptr_t)_handle; \
1214 } \
1215 \
1216 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1217 { \
1218 return (__VkType)(uintptr_t)_obj; \
1219 }
1220
1221 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1222 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1223
1224 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1225 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1226 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1227 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1228 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1229
1230 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1231 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1232 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1233 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1234 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1235 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1236 VkDescriptorSetLayout)
1237 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1238 VkDescriptorUpdateTemplateKHR)
1239 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1240 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1241 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1242 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1243 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1244 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1245 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1246 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1247 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1248 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1249 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1250 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1251 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1252 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1253
1254 #endif /* TU_PRIVATE_H */