turnip: implement image view descriptor
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53 #include "wsi_common.h"
54
55 #include "drm-uapi/msm_drm.h"
56 #include "ir3/ir3_compiler.h"
57 #include "ir3/ir3_shader.h"
58
59 #include "adreno_common.xml.h"
60 #include "adreno_pm4.xml.h"
61 #include "a6xx.xml.h"
62
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
65
66 /* Pre-declarations needed for WSI entrypoints */
67 struct wl_surface;
68 struct wl_display;
69 typedef struct xcb_connection_t xcb_connection_t;
70 typedef uint32_t xcb_visualid_t;
71 typedef uint32_t xcb_window_t;
72
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
77
78 #include "tu_entrypoints.h"
79
80 #define MAX_VBS 32
81 #define MAX_VERTEX_ATTRIBS 32
82 #define MAX_RTS 8
83 #define MAX_VSC_PIPES 32
84 #define MAX_VIEWPORTS 1
85 #define MAX_SCISSORS 16
86 #define MAX_DISCARD_RECTANGLES 4
87 #define MAX_PUSH_CONSTANTS_SIZE 128
88 #define MAX_PUSH_DESCRIPTORS 32
89 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
90 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
91 #define MAX_DYNAMIC_BUFFERS \
92 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
93 #define MAX_SAMPLES_LOG2 4
94 #define NUM_META_FS_KEYS 13
95 #define TU_MAX_DRM_DEVICES 8
96 #define MAX_VIEWS 8
97
98 #define NUM_DEPTH_CLEAR_PIPELINES 3
99
100 /*
101 * This is the point we switch from using CP to compute shader
102 * for certain buffer operations.
103 */
104 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
105
106 #define A6XX_TEX_CONST_DWORDS 16
107 #define A6XX_TEX_SAMP_DWORDS 4
108
109 enum tu_mem_heap
110 {
111 TU_MEM_HEAP_VRAM,
112 TU_MEM_HEAP_VRAM_CPU_ACCESS,
113 TU_MEM_HEAP_GTT,
114 TU_MEM_HEAP_COUNT
115 };
116
117 enum tu_mem_type
118 {
119 TU_MEM_TYPE_VRAM,
120 TU_MEM_TYPE_GTT_WRITE_COMBINE,
121 TU_MEM_TYPE_VRAM_CPU_ACCESS,
122 TU_MEM_TYPE_GTT_CACHED,
123 TU_MEM_TYPE_COUNT
124 };
125
126 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
127
128 static inline uint32_t
129 align_u32(uint32_t v, uint32_t a)
130 {
131 assert(a != 0 && a == (a & -a));
132 return (v + a - 1) & ~(a - 1);
133 }
134
135 static inline uint32_t
136 align_u32_npot(uint32_t v, uint32_t a)
137 {
138 return (v + a - 1) / a * a;
139 }
140
141 static inline uint64_t
142 align_u64(uint64_t v, uint64_t a)
143 {
144 assert(a != 0 && a == (a & -a));
145 return (v + a - 1) & ~(a - 1);
146 }
147
148 static inline int32_t
149 align_i32(int32_t v, int32_t a)
150 {
151 assert(a != 0 && a == (a & -a));
152 return (v + a - 1) & ~(a - 1);
153 }
154
155 /** Alignment must be a power of 2. */
156 static inline bool
157 tu_is_aligned(uintmax_t n, uintmax_t a)
158 {
159 assert(a == (a & -a));
160 return (n & (a - 1)) == 0;
161 }
162
163 static inline uint32_t
164 round_up_u32(uint32_t v, uint32_t a)
165 {
166 return (v + a - 1) / a;
167 }
168
169 static inline uint64_t
170 round_up_u64(uint64_t v, uint64_t a)
171 {
172 return (v + a - 1) / a;
173 }
174
175 static inline uint32_t
176 tu_minify(uint32_t n, uint32_t levels)
177 {
178 if (unlikely(n == 0))
179 return 0;
180 else
181 return MAX2(n >> levels, 1);
182 }
183 static inline float
184 tu_clamp_f(float f, float min, float max)
185 {
186 assert(min < max);
187
188 if (f > max)
189 return max;
190 else if (f < min)
191 return min;
192 else
193 return f;
194 }
195
196 static inline bool
197 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
198 {
199 if (*inout_mask & clear_mask) {
200 *inout_mask &= ~clear_mask;
201 return true;
202 } else {
203 return false;
204 }
205 }
206
207 #define for_each_bit(b, dword) \
208 for (uint32_t __dword = (dword); \
209 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
210
211 #define typed_memcpy(dest, src, count) \
212 ({ \
213 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
214 memcpy((dest), (src), (count) * sizeof(*(src))); \
215 })
216
217 #define COND(bool, val) ((bool) ? (val) : 0)
218
219 /* Whenever we generate an error, pass it through this function. Useful for
220 * debugging, where we can break on it. Only call at error site, not when
221 * propagating errors. Might be useful to plug in a stack trace here.
222 */
223
224 struct tu_instance;
225
226 VkResult
227 __vk_errorf(struct tu_instance *instance,
228 VkResult error,
229 const char *file,
230 int line,
231 const char *format,
232 ...);
233
234 #define vk_error(instance, error) \
235 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
236 #define vk_errorf(instance, error, format, ...) \
237 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
238
239 void
240 __tu_finishme(const char *file, int line, const char *format, ...)
241 tu_printflike(3, 4);
242 void
243 tu_loge(const char *format, ...) tu_printflike(1, 2);
244 void
245 tu_loge_v(const char *format, va_list va);
246 void
247 tu_logi(const char *format, ...) tu_printflike(1, 2);
248 void
249 tu_logi_v(const char *format, va_list va);
250
251 /**
252 * Print a FINISHME message, including its source location.
253 */
254 #define tu_finishme(format, ...) \
255 do { \
256 static bool reported = false; \
257 if (!reported) { \
258 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
259 reported = true; \
260 } \
261 } while (0)
262
263 /* A non-fatal assert. Useful for debugging. */
264 #ifdef DEBUG
265 #define tu_assert(x) \
266 ({ \
267 if (unlikely(!(x))) \
268 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
269 })
270 #else
271 #define tu_assert(x)
272 #endif
273
274 /* Suppress -Wunused in stub functions */
275 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
276 static inline void
277 __tu_use_args(int ignore, ...)
278 {
279 }
280
281 #define tu_stub() \
282 do { \
283 tu_finishme("stub %s", __func__); \
284 } while (0)
285
286 void *
287 tu_lookup_entrypoint_unchecked(const char *name);
288 void *
289 tu_lookup_entrypoint_checked(
290 const char *name,
291 uint32_t core_version,
292 const struct tu_instance_extension_table *instance,
293 const struct tu_device_extension_table *device);
294
295 struct tu_physical_device
296 {
297 VK_LOADER_DATA _loader_data;
298
299 struct tu_instance *instance;
300
301 char path[20];
302 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
303 uint8_t driver_uuid[VK_UUID_SIZE];
304 uint8_t device_uuid[VK_UUID_SIZE];
305 uint8_t cache_uuid[VK_UUID_SIZE];
306
307 struct wsi_device wsi_device;
308
309 int local_fd;
310 int master_fd;
311
312 unsigned gpu_id;
313 uint32_t gmem_size;
314 uint32_t tile_align_w;
315 uint32_t tile_align_h;
316
317 /* This is the drivers on-disk cache used as a fallback as opposed to
318 * the pipeline cache defined by apps.
319 */
320 struct disk_cache *disk_cache;
321
322 struct tu_device_extension_table supported_extensions;
323 };
324
325 enum tu_debug_flags
326 {
327 TU_DEBUG_STARTUP = 1 << 0,
328 TU_DEBUG_NIR = 1 << 1,
329 TU_DEBUG_IR3 = 1 << 2,
330 };
331
332 struct tu_instance
333 {
334 VK_LOADER_DATA _loader_data;
335
336 VkAllocationCallbacks alloc;
337
338 uint32_t api_version;
339 int physical_device_count;
340 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
341
342 enum tu_debug_flags debug_flags;
343
344 struct vk_debug_report_instance debug_report_callbacks;
345
346 struct tu_instance_extension_table enabled_extensions;
347 };
348
349 VkResult
350 tu_wsi_init(struct tu_physical_device *physical_device);
351 void
352 tu_wsi_finish(struct tu_physical_device *physical_device);
353
354 bool
355 tu_instance_extension_supported(const char *name);
356 uint32_t
357 tu_physical_device_api_version(struct tu_physical_device *dev);
358 bool
359 tu_physical_device_extension_supported(struct tu_physical_device *dev,
360 const char *name);
361
362 struct cache_entry;
363
364 struct tu_pipeline_cache
365 {
366 struct tu_device *device;
367 pthread_mutex_t mutex;
368
369 uint32_t total_size;
370 uint32_t table_size;
371 uint32_t kernel_count;
372 struct cache_entry **hash_table;
373 bool modified;
374
375 VkAllocationCallbacks alloc;
376 };
377
378 struct tu_pipeline_key
379 {
380 };
381
382 void
383 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
384 struct tu_device *device);
385 void
386 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
387 void
388 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
389 const void *data,
390 size_t size);
391
392 struct tu_shader_variant;
393
394 bool
395 tu_create_shader_variants_from_pipeline_cache(
396 struct tu_device *device,
397 struct tu_pipeline_cache *cache,
398 const unsigned char *sha1,
399 struct tu_shader_variant **variants);
400
401 void
402 tu_pipeline_cache_insert_shaders(struct tu_device *device,
403 struct tu_pipeline_cache *cache,
404 const unsigned char *sha1,
405 struct tu_shader_variant **variants,
406 const void *const *codes,
407 const unsigned *code_sizes);
408
409 struct tu_meta_state
410 {
411 VkAllocationCallbacks alloc;
412
413 struct tu_pipeline_cache cache;
414 };
415
416 /* queue types */
417 #define TU_QUEUE_GENERAL 0
418
419 #define TU_MAX_QUEUE_FAMILIES 1
420
421 struct tu_fence
422 {
423 bool signaled;
424 int fd;
425 };
426
427 void
428 tu_fence_init(struct tu_fence *fence, bool signaled);
429 void
430 tu_fence_finish(struct tu_fence *fence);
431 void
432 tu_fence_update_fd(struct tu_fence *fence, int fd);
433 void
434 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
435 void
436 tu_fence_signal(struct tu_fence *fence);
437 void
438 tu_fence_wait_idle(struct tu_fence *fence);
439
440 struct tu_queue
441 {
442 VK_LOADER_DATA _loader_data;
443 struct tu_device *device;
444 uint32_t queue_family_index;
445 int queue_idx;
446 VkDeviceQueueCreateFlags flags;
447
448 uint32_t msm_queue_id;
449 struct tu_fence submit_fence;
450 };
451
452 struct tu_device
453 {
454 VK_LOADER_DATA _loader_data;
455
456 VkAllocationCallbacks alloc;
457
458 struct tu_instance *instance;
459
460 struct tu_meta_state meta_state;
461
462 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
463 int queue_count[TU_MAX_QUEUE_FAMILIES];
464
465 struct tu_physical_device *physical_device;
466
467 struct ir3_compiler *compiler;
468
469 /* Backup in-memory cache to be used if the app doesn't provide one */
470 struct tu_pipeline_cache *mem_cache;
471
472 struct list_head shader_slabs;
473 mtx_t shader_slab_mutex;
474
475 struct tu_device_extension_table enabled_extensions;
476 };
477
478 struct tu_bo
479 {
480 uint32_t gem_handle;
481 uint64_t size;
482 uint64_t iova;
483 void *map;
484 };
485
486 VkResult
487 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
488 VkResult
489 tu_bo_init_dmabuf(struct tu_device *dev,
490 struct tu_bo *bo,
491 uint64_t size,
492 int fd);
493 int
494 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
495 void
496 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
497 VkResult
498 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
499
500 struct tu_cs_entry
501 {
502 /* No ownership */
503 const struct tu_bo *bo;
504
505 uint32_t size;
506 uint32_t offset;
507 };
508
509 enum tu_cs_mode
510 {
511
512 /*
513 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
514 * is full. tu_cs_begin must be called before command packet emission and
515 * tu_cs_end must be called after.
516 *
517 * This mode may create multiple entries internally. The entries must be
518 * submitted together.
519 */
520 TU_CS_MODE_GROW,
521
522 /*
523 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
524 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
525 * effect on it.
526 *
527 * This mode does not create any entry or any BO.
528 */
529 TU_CS_MODE_EXTERNAL,
530
531 /*
532 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
533 * command packet emission. tu_cs_begin_sub_stream must be called to get a
534 * sub-stream to emit comamnd packets to. When done with the sub-stream,
535 * tu_cs_end_sub_stream must be called.
536 *
537 * This mode does not create any entry internally.
538 */
539 TU_CS_MODE_SUB_STREAM,
540 };
541
542 struct tu_cs
543 {
544 uint32_t *start;
545 uint32_t *cur;
546 uint32_t *reserved_end;
547 uint32_t *end;
548
549 enum tu_cs_mode mode;
550 uint32_t next_bo_size;
551
552 struct tu_cs_entry *entries;
553 uint32_t entry_count;
554 uint32_t entry_capacity;
555
556 struct tu_bo **bos;
557 uint32_t bo_count;
558 uint32_t bo_capacity;
559 };
560
561 struct tu_device_memory
562 {
563 struct tu_bo bo;
564 VkDeviceSize size;
565
566 /* for dedicated allocations */
567 struct tu_image *image;
568 struct tu_buffer *buffer;
569
570 uint32_t type_index;
571 void *map;
572 void *user_ptr;
573 };
574
575 struct tu_descriptor_range
576 {
577 uint64_t va;
578 uint32_t size;
579 };
580
581 struct tu_descriptor_set
582 {
583 const struct tu_descriptor_set_layout *layout;
584 uint32_t size;
585
586 uint64_t va;
587 uint32_t *mapped_ptr;
588 struct tu_descriptor_range *dynamic_descriptors;
589 };
590
591 struct tu_push_descriptor_set
592 {
593 struct tu_descriptor_set set;
594 uint32_t capacity;
595 };
596
597 struct tu_descriptor_pool_entry
598 {
599 uint32_t offset;
600 uint32_t size;
601 struct tu_descriptor_set *set;
602 };
603
604 struct tu_descriptor_pool
605 {
606 uint8_t *mapped_ptr;
607 uint64_t current_offset;
608 uint64_t size;
609
610 uint8_t *host_memory_base;
611 uint8_t *host_memory_ptr;
612 uint8_t *host_memory_end;
613
614 uint32_t entry_count;
615 uint32_t max_entry_count;
616 struct tu_descriptor_pool_entry entries[0];
617 };
618
619 struct tu_descriptor_update_template_entry
620 {
621 VkDescriptorType descriptor_type;
622
623 /* The number of descriptors to update */
624 uint32_t descriptor_count;
625
626 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
627 */
628 uint32_t dst_offset;
629
630 /* In dwords. Not valid/used for dynamic descriptors */
631 uint32_t dst_stride;
632
633 uint32_t buffer_offset;
634
635 /* Only valid for combined image samplers and samplers */
636 uint16_t has_sampler;
637
638 /* In bytes */
639 size_t src_offset;
640 size_t src_stride;
641
642 /* For push descriptors */
643 const uint32_t *immutable_samplers;
644 };
645
646 struct tu_descriptor_update_template
647 {
648 uint32_t entry_count;
649 VkPipelineBindPoint bind_point;
650 struct tu_descriptor_update_template_entry entry[0];
651 };
652
653 struct tu_buffer
654 {
655 VkDeviceSize size;
656
657 VkBufferUsageFlags usage;
658 VkBufferCreateFlags flags;
659
660 struct tu_bo *bo;
661 VkDeviceSize bo_offset;
662 };
663
664 enum tu_dynamic_state_bits
665 {
666 TU_DYNAMIC_VIEWPORT = 1 << 0,
667 TU_DYNAMIC_SCISSOR = 1 << 1,
668 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
669 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
670 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
671 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
672 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
673 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
674 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
675 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
676 TU_DYNAMIC_ALL = (1 << 10) - 1,
677 };
678
679 struct tu_vertex_binding
680 {
681 struct tu_buffer *buffer;
682 VkDeviceSize offset;
683 };
684
685 struct tu_viewport_state
686 {
687 uint32_t count;
688 VkViewport viewports[MAX_VIEWPORTS];
689 };
690
691 struct tu_scissor_state
692 {
693 uint32_t count;
694 VkRect2D scissors[MAX_SCISSORS];
695 };
696
697 struct tu_discard_rectangle_state
698 {
699 uint32_t count;
700 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
701 };
702
703 struct tu_dynamic_state
704 {
705 /**
706 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
707 * Defines the set of saved dynamic state.
708 */
709 uint32_t mask;
710
711 struct tu_viewport_state viewport;
712
713 struct tu_scissor_state scissor;
714
715 float line_width;
716
717 struct
718 {
719 float bias;
720 float clamp;
721 float slope;
722 } depth_bias;
723
724 float blend_constants[4];
725
726 struct
727 {
728 float min;
729 float max;
730 } depth_bounds;
731
732 struct
733 {
734 uint32_t front;
735 uint32_t back;
736 } stencil_compare_mask;
737
738 struct
739 {
740 uint32_t front;
741 uint32_t back;
742 } stencil_write_mask;
743
744 struct
745 {
746 uint32_t front;
747 uint32_t back;
748 } stencil_reference;
749
750 struct tu_discard_rectangle_state discard_rectangle;
751 };
752
753 extern const struct tu_dynamic_state default_dynamic_state;
754
755 const char *
756 tu_get_debug_option_name(int id);
757
758 const char *
759 tu_get_perftest_option_name(int id);
760
761 /**
762 * Attachment state when recording a renderpass instance.
763 *
764 * The clear value is valid only if there exists a pending clear.
765 */
766 struct tu_attachment_state
767 {
768 VkImageAspectFlags pending_clear_aspects;
769 uint32_t cleared_views;
770 VkClearValue clear_value;
771 VkImageLayout current_layout;
772 };
773
774 struct tu_descriptor_state
775 {
776 struct tu_descriptor_set *sets[MAX_SETS];
777 uint32_t dirty;
778 uint32_t valid;
779 struct tu_push_descriptor_set push_set;
780 bool push_dirty;
781 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
782 };
783
784 struct tu_tile
785 {
786 uint8_t pipe;
787 uint8_t slot;
788 VkOffset2D begin;
789 VkOffset2D end;
790 };
791
792 struct tu_tiling_config
793 {
794 VkRect2D render_area;
795 uint32_t buffer_cpp[MAX_RTS + 2];
796 uint32_t buffer_count;
797
798 /* position and size of the first tile */
799 VkRect2D tile0;
800 /* number of tiles */
801 VkExtent2D tile_count;
802
803 uint32_t gmem_offsets[MAX_RTS + 2];
804
805 /* size of the first VSC pipe */
806 VkExtent2D pipe0;
807 /* number of VSC pipes */
808 VkExtent2D pipe_count;
809
810 /* pipe register values */
811 uint32_t pipe_config[MAX_VSC_PIPES];
812 uint32_t pipe_sizes[MAX_VSC_PIPES];
813 };
814
815 enum tu_cmd_dirty_bits
816 {
817 TU_CMD_DIRTY_PIPELINE = 1 << 0,
818 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1,
819
820 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
821 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
822 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18,
823 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19,
824 };
825
826 struct tu_cmd_state
827 {
828 uint32_t dirty;
829
830 struct tu_pipeline *pipeline;
831
832 /* Vertex buffers */
833 struct
834 {
835 struct tu_buffer *buffers[MAX_VBS];
836 VkDeviceSize offsets[MAX_VBS];
837 } vb;
838
839 struct tu_dynamic_state dynamic;
840
841 /* Index buffer */
842 struct tu_buffer *index_buffer;
843 uint64_t index_offset;
844 uint32_t index_type;
845 uint32_t max_index_count;
846 uint64_t index_va;
847
848 const struct tu_render_pass *pass;
849 const struct tu_subpass *subpass;
850 const struct tu_framebuffer *framebuffer;
851 struct tu_attachment_state *attachments;
852
853 struct tu_tiling_config tiling_config;
854
855 struct tu_cs_entry tile_load_ib;
856 struct tu_cs_entry tile_store_ib;
857 };
858
859 struct tu_cmd_pool
860 {
861 VkAllocationCallbacks alloc;
862 struct list_head cmd_buffers;
863 struct list_head free_cmd_buffers;
864 uint32_t queue_family_index;
865 };
866
867 struct tu_cmd_buffer_upload
868 {
869 uint8_t *map;
870 unsigned offset;
871 uint64_t size;
872 struct list_head list;
873 };
874
875 enum tu_cmd_buffer_status
876 {
877 TU_CMD_BUFFER_STATUS_INVALID,
878 TU_CMD_BUFFER_STATUS_INITIAL,
879 TU_CMD_BUFFER_STATUS_RECORDING,
880 TU_CMD_BUFFER_STATUS_EXECUTABLE,
881 TU_CMD_BUFFER_STATUS_PENDING,
882 };
883
884 struct tu_bo_list
885 {
886 uint32_t count;
887 uint32_t capacity;
888 struct drm_msm_gem_submit_bo *bo_infos;
889 };
890
891 #define TU_BO_LIST_FAILED (~0)
892
893 void
894 tu_bo_list_init(struct tu_bo_list *list);
895 void
896 tu_bo_list_destroy(struct tu_bo_list *list);
897 void
898 tu_bo_list_reset(struct tu_bo_list *list);
899 uint32_t
900 tu_bo_list_add(struct tu_bo_list *list,
901 const struct tu_bo *bo,
902 uint32_t flags);
903 VkResult
904 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
905
906 struct tu_cmd_buffer
907 {
908 VK_LOADER_DATA _loader_data;
909
910 struct tu_device *device;
911
912 struct tu_cmd_pool *pool;
913 struct list_head pool_link;
914
915 VkCommandBufferUsageFlags usage_flags;
916 VkCommandBufferLevel level;
917 enum tu_cmd_buffer_status status;
918
919 struct tu_cmd_state state;
920 struct tu_vertex_binding vertex_bindings[MAX_VBS];
921 uint32_t queue_family_index;
922
923 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
924 VkShaderStageFlags push_constant_stages;
925 struct tu_descriptor_set meta_push_descriptors;
926
927 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
928
929 struct tu_cmd_buffer_upload upload;
930
931 VkResult record_result;
932
933 struct tu_bo_list bo_list;
934 struct tu_cs cs;
935 struct tu_cs draw_cs;
936 struct tu_cs tile_cs;
937
938 uint16_t marker_reg;
939 uint32_t marker_seqno;
940
941 struct tu_bo scratch_bo;
942 uint32_t scratch_seqno;
943
944 bool wait_for_idle;
945 };
946
947 void
948 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
949 struct tu_cs *cs,
950 enum vgt_event_type event,
951 bool need_seqno);
952
953 bool
954 tu_get_memory_fd(struct tu_device *device,
955 struct tu_device_memory *memory,
956 int *pFD);
957
958 /*
959 * Takes x,y,z as exact numbers of invocations, instead of blocks.
960 *
961 * Limitations: Can't call normal dispatch functions without binding or
962 * rebinding
963 * the compute pipeline.
964 */
965 void
966 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
967 uint32_t x,
968 uint32_t y,
969 uint32_t z);
970
971 struct tu_event
972 {
973 uint64_t *map;
974 };
975
976 struct tu_shader_module;
977
978 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
979 #define TU_HASH_SHADER_SISCHED (1 << 1)
980 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
981 void
982 tu_hash_shaders(unsigned char *hash,
983 const VkPipelineShaderStageCreateInfo **stages,
984 const struct tu_pipeline_layout *layout,
985 const struct tu_pipeline_key *key,
986 uint32_t flags);
987
988 static inline gl_shader_stage
989 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
990 {
991 assert(__builtin_popcount(vk_stage) == 1);
992 return ffs(vk_stage) - 1;
993 }
994
995 static inline VkShaderStageFlagBits
996 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
997 {
998 return (1 << mesa_stage);
999 }
1000
1001 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1002
1003 #define tu_foreach_stage(stage, stage_bits) \
1004 for (gl_shader_stage stage, \
1005 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1006 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1007
1008 struct tu_shader_module
1009 {
1010 unsigned char sha1[20];
1011
1012 uint32_t code_size;
1013 const uint32_t *code[0];
1014 };
1015
1016 struct tu_shader_compile_options
1017 {
1018 struct ir3_shader_key key;
1019
1020 bool optimize;
1021 bool include_binning_pass;
1022 };
1023
1024 struct tu_shader
1025 {
1026 struct ir3_shader ir3_shader;
1027
1028 /* This may be true for vertex shaders. When true, variants[1] is the
1029 * binning variant and binning_binary is non-NULL.
1030 */
1031 bool has_binning_pass;
1032
1033 void *binary;
1034 void *binning_binary;
1035
1036 struct ir3_shader_variant variants[0];
1037 };
1038
1039 struct tu_shader *
1040 tu_shader_create(struct tu_device *dev,
1041 gl_shader_stage stage,
1042 const VkPipelineShaderStageCreateInfo *stage_info,
1043 const VkAllocationCallbacks *alloc);
1044
1045 void
1046 tu_shader_destroy(struct tu_device *dev,
1047 struct tu_shader *shader,
1048 const VkAllocationCallbacks *alloc);
1049
1050 void
1051 tu_shader_compile_options_init(
1052 struct tu_shader_compile_options *options,
1053 const VkGraphicsPipelineCreateInfo *pipeline_info);
1054
1055 VkResult
1056 tu_shader_compile(struct tu_device *dev,
1057 struct tu_shader *shader,
1058 const struct tu_shader *next_stage,
1059 const struct tu_shader_compile_options *options,
1060 const VkAllocationCallbacks *alloc);
1061
1062 struct tu_pipeline
1063 {
1064 struct tu_cs cs;
1065
1066 struct tu_dynamic_state dynamic_state;
1067
1068 struct tu_pipeline_layout *layout;
1069
1070 bool need_indirect_descriptor_sets;
1071 VkShaderStageFlags active_stages;
1072
1073 struct
1074 {
1075 struct tu_bo binary_bo;
1076 struct tu_cs_entry state_ib;
1077 struct tu_cs_entry binning_state_ib;
1078 } program;
1079
1080 struct
1081 {
1082 uint8_t bindings[MAX_VERTEX_ATTRIBS];
1083 uint16_t strides[MAX_VERTEX_ATTRIBS];
1084 uint16_t offsets[MAX_VERTEX_ATTRIBS];
1085 uint32_t count;
1086
1087 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS];
1088 uint16_t binning_strides[MAX_VERTEX_ATTRIBS];
1089 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS];
1090 uint32_t binning_count;
1091
1092 struct tu_cs_entry state_ib;
1093 struct tu_cs_entry binning_state_ib;
1094 } vi;
1095
1096 struct
1097 {
1098 enum pc_di_primtype primtype;
1099 bool primitive_restart;
1100 } ia;
1101
1102 struct
1103 {
1104 struct tu_cs_entry state_ib;
1105 } vp;
1106
1107 struct
1108 {
1109 uint32_t gras_su_cntl;
1110 struct tu_cs_entry state_ib;
1111 } rast;
1112
1113 struct
1114 {
1115 struct tu_cs_entry state_ib;
1116 } ds;
1117
1118 struct
1119 {
1120 struct tu_cs_entry state_ib;
1121 } blend;
1122 };
1123
1124 void
1125 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1126
1127 void
1128 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1129
1130 void
1131 tu6_emit_gras_su_cntl(struct tu_cs *cs,
1132 uint32_t gras_su_cntl,
1133 float line_width);
1134
1135 void
1136 tu6_emit_depth_bias(struct tu_cs *cs,
1137 float constant_factor,
1138 float clamp,
1139 float slope_factor);
1140
1141 void
1142 tu6_emit_stencil_compare_mask(struct tu_cs *cs,
1143 uint32_t front,
1144 uint32_t back);
1145
1146 void
1147 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back);
1148
1149 void
1150 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back);
1151
1152 void
1153 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]);
1154
1155 struct tu_userdata_info *
1156 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1157 gl_shader_stage stage,
1158 int idx);
1159
1160 struct tu_shader_variant *
1161 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1162
1163 struct tu_graphics_pipeline_create_info
1164 {
1165 bool use_rectlist;
1166 bool db_depth_clear;
1167 bool db_stencil_clear;
1168 bool db_depth_disable_expclear;
1169 bool db_stencil_disable_expclear;
1170 bool db_flush_depth_inplace;
1171 bool db_flush_stencil_inplace;
1172 bool db_resummarize;
1173 uint32_t custom_blend_mode;
1174 };
1175
1176 struct tu_native_format
1177 {
1178 int vtx; /* VFMTn_xxx or -1 */
1179 int tex; /* TFMTn_xxx or -1 */
1180 int rb; /* RBn_xxx or -1 */
1181 int swap; /* enum a3xx_color_swap */
1182 bool present; /* internal only; always true to external users */
1183 };
1184
1185 const struct tu_native_format *
1186 tu6_get_native_format(VkFormat format);
1187
1188 int
1189 tu_pack_clear_value(const VkClearValue *val,
1190 VkFormat format,
1191 uint32_t buf[4]);
1192 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1193
1194 struct tu_image_level
1195 {
1196 VkDeviceSize offset;
1197 VkDeviceSize size;
1198 uint32_t pitch;
1199 };
1200
1201 struct tu_image
1202 {
1203 VkImageType type;
1204 /* The original VkFormat provided by the client. This may not match any
1205 * of the actual surface formats.
1206 */
1207 VkFormat vk_format;
1208 VkImageAspectFlags aspects;
1209 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1210 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1211 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1212 VkExtent3D extent;
1213 uint32_t level_count;
1214 uint32_t layer_count;
1215
1216 VkDeviceSize size;
1217 uint32_t alignment;
1218
1219 /* memory layout */
1220 VkDeviceSize layer_size;
1221 struct tu_image_level levels[15];
1222 unsigned tile_mode;
1223
1224 unsigned queue_family_mask;
1225 bool exclusive;
1226 bool shareable;
1227
1228 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1229 VkDeviceMemory owned_memory;
1230
1231 /* Set when bound */
1232 const struct tu_bo *bo;
1233 VkDeviceSize bo_offset;
1234 };
1235
1236 unsigned
1237 tu_image_queue_family_mask(const struct tu_image *image,
1238 uint32_t family,
1239 uint32_t queue_family);
1240
1241 static inline uint32_t
1242 tu_get_layerCount(const struct tu_image *image,
1243 const VkImageSubresourceRange *range)
1244 {
1245 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1246 ? image->layer_count - range->baseArrayLayer
1247 : range->layerCount;
1248 }
1249
1250 static inline uint32_t
1251 tu_get_levelCount(const struct tu_image *image,
1252 const VkImageSubresourceRange *range)
1253 {
1254 return range->levelCount == VK_REMAINING_MIP_LEVELS
1255 ? image->level_count - range->baseMipLevel
1256 : range->levelCount;
1257 }
1258
1259 struct tu_image_view
1260 {
1261 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1262
1263 VkImageViewType type;
1264 VkImageAspectFlags aspect_mask;
1265 VkFormat vk_format;
1266 uint32_t base_layer;
1267 uint32_t layer_count;
1268 uint32_t base_mip;
1269 uint32_t level_count;
1270 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1271
1272 uint32_t descriptor[A6XX_TEX_CONST_DWORDS];
1273
1274 /* Descriptor for use as a storage image as opposed to a sampled image.
1275 * This has a few differences for cube maps (e.g. type).
1276 */
1277 uint32_t storage_descriptor[A6XX_TEX_CONST_DWORDS];
1278 };
1279
1280 struct tu_sampler
1281 {
1282 uint32_t state[A6XX_TEX_SAMP_DWORDS];
1283
1284 bool needs_border;
1285 };
1286
1287 struct tu_image_create_info
1288 {
1289 const VkImageCreateInfo *vk_info;
1290 bool scanout;
1291 bool no_metadata_planes;
1292 };
1293
1294 VkResult
1295 tu_image_create(VkDevice _device,
1296 const struct tu_image_create_info *info,
1297 const VkAllocationCallbacks *alloc,
1298 VkImage *pImage);
1299
1300 VkResult
1301 tu_image_from_gralloc(VkDevice device_h,
1302 const VkImageCreateInfo *base_info,
1303 const VkNativeBufferANDROID *gralloc_info,
1304 const VkAllocationCallbacks *alloc,
1305 VkImage *out_image_h);
1306
1307 void
1308 tu_image_view_init(struct tu_image_view *view,
1309 struct tu_device *device,
1310 const VkImageViewCreateInfo *pCreateInfo);
1311
1312 struct tu_buffer_view
1313 {
1314 VkFormat vk_format;
1315 uint64_t range; /**< VkBufferViewCreateInfo::range */
1316 uint32_t state[4];
1317 };
1318 void
1319 tu_buffer_view_init(struct tu_buffer_view *view,
1320 struct tu_device *device,
1321 const VkBufferViewCreateInfo *pCreateInfo);
1322
1323 static inline struct VkExtent3D
1324 tu_sanitize_image_extent(const VkImageType imageType,
1325 const struct VkExtent3D imageExtent)
1326 {
1327 switch (imageType) {
1328 case VK_IMAGE_TYPE_1D:
1329 return (VkExtent3D) { imageExtent.width, 1, 1 };
1330 case VK_IMAGE_TYPE_2D:
1331 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1332 case VK_IMAGE_TYPE_3D:
1333 return imageExtent;
1334 default:
1335 unreachable("invalid image type");
1336 }
1337 }
1338
1339 static inline struct VkOffset3D
1340 tu_sanitize_image_offset(const VkImageType imageType,
1341 const struct VkOffset3D imageOffset)
1342 {
1343 switch (imageType) {
1344 case VK_IMAGE_TYPE_1D:
1345 return (VkOffset3D) { imageOffset.x, 0, 0 };
1346 case VK_IMAGE_TYPE_2D:
1347 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1348 case VK_IMAGE_TYPE_3D:
1349 return imageOffset;
1350 default:
1351 unreachable("invalid image type");
1352 }
1353 }
1354
1355 struct tu_attachment_info
1356 {
1357 struct tu_image_view *attachment;
1358 };
1359
1360 struct tu_framebuffer
1361 {
1362 uint32_t width;
1363 uint32_t height;
1364 uint32_t layers;
1365
1366 uint32_t attachment_count;
1367 struct tu_attachment_info attachments[0];
1368 };
1369
1370 struct tu_subpass_barrier
1371 {
1372 VkPipelineStageFlags src_stage_mask;
1373 VkAccessFlags src_access_mask;
1374 VkAccessFlags dst_access_mask;
1375 };
1376
1377 void
1378 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1379 const struct tu_subpass_barrier *barrier);
1380
1381 struct tu_subpass_attachment
1382 {
1383 uint32_t attachment;
1384 VkImageLayout layout;
1385 };
1386
1387 struct tu_subpass
1388 {
1389 uint32_t input_count;
1390 uint32_t color_count;
1391 struct tu_subpass_attachment *input_attachments;
1392 struct tu_subpass_attachment *color_attachments;
1393 struct tu_subpass_attachment *resolve_attachments;
1394 struct tu_subpass_attachment depth_stencil_attachment;
1395
1396 /** Subpass has at least one resolve attachment */
1397 bool has_resolve;
1398
1399 struct tu_subpass_barrier start_barrier;
1400
1401 uint32_t view_mask;
1402 VkSampleCountFlagBits max_sample_count;
1403 };
1404
1405 struct tu_render_pass_attachment
1406 {
1407 VkFormat format;
1408 uint32_t samples;
1409 VkAttachmentLoadOp load_op;
1410 VkAttachmentLoadOp stencil_load_op;
1411 VkImageLayout initial_layout;
1412 VkImageLayout final_layout;
1413 uint32_t view_mask;
1414 };
1415
1416 struct tu_render_pass
1417 {
1418 uint32_t attachment_count;
1419 uint32_t subpass_count;
1420 struct tu_subpass_attachment *subpass_attachments;
1421 struct tu_render_pass_attachment *attachments;
1422 struct tu_subpass_barrier end_barrier;
1423 struct tu_subpass subpasses[0];
1424 };
1425
1426 VkResult
1427 tu_device_init_meta(struct tu_device *device);
1428 void
1429 tu_device_finish_meta(struct tu_device *device);
1430
1431 struct tu_query_pool
1432 {
1433 uint32_t stride;
1434 uint32_t availability_offset;
1435 uint64_t size;
1436 char *ptr;
1437 VkQueryType type;
1438 uint32_t pipeline_stats_mask;
1439 };
1440
1441 struct tu_semaphore
1442 {
1443 uint32_t syncobj;
1444 uint32_t temp_syncobj;
1445 };
1446
1447 void
1448 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1449 VkPipelineBindPoint bind_point,
1450 struct tu_descriptor_set *set,
1451 unsigned idx);
1452
1453 void
1454 tu_update_descriptor_sets(struct tu_device *device,
1455 struct tu_cmd_buffer *cmd_buffer,
1456 VkDescriptorSet overrideSet,
1457 uint32_t descriptorWriteCount,
1458 const VkWriteDescriptorSet *pDescriptorWrites,
1459 uint32_t descriptorCopyCount,
1460 const VkCopyDescriptorSet *pDescriptorCopies);
1461
1462 void
1463 tu_update_descriptor_set_with_template(
1464 struct tu_device *device,
1465 struct tu_cmd_buffer *cmd_buffer,
1466 struct tu_descriptor_set *set,
1467 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1468 const void *pData);
1469
1470 void
1471 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1472 VkPipelineBindPoint pipelineBindPoint,
1473 VkPipelineLayout _layout,
1474 uint32_t set,
1475 uint32_t descriptorWriteCount,
1476 const VkWriteDescriptorSet *pDescriptorWrites);
1477
1478 int
1479 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1480
1481 int
1482 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1483
1484 int
1485 tu_drm_submitqueue_new(const struct tu_device *dev,
1486 int priority,
1487 uint32_t *queue_id);
1488
1489 void
1490 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1491
1492 uint32_t
1493 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1494 uint32_t
1495 tu_gem_import_dmabuf(const struct tu_device *dev,
1496 int prime_fd,
1497 uint64_t size);
1498 int
1499 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1500 void
1501 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1502 uint64_t
1503 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1504 uint64_t
1505 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1506
1507 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1508 \
1509 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1510 { \
1511 return (struct __tu_type *) _handle; \
1512 } \
1513 \
1514 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1515 { \
1516 return (__VkType) _obj; \
1517 }
1518
1519 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1520 \
1521 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1522 { \
1523 return (struct __tu_type *) (uintptr_t) _handle; \
1524 } \
1525 \
1526 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1527 { \
1528 return (__VkType)(uintptr_t) _obj; \
1529 }
1530
1531 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1532 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1533
1534 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1535 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1536 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1537 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1538 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1539
1540 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1541 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1542 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1543 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1544 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1545 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1546 VkDescriptorSetLayout)
1547 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1548 VkDescriptorUpdateTemplate)
1549 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1550 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1551 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1552 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1553 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1554 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1555 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1556 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1557 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1558 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1559 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1560 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1561 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1562 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1563
1564 #endif /* TU_PRIVATE_H */