turnip: implement sampler state
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53 #include "wsi_common.h"
54
55 #include "drm-uapi/msm_drm.h"
56 #include "ir3/ir3_compiler.h"
57 #include "ir3/ir3_shader.h"
58
59 #include "adreno_common.xml.h"
60 #include "adreno_pm4.xml.h"
61 #include "a6xx.xml.h"
62
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
65
66 /* Pre-declarations needed for WSI entrypoints */
67 struct wl_surface;
68 struct wl_display;
69 typedef struct xcb_connection_t xcb_connection_t;
70 typedef uint32_t xcb_visualid_t;
71 typedef uint32_t xcb_window_t;
72
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
77
78 #include "tu_entrypoints.h"
79
80 #define MAX_VBS 32
81 #define MAX_VERTEX_ATTRIBS 32
82 #define MAX_RTS 8
83 #define MAX_VSC_PIPES 32
84 #define MAX_VIEWPORTS 1
85 #define MAX_SCISSORS 16
86 #define MAX_DISCARD_RECTANGLES 4
87 #define MAX_PUSH_CONSTANTS_SIZE 128
88 #define MAX_PUSH_DESCRIPTORS 32
89 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
90 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
91 #define MAX_DYNAMIC_BUFFERS \
92 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
93 #define MAX_SAMPLES_LOG2 4
94 #define NUM_META_FS_KEYS 13
95 #define TU_MAX_DRM_DEVICES 8
96 #define MAX_VIEWS 8
97
98 #define NUM_DEPTH_CLEAR_PIPELINES 3
99
100 /*
101 * This is the point we switch from using CP to compute shader
102 * for certain buffer operations.
103 */
104 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
105
106 #define A6XX_TEX_SAMP_DWORDS 4
107
108 enum tu_mem_heap
109 {
110 TU_MEM_HEAP_VRAM,
111 TU_MEM_HEAP_VRAM_CPU_ACCESS,
112 TU_MEM_HEAP_GTT,
113 TU_MEM_HEAP_COUNT
114 };
115
116 enum tu_mem_type
117 {
118 TU_MEM_TYPE_VRAM,
119 TU_MEM_TYPE_GTT_WRITE_COMBINE,
120 TU_MEM_TYPE_VRAM_CPU_ACCESS,
121 TU_MEM_TYPE_GTT_CACHED,
122 TU_MEM_TYPE_COUNT
123 };
124
125 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
126
127 static inline uint32_t
128 align_u32(uint32_t v, uint32_t a)
129 {
130 assert(a != 0 && a == (a & -a));
131 return (v + a - 1) & ~(a - 1);
132 }
133
134 static inline uint32_t
135 align_u32_npot(uint32_t v, uint32_t a)
136 {
137 return (v + a - 1) / a * a;
138 }
139
140 static inline uint64_t
141 align_u64(uint64_t v, uint64_t a)
142 {
143 assert(a != 0 && a == (a & -a));
144 return (v + a - 1) & ~(a - 1);
145 }
146
147 static inline int32_t
148 align_i32(int32_t v, int32_t a)
149 {
150 assert(a != 0 && a == (a & -a));
151 return (v + a - 1) & ~(a - 1);
152 }
153
154 /** Alignment must be a power of 2. */
155 static inline bool
156 tu_is_aligned(uintmax_t n, uintmax_t a)
157 {
158 assert(a == (a & -a));
159 return (n & (a - 1)) == 0;
160 }
161
162 static inline uint32_t
163 round_up_u32(uint32_t v, uint32_t a)
164 {
165 return (v + a - 1) / a;
166 }
167
168 static inline uint64_t
169 round_up_u64(uint64_t v, uint64_t a)
170 {
171 return (v + a - 1) / a;
172 }
173
174 static inline uint32_t
175 tu_minify(uint32_t n, uint32_t levels)
176 {
177 if (unlikely(n == 0))
178 return 0;
179 else
180 return MAX2(n >> levels, 1);
181 }
182 static inline float
183 tu_clamp_f(float f, float min, float max)
184 {
185 assert(min < max);
186
187 if (f > max)
188 return max;
189 else if (f < min)
190 return min;
191 else
192 return f;
193 }
194
195 static inline bool
196 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
197 {
198 if (*inout_mask & clear_mask) {
199 *inout_mask &= ~clear_mask;
200 return true;
201 } else {
202 return false;
203 }
204 }
205
206 #define for_each_bit(b, dword) \
207 for (uint32_t __dword = (dword); \
208 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
209
210 #define typed_memcpy(dest, src, count) \
211 ({ \
212 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
213 memcpy((dest), (src), (count) * sizeof(*(src))); \
214 })
215
216 #define COND(bool, val) ((bool) ? (val) : 0)
217
218 /* Whenever we generate an error, pass it through this function. Useful for
219 * debugging, where we can break on it. Only call at error site, not when
220 * propagating errors. Might be useful to plug in a stack trace here.
221 */
222
223 struct tu_instance;
224
225 VkResult
226 __vk_errorf(struct tu_instance *instance,
227 VkResult error,
228 const char *file,
229 int line,
230 const char *format,
231 ...);
232
233 #define vk_error(instance, error) \
234 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
235 #define vk_errorf(instance, error, format, ...) \
236 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
237
238 void
239 __tu_finishme(const char *file, int line, const char *format, ...)
240 tu_printflike(3, 4);
241 void
242 tu_loge(const char *format, ...) tu_printflike(1, 2);
243 void
244 tu_loge_v(const char *format, va_list va);
245 void
246 tu_logi(const char *format, ...) tu_printflike(1, 2);
247 void
248 tu_logi_v(const char *format, va_list va);
249
250 /**
251 * Print a FINISHME message, including its source location.
252 */
253 #define tu_finishme(format, ...) \
254 do { \
255 static bool reported = false; \
256 if (!reported) { \
257 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
258 reported = true; \
259 } \
260 } while (0)
261
262 /* A non-fatal assert. Useful for debugging. */
263 #ifdef DEBUG
264 #define tu_assert(x) \
265 ({ \
266 if (unlikely(!(x))) \
267 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
268 })
269 #else
270 #define tu_assert(x)
271 #endif
272
273 /* Suppress -Wunused in stub functions */
274 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
275 static inline void
276 __tu_use_args(int ignore, ...)
277 {
278 }
279
280 #define tu_stub() \
281 do { \
282 tu_finishme("stub %s", __func__); \
283 } while (0)
284
285 void *
286 tu_lookup_entrypoint_unchecked(const char *name);
287 void *
288 tu_lookup_entrypoint_checked(
289 const char *name,
290 uint32_t core_version,
291 const struct tu_instance_extension_table *instance,
292 const struct tu_device_extension_table *device);
293
294 struct tu_physical_device
295 {
296 VK_LOADER_DATA _loader_data;
297
298 struct tu_instance *instance;
299
300 char path[20];
301 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
302 uint8_t driver_uuid[VK_UUID_SIZE];
303 uint8_t device_uuid[VK_UUID_SIZE];
304 uint8_t cache_uuid[VK_UUID_SIZE];
305
306 struct wsi_device wsi_device;
307
308 int local_fd;
309 int master_fd;
310
311 unsigned gpu_id;
312 uint32_t gmem_size;
313 uint32_t tile_align_w;
314 uint32_t tile_align_h;
315
316 /* This is the drivers on-disk cache used as a fallback as opposed to
317 * the pipeline cache defined by apps.
318 */
319 struct disk_cache *disk_cache;
320
321 struct tu_device_extension_table supported_extensions;
322 };
323
324 enum tu_debug_flags
325 {
326 TU_DEBUG_STARTUP = 1 << 0,
327 TU_DEBUG_NIR = 1 << 1,
328 TU_DEBUG_IR3 = 1 << 2,
329 };
330
331 struct tu_instance
332 {
333 VK_LOADER_DATA _loader_data;
334
335 VkAllocationCallbacks alloc;
336
337 uint32_t api_version;
338 int physical_device_count;
339 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
340
341 enum tu_debug_flags debug_flags;
342
343 struct vk_debug_report_instance debug_report_callbacks;
344
345 struct tu_instance_extension_table enabled_extensions;
346 };
347
348 VkResult
349 tu_wsi_init(struct tu_physical_device *physical_device);
350 void
351 tu_wsi_finish(struct tu_physical_device *physical_device);
352
353 bool
354 tu_instance_extension_supported(const char *name);
355 uint32_t
356 tu_physical_device_api_version(struct tu_physical_device *dev);
357 bool
358 tu_physical_device_extension_supported(struct tu_physical_device *dev,
359 const char *name);
360
361 struct cache_entry;
362
363 struct tu_pipeline_cache
364 {
365 struct tu_device *device;
366 pthread_mutex_t mutex;
367
368 uint32_t total_size;
369 uint32_t table_size;
370 uint32_t kernel_count;
371 struct cache_entry **hash_table;
372 bool modified;
373
374 VkAllocationCallbacks alloc;
375 };
376
377 struct tu_pipeline_key
378 {
379 };
380
381 void
382 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
383 struct tu_device *device);
384 void
385 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
386 void
387 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
388 const void *data,
389 size_t size);
390
391 struct tu_shader_variant;
392
393 bool
394 tu_create_shader_variants_from_pipeline_cache(
395 struct tu_device *device,
396 struct tu_pipeline_cache *cache,
397 const unsigned char *sha1,
398 struct tu_shader_variant **variants);
399
400 void
401 tu_pipeline_cache_insert_shaders(struct tu_device *device,
402 struct tu_pipeline_cache *cache,
403 const unsigned char *sha1,
404 struct tu_shader_variant **variants,
405 const void *const *codes,
406 const unsigned *code_sizes);
407
408 struct tu_meta_state
409 {
410 VkAllocationCallbacks alloc;
411
412 struct tu_pipeline_cache cache;
413 };
414
415 /* queue types */
416 #define TU_QUEUE_GENERAL 0
417
418 #define TU_MAX_QUEUE_FAMILIES 1
419
420 struct tu_fence
421 {
422 bool signaled;
423 int fd;
424 };
425
426 void
427 tu_fence_init(struct tu_fence *fence, bool signaled);
428 void
429 tu_fence_finish(struct tu_fence *fence);
430 void
431 tu_fence_update_fd(struct tu_fence *fence, int fd);
432 void
433 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
434 void
435 tu_fence_signal(struct tu_fence *fence);
436 void
437 tu_fence_wait_idle(struct tu_fence *fence);
438
439 struct tu_queue
440 {
441 VK_LOADER_DATA _loader_data;
442 struct tu_device *device;
443 uint32_t queue_family_index;
444 int queue_idx;
445 VkDeviceQueueCreateFlags flags;
446
447 uint32_t msm_queue_id;
448 struct tu_fence submit_fence;
449 };
450
451 struct tu_device
452 {
453 VK_LOADER_DATA _loader_data;
454
455 VkAllocationCallbacks alloc;
456
457 struct tu_instance *instance;
458
459 struct tu_meta_state meta_state;
460
461 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
462 int queue_count[TU_MAX_QUEUE_FAMILIES];
463
464 struct tu_physical_device *physical_device;
465
466 struct ir3_compiler *compiler;
467
468 /* Backup in-memory cache to be used if the app doesn't provide one */
469 struct tu_pipeline_cache *mem_cache;
470
471 struct list_head shader_slabs;
472 mtx_t shader_slab_mutex;
473
474 struct tu_device_extension_table enabled_extensions;
475 };
476
477 struct tu_bo
478 {
479 uint32_t gem_handle;
480 uint64_t size;
481 uint64_t iova;
482 void *map;
483 };
484
485 VkResult
486 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
487 VkResult
488 tu_bo_init_dmabuf(struct tu_device *dev,
489 struct tu_bo *bo,
490 uint64_t size,
491 int fd);
492 int
493 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
494 void
495 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
496 VkResult
497 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
498
499 struct tu_cs_entry
500 {
501 /* No ownership */
502 const struct tu_bo *bo;
503
504 uint32_t size;
505 uint32_t offset;
506 };
507
508 enum tu_cs_mode
509 {
510
511 /*
512 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
513 * is full. tu_cs_begin must be called before command packet emission and
514 * tu_cs_end must be called after.
515 *
516 * This mode may create multiple entries internally. The entries must be
517 * submitted together.
518 */
519 TU_CS_MODE_GROW,
520
521 /*
522 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
523 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
524 * effect on it.
525 *
526 * This mode does not create any entry or any BO.
527 */
528 TU_CS_MODE_EXTERNAL,
529
530 /*
531 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
532 * command packet emission. tu_cs_begin_sub_stream must be called to get a
533 * sub-stream to emit comamnd packets to. When done with the sub-stream,
534 * tu_cs_end_sub_stream must be called.
535 *
536 * This mode does not create any entry internally.
537 */
538 TU_CS_MODE_SUB_STREAM,
539 };
540
541 struct tu_cs
542 {
543 uint32_t *start;
544 uint32_t *cur;
545 uint32_t *reserved_end;
546 uint32_t *end;
547
548 enum tu_cs_mode mode;
549 uint32_t next_bo_size;
550
551 struct tu_cs_entry *entries;
552 uint32_t entry_count;
553 uint32_t entry_capacity;
554
555 struct tu_bo **bos;
556 uint32_t bo_count;
557 uint32_t bo_capacity;
558 };
559
560 struct tu_device_memory
561 {
562 struct tu_bo bo;
563 VkDeviceSize size;
564
565 /* for dedicated allocations */
566 struct tu_image *image;
567 struct tu_buffer *buffer;
568
569 uint32_t type_index;
570 void *map;
571 void *user_ptr;
572 };
573
574 struct tu_descriptor_range
575 {
576 uint64_t va;
577 uint32_t size;
578 };
579
580 struct tu_descriptor_set
581 {
582 const struct tu_descriptor_set_layout *layout;
583 uint32_t size;
584
585 uint64_t va;
586 uint32_t *mapped_ptr;
587 struct tu_descriptor_range *dynamic_descriptors;
588 };
589
590 struct tu_push_descriptor_set
591 {
592 struct tu_descriptor_set set;
593 uint32_t capacity;
594 };
595
596 struct tu_descriptor_pool_entry
597 {
598 uint32_t offset;
599 uint32_t size;
600 struct tu_descriptor_set *set;
601 };
602
603 struct tu_descriptor_pool
604 {
605 uint8_t *mapped_ptr;
606 uint64_t current_offset;
607 uint64_t size;
608
609 uint8_t *host_memory_base;
610 uint8_t *host_memory_ptr;
611 uint8_t *host_memory_end;
612
613 uint32_t entry_count;
614 uint32_t max_entry_count;
615 struct tu_descriptor_pool_entry entries[0];
616 };
617
618 struct tu_descriptor_update_template_entry
619 {
620 VkDescriptorType descriptor_type;
621
622 /* The number of descriptors to update */
623 uint32_t descriptor_count;
624
625 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
626 */
627 uint32_t dst_offset;
628
629 /* In dwords. Not valid/used for dynamic descriptors */
630 uint32_t dst_stride;
631
632 uint32_t buffer_offset;
633
634 /* Only valid for combined image samplers and samplers */
635 uint16_t has_sampler;
636
637 /* In bytes */
638 size_t src_offset;
639 size_t src_stride;
640
641 /* For push descriptors */
642 const uint32_t *immutable_samplers;
643 };
644
645 struct tu_descriptor_update_template
646 {
647 uint32_t entry_count;
648 VkPipelineBindPoint bind_point;
649 struct tu_descriptor_update_template_entry entry[0];
650 };
651
652 struct tu_buffer
653 {
654 VkDeviceSize size;
655
656 VkBufferUsageFlags usage;
657 VkBufferCreateFlags flags;
658
659 struct tu_bo *bo;
660 VkDeviceSize bo_offset;
661 };
662
663 enum tu_dynamic_state_bits
664 {
665 TU_DYNAMIC_VIEWPORT = 1 << 0,
666 TU_DYNAMIC_SCISSOR = 1 << 1,
667 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
668 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
669 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
670 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
671 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
672 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
673 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
674 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
675 TU_DYNAMIC_ALL = (1 << 10) - 1,
676 };
677
678 struct tu_vertex_binding
679 {
680 struct tu_buffer *buffer;
681 VkDeviceSize offset;
682 };
683
684 struct tu_viewport_state
685 {
686 uint32_t count;
687 VkViewport viewports[MAX_VIEWPORTS];
688 };
689
690 struct tu_scissor_state
691 {
692 uint32_t count;
693 VkRect2D scissors[MAX_SCISSORS];
694 };
695
696 struct tu_discard_rectangle_state
697 {
698 uint32_t count;
699 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
700 };
701
702 struct tu_dynamic_state
703 {
704 /**
705 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
706 * Defines the set of saved dynamic state.
707 */
708 uint32_t mask;
709
710 struct tu_viewport_state viewport;
711
712 struct tu_scissor_state scissor;
713
714 float line_width;
715
716 struct
717 {
718 float bias;
719 float clamp;
720 float slope;
721 } depth_bias;
722
723 float blend_constants[4];
724
725 struct
726 {
727 float min;
728 float max;
729 } depth_bounds;
730
731 struct
732 {
733 uint32_t front;
734 uint32_t back;
735 } stencil_compare_mask;
736
737 struct
738 {
739 uint32_t front;
740 uint32_t back;
741 } stencil_write_mask;
742
743 struct
744 {
745 uint32_t front;
746 uint32_t back;
747 } stencil_reference;
748
749 struct tu_discard_rectangle_state discard_rectangle;
750 };
751
752 extern const struct tu_dynamic_state default_dynamic_state;
753
754 const char *
755 tu_get_debug_option_name(int id);
756
757 const char *
758 tu_get_perftest_option_name(int id);
759
760 /**
761 * Attachment state when recording a renderpass instance.
762 *
763 * The clear value is valid only if there exists a pending clear.
764 */
765 struct tu_attachment_state
766 {
767 VkImageAspectFlags pending_clear_aspects;
768 uint32_t cleared_views;
769 VkClearValue clear_value;
770 VkImageLayout current_layout;
771 };
772
773 struct tu_descriptor_state
774 {
775 struct tu_descriptor_set *sets[MAX_SETS];
776 uint32_t dirty;
777 uint32_t valid;
778 struct tu_push_descriptor_set push_set;
779 bool push_dirty;
780 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
781 };
782
783 struct tu_tile
784 {
785 uint8_t pipe;
786 uint8_t slot;
787 VkOffset2D begin;
788 VkOffset2D end;
789 };
790
791 struct tu_tiling_config
792 {
793 VkRect2D render_area;
794 uint32_t buffer_cpp[MAX_RTS + 2];
795 uint32_t buffer_count;
796
797 /* position and size of the first tile */
798 VkRect2D tile0;
799 /* number of tiles */
800 VkExtent2D tile_count;
801
802 uint32_t gmem_offsets[MAX_RTS + 2];
803
804 /* size of the first VSC pipe */
805 VkExtent2D pipe0;
806 /* number of VSC pipes */
807 VkExtent2D pipe_count;
808
809 /* pipe register values */
810 uint32_t pipe_config[MAX_VSC_PIPES];
811 uint32_t pipe_sizes[MAX_VSC_PIPES];
812 };
813
814 enum tu_cmd_dirty_bits
815 {
816 TU_CMD_DIRTY_PIPELINE = 1 << 0,
817 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1,
818
819 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
820 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
821 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18,
822 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19,
823 };
824
825 struct tu_cmd_state
826 {
827 uint32_t dirty;
828
829 struct tu_pipeline *pipeline;
830
831 /* Vertex buffers */
832 struct
833 {
834 struct tu_buffer *buffers[MAX_VBS];
835 VkDeviceSize offsets[MAX_VBS];
836 } vb;
837
838 struct tu_dynamic_state dynamic;
839
840 /* Index buffer */
841 struct tu_buffer *index_buffer;
842 uint64_t index_offset;
843 uint32_t index_type;
844 uint32_t max_index_count;
845 uint64_t index_va;
846
847 const struct tu_render_pass *pass;
848 const struct tu_subpass *subpass;
849 const struct tu_framebuffer *framebuffer;
850 struct tu_attachment_state *attachments;
851
852 struct tu_tiling_config tiling_config;
853
854 struct tu_cs_entry tile_load_ib;
855 struct tu_cs_entry tile_store_ib;
856 };
857
858 struct tu_cmd_pool
859 {
860 VkAllocationCallbacks alloc;
861 struct list_head cmd_buffers;
862 struct list_head free_cmd_buffers;
863 uint32_t queue_family_index;
864 };
865
866 struct tu_cmd_buffer_upload
867 {
868 uint8_t *map;
869 unsigned offset;
870 uint64_t size;
871 struct list_head list;
872 };
873
874 enum tu_cmd_buffer_status
875 {
876 TU_CMD_BUFFER_STATUS_INVALID,
877 TU_CMD_BUFFER_STATUS_INITIAL,
878 TU_CMD_BUFFER_STATUS_RECORDING,
879 TU_CMD_BUFFER_STATUS_EXECUTABLE,
880 TU_CMD_BUFFER_STATUS_PENDING,
881 };
882
883 struct tu_bo_list
884 {
885 uint32_t count;
886 uint32_t capacity;
887 struct drm_msm_gem_submit_bo *bo_infos;
888 };
889
890 #define TU_BO_LIST_FAILED (~0)
891
892 void
893 tu_bo_list_init(struct tu_bo_list *list);
894 void
895 tu_bo_list_destroy(struct tu_bo_list *list);
896 void
897 tu_bo_list_reset(struct tu_bo_list *list);
898 uint32_t
899 tu_bo_list_add(struct tu_bo_list *list,
900 const struct tu_bo *bo,
901 uint32_t flags);
902 VkResult
903 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
904
905 struct tu_cmd_buffer
906 {
907 VK_LOADER_DATA _loader_data;
908
909 struct tu_device *device;
910
911 struct tu_cmd_pool *pool;
912 struct list_head pool_link;
913
914 VkCommandBufferUsageFlags usage_flags;
915 VkCommandBufferLevel level;
916 enum tu_cmd_buffer_status status;
917
918 struct tu_cmd_state state;
919 struct tu_vertex_binding vertex_bindings[MAX_VBS];
920 uint32_t queue_family_index;
921
922 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
923 VkShaderStageFlags push_constant_stages;
924 struct tu_descriptor_set meta_push_descriptors;
925
926 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
927
928 struct tu_cmd_buffer_upload upload;
929
930 VkResult record_result;
931
932 struct tu_bo_list bo_list;
933 struct tu_cs cs;
934 struct tu_cs draw_cs;
935 struct tu_cs tile_cs;
936
937 uint16_t marker_reg;
938 uint32_t marker_seqno;
939
940 struct tu_bo scratch_bo;
941 uint32_t scratch_seqno;
942
943 bool wait_for_idle;
944 };
945
946 void
947 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
948 struct tu_cs *cs,
949 enum vgt_event_type event,
950 bool need_seqno);
951
952 bool
953 tu_get_memory_fd(struct tu_device *device,
954 struct tu_device_memory *memory,
955 int *pFD);
956
957 /*
958 * Takes x,y,z as exact numbers of invocations, instead of blocks.
959 *
960 * Limitations: Can't call normal dispatch functions without binding or
961 * rebinding
962 * the compute pipeline.
963 */
964 void
965 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
966 uint32_t x,
967 uint32_t y,
968 uint32_t z);
969
970 struct tu_event
971 {
972 uint64_t *map;
973 };
974
975 struct tu_shader_module;
976
977 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
978 #define TU_HASH_SHADER_SISCHED (1 << 1)
979 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
980 void
981 tu_hash_shaders(unsigned char *hash,
982 const VkPipelineShaderStageCreateInfo **stages,
983 const struct tu_pipeline_layout *layout,
984 const struct tu_pipeline_key *key,
985 uint32_t flags);
986
987 static inline gl_shader_stage
988 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
989 {
990 assert(__builtin_popcount(vk_stage) == 1);
991 return ffs(vk_stage) - 1;
992 }
993
994 static inline VkShaderStageFlagBits
995 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
996 {
997 return (1 << mesa_stage);
998 }
999
1000 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1001
1002 #define tu_foreach_stage(stage, stage_bits) \
1003 for (gl_shader_stage stage, \
1004 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1005 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1006
1007 struct tu_shader_module
1008 {
1009 unsigned char sha1[20];
1010
1011 uint32_t code_size;
1012 const uint32_t *code[0];
1013 };
1014
1015 struct tu_shader_compile_options
1016 {
1017 struct ir3_shader_key key;
1018
1019 bool optimize;
1020 bool include_binning_pass;
1021 };
1022
1023 struct tu_shader
1024 {
1025 struct ir3_shader ir3_shader;
1026
1027 /* This may be true for vertex shaders. When true, variants[1] is the
1028 * binning variant and binning_binary is non-NULL.
1029 */
1030 bool has_binning_pass;
1031
1032 void *binary;
1033 void *binning_binary;
1034
1035 struct ir3_shader_variant variants[0];
1036 };
1037
1038 struct tu_shader *
1039 tu_shader_create(struct tu_device *dev,
1040 gl_shader_stage stage,
1041 const VkPipelineShaderStageCreateInfo *stage_info,
1042 const VkAllocationCallbacks *alloc);
1043
1044 void
1045 tu_shader_destroy(struct tu_device *dev,
1046 struct tu_shader *shader,
1047 const VkAllocationCallbacks *alloc);
1048
1049 void
1050 tu_shader_compile_options_init(
1051 struct tu_shader_compile_options *options,
1052 const VkGraphicsPipelineCreateInfo *pipeline_info);
1053
1054 VkResult
1055 tu_shader_compile(struct tu_device *dev,
1056 struct tu_shader *shader,
1057 const struct tu_shader *next_stage,
1058 const struct tu_shader_compile_options *options,
1059 const VkAllocationCallbacks *alloc);
1060
1061 struct tu_pipeline
1062 {
1063 struct tu_cs cs;
1064
1065 struct tu_dynamic_state dynamic_state;
1066
1067 struct tu_pipeline_layout *layout;
1068
1069 bool need_indirect_descriptor_sets;
1070 VkShaderStageFlags active_stages;
1071
1072 struct
1073 {
1074 struct tu_bo binary_bo;
1075 struct tu_cs_entry state_ib;
1076 struct tu_cs_entry binning_state_ib;
1077 } program;
1078
1079 struct
1080 {
1081 uint8_t bindings[MAX_VERTEX_ATTRIBS];
1082 uint16_t strides[MAX_VERTEX_ATTRIBS];
1083 uint16_t offsets[MAX_VERTEX_ATTRIBS];
1084 uint32_t count;
1085
1086 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS];
1087 uint16_t binning_strides[MAX_VERTEX_ATTRIBS];
1088 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS];
1089 uint32_t binning_count;
1090
1091 struct tu_cs_entry state_ib;
1092 struct tu_cs_entry binning_state_ib;
1093 } vi;
1094
1095 struct
1096 {
1097 enum pc_di_primtype primtype;
1098 bool primitive_restart;
1099 } ia;
1100
1101 struct
1102 {
1103 struct tu_cs_entry state_ib;
1104 } vp;
1105
1106 struct
1107 {
1108 uint32_t gras_su_cntl;
1109 struct tu_cs_entry state_ib;
1110 } rast;
1111
1112 struct
1113 {
1114 struct tu_cs_entry state_ib;
1115 } ds;
1116
1117 struct
1118 {
1119 struct tu_cs_entry state_ib;
1120 } blend;
1121 };
1122
1123 void
1124 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1125
1126 void
1127 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1128
1129 void
1130 tu6_emit_gras_su_cntl(struct tu_cs *cs,
1131 uint32_t gras_su_cntl,
1132 float line_width);
1133
1134 void
1135 tu6_emit_depth_bias(struct tu_cs *cs,
1136 float constant_factor,
1137 float clamp,
1138 float slope_factor);
1139
1140 void
1141 tu6_emit_stencil_compare_mask(struct tu_cs *cs,
1142 uint32_t front,
1143 uint32_t back);
1144
1145 void
1146 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back);
1147
1148 void
1149 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back);
1150
1151 void
1152 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]);
1153
1154 struct tu_userdata_info *
1155 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1156 gl_shader_stage stage,
1157 int idx);
1158
1159 struct tu_shader_variant *
1160 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1161
1162 struct tu_graphics_pipeline_create_info
1163 {
1164 bool use_rectlist;
1165 bool db_depth_clear;
1166 bool db_stencil_clear;
1167 bool db_depth_disable_expclear;
1168 bool db_stencil_disable_expclear;
1169 bool db_flush_depth_inplace;
1170 bool db_flush_stencil_inplace;
1171 bool db_resummarize;
1172 uint32_t custom_blend_mode;
1173 };
1174
1175 struct tu_native_format
1176 {
1177 int vtx; /* VFMTn_xxx or -1 */
1178 int tex; /* TFMTn_xxx or -1 */
1179 int rb; /* RBn_xxx or -1 */
1180 int swap; /* enum a3xx_color_swap */
1181 bool present; /* internal only; always true to external users */
1182 };
1183
1184 const struct tu_native_format *
1185 tu6_get_native_format(VkFormat format);
1186
1187 int
1188 tu_pack_clear_value(const VkClearValue *val,
1189 VkFormat format,
1190 uint32_t buf[4]);
1191 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1192
1193 struct tu_image_level
1194 {
1195 VkDeviceSize offset;
1196 VkDeviceSize size;
1197 uint32_t pitch;
1198 };
1199
1200 struct tu_image
1201 {
1202 VkImageType type;
1203 /* The original VkFormat provided by the client. This may not match any
1204 * of the actual surface formats.
1205 */
1206 VkFormat vk_format;
1207 VkImageAspectFlags aspects;
1208 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1209 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1210 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1211 VkExtent3D extent;
1212 uint32_t level_count;
1213 uint32_t layer_count;
1214
1215 VkDeviceSize size;
1216 uint32_t alignment;
1217
1218 /* memory layout */
1219 VkDeviceSize layer_size;
1220 struct tu_image_level levels[15];
1221 unsigned tile_mode;
1222
1223 unsigned queue_family_mask;
1224 bool exclusive;
1225 bool shareable;
1226
1227 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1228 VkDeviceMemory owned_memory;
1229
1230 /* Set when bound */
1231 const struct tu_bo *bo;
1232 VkDeviceSize bo_offset;
1233 };
1234
1235 unsigned
1236 tu_image_queue_family_mask(const struct tu_image *image,
1237 uint32_t family,
1238 uint32_t queue_family);
1239
1240 static inline uint32_t
1241 tu_get_layerCount(const struct tu_image *image,
1242 const VkImageSubresourceRange *range)
1243 {
1244 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1245 ? image->layer_count - range->baseArrayLayer
1246 : range->layerCount;
1247 }
1248
1249 static inline uint32_t
1250 tu_get_levelCount(const struct tu_image *image,
1251 const VkImageSubresourceRange *range)
1252 {
1253 return range->levelCount == VK_REMAINING_MIP_LEVELS
1254 ? image->level_count - range->baseMipLevel
1255 : range->levelCount;
1256 }
1257
1258 struct tu_image_view
1259 {
1260 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1261
1262 VkImageViewType type;
1263 VkImageAspectFlags aspect_mask;
1264 VkFormat vk_format;
1265 uint32_t base_layer;
1266 uint32_t layer_count;
1267 uint32_t base_mip;
1268 uint32_t level_count;
1269 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1270
1271 uint32_t descriptor[16];
1272
1273 /* Descriptor for use as a storage image as opposed to a sampled image.
1274 * This has a few differences for cube maps (e.g. type).
1275 */
1276 uint32_t storage_descriptor[16];
1277 };
1278
1279 struct tu_sampler
1280 {
1281 uint32_t state[A6XX_TEX_SAMP_DWORDS];
1282
1283 bool needs_border;
1284 };
1285
1286 struct tu_image_create_info
1287 {
1288 const VkImageCreateInfo *vk_info;
1289 bool scanout;
1290 bool no_metadata_planes;
1291 };
1292
1293 VkResult
1294 tu_image_create(VkDevice _device,
1295 const struct tu_image_create_info *info,
1296 const VkAllocationCallbacks *alloc,
1297 VkImage *pImage);
1298
1299 VkResult
1300 tu_image_from_gralloc(VkDevice device_h,
1301 const VkImageCreateInfo *base_info,
1302 const VkNativeBufferANDROID *gralloc_info,
1303 const VkAllocationCallbacks *alloc,
1304 VkImage *out_image_h);
1305
1306 void
1307 tu_image_view_init(struct tu_image_view *view,
1308 struct tu_device *device,
1309 const VkImageViewCreateInfo *pCreateInfo);
1310
1311 struct tu_buffer_view
1312 {
1313 VkFormat vk_format;
1314 uint64_t range; /**< VkBufferViewCreateInfo::range */
1315 uint32_t state[4];
1316 };
1317 void
1318 tu_buffer_view_init(struct tu_buffer_view *view,
1319 struct tu_device *device,
1320 const VkBufferViewCreateInfo *pCreateInfo);
1321
1322 static inline struct VkExtent3D
1323 tu_sanitize_image_extent(const VkImageType imageType,
1324 const struct VkExtent3D imageExtent)
1325 {
1326 switch (imageType) {
1327 case VK_IMAGE_TYPE_1D:
1328 return (VkExtent3D) { imageExtent.width, 1, 1 };
1329 case VK_IMAGE_TYPE_2D:
1330 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1331 case VK_IMAGE_TYPE_3D:
1332 return imageExtent;
1333 default:
1334 unreachable("invalid image type");
1335 }
1336 }
1337
1338 static inline struct VkOffset3D
1339 tu_sanitize_image_offset(const VkImageType imageType,
1340 const struct VkOffset3D imageOffset)
1341 {
1342 switch (imageType) {
1343 case VK_IMAGE_TYPE_1D:
1344 return (VkOffset3D) { imageOffset.x, 0, 0 };
1345 case VK_IMAGE_TYPE_2D:
1346 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1347 case VK_IMAGE_TYPE_3D:
1348 return imageOffset;
1349 default:
1350 unreachable("invalid image type");
1351 }
1352 }
1353
1354 struct tu_attachment_info
1355 {
1356 struct tu_image_view *attachment;
1357 };
1358
1359 struct tu_framebuffer
1360 {
1361 uint32_t width;
1362 uint32_t height;
1363 uint32_t layers;
1364
1365 uint32_t attachment_count;
1366 struct tu_attachment_info attachments[0];
1367 };
1368
1369 struct tu_subpass_barrier
1370 {
1371 VkPipelineStageFlags src_stage_mask;
1372 VkAccessFlags src_access_mask;
1373 VkAccessFlags dst_access_mask;
1374 };
1375
1376 void
1377 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1378 const struct tu_subpass_barrier *barrier);
1379
1380 struct tu_subpass_attachment
1381 {
1382 uint32_t attachment;
1383 VkImageLayout layout;
1384 };
1385
1386 struct tu_subpass
1387 {
1388 uint32_t input_count;
1389 uint32_t color_count;
1390 struct tu_subpass_attachment *input_attachments;
1391 struct tu_subpass_attachment *color_attachments;
1392 struct tu_subpass_attachment *resolve_attachments;
1393 struct tu_subpass_attachment depth_stencil_attachment;
1394
1395 /** Subpass has at least one resolve attachment */
1396 bool has_resolve;
1397
1398 struct tu_subpass_barrier start_barrier;
1399
1400 uint32_t view_mask;
1401 VkSampleCountFlagBits max_sample_count;
1402 };
1403
1404 struct tu_render_pass_attachment
1405 {
1406 VkFormat format;
1407 uint32_t samples;
1408 VkAttachmentLoadOp load_op;
1409 VkAttachmentLoadOp stencil_load_op;
1410 VkImageLayout initial_layout;
1411 VkImageLayout final_layout;
1412 uint32_t view_mask;
1413 };
1414
1415 struct tu_render_pass
1416 {
1417 uint32_t attachment_count;
1418 uint32_t subpass_count;
1419 struct tu_subpass_attachment *subpass_attachments;
1420 struct tu_render_pass_attachment *attachments;
1421 struct tu_subpass_barrier end_barrier;
1422 struct tu_subpass subpasses[0];
1423 };
1424
1425 VkResult
1426 tu_device_init_meta(struct tu_device *device);
1427 void
1428 tu_device_finish_meta(struct tu_device *device);
1429
1430 struct tu_query_pool
1431 {
1432 uint32_t stride;
1433 uint32_t availability_offset;
1434 uint64_t size;
1435 char *ptr;
1436 VkQueryType type;
1437 uint32_t pipeline_stats_mask;
1438 };
1439
1440 struct tu_semaphore
1441 {
1442 uint32_t syncobj;
1443 uint32_t temp_syncobj;
1444 };
1445
1446 void
1447 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1448 VkPipelineBindPoint bind_point,
1449 struct tu_descriptor_set *set,
1450 unsigned idx);
1451
1452 void
1453 tu_update_descriptor_sets(struct tu_device *device,
1454 struct tu_cmd_buffer *cmd_buffer,
1455 VkDescriptorSet overrideSet,
1456 uint32_t descriptorWriteCount,
1457 const VkWriteDescriptorSet *pDescriptorWrites,
1458 uint32_t descriptorCopyCount,
1459 const VkCopyDescriptorSet *pDescriptorCopies);
1460
1461 void
1462 tu_update_descriptor_set_with_template(
1463 struct tu_device *device,
1464 struct tu_cmd_buffer *cmd_buffer,
1465 struct tu_descriptor_set *set,
1466 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1467 const void *pData);
1468
1469 void
1470 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1471 VkPipelineBindPoint pipelineBindPoint,
1472 VkPipelineLayout _layout,
1473 uint32_t set,
1474 uint32_t descriptorWriteCount,
1475 const VkWriteDescriptorSet *pDescriptorWrites);
1476
1477 int
1478 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1479
1480 int
1481 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1482
1483 int
1484 tu_drm_submitqueue_new(const struct tu_device *dev,
1485 int priority,
1486 uint32_t *queue_id);
1487
1488 void
1489 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1490
1491 uint32_t
1492 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1493 uint32_t
1494 tu_gem_import_dmabuf(const struct tu_device *dev,
1495 int prime_fd,
1496 uint64_t size);
1497 int
1498 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1499 void
1500 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1501 uint64_t
1502 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1503 uint64_t
1504 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1505
1506 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1507 \
1508 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1509 { \
1510 return (struct __tu_type *) _handle; \
1511 } \
1512 \
1513 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1514 { \
1515 return (__VkType) _obj; \
1516 }
1517
1518 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1519 \
1520 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1521 { \
1522 return (struct __tu_type *) (uintptr_t) _handle; \
1523 } \
1524 \
1525 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1526 { \
1527 return (__VkType)(uintptr_t) _obj; \
1528 }
1529
1530 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1531 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1532
1533 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1534 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1535 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1536 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1537 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1538
1539 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1540 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1541 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1542 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1543 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1544 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1545 VkDescriptorSetLayout)
1546 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1547 VkDescriptorUpdateTemplate)
1548 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1549 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1550 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1551 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1552 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1553 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1554 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1555 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1556 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1557 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1558 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1559 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1560 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1561 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1562
1563 #endif /* TU_PRIVATE_H */