turnip: parse VkPipelineViewportStateCreateInfo
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53
54 #include "drm/msm_drm.h"
55
56 #include "adreno_common.xml.h"
57 #include "adreno_pm4.xml.h"
58 #include "a6xx.xml.h"
59
60 #include "tu_descriptor_set.h"
61 #include "tu_extensions.h"
62
63 /* Pre-declarations needed for WSI entrypoints */
64 struct wl_surface;
65 struct wl_display;
66 typedef struct xcb_connection_t xcb_connection_t;
67 typedef uint32_t xcb_visualid_t;
68 typedef uint32_t xcb_window_t;
69
70 #include <vulkan/vk_android_native_buffer.h>
71 #include <vulkan/vk_icd.h>
72 #include <vulkan/vulkan.h>
73 #include <vulkan/vulkan_intel.h>
74
75 #include "tu_entrypoints.h"
76
77 #define MAX_VBS 32
78 #define MAX_VERTEX_ATTRIBS 32
79 #define MAX_RTS 8
80 #define MAX_VSC_PIPES 32
81 #define MAX_VIEWPORTS 1
82 #define MAX_SCISSORS 16
83 #define MAX_DISCARD_RECTANGLES 4
84 #define MAX_PUSH_CONSTANTS_SIZE 128
85 #define MAX_PUSH_DESCRIPTORS 32
86 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
87 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
88 #define MAX_DYNAMIC_BUFFERS \
89 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
90 #define MAX_SAMPLES_LOG2 4
91 #define NUM_META_FS_KEYS 13
92 #define TU_MAX_DRM_DEVICES 8
93 #define MAX_VIEWS 8
94
95 #define NUM_DEPTH_CLEAR_PIPELINES 3
96
97 /*
98 * This is the point we switch from using CP to compute shader
99 * for certain buffer operations.
100 */
101 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
102
103 enum tu_mem_heap
104 {
105 TU_MEM_HEAP_VRAM,
106 TU_MEM_HEAP_VRAM_CPU_ACCESS,
107 TU_MEM_HEAP_GTT,
108 TU_MEM_HEAP_COUNT
109 };
110
111 enum tu_mem_type
112 {
113 TU_MEM_TYPE_VRAM,
114 TU_MEM_TYPE_GTT_WRITE_COMBINE,
115 TU_MEM_TYPE_VRAM_CPU_ACCESS,
116 TU_MEM_TYPE_GTT_CACHED,
117 TU_MEM_TYPE_COUNT
118 };
119
120 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
121
122 static inline uint32_t
123 align_u32(uint32_t v, uint32_t a)
124 {
125 assert(a != 0 && a == (a & -a));
126 return (v + a - 1) & ~(a - 1);
127 }
128
129 static inline uint32_t
130 align_u32_npot(uint32_t v, uint32_t a)
131 {
132 return (v + a - 1) / a * a;
133 }
134
135 static inline uint64_t
136 align_u64(uint64_t v, uint64_t a)
137 {
138 assert(a != 0 && a == (a & -a));
139 return (v + a - 1) & ~(a - 1);
140 }
141
142 static inline int32_t
143 align_i32(int32_t v, int32_t a)
144 {
145 assert(a != 0 && a == (a & -a));
146 return (v + a - 1) & ~(a - 1);
147 }
148
149 /** Alignment must be a power of 2. */
150 static inline bool
151 tu_is_aligned(uintmax_t n, uintmax_t a)
152 {
153 assert(a == (a & -a));
154 return (n & (a - 1)) == 0;
155 }
156
157 static inline uint32_t
158 round_up_u32(uint32_t v, uint32_t a)
159 {
160 return (v + a - 1) / a;
161 }
162
163 static inline uint64_t
164 round_up_u64(uint64_t v, uint64_t a)
165 {
166 return (v + a - 1) / a;
167 }
168
169 static inline uint32_t
170 tu_minify(uint32_t n, uint32_t levels)
171 {
172 if (unlikely(n == 0))
173 return 0;
174 else
175 return MAX2(n >> levels, 1);
176 }
177 static inline float
178 tu_clamp_f(float f, float min, float max)
179 {
180 assert(min < max);
181
182 if (f > max)
183 return max;
184 else if (f < min)
185 return min;
186 else
187 return f;
188 }
189
190 static inline bool
191 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
192 {
193 if (*inout_mask & clear_mask) {
194 *inout_mask &= ~clear_mask;
195 return true;
196 } else {
197 return false;
198 }
199 }
200
201 #define for_each_bit(b, dword) \
202 for (uint32_t __dword = (dword); \
203 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
204
205 #define typed_memcpy(dest, src, count) \
206 ({ \
207 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
208 memcpy((dest), (src), (count) * sizeof(*(src))); \
209 })
210
211 /* Whenever we generate an error, pass it through this function. Useful for
212 * debugging, where we can break on it. Only call at error site, not when
213 * propagating errors. Might be useful to plug in a stack trace here.
214 */
215
216 struct tu_instance;
217
218 VkResult
219 __vk_errorf(struct tu_instance *instance,
220 VkResult error,
221 const char *file,
222 int line,
223 const char *format,
224 ...);
225
226 #define vk_error(instance, error) \
227 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
228 #define vk_errorf(instance, error, format, ...) \
229 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
230
231 void
232 __tu_finishme(const char *file, int line, const char *format, ...)
233 tu_printflike(3, 4);
234 void
235 tu_loge(const char *format, ...) tu_printflike(1, 2);
236 void
237 tu_loge_v(const char *format, va_list va);
238 void
239 tu_logi(const char *format, ...) tu_printflike(1, 2);
240 void
241 tu_logi_v(const char *format, va_list va);
242
243 /**
244 * Print a FINISHME message, including its source location.
245 */
246 #define tu_finishme(format, ...) \
247 do { \
248 static bool reported = false; \
249 if (!reported) { \
250 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
251 reported = true; \
252 } \
253 } while (0)
254
255 /* A non-fatal assert. Useful for debugging. */
256 #ifdef DEBUG
257 #define tu_assert(x) \
258 ({ \
259 if (unlikely(!(x))) \
260 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
261 })
262 #else
263 #define tu_assert(x)
264 #endif
265
266 /* Suppress -Wunused in stub functions */
267 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
268 static inline void
269 __tu_use_args(int ignore, ...)
270 {
271 }
272
273 #define tu_stub() \
274 do { \
275 tu_finishme("stub %s", __func__); \
276 } while (0)
277
278 void *
279 tu_lookup_entrypoint_unchecked(const char *name);
280 void *
281 tu_lookup_entrypoint_checked(
282 const char *name,
283 uint32_t core_version,
284 const struct tu_instance_extension_table *instance,
285 const struct tu_device_extension_table *device);
286
287 struct tu_physical_device
288 {
289 VK_LOADER_DATA _loader_data;
290
291 struct tu_instance *instance;
292
293 char path[20];
294 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
295 uint8_t driver_uuid[VK_UUID_SIZE];
296 uint8_t device_uuid[VK_UUID_SIZE];
297 uint8_t cache_uuid[VK_UUID_SIZE];
298
299 int local_fd;
300 int master_fd;
301
302 unsigned gpu_id;
303 uint32_t gmem_size;
304 uint32_t tile_align_w;
305 uint32_t tile_align_h;
306
307 /* This is the drivers on-disk cache used as a fallback as opposed to
308 * the pipeline cache defined by apps.
309 */
310 struct disk_cache *disk_cache;
311
312 struct tu_device_extension_table supported_extensions;
313 };
314
315 enum tu_debug_flags
316 {
317 TU_DEBUG_STARTUP = 1 << 0,
318 };
319
320 struct tu_instance
321 {
322 VK_LOADER_DATA _loader_data;
323
324 VkAllocationCallbacks alloc;
325
326 uint32_t api_version;
327 int physical_device_count;
328 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
329
330 enum tu_debug_flags debug_flags;
331
332 struct vk_debug_report_instance debug_report_callbacks;
333
334 struct tu_instance_extension_table enabled_extensions;
335 };
336
337 bool
338 tu_instance_extension_supported(const char *name);
339 uint32_t
340 tu_physical_device_api_version(struct tu_physical_device *dev);
341 bool
342 tu_physical_device_extension_supported(struct tu_physical_device *dev,
343 const char *name);
344
345 struct cache_entry;
346
347 struct tu_pipeline_cache
348 {
349 struct tu_device *device;
350 pthread_mutex_t mutex;
351
352 uint32_t total_size;
353 uint32_t table_size;
354 uint32_t kernel_count;
355 struct cache_entry **hash_table;
356 bool modified;
357
358 VkAllocationCallbacks alloc;
359 };
360
361 struct tu_pipeline_key
362 {
363 };
364
365 void
366 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
367 struct tu_device *device);
368 void
369 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
370 void
371 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
372 const void *data,
373 size_t size);
374
375 struct tu_shader_variant;
376
377 bool
378 tu_create_shader_variants_from_pipeline_cache(
379 struct tu_device *device,
380 struct tu_pipeline_cache *cache,
381 const unsigned char *sha1,
382 struct tu_shader_variant **variants);
383
384 void
385 tu_pipeline_cache_insert_shaders(struct tu_device *device,
386 struct tu_pipeline_cache *cache,
387 const unsigned char *sha1,
388 struct tu_shader_variant **variants,
389 const void *const *codes,
390 const unsigned *code_sizes);
391
392 struct tu_meta_state
393 {
394 VkAllocationCallbacks alloc;
395
396 struct tu_pipeline_cache cache;
397 };
398
399 /* queue types */
400 #define TU_QUEUE_GENERAL 0
401
402 #define TU_MAX_QUEUE_FAMILIES 1
403
404 struct tu_fence
405 {
406 bool signaled;
407 int fd;
408 };
409
410 void
411 tu_fence_init(struct tu_fence *fence, bool signaled);
412 void
413 tu_fence_finish(struct tu_fence *fence);
414 void
415 tu_fence_update_fd(struct tu_fence *fence, int fd);
416 void
417 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
418 void
419 tu_fence_signal(struct tu_fence *fence);
420 void
421 tu_fence_wait_idle(struct tu_fence *fence);
422
423 struct tu_queue
424 {
425 VK_LOADER_DATA _loader_data;
426 struct tu_device *device;
427 uint32_t queue_family_index;
428 int queue_idx;
429 VkDeviceQueueCreateFlags flags;
430
431 uint32_t msm_queue_id;
432 struct tu_fence submit_fence;
433 };
434
435 struct tu_device
436 {
437 VK_LOADER_DATA _loader_data;
438
439 VkAllocationCallbacks alloc;
440
441 struct tu_instance *instance;
442
443 struct tu_meta_state meta_state;
444
445 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
446 int queue_count[TU_MAX_QUEUE_FAMILIES];
447
448 struct tu_physical_device *physical_device;
449
450 /* Backup in-memory cache to be used if the app doesn't provide one */
451 struct tu_pipeline_cache *mem_cache;
452
453 struct list_head shader_slabs;
454 mtx_t shader_slab_mutex;
455
456 struct tu_device_extension_table enabled_extensions;
457 };
458
459 struct tu_bo
460 {
461 uint32_t gem_handle;
462 uint64_t size;
463 uint64_t iova;
464 void *map;
465 };
466
467 VkResult
468 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
469 VkResult
470 tu_bo_init_dmabuf(struct tu_device *dev,
471 struct tu_bo *bo,
472 uint64_t size,
473 int fd);
474 int
475 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
476 void
477 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
478 VkResult
479 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
480
481 struct tu_cs_entry
482 {
483 /* No ownership */
484 const struct tu_bo *bo;
485
486 uint32_t size;
487 uint32_t offset;
488 };
489
490 enum tu_cs_mode
491 {
492
493 /*
494 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
495 * is full. tu_cs_begin must be called before command packet emission and
496 * tu_cs_end must be called after.
497 *
498 * This mode may create multiple entries internally. The entries must be
499 * submitted together.
500 */
501 TU_CS_MODE_GROW,
502
503 /*
504 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
505 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
506 * effect on it.
507 *
508 * This mode does not create any entry or any BO.
509 */
510 TU_CS_MODE_EXTERNAL,
511
512 /*
513 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
514 * command packet emission. tu_cs_begin_sub_stream must be called to get a
515 * sub-stream to emit comamnd packets to. When done with the sub-stream,
516 * tu_cs_end_sub_stream must be called.
517 *
518 * This mode does not create any entry internally.
519 */
520 TU_CS_MODE_SUB_STREAM,
521 };
522
523 struct tu_cs
524 {
525 uint32_t *start;
526 uint32_t *cur;
527 uint32_t *reserved_end;
528 uint32_t *end;
529
530 enum tu_cs_mode mode;
531 uint32_t next_bo_size;
532
533 struct tu_cs_entry *entries;
534 uint32_t entry_count;
535 uint32_t entry_capacity;
536
537 struct tu_bo **bos;
538 uint32_t bo_count;
539 uint32_t bo_capacity;
540 };
541
542 struct tu_device_memory
543 {
544 struct tu_bo bo;
545 VkDeviceSize size;
546
547 /* for dedicated allocations */
548 struct tu_image *image;
549 struct tu_buffer *buffer;
550
551 uint32_t type_index;
552 void *map;
553 void *user_ptr;
554 };
555
556 struct tu_descriptor_range
557 {
558 uint64_t va;
559 uint32_t size;
560 };
561
562 struct tu_descriptor_set
563 {
564 const struct tu_descriptor_set_layout *layout;
565 uint32_t size;
566
567 uint64_t va;
568 uint32_t *mapped_ptr;
569 struct tu_descriptor_range *dynamic_descriptors;
570 };
571
572 struct tu_push_descriptor_set
573 {
574 struct tu_descriptor_set set;
575 uint32_t capacity;
576 };
577
578 struct tu_descriptor_pool_entry
579 {
580 uint32_t offset;
581 uint32_t size;
582 struct tu_descriptor_set *set;
583 };
584
585 struct tu_descriptor_pool
586 {
587 uint8_t *mapped_ptr;
588 uint64_t current_offset;
589 uint64_t size;
590
591 uint8_t *host_memory_base;
592 uint8_t *host_memory_ptr;
593 uint8_t *host_memory_end;
594
595 uint32_t entry_count;
596 uint32_t max_entry_count;
597 struct tu_descriptor_pool_entry entries[0];
598 };
599
600 struct tu_descriptor_update_template_entry
601 {
602 VkDescriptorType descriptor_type;
603
604 /* The number of descriptors to update */
605 uint32_t descriptor_count;
606
607 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
608 */
609 uint32_t dst_offset;
610
611 /* In dwords. Not valid/used for dynamic descriptors */
612 uint32_t dst_stride;
613
614 uint32_t buffer_offset;
615
616 /* Only valid for combined image samplers and samplers */
617 uint16_t has_sampler;
618
619 /* In bytes */
620 size_t src_offset;
621 size_t src_stride;
622
623 /* For push descriptors */
624 const uint32_t *immutable_samplers;
625 };
626
627 struct tu_descriptor_update_template
628 {
629 uint32_t entry_count;
630 VkPipelineBindPoint bind_point;
631 struct tu_descriptor_update_template_entry entry[0];
632 };
633
634 struct tu_buffer
635 {
636 VkDeviceSize size;
637
638 VkBufferUsageFlags usage;
639 VkBufferCreateFlags flags;
640
641 struct tu_bo *bo;
642 VkDeviceSize bo_offset;
643 };
644
645 enum tu_dynamic_state_bits
646 {
647 TU_DYNAMIC_VIEWPORT = 1 << 0,
648 TU_DYNAMIC_SCISSOR = 1 << 1,
649 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
650 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
651 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
652 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
653 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
654 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
655 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
656 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
657 TU_DYNAMIC_ALL = (1 << 10) - 1,
658 };
659
660 struct tu_vertex_binding
661 {
662 struct tu_buffer *buffer;
663 VkDeviceSize offset;
664 };
665
666 struct tu_viewport_state
667 {
668 uint32_t count;
669 VkViewport viewports[MAX_VIEWPORTS];
670 };
671
672 struct tu_scissor_state
673 {
674 uint32_t count;
675 VkRect2D scissors[MAX_SCISSORS];
676 };
677
678 struct tu_discard_rectangle_state
679 {
680 uint32_t count;
681 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
682 };
683
684 struct tu_dynamic_state
685 {
686 /**
687 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
688 * Defines the set of saved dynamic state.
689 */
690 uint32_t mask;
691
692 struct tu_viewport_state viewport;
693
694 struct tu_scissor_state scissor;
695
696 float line_width;
697
698 struct
699 {
700 float bias;
701 float clamp;
702 float slope;
703 } depth_bias;
704
705 float blend_constants[4];
706
707 struct
708 {
709 float min;
710 float max;
711 } depth_bounds;
712
713 struct
714 {
715 uint32_t front;
716 uint32_t back;
717 } stencil_compare_mask;
718
719 struct
720 {
721 uint32_t front;
722 uint32_t back;
723 } stencil_write_mask;
724
725 struct
726 {
727 uint32_t front;
728 uint32_t back;
729 } stencil_reference;
730
731 struct tu_discard_rectangle_state discard_rectangle;
732 };
733
734 extern const struct tu_dynamic_state default_dynamic_state;
735
736 const char *
737 tu_get_debug_option_name(int id);
738
739 const char *
740 tu_get_perftest_option_name(int id);
741
742 /**
743 * Attachment state when recording a renderpass instance.
744 *
745 * The clear value is valid only if there exists a pending clear.
746 */
747 struct tu_attachment_state
748 {
749 VkImageAspectFlags pending_clear_aspects;
750 uint32_t cleared_views;
751 VkClearValue clear_value;
752 VkImageLayout current_layout;
753 };
754
755 struct tu_descriptor_state
756 {
757 struct tu_descriptor_set *sets[MAX_SETS];
758 uint32_t dirty;
759 uint32_t valid;
760 struct tu_push_descriptor_set push_set;
761 bool push_dirty;
762 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
763 };
764
765 struct tu_tile
766 {
767 uint8_t pipe;
768 uint8_t slot;
769 VkOffset2D begin;
770 VkOffset2D end;
771 };
772
773 struct tu_tiling_config
774 {
775 VkRect2D render_area;
776 uint32_t buffer_cpp[MAX_RTS + 2];
777 uint32_t buffer_count;
778
779 /* position and size of the first tile */
780 VkRect2D tile0;
781 /* number of tiles */
782 VkExtent2D tile_count;
783
784 uint32_t gmem_offsets[MAX_RTS + 2];
785
786 /* size of the first VSC pipe */
787 VkExtent2D pipe0;
788 /* number of VSC pipes */
789 VkExtent2D pipe_count;
790
791 /* pipe register values */
792 uint32_t pipe_config[MAX_VSC_PIPES];
793 uint32_t pipe_sizes[MAX_VSC_PIPES];
794 };
795
796 struct tu_cmd_state
797 {
798 /* Vertex descriptors */
799 uint64_t vb_va;
800 unsigned vb_size;
801
802 struct tu_dynamic_state dynamic;
803
804 /* Index buffer */
805 struct tu_buffer *index_buffer;
806 uint64_t index_offset;
807 uint32_t index_type;
808 uint32_t max_index_count;
809 uint64_t index_va;
810
811 const struct tu_render_pass *pass;
812 const struct tu_subpass *subpass;
813 const struct tu_framebuffer *framebuffer;
814 struct tu_attachment_state *attachments;
815
816 struct tu_tiling_config tiling_config;
817
818 struct tu_cs_entry tile_load_ib;
819 struct tu_cs_entry tile_store_ib;
820 };
821
822 struct tu_cmd_pool
823 {
824 VkAllocationCallbacks alloc;
825 struct list_head cmd_buffers;
826 struct list_head free_cmd_buffers;
827 uint32_t queue_family_index;
828 };
829
830 struct tu_cmd_buffer_upload
831 {
832 uint8_t *map;
833 unsigned offset;
834 uint64_t size;
835 struct list_head list;
836 };
837
838 enum tu_cmd_buffer_status
839 {
840 TU_CMD_BUFFER_STATUS_INVALID,
841 TU_CMD_BUFFER_STATUS_INITIAL,
842 TU_CMD_BUFFER_STATUS_RECORDING,
843 TU_CMD_BUFFER_STATUS_EXECUTABLE,
844 TU_CMD_BUFFER_STATUS_PENDING,
845 };
846
847 struct tu_bo_list
848 {
849 uint32_t count;
850 uint32_t capacity;
851 struct drm_msm_gem_submit_bo *bo_infos;
852 };
853
854 #define TU_BO_LIST_FAILED (~0)
855
856 void
857 tu_bo_list_init(struct tu_bo_list *list);
858 void
859 tu_bo_list_destroy(struct tu_bo_list *list);
860 void
861 tu_bo_list_reset(struct tu_bo_list *list);
862 uint32_t
863 tu_bo_list_add(struct tu_bo_list *list,
864 const struct tu_bo *bo,
865 uint32_t flags);
866 VkResult
867 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
868
869 struct tu_cmd_buffer
870 {
871 VK_LOADER_DATA _loader_data;
872
873 struct tu_device *device;
874
875 struct tu_cmd_pool *pool;
876 struct list_head pool_link;
877
878 VkCommandBufferUsageFlags usage_flags;
879 VkCommandBufferLevel level;
880 enum tu_cmd_buffer_status status;
881
882 struct tu_cmd_state state;
883 struct tu_vertex_binding vertex_bindings[MAX_VBS];
884 uint32_t queue_family_index;
885
886 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
887 VkShaderStageFlags push_constant_stages;
888 struct tu_descriptor_set meta_push_descriptors;
889
890 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
891
892 struct tu_cmd_buffer_upload upload;
893
894 VkResult record_result;
895
896 struct tu_bo_list bo_list;
897 struct tu_cs cs;
898 struct tu_cs tile_cs;
899
900 uint16_t marker_reg;
901 uint32_t marker_seqno;
902
903 struct tu_bo scratch_bo;
904 uint32_t scratch_seqno;
905
906 bool wait_for_idle;
907 };
908
909 void
910 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
911 struct tu_cs *cs,
912 enum vgt_event_type event,
913 bool need_seqno);
914
915 bool
916 tu_get_memory_fd(struct tu_device *device,
917 struct tu_device_memory *memory,
918 int *pFD);
919
920 /*
921 * Takes x,y,z as exact numbers of invocations, instead of blocks.
922 *
923 * Limitations: Can't call normal dispatch functions without binding or
924 * rebinding
925 * the compute pipeline.
926 */
927 void
928 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
929 uint32_t x,
930 uint32_t y,
931 uint32_t z);
932
933 struct tu_event
934 {
935 uint64_t *map;
936 };
937
938 struct tu_shader_module;
939
940 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
941 #define TU_HASH_SHADER_SISCHED (1 << 1)
942 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
943 void
944 tu_hash_shaders(unsigned char *hash,
945 const VkPipelineShaderStageCreateInfo **stages,
946 const struct tu_pipeline_layout *layout,
947 const struct tu_pipeline_key *key,
948 uint32_t flags);
949
950 static inline gl_shader_stage
951 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
952 {
953 assert(__builtin_popcount(vk_stage) == 1);
954 return ffs(vk_stage) - 1;
955 }
956
957 static inline VkShaderStageFlagBits
958 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
959 {
960 return (1 << mesa_stage);
961 }
962
963 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
964
965 #define tu_foreach_stage(stage, stage_bits) \
966 for (gl_shader_stage stage, \
967 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
968 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
969
970 struct tu_shader_module
971 {
972 struct nir_shader *nir;
973 unsigned char sha1[20];
974 uint32_t size;
975 char data[0];
976 };
977
978 struct tu_pipeline
979 {
980 struct tu_cs cs;
981
982 struct tu_dynamic_state dynamic_state;
983
984 struct tu_pipeline_layout *layout;
985
986 bool need_indirect_descriptor_sets;
987 VkShaderStageFlags active_stages;
988
989 struct
990 {
991 enum pc_di_primtype primtype;
992 bool primitive_restart;
993 } ia;
994
995 struct
996 {
997 struct tu_cs_entry state_ib;
998 } vp;
999 };
1000
1001 void
1002 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1003
1004 void
1005 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1006
1007 struct tu_userdata_info *
1008 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1009 gl_shader_stage stage,
1010 int idx);
1011
1012 struct tu_shader_variant *
1013 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1014
1015 struct tu_graphics_pipeline_create_info
1016 {
1017 bool use_rectlist;
1018 bool db_depth_clear;
1019 bool db_stencil_clear;
1020 bool db_depth_disable_expclear;
1021 bool db_stencil_disable_expclear;
1022 bool db_flush_depth_inplace;
1023 bool db_flush_stencil_inplace;
1024 bool db_resummarize;
1025 uint32_t custom_blend_mode;
1026 };
1027
1028 struct tu_native_format
1029 {
1030 int vtx; /* VFMTn_xxx or -1 */
1031 int tex; /* TFMTn_xxx or -1 */
1032 int rb; /* RBn_xxx or -1 */
1033 int swap; /* enum a3xx_color_swap */
1034 bool present; /* internal only; always true to external users */
1035 };
1036
1037 const struct tu_native_format *
1038 tu6_get_native_format(VkFormat format);
1039
1040 int
1041 tu_pack_clear_value(const VkClearValue *val,
1042 VkFormat format,
1043 uint32_t buf[4]);
1044 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1045
1046 struct tu_image_level
1047 {
1048 VkDeviceSize offset;
1049 VkDeviceSize size;
1050 uint32_t pitch;
1051 };
1052
1053 struct tu_image
1054 {
1055 VkImageType type;
1056 /* The original VkFormat provided by the client. This may not match any
1057 * of the actual surface formats.
1058 */
1059 VkFormat vk_format;
1060 VkImageAspectFlags aspects;
1061 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1062 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1063 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1064 VkExtent3D extent;
1065 uint32_t level_count;
1066 uint32_t layer_count;
1067
1068 VkDeviceSize size;
1069 uint32_t alignment;
1070
1071 /* memory layout */
1072 VkDeviceSize layer_size;
1073 struct tu_image_level levels[15];
1074 unsigned tile_mode;
1075
1076 unsigned queue_family_mask;
1077 bool exclusive;
1078 bool shareable;
1079
1080 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1081 VkDeviceMemory owned_memory;
1082
1083 /* Set when bound */
1084 const struct tu_bo *bo;
1085 VkDeviceSize bo_offset;
1086 };
1087
1088 unsigned
1089 tu_image_queue_family_mask(const struct tu_image *image,
1090 uint32_t family,
1091 uint32_t queue_family);
1092
1093 static inline uint32_t
1094 tu_get_layerCount(const struct tu_image *image,
1095 const VkImageSubresourceRange *range)
1096 {
1097 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1098 ? image->layer_count - range->baseArrayLayer
1099 : range->layerCount;
1100 }
1101
1102 static inline uint32_t
1103 tu_get_levelCount(const struct tu_image *image,
1104 const VkImageSubresourceRange *range)
1105 {
1106 return range->levelCount == VK_REMAINING_MIP_LEVELS
1107 ? image->level_count - range->baseMipLevel
1108 : range->levelCount;
1109 }
1110
1111 struct tu_image_view
1112 {
1113 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1114
1115 VkImageViewType type;
1116 VkImageAspectFlags aspect_mask;
1117 VkFormat vk_format;
1118 uint32_t base_layer;
1119 uint32_t layer_count;
1120 uint32_t base_mip;
1121 uint32_t level_count;
1122 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1123
1124 uint32_t descriptor[16];
1125
1126 /* Descriptor for use as a storage image as opposed to a sampled image.
1127 * This has a few differences for cube maps (e.g. type).
1128 */
1129 uint32_t storage_descriptor[16];
1130 };
1131
1132 struct tu_sampler
1133 {
1134 };
1135
1136 struct tu_image_create_info
1137 {
1138 const VkImageCreateInfo *vk_info;
1139 bool scanout;
1140 bool no_metadata_planes;
1141 };
1142
1143 VkResult
1144 tu_image_create(VkDevice _device,
1145 const struct tu_image_create_info *info,
1146 const VkAllocationCallbacks *alloc,
1147 VkImage *pImage);
1148
1149 VkResult
1150 tu_image_from_gralloc(VkDevice device_h,
1151 const VkImageCreateInfo *base_info,
1152 const VkNativeBufferANDROID *gralloc_info,
1153 const VkAllocationCallbacks *alloc,
1154 VkImage *out_image_h);
1155
1156 void
1157 tu_image_view_init(struct tu_image_view *view,
1158 struct tu_device *device,
1159 const VkImageViewCreateInfo *pCreateInfo);
1160
1161 struct tu_buffer_view
1162 {
1163 VkFormat vk_format;
1164 uint64_t range; /**< VkBufferViewCreateInfo::range */
1165 uint32_t state[4];
1166 };
1167 void
1168 tu_buffer_view_init(struct tu_buffer_view *view,
1169 struct tu_device *device,
1170 const VkBufferViewCreateInfo *pCreateInfo);
1171
1172 static inline struct VkExtent3D
1173 tu_sanitize_image_extent(const VkImageType imageType,
1174 const struct VkExtent3D imageExtent)
1175 {
1176 switch (imageType) {
1177 case VK_IMAGE_TYPE_1D:
1178 return (VkExtent3D) { imageExtent.width, 1, 1 };
1179 case VK_IMAGE_TYPE_2D:
1180 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1181 case VK_IMAGE_TYPE_3D:
1182 return imageExtent;
1183 default:
1184 unreachable("invalid image type");
1185 }
1186 }
1187
1188 static inline struct VkOffset3D
1189 tu_sanitize_image_offset(const VkImageType imageType,
1190 const struct VkOffset3D imageOffset)
1191 {
1192 switch (imageType) {
1193 case VK_IMAGE_TYPE_1D:
1194 return (VkOffset3D) { imageOffset.x, 0, 0 };
1195 case VK_IMAGE_TYPE_2D:
1196 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1197 case VK_IMAGE_TYPE_3D:
1198 return imageOffset;
1199 default:
1200 unreachable("invalid image type");
1201 }
1202 }
1203
1204 struct tu_attachment_info
1205 {
1206 struct tu_image_view *attachment;
1207 };
1208
1209 struct tu_framebuffer
1210 {
1211 uint32_t width;
1212 uint32_t height;
1213 uint32_t layers;
1214
1215 uint32_t attachment_count;
1216 struct tu_attachment_info attachments[0];
1217 };
1218
1219 struct tu_subpass_barrier
1220 {
1221 VkPipelineStageFlags src_stage_mask;
1222 VkAccessFlags src_access_mask;
1223 VkAccessFlags dst_access_mask;
1224 };
1225
1226 void
1227 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1228 const struct tu_subpass_barrier *barrier);
1229
1230 struct tu_subpass_attachment
1231 {
1232 uint32_t attachment;
1233 VkImageLayout layout;
1234 };
1235
1236 struct tu_subpass
1237 {
1238 uint32_t input_count;
1239 uint32_t color_count;
1240 struct tu_subpass_attachment *input_attachments;
1241 struct tu_subpass_attachment *color_attachments;
1242 struct tu_subpass_attachment *resolve_attachments;
1243 struct tu_subpass_attachment depth_stencil_attachment;
1244
1245 /** Subpass has at least one resolve attachment */
1246 bool has_resolve;
1247
1248 struct tu_subpass_barrier start_barrier;
1249
1250 uint32_t view_mask;
1251 VkSampleCountFlagBits max_sample_count;
1252 };
1253
1254 struct tu_render_pass_attachment
1255 {
1256 VkFormat format;
1257 uint32_t samples;
1258 VkAttachmentLoadOp load_op;
1259 VkAttachmentLoadOp stencil_load_op;
1260 VkImageLayout initial_layout;
1261 VkImageLayout final_layout;
1262 uint32_t view_mask;
1263 };
1264
1265 struct tu_render_pass
1266 {
1267 uint32_t attachment_count;
1268 uint32_t subpass_count;
1269 struct tu_subpass_attachment *subpass_attachments;
1270 struct tu_render_pass_attachment *attachments;
1271 struct tu_subpass_barrier end_barrier;
1272 struct tu_subpass subpasses[0];
1273 };
1274
1275 VkResult
1276 tu_device_init_meta(struct tu_device *device);
1277 void
1278 tu_device_finish_meta(struct tu_device *device);
1279
1280 struct tu_query_pool
1281 {
1282 uint32_t stride;
1283 uint32_t availability_offset;
1284 uint64_t size;
1285 char *ptr;
1286 VkQueryType type;
1287 uint32_t pipeline_stats_mask;
1288 };
1289
1290 struct tu_semaphore
1291 {
1292 uint32_t syncobj;
1293 uint32_t temp_syncobj;
1294 };
1295
1296 void
1297 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1298 VkPipelineBindPoint bind_point,
1299 struct tu_descriptor_set *set,
1300 unsigned idx);
1301
1302 void
1303 tu_update_descriptor_sets(struct tu_device *device,
1304 struct tu_cmd_buffer *cmd_buffer,
1305 VkDescriptorSet overrideSet,
1306 uint32_t descriptorWriteCount,
1307 const VkWriteDescriptorSet *pDescriptorWrites,
1308 uint32_t descriptorCopyCount,
1309 const VkCopyDescriptorSet *pDescriptorCopies);
1310
1311 void
1312 tu_update_descriptor_set_with_template(
1313 struct tu_device *device,
1314 struct tu_cmd_buffer *cmd_buffer,
1315 struct tu_descriptor_set *set,
1316 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
1317 const void *pData);
1318
1319 void
1320 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1321 VkPipelineBindPoint pipelineBindPoint,
1322 VkPipelineLayout _layout,
1323 uint32_t set,
1324 uint32_t descriptorWriteCount,
1325 const VkWriteDescriptorSet *pDescriptorWrites);
1326
1327 int
1328 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1329
1330 int
1331 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1332
1333 int
1334 tu_drm_submitqueue_new(const struct tu_device *dev,
1335 int priority,
1336 uint32_t *queue_id);
1337
1338 void
1339 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1340
1341 uint32_t
1342 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1343 uint32_t
1344 tu_gem_import_dmabuf(const struct tu_device *dev,
1345 int prime_fd,
1346 uint64_t size);
1347 int
1348 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1349 void
1350 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1351 uint64_t
1352 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1353 uint64_t
1354 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1355
1356 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1357 \
1358 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1359 { \
1360 return (struct __tu_type *) _handle; \
1361 } \
1362 \
1363 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1364 { \
1365 return (__VkType) _obj; \
1366 }
1367
1368 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1369 \
1370 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1371 { \
1372 return (struct __tu_type *) (uintptr_t) _handle; \
1373 } \
1374 \
1375 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1376 { \
1377 return (__VkType)(uintptr_t) _obj; \
1378 }
1379
1380 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1381 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1382
1383 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1384 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1385 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1386 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1387 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1388
1389 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1390 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1391 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1392 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1393 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1394 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1395 VkDescriptorSetLayout)
1396 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1397 VkDescriptorUpdateTemplateKHR)
1398 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1399 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1400 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1401 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1402 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1403 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1404 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1405 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1406 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1407 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1408 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1409 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1410 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1411 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1412
1413 #endif /* TU_PRIVATE_H */