turnip: Fix 'unused' warnings
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53
54 #include "tu_descriptor_set.h"
55 #include "tu_extensions.h"
56
57 /* Pre-declarations needed for WSI entrypoints */
58 struct wl_surface;
59 struct wl_display;
60 typedef struct xcb_connection_t xcb_connection_t;
61 typedef uint32_t xcb_visualid_t;
62 typedef uint32_t xcb_window_t;
63
64 #include <vulkan/vk_android_native_buffer.h>
65 #include <vulkan/vk_icd.h>
66 #include <vulkan/vulkan.h>
67 #include <vulkan/vulkan_intel.h>
68
69 #include "drm/freedreno_ringbuffer.h"
70
71 #include "tu_entrypoints.h"
72
73 #define MAX_VBS 32
74 #define MAX_VERTEX_ATTRIBS 32
75 #define MAX_RTS 8
76 #define MAX_VIEWPORTS 16
77 #define MAX_SCISSORS 16
78 #define MAX_DISCARD_RECTANGLES 4
79 #define MAX_PUSH_CONSTANTS_SIZE 128
80 #define MAX_PUSH_DESCRIPTORS 32
81 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
82 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
83 #define MAX_DYNAMIC_BUFFERS \
84 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
85 #define MAX_SAMPLES_LOG2 4
86 #define NUM_META_FS_KEYS 13
87 #define TU_MAX_DRM_DEVICES 8
88 #define MAX_VIEWS 8
89
90 #define NUM_DEPTH_CLEAR_PIPELINES 3
91
92 /*
93 * This is the point we switch from using CP to compute shader
94 * for certain buffer operations.
95 */
96 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
97
98 enum tu_mem_heap
99 {
100 TU_MEM_HEAP_VRAM,
101 TU_MEM_HEAP_VRAM_CPU_ACCESS,
102 TU_MEM_HEAP_GTT,
103 TU_MEM_HEAP_COUNT
104 };
105
106 enum tu_mem_type
107 {
108 TU_MEM_TYPE_VRAM,
109 TU_MEM_TYPE_GTT_WRITE_COMBINE,
110 TU_MEM_TYPE_VRAM_CPU_ACCESS,
111 TU_MEM_TYPE_GTT_CACHED,
112 TU_MEM_TYPE_COUNT
113 };
114
115 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
116
117 static inline uint32_t
118 align_u32(uint32_t v, uint32_t a)
119 {
120 assert(a != 0 && a == (a & -a));
121 return (v + a - 1) & ~(a - 1);
122 }
123
124 static inline uint32_t
125 align_u32_npot(uint32_t v, uint32_t a)
126 {
127 return (v + a - 1) / a * a;
128 }
129
130 static inline uint64_t
131 align_u64(uint64_t v, uint64_t a)
132 {
133 assert(a != 0 && a == (a & -a));
134 return (v + a - 1) & ~(a - 1);
135 }
136
137 static inline int32_t
138 align_i32(int32_t v, int32_t a)
139 {
140 assert(a != 0 && a == (a & -a));
141 return (v + a - 1) & ~(a - 1);
142 }
143
144 /** Alignment must be a power of 2. */
145 static inline bool
146 tu_is_aligned(uintmax_t n, uintmax_t a)
147 {
148 assert(a == (a & -a));
149 return (n & (a - 1)) == 0;
150 }
151
152 static inline uint32_t
153 round_up_u32(uint32_t v, uint32_t a)
154 {
155 return (v + a - 1) / a;
156 }
157
158 static inline uint64_t
159 round_up_u64(uint64_t v, uint64_t a)
160 {
161 return (v + a - 1) / a;
162 }
163
164 static inline uint32_t
165 tu_minify(uint32_t n, uint32_t levels)
166 {
167 if (unlikely(n == 0))
168 return 0;
169 else
170 return MAX2(n >> levels, 1);
171 }
172 static inline float
173 tu_clamp_f(float f, float min, float max)
174 {
175 assert(min < max);
176
177 if (f > max)
178 return max;
179 else if (f < min)
180 return min;
181 else
182 return f;
183 }
184
185 static inline bool
186 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
187 {
188 if (*inout_mask & clear_mask) {
189 *inout_mask &= ~clear_mask;
190 return true;
191 } else {
192 return false;
193 }
194 }
195
196 #define for_each_bit(b, dword) \
197 for (uint32_t __dword = (dword); (b) = __builtin_ffs(__dword) - 1, __dword; \
198 __dword &= ~(1 << (b)))
199
200 #define typed_memcpy(dest, src, count) \
201 ({ \
202 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
203 memcpy((dest), (src), (count) * sizeof(*(src))); \
204 })
205
206 /* Whenever we generate an error, pass it through this function. Useful for
207 * debugging, where we can break on it. Only call at error site, not when
208 * propagating errors. Might be useful to plug in a stack trace here.
209 */
210
211 struct tu_instance;
212
213 VkResult
214 __vk_errorf(struct tu_instance *instance,
215 VkResult error,
216 const char *file,
217 int line,
218 const char *format,
219 ...);
220
221 #define vk_error(instance, error) \
222 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
223 #define vk_errorf(instance, error, format, ...) \
224 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
225
226 void
227 __tu_finishme(const char *file, int line, const char *format, ...)
228 tu_printflike(3, 4);
229 void
230 tu_loge(const char *format, ...) tu_printflike(1, 2);
231 void
232 tu_loge_v(const char *format, va_list va);
233 void
234 tu_logi(const char *format, ...) tu_printflike(1, 2);
235 void
236 tu_logi_v(const char *format, va_list va);
237
238 /**
239 * Print a FINISHME message, including its source location.
240 */
241 #define tu_finishme(format, ...) \
242 do { \
243 static bool reported = false; \
244 if (!reported) { \
245 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
246 reported = true; \
247 } \
248 } while (0)
249
250 /* A non-fatal assert. Useful for debugging. */
251 #ifdef DEBUG
252 #define tu_assert(x) \
253 ({ \
254 if (unlikely(!(x))) \
255 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
256 })
257 #else
258 #define tu_assert(x)
259 #endif
260
261 /* Suppress -Wunused in stub functions */
262 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
263 static inline void __tu_use_args(int ignore, ...) {}
264
265 #define tu_stub_return(v) \
266 do { \
267 tu_finishme("stub %s", __func__); \
268 return (v); \
269 } while (0)
270
271 #define tu_stub() \
272 do { \
273 tu_finishme("stub %s", __func__); \
274 return; \
275 } while (0)
276
277 void *
278 tu_lookup_entrypoint_unchecked(const char *name);
279 void *
280 tu_lookup_entrypoint_checked(
281 const char *name,
282 uint32_t core_version,
283 const struct tu_instance_extension_table *instance,
284 const struct tu_device_extension_table *device);
285
286 struct tu_physical_device
287 {
288 VK_LOADER_DATA _loader_data;
289
290 struct tu_instance *instance;
291
292 char path[20];
293 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
294 uint8_t driver_uuid[VK_UUID_SIZE];
295 uint8_t device_uuid[VK_UUID_SIZE];
296 uint8_t cache_uuid[VK_UUID_SIZE];
297
298 int local_fd;
299 int master_fd;
300
301 struct fd_device *drm_device;
302 unsigned gpu_id;
303 uint32_t gmem_size;
304
305 /* This is the drivers on-disk cache used as a fallback as opposed to
306 * the pipeline cache defined by apps.
307 */
308 struct disk_cache *disk_cache;
309
310 struct tu_device_extension_table supported_extensions;
311 };
312
313 enum tu_debug_flags
314 {
315 TU_DEBUG_STARTUP = 1 << 0,
316 };
317
318 struct tu_instance
319 {
320 VK_LOADER_DATA _loader_data;
321
322 VkAllocationCallbacks alloc;
323
324 uint32_t api_version;
325 int physical_device_count;
326 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
327
328 enum tu_debug_flags debug_flags;
329
330 struct vk_debug_report_instance debug_report_callbacks;
331
332 struct tu_instance_extension_table enabled_extensions;
333 };
334
335 bool
336 tu_instance_extension_supported(const char *name);
337 uint32_t
338 tu_physical_device_api_version(struct tu_physical_device *dev);
339 bool
340 tu_physical_device_extension_supported(struct tu_physical_device *dev,
341 const char *name);
342
343 struct cache_entry;
344
345 struct tu_pipeline_cache
346 {
347 struct tu_device *device;
348 pthread_mutex_t mutex;
349
350 uint32_t total_size;
351 uint32_t table_size;
352 uint32_t kernel_count;
353 struct cache_entry **hash_table;
354 bool modified;
355
356 VkAllocationCallbacks alloc;
357 };
358
359 struct tu_pipeline_key
360 {
361 };
362
363 void
364 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
365 struct tu_device *device);
366 void
367 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
368 void
369 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
370 const void *data,
371 size_t size);
372
373 struct tu_shader_variant;
374
375 bool
376 tu_create_shader_variants_from_pipeline_cache(
377 struct tu_device *device,
378 struct tu_pipeline_cache *cache,
379 const unsigned char *sha1,
380 struct tu_shader_variant **variants);
381
382 void
383 tu_pipeline_cache_insert_shaders(struct tu_device *device,
384 struct tu_pipeline_cache *cache,
385 const unsigned char *sha1,
386 struct tu_shader_variant **variants,
387 const void *const *codes,
388 const unsigned *code_sizes);
389
390 struct tu_meta_state
391 {
392 VkAllocationCallbacks alloc;
393
394 struct tu_pipeline_cache cache;
395 };
396
397 /* queue types */
398 #define TU_QUEUE_GENERAL 0
399
400 #define TU_MAX_QUEUE_FAMILIES 1
401
402 struct tu_queue
403 {
404 VK_LOADER_DATA _loader_data;
405 struct tu_device *device;
406 uint32_t queue_family_index;
407 int queue_idx;
408 VkDeviceQueueCreateFlags flags;
409 };
410
411 struct tu_bo_list
412 {
413 unsigned capacity;
414 pthread_mutex_t mutex;
415 };
416
417 struct tu_device
418 {
419 VK_LOADER_DATA _loader_data;
420
421 VkAllocationCallbacks alloc;
422
423 struct tu_instance *instance;
424 struct radeon_winsys *ws;
425
426 struct tu_meta_state meta_state;
427
428 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
429 int queue_count[TU_MAX_QUEUE_FAMILIES];
430
431 struct tu_physical_device *physical_device;
432
433 /* Backup in-memory cache to be used if the app doesn't provide one */
434 struct tu_pipeline_cache *mem_cache;
435
436 struct list_head shader_slabs;
437 mtx_t shader_slab_mutex;
438
439 struct tu_device_extension_table enabled_extensions;
440
441 /* Whether the driver uses a global BO list. */
442 bool use_global_bo_list;
443
444 struct tu_bo_list bo_list;
445 };
446
447 struct tu_bo
448 {
449 uint32_t gem_handle;
450 uint64_t size;
451 uint64_t offset;
452 uint64_t iova;
453 void *map;
454 };
455
456 VkResult
457 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
458 void
459 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
460 VkResult
461 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
462
463 struct tu_device_memory
464 {
465 struct tu_bo bo;
466 VkDeviceSize size;
467
468 /* for dedicated allocations */
469 struct tu_image *image;
470 struct tu_buffer *buffer;
471
472 uint32_t type_index;
473 void *map;
474 void *user_ptr;
475 };
476
477 struct tu_descriptor_range
478 {
479 uint64_t va;
480 uint32_t size;
481 };
482
483 struct tu_descriptor_set
484 {
485 const struct tu_descriptor_set_layout *layout;
486 uint32_t size;
487
488 struct radeon_winsys_bo *bo;
489 uint64_t va;
490 uint32_t *mapped_ptr;
491 struct tu_descriptor_range *dynamic_descriptors;
492 };
493
494 struct tu_push_descriptor_set
495 {
496 struct tu_descriptor_set set;
497 uint32_t capacity;
498 };
499
500 struct tu_descriptor_pool_entry
501 {
502 uint32_t offset;
503 uint32_t size;
504 struct tu_descriptor_set *set;
505 };
506
507 struct tu_descriptor_pool
508 {
509 struct radeon_winsys_bo *bo;
510 uint8_t *mapped_ptr;
511 uint64_t current_offset;
512 uint64_t size;
513
514 uint8_t *host_memory_base;
515 uint8_t *host_memory_ptr;
516 uint8_t *host_memory_end;
517
518 uint32_t entry_count;
519 uint32_t max_entry_count;
520 struct tu_descriptor_pool_entry entries[0];
521 };
522
523 struct tu_descriptor_update_template_entry
524 {
525 VkDescriptorType descriptor_type;
526
527 /* The number of descriptors to update */
528 uint32_t descriptor_count;
529
530 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
531 */
532 uint32_t dst_offset;
533
534 /* In dwords. Not valid/used for dynamic descriptors */
535 uint32_t dst_stride;
536
537 uint32_t buffer_offset;
538
539 /* Only valid for combined image samplers and samplers */
540 uint16_t has_sampler;
541
542 /* In bytes */
543 size_t src_offset;
544 size_t src_stride;
545
546 /* For push descriptors */
547 const uint32_t *immutable_samplers;
548 };
549
550 struct tu_descriptor_update_template
551 {
552 uint32_t entry_count;
553 VkPipelineBindPoint bind_point;
554 struct tu_descriptor_update_template_entry entry[0];
555 };
556
557 struct tu_buffer
558 {
559 VkDeviceSize size;
560
561 VkBufferUsageFlags usage;
562 VkBufferCreateFlags flags;
563 };
564
565 enum tu_dynamic_state_bits
566 {
567 TU_DYNAMIC_VIEWPORT = 1 << 0,
568 TU_DYNAMIC_SCISSOR = 1 << 1,
569 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
570 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
571 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
572 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
573 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
574 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
575 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
576 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
577 TU_DYNAMIC_ALL = (1 << 10) - 1,
578 };
579
580 struct tu_vertex_binding
581 {
582 struct tu_buffer *buffer;
583 VkDeviceSize offset;
584 };
585
586 struct tu_viewport_state
587 {
588 uint32_t count;
589 VkViewport viewports[MAX_VIEWPORTS];
590 };
591
592 struct tu_scissor_state
593 {
594 uint32_t count;
595 VkRect2D scissors[MAX_SCISSORS];
596 };
597
598 struct tu_discard_rectangle_state
599 {
600 uint32_t count;
601 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
602 };
603
604 struct tu_dynamic_state
605 {
606 /**
607 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
608 * Defines the set of saved dynamic state.
609 */
610 uint32_t mask;
611
612 struct tu_viewport_state viewport;
613
614 struct tu_scissor_state scissor;
615
616 float line_width;
617
618 struct
619 {
620 float bias;
621 float clamp;
622 float slope;
623 } depth_bias;
624
625 float blend_constants[4];
626
627 struct
628 {
629 float min;
630 float max;
631 } depth_bounds;
632
633 struct
634 {
635 uint32_t front;
636 uint32_t back;
637 } stencil_compare_mask;
638
639 struct
640 {
641 uint32_t front;
642 uint32_t back;
643 } stencil_write_mask;
644
645 struct
646 {
647 uint32_t front;
648 uint32_t back;
649 } stencil_reference;
650
651 struct tu_discard_rectangle_state discard_rectangle;
652 };
653
654 extern const struct tu_dynamic_state default_dynamic_state;
655
656 const char *
657 tu_get_debug_option_name(int id);
658
659 const char *
660 tu_get_perftest_option_name(int id);
661
662 /**
663 * Attachment state when recording a renderpass instance.
664 *
665 * The clear value is valid only if there exists a pending clear.
666 */
667 struct tu_attachment_state
668 {
669 VkImageAspectFlags pending_clear_aspects;
670 uint32_t cleared_views;
671 VkClearValue clear_value;
672 VkImageLayout current_layout;
673 };
674
675 struct tu_descriptor_state
676 {
677 struct tu_descriptor_set *sets[MAX_SETS];
678 uint32_t dirty;
679 uint32_t valid;
680 struct tu_push_descriptor_set push_set;
681 bool push_dirty;
682 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
683 };
684
685 struct tu_cmd_state
686 {
687 /* Vertex descriptors */
688 uint64_t vb_va;
689 unsigned vb_size;
690
691 struct tu_dynamic_state dynamic;
692
693 /* Index buffer */
694 struct tu_buffer *index_buffer;
695 uint64_t index_offset;
696 uint32_t index_type;
697 uint32_t max_index_count;
698 uint64_t index_va;
699 };
700
701 struct tu_cmd_pool
702 {
703 VkAllocationCallbacks alloc;
704 struct list_head cmd_buffers;
705 struct list_head free_cmd_buffers;
706 uint32_t queue_family_index;
707 };
708
709 struct tu_cmd_buffer_upload
710 {
711 uint8_t *map;
712 unsigned offset;
713 uint64_t size;
714 struct radeon_winsys_bo *upload_bo;
715 struct list_head list;
716 };
717
718 enum tu_cmd_buffer_status
719 {
720 TU_CMD_BUFFER_STATUS_INVALID,
721 TU_CMD_BUFFER_STATUS_INITIAL,
722 TU_CMD_BUFFER_STATUS_RECORDING,
723 TU_CMD_BUFFER_STATUS_EXECUTABLE,
724 TU_CMD_BUFFER_STATUS_PENDING,
725 };
726
727 struct tu_cmd_buffer
728 {
729 VK_LOADER_DATA _loader_data;
730
731 struct tu_device *device;
732
733 struct tu_cmd_pool *pool;
734 struct list_head pool_link;
735
736 VkCommandBufferUsageFlags usage_flags;
737 VkCommandBufferLevel level;
738 enum tu_cmd_buffer_status status;
739 struct radeon_cmdbuf *cs;
740 struct tu_cmd_state state;
741 struct tu_vertex_binding vertex_bindings[MAX_VBS];
742 uint32_t queue_family_index;
743
744 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
745 VkShaderStageFlags push_constant_stages;
746 struct tu_descriptor_set meta_push_descriptors;
747
748 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
749
750 struct tu_cmd_buffer_upload upload;
751
752 uint32_t scratch_size_needed;
753 uint32_t compute_scratch_size_needed;
754 uint32_t esgs_ring_size_needed;
755 uint32_t gsvs_ring_size_needed;
756 bool tess_rings_needed;
757 bool sample_positions_needed;
758
759 VkResult record_result;
760
761 uint32_t gfx9_fence_offset;
762 struct radeon_winsys_bo *gfx9_fence_bo;
763 uint32_t gfx9_fence_idx;
764 uint64_t gfx9_eop_bug_va;
765
766 /**
767 * Whether a query pool has been resetted and we have to flush caches.
768 */
769 bool pending_reset_query;
770 };
771
772 bool
773 tu_get_memory_fd(struct tu_device *device,
774 struct tu_device_memory *memory,
775 int *pFD);
776
777 /*
778 * Takes x,y,z as exact numbers of invocations, instead of blocks.
779 *
780 * Limitations: Can't call normal dispatch functions without binding or
781 * rebinding
782 * the compute pipeline.
783 */
784 void
785 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
786 uint32_t x,
787 uint32_t y,
788 uint32_t z);
789
790 struct tu_event
791 {
792 struct radeon_winsys_bo *bo;
793 uint64_t *map;
794 };
795
796 struct tu_shader_module;
797
798 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
799 #define TU_HASH_SHADER_SISCHED (1 << 1)
800 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
801 void
802 tu_hash_shaders(unsigned char *hash,
803 const VkPipelineShaderStageCreateInfo **stages,
804 const struct tu_pipeline_layout *layout,
805 const struct tu_pipeline_key *key,
806 uint32_t flags);
807
808 static inline gl_shader_stage
809 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
810 {
811 assert(__builtin_popcount(vk_stage) == 1);
812 return ffs(vk_stage) - 1;
813 }
814
815 static inline VkShaderStageFlagBits
816 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
817 {
818 return (1 << mesa_stage);
819 }
820
821 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
822
823 #define tu_foreach_stage(stage, stage_bits) \
824 for (gl_shader_stage stage, \
825 __tmp = (gl_shader_stage)((stage_bits)&TU_STAGE_MASK); \
826 stage = __builtin_ffs(__tmp) - 1, __tmp; \
827 __tmp &= ~(1 << (stage)))
828
829 struct tu_shader_module
830 {
831 struct nir_shader *nir;
832 unsigned char sha1[20];
833 uint32_t size;
834 char data[0];
835 };
836
837 struct tu_pipeline
838 {
839 struct tu_device *device;
840 struct tu_dynamic_state dynamic_state;
841
842 struct tu_pipeline_layout *layout;
843
844 bool need_indirect_descriptor_sets;
845 VkShaderStageFlags active_stages;
846 };
847
848 struct tu_userdata_info *
849 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
850 gl_shader_stage stage,
851 int idx);
852
853 struct tu_shader_variant *
854 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
855
856 struct tu_graphics_pipeline_create_info
857 {
858 bool use_rectlist;
859 bool db_depth_clear;
860 bool db_stencil_clear;
861 bool db_depth_disable_expclear;
862 bool db_stencil_disable_expclear;
863 bool db_flush_depth_inplace;
864 bool db_flush_stencil_inplace;
865 bool db_resummarize;
866 uint32_t custom_blend_mode;
867 };
868
869 VkResult
870 tu_graphics_pipeline_create(
871 VkDevice device,
872 VkPipelineCache cache,
873 const VkGraphicsPipelineCreateInfo *pCreateInfo,
874 const struct tu_graphics_pipeline_create_info *extra,
875 const VkAllocationCallbacks *alloc,
876 VkPipeline *pPipeline);
877
878 struct vk_format_description;
879 uint32_t
880 tu_translate_buffer_dataformat(const struct vk_format_description *desc,
881 int first_non_void);
882 uint32_t
883 tu_translate_buffer_numformat(const struct vk_format_description *desc,
884 int first_non_void);
885 uint32_t
886 tu_translate_colorformat(VkFormat format);
887 uint32_t
888 tu_translate_color_numformat(VkFormat format,
889 const struct vk_format_description *desc,
890 int first_non_void);
891 uint32_t
892 tu_colorformat_endian_swap(uint32_t colorformat);
893 unsigned
894 tu_translate_colorswap(VkFormat format, bool do_endian_swap);
895 uint32_t
896 tu_translate_dbformat(VkFormat format);
897 uint32_t
898 tu_translate_tex_dataformat(VkFormat format,
899 const struct vk_format_description *desc,
900 int first_non_void);
901 uint32_t
902 tu_translate_tex_numformat(VkFormat format,
903 const struct vk_format_description *desc,
904 int first_non_void);
905 bool
906 tu_format_pack_clear_color(VkFormat format,
907 uint32_t clear_vals[2],
908 VkClearColorValue *value);
909 bool
910 tu_is_colorbuffer_format_supported(VkFormat format, bool *blendable);
911 bool
912 tu_dcc_formats_compatible(VkFormat format1, VkFormat format2);
913
914 struct tu_image
915 {
916 VkImageType type;
917 /* The original VkFormat provided by the client. This may not match any
918 * of the actual surface formats.
919 */
920 VkFormat vk_format;
921 VkImageAspectFlags aspects;
922 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
923 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
924 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
925
926 VkDeviceSize size;
927 uint32_t alignment;
928
929 unsigned queue_family_mask;
930 bool exclusive;
931 bool shareable;
932
933 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
934 VkDeviceMemory owned_memory;
935 };
936
937 unsigned
938 tu_image_queue_family_mask(const struct tu_image *image,
939 uint32_t family,
940 uint32_t queue_family);
941
942 static inline uint32_t
943 tu_get_layerCount(const struct tu_image *image,
944 const VkImageSubresourceRange *range)
945 {
946 abort();
947 }
948
949 static inline uint32_t
950 tu_get_levelCount(const struct tu_image *image,
951 const VkImageSubresourceRange *range)
952 {
953 abort();
954 }
955
956 struct tu_image_view
957 {
958 struct tu_image *image; /**< VkImageViewCreateInfo::image */
959
960 VkImageViewType type;
961 VkImageAspectFlags aspect_mask;
962 VkFormat vk_format;
963 uint32_t base_layer;
964 uint32_t layer_count;
965 uint32_t base_mip;
966 uint32_t level_count;
967 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
968
969 uint32_t descriptor[16];
970
971 /* Descriptor for use as a storage image as opposed to a sampled image.
972 * This has a few differences for cube maps (e.g. type).
973 */
974 uint32_t storage_descriptor[16];
975 };
976
977 struct tu_sampler
978 {
979 };
980
981 struct tu_image_create_info
982 {
983 const VkImageCreateInfo *vk_info;
984 bool scanout;
985 bool no_metadata_planes;
986 };
987
988 VkResult
989 tu_image_create(VkDevice _device,
990 const struct tu_image_create_info *info,
991 const VkAllocationCallbacks *alloc,
992 VkImage *pImage);
993
994 VkResult
995 tu_image_from_gralloc(VkDevice device_h,
996 const VkImageCreateInfo *base_info,
997 const VkNativeBufferANDROID *gralloc_info,
998 const VkAllocationCallbacks *alloc,
999 VkImage *out_image_h);
1000
1001 void
1002 tu_image_view_init(struct tu_image_view *view,
1003 struct tu_device *device,
1004 const VkImageViewCreateInfo *pCreateInfo);
1005
1006 struct tu_buffer_view
1007 {
1008 struct radeon_winsys_bo *bo;
1009 VkFormat vk_format;
1010 uint64_t range; /**< VkBufferViewCreateInfo::range */
1011 uint32_t state[4];
1012 };
1013 void
1014 tu_buffer_view_init(struct tu_buffer_view *view,
1015 struct tu_device *device,
1016 const VkBufferViewCreateInfo *pCreateInfo);
1017
1018 static inline struct VkExtent3D
1019 tu_sanitize_image_extent(const VkImageType imageType,
1020 const struct VkExtent3D imageExtent)
1021 {
1022 switch (imageType) {
1023 case VK_IMAGE_TYPE_1D:
1024 return (VkExtent3D){ imageExtent.width, 1, 1 };
1025 case VK_IMAGE_TYPE_2D:
1026 return (VkExtent3D){ imageExtent.width, imageExtent.height, 1 };
1027 case VK_IMAGE_TYPE_3D:
1028 return imageExtent;
1029 default:
1030 unreachable("invalid image type");
1031 }
1032 }
1033
1034 static inline struct VkOffset3D
1035 tu_sanitize_image_offset(const VkImageType imageType,
1036 const struct VkOffset3D imageOffset)
1037 {
1038 switch (imageType) {
1039 case VK_IMAGE_TYPE_1D:
1040 return (VkOffset3D){ imageOffset.x, 0, 0 };
1041 case VK_IMAGE_TYPE_2D:
1042 return (VkOffset3D){ imageOffset.x, imageOffset.y, 0 };
1043 case VK_IMAGE_TYPE_3D:
1044 return imageOffset;
1045 default:
1046 unreachable("invalid image type");
1047 }
1048 }
1049
1050 struct tu_attachment_info
1051 {
1052 struct tu_image_view *attachment;
1053 };
1054
1055 struct tu_framebuffer
1056 {
1057 uint32_t width;
1058 uint32_t height;
1059 uint32_t layers;
1060
1061 uint32_t attachment_count;
1062 struct tu_attachment_info attachments[0];
1063 };
1064
1065 struct tu_subpass_barrier
1066 {
1067 VkPipelineStageFlags src_stage_mask;
1068 VkAccessFlags src_access_mask;
1069 VkAccessFlags dst_access_mask;
1070 };
1071
1072 void
1073 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1074 const struct tu_subpass_barrier *barrier);
1075
1076 struct tu_subpass_attachment
1077 {
1078 uint32_t attachment;
1079 VkImageLayout layout;
1080 };
1081
1082 struct tu_subpass
1083 {
1084 uint32_t input_count;
1085 uint32_t color_count;
1086 struct tu_subpass_attachment *input_attachments;
1087 struct tu_subpass_attachment *color_attachments;
1088 struct tu_subpass_attachment *resolve_attachments;
1089 struct tu_subpass_attachment depth_stencil_attachment;
1090
1091 /** Subpass has at least one resolve attachment */
1092 bool has_resolve;
1093
1094 struct tu_subpass_barrier start_barrier;
1095
1096 uint32_t view_mask;
1097 VkSampleCountFlagBits max_sample_count;
1098 };
1099
1100 struct tu_render_pass_attachment
1101 {
1102 VkFormat format;
1103 uint32_t samples;
1104 VkAttachmentLoadOp load_op;
1105 VkAttachmentLoadOp stencil_load_op;
1106 VkImageLayout initial_layout;
1107 VkImageLayout final_layout;
1108 uint32_t view_mask;
1109 };
1110
1111 struct tu_render_pass
1112 {
1113 uint32_t attachment_count;
1114 uint32_t subpass_count;
1115 struct tu_subpass_attachment *subpass_attachments;
1116 struct tu_render_pass_attachment *attachments;
1117 struct tu_subpass_barrier end_barrier;
1118 struct tu_subpass subpasses[0];
1119 };
1120
1121 VkResult
1122 tu_device_init_meta(struct tu_device *device);
1123 void
1124 tu_device_finish_meta(struct tu_device *device);
1125
1126 struct tu_query_pool
1127 {
1128 struct radeon_winsys_bo *bo;
1129 uint32_t stride;
1130 uint32_t availability_offset;
1131 uint64_t size;
1132 char *ptr;
1133 VkQueryType type;
1134 uint32_t pipeline_stats_mask;
1135 };
1136
1137 struct tu_semaphore
1138 {
1139 /* use a winsys sem for non-exportable */
1140 struct radeon_winsys_sem *sem;
1141 uint32_t syncobj;
1142 uint32_t temp_syncobj;
1143 };
1144
1145 void
1146 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1147 VkPipelineBindPoint bind_point,
1148 struct tu_descriptor_set *set,
1149 unsigned idx);
1150
1151 void
1152 tu_update_descriptor_sets(struct tu_device *device,
1153 struct tu_cmd_buffer *cmd_buffer,
1154 VkDescriptorSet overrideSet,
1155 uint32_t descriptorWriteCount,
1156 const VkWriteDescriptorSet *pDescriptorWrites,
1157 uint32_t descriptorCopyCount,
1158 const VkCopyDescriptorSet *pDescriptorCopies);
1159
1160 void
1161 tu_update_descriptor_set_with_template(
1162 struct tu_device *device,
1163 struct tu_cmd_buffer *cmd_buffer,
1164 struct tu_descriptor_set *set,
1165 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
1166 const void *pData);
1167
1168 void
1169 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1170 VkPipelineBindPoint pipelineBindPoint,
1171 VkPipelineLayout _layout,
1172 uint32_t set,
1173 uint32_t descriptorWriteCount,
1174 const VkWriteDescriptorSet *pDescriptorWrites);
1175
1176 struct tu_fence
1177 {
1178 struct radeon_winsys_fence *fence;
1179 bool submitted;
1180 bool signalled;
1181
1182 uint32_t syncobj;
1183 uint32_t temp_syncobj;
1184 };
1185
1186 /* tu_nir_to_llvm.c */
1187 struct tu_shader_variant_info;
1188 struct tu_nir_compiler_options;
1189
1190 struct radeon_winsys_sem;
1191
1192 uint32_t
1193 tu_gem_new(struct tu_device *dev, uint64_t size, uint32_t flags);
1194 void
1195 tu_gem_close(struct tu_device *dev, uint32_t gem_handle);
1196 uint64_t
1197 tu_gem_info_offset(struct tu_device *dev, uint32_t gem_handle);
1198 uint64_t
1199 tu_gem_info_iova(struct tu_device *dev, uint32_t gem_handle);
1200
1201 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1202 \
1203 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1204 { \
1205 return (struct __tu_type *)_handle; \
1206 } \
1207 \
1208 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1209 { \
1210 return (__VkType)_obj; \
1211 }
1212
1213 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1214 \
1215 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1216 { \
1217 return (struct __tu_type *)(uintptr_t)_handle; \
1218 } \
1219 \
1220 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1221 { \
1222 return (__VkType)(uintptr_t)_obj; \
1223 }
1224
1225 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1226 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1227
1228 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1229 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1230 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1231 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1232 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1233
1234 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1235 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1236 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1237 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1238 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1239 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1240 VkDescriptorSetLayout)
1241 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1242 VkDescriptorUpdateTemplateKHR)
1243 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1244 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1245 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1246 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1247 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1248 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1249 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1250 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1251 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1252 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1253 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1254 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1255 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1256 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1257
1258 #endif /* TU_PRIVATE_H */