turnip: Don't return from tu_stub funcs
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53
54 #include "tu_descriptor_set.h"
55 #include "tu_extensions.h"
56
57 /* Pre-declarations needed for WSI entrypoints */
58 struct wl_surface;
59 struct wl_display;
60 typedef struct xcb_connection_t xcb_connection_t;
61 typedef uint32_t xcb_visualid_t;
62 typedef uint32_t xcb_window_t;
63
64 #include <vulkan/vk_android_native_buffer.h>
65 #include <vulkan/vk_icd.h>
66 #include <vulkan/vulkan.h>
67 #include <vulkan/vulkan_intel.h>
68
69 #include "drm/freedreno_ringbuffer.h"
70
71 #include "tu_entrypoints.h"
72
73 #define MAX_VBS 32
74 #define MAX_VERTEX_ATTRIBS 32
75 #define MAX_RTS 8
76 #define MAX_VIEWPORTS 16
77 #define MAX_SCISSORS 16
78 #define MAX_DISCARD_RECTANGLES 4
79 #define MAX_PUSH_CONSTANTS_SIZE 128
80 #define MAX_PUSH_DESCRIPTORS 32
81 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
82 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
83 #define MAX_DYNAMIC_BUFFERS \
84 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
85 #define MAX_SAMPLES_LOG2 4
86 #define NUM_META_FS_KEYS 13
87 #define TU_MAX_DRM_DEVICES 8
88 #define MAX_VIEWS 8
89
90 #define NUM_DEPTH_CLEAR_PIPELINES 3
91
92 /*
93 * This is the point we switch from using CP to compute shader
94 * for certain buffer operations.
95 */
96 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
97
98 enum tu_mem_heap
99 {
100 TU_MEM_HEAP_VRAM,
101 TU_MEM_HEAP_VRAM_CPU_ACCESS,
102 TU_MEM_HEAP_GTT,
103 TU_MEM_HEAP_COUNT
104 };
105
106 enum tu_mem_type
107 {
108 TU_MEM_TYPE_VRAM,
109 TU_MEM_TYPE_GTT_WRITE_COMBINE,
110 TU_MEM_TYPE_VRAM_CPU_ACCESS,
111 TU_MEM_TYPE_GTT_CACHED,
112 TU_MEM_TYPE_COUNT
113 };
114
115 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
116
117 static inline uint32_t
118 align_u32(uint32_t v, uint32_t a)
119 {
120 assert(a != 0 && a == (a & -a));
121 return (v + a - 1) & ~(a - 1);
122 }
123
124 static inline uint32_t
125 align_u32_npot(uint32_t v, uint32_t a)
126 {
127 return (v + a - 1) / a * a;
128 }
129
130 static inline uint64_t
131 align_u64(uint64_t v, uint64_t a)
132 {
133 assert(a != 0 && a == (a & -a));
134 return (v + a - 1) & ~(a - 1);
135 }
136
137 static inline int32_t
138 align_i32(int32_t v, int32_t a)
139 {
140 assert(a != 0 && a == (a & -a));
141 return (v + a - 1) & ~(a - 1);
142 }
143
144 /** Alignment must be a power of 2. */
145 static inline bool
146 tu_is_aligned(uintmax_t n, uintmax_t a)
147 {
148 assert(a == (a & -a));
149 return (n & (a - 1)) == 0;
150 }
151
152 static inline uint32_t
153 round_up_u32(uint32_t v, uint32_t a)
154 {
155 return (v + a - 1) / a;
156 }
157
158 static inline uint64_t
159 round_up_u64(uint64_t v, uint64_t a)
160 {
161 return (v + a - 1) / a;
162 }
163
164 static inline uint32_t
165 tu_minify(uint32_t n, uint32_t levels)
166 {
167 if (unlikely(n == 0))
168 return 0;
169 else
170 return MAX2(n >> levels, 1);
171 }
172 static inline float
173 tu_clamp_f(float f, float min, float max)
174 {
175 assert(min < max);
176
177 if (f > max)
178 return max;
179 else if (f < min)
180 return min;
181 else
182 return f;
183 }
184
185 static inline bool
186 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
187 {
188 if (*inout_mask & clear_mask) {
189 *inout_mask &= ~clear_mask;
190 return true;
191 } else {
192 return false;
193 }
194 }
195
196 #define for_each_bit(b, dword) \
197 for (uint32_t __dword = (dword); (b) = __builtin_ffs(__dword) - 1, __dword; \
198 __dword &= ~(1 << (b)))
199
200 #define typed_memcpy(dest, src, count) \
201 ({ \
202 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
203 memcpy((dest), (src), (count) * sizeof(*(src))); \
204 })
205
206 /* Whenever we generate an error, pass it through this function. Useful for
207 * debugging, where we can break on it. Only call at error site, not when
208 * propagating errors. Might be useful to plug in a stack trace here.
209 */
210
211 struct tu_instance;
212
213 VkResult
214 __vk_errorf(struct tu_instance *instance,
215 VkResult error,
216 const char *file,
217 int line,
218 const char *format,
219 ...);
220
221 #define vk_error(instance, error) \
222 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
223 #define vk_errorf(instance, error, format, ...) \
224 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
225
226 void
227 __tu_finishme(const char *file, int line, const char *format, ...)
228 tu_printflike(3, 4);
229 void
230 tu_loge(const char *format, ...) tu_printflike(1, 2);
231 void
232 tu_loge_v(const char *format, va_list va);
233 void
234 tu_logi(const char *format, ...) tu_printflike(1, 2);
235 void
236 tu_logi_v(const char *format, va_list va);
237
238 /**
239 * Print a FINISHME message, including its source location.
240 */
241 #define tu_finishme(format, ...) \
242 do { \
243 static bool reported = false; \
244 if (!reported) { \
245 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
246 reported = true; \
247 } \
248 } while (0)
249
250 /* A non-fatal assert. Useful for debugging. */
251 #ifdef DEBUG
252 #define tu_assert(x) \
253 ({ \
254 if (unlikely(!(x))) \
255 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
256 })
257 #else
258 #define tu_assert(x)
259 #endif
260
261 /* Suppress -Wunused in stub functions */
262 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
263 static inline void __tu_use_args(int ignore, ...) {}
264
265 #define tu_stub() \
266 do { \
267 tu_finishme("stub %s", __func__); \
268 } while (0)
269
270 void *
271 tu_lookup_entrypoint_unchecked(const char *name);
272 void *
273 tu_lookup_entrypoint_checked(
274 const char *name,
275 uint32_t core_version,
276 const struct tu_instance_extension_table *instance,
277 const struct tu_device_extension_table *device);
278
279 struct tu_physical_device
280 {
281 VK_LOADER_DATA _loader_data;
282
283 struct tu_instance *instance;
284
285 char path[20];
286 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
287 uint8_t driver_uuid[VK_UUID_SIZE];
288 uint8_t device_uuid[VK_UUID_SIZE];
289 uint8_t cache_uuid[VK_UUID_SIZE];
290
291 int local_fd;
292 int master_fd;
293
294 struct fd_device *drm_device;
295 unsigned gpu_id;
296 uint32_t gmem_size;
297
298 /* This is the drivers on-disk cache used as a fallback as opposed to
299 * the pipeline cache defined by apps.
300 */
301 struct disk_cache *disk_cache;
302
303 struct tu_device_extension_table supported_extensions;
304 };
305
306 enum tu_debug_flags
307 {
308 TU_DEBUG_STARTUP = 1 << 0,
309 };
310
311 struct tu_instance
312 {
313 VK_LOADER_DATA _loader_data;
314
315 VkAllocationCallbacks alloc;
316
317 uint32_t api_version;
318 int physical_device_count;
319 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
320
321 enum tu_debug_flags debug_flags;
322
323 struct vk_debug_report_instance debug_report_callbacks;
324
325 struct tu_instance_extension_table enabled_extensions;
326 };
327
328 bool
329 tu_instance_extension_supported(const char *name);
330 uint32_t
331 tu_physical_device_api_version(struct tu_physical_device *dev);
332 bool
333 tu_physical_device_extension_supported(struct tu_physical_device *dev,
334 const char *name);
335
336 struct cache_entry;
337
338 struct tu_pipeline_cache
339 {
340 struct tu_device *device;
341 pthread_mutex_t mutex;
342
343 uint32_t total_size;
344 uint32_t table_size;
345 uint32_t kernel_count;
346 struct cache_entry **hash_table;
347 bool modified;
348
349 VkAllocationCallbacks alloc;
350 };
351
352 struct tu_pipeline_key
353 {
354 };
355
356 void
357 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
358 struct tu_device *device);
359 void
360 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
361 void
362 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
363 const void *data,
364 size_t size);
365
366 struct tu_shader_variant;
367
368 bool
369 tu_create_shader_variants_from_pipeline_cache(
370 struct tu_device *device,
371 struct tu_pipeline_cache *cache,
372 const unsigned char *sha1,
373 struct tu_shader_variant **variants);
374
375 void
376 tu_pipeline_cache_insert_shaders(struct tu_device *device,
377 struct tu_pipeline_cache *cache,
378 const unsigned char *sha1,
379 struct tu_shader_variant **variants,
380 const void *const *codes,
381 const unsigned *code_sizes);
382
383 struct tu_meta_state
384 {
385 VkAllocationCallbacks alloc;
386
387 struct tu_pipeline_cache cache;
388 };
389
390 /* queue types */
391 #define TU_QUEUE_GENERAL 0
392
393 #define TU_MAX_QUEUE_FAMILIES 1
394
395 struct tu_queue
396 {
397 VK_LOADER_DATA _loader_data;
398 struct tu_device *device;
399 uint32_t queue_family_index;
400 int queue_idx;
401 VkDeviceQueueCreateFlags flags;
402 };
403
404 struct tu_bo_list
405 {
406 unsigned capacity;
407 pthread_mutex_t mutex;
408 };
409
410 struct tu_device
411 {
412 VK_LOADER_DATA _loader_data;
413
414 VkAllocationCallbacks alloc;
415
416 struct tu_instance *instance;
417 struct radeon_winsys *ws;
418
419 struct tu_meta_state meta_state;
420
421 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
422 int queue_count[TU_MAX_QUEUE_FAMILIES];
423
424 struct tu_physical_device *physical_device;
425
426 /* Backup in-memory cache to be used if the app doesn't provide one */
427 struct tu_pipeline_cache *mem_cache;
428
429 struct list_head shader_slabs;
430 mtx_t shader_slab_mutex;
431
432 struct tu_device_extension_table enabled_extensions;
433
434 /* Whether the driver uses a global BO list. */
435 bool use_global_bo_list;
436
437 struct tu_bo_list bo_list;
438 };
439
440 struct tu_bo
441 {
442 uint32_t gem_handle;
443 uint64_t size;
444 uint64_t offset;
445 uint64_t iova;
446 void *map;
447 };
448
449 VkResult
450 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
451 void
452 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
453 VkResult
454 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
455
456 struct tu_device_memory
457 {
458 struct tu_bo bo;
459 VkDeviceSize size;
460
461 /* for dedicated allocations */
462 struct tu_image *image;
463 struct tu_buffer *buffer;
464
465 uint32_t type_index;
466 void *map;
467 void *user_ptr;
468 };
469
470 struct tu_descriptor_range
471 {
472 uint64_t va;
473 uint32_t size;
474 };
475
476 struct tu_descriptor_set
477 {
478 const struct tu_descriptor_set_layout *layout;
479 uint32_t size;
480
481 struct radeon_winsys_bo *bo;
482 uint64_t va;
483 uint32_t *mapped_ptr;
484 struct tu_descriptor_range *dynamic_descriptors;
485 };
486
487 struct tu_push_descriptor_set
488 {
489 struct tu_descriptor_set set;
490 uint32_t capacity;
491 };
492
493 struct tu_descriptor_pool_entry
494 {
495 uint32_t offset;
496 uint32_t size;
497 struct tu_descriptor_set *set;
498 };
499
500 struct tu_descriptor_pool
501 {
502 struct radeon_winsys_bo *bo;
503 uint8_t *mapped_ptr;
504 uint64_t current_offset;
505 uint64_t size;
506
507 uint8_t *host_memory_base;
508 uint8_t *host_memory_ptr;
509 uint8_t *host_memory_end;
510
511 uint32_t entry_count;
512 uint32_t max_entry_count;
513 struct tu_descriptor_pool_entry entries[0];
514 };
515
516 struct tu_descriptor_update_template_entry
517 {
518 VkDescriptorType descriptor_type;
519
520 /* The number of descriptors to update */
521 uint32_t descriptor_count;
522
523 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
524 */
525 uint32_t dst_offset;
526
527 /* In dwords. Not valid/used for dynamic descriptors */
528 uint32_t dst_stride;
529
530 uint32_t buffer_offset;
531
532 /* Only valid for combined image samplers and samplers */
533 uint16_t has_sampler;
534
535 /* In bytes */
536 size_t src_offset;
537 size_t src_stride;
538
539 /* For push descriptors */
540 const uint32_t *immutable_samplers;
541 };
542
543 struct tu_descriptor_update_template
544 {
545 uint32_t entry_count;
546 VkPipelineBindPoint bind_point;
547 struct tu_descriptor_update_template_entry entry[0];
548 };
549
550 struct tu_buffer
551 {
552 VkDeviceSize size;
553
554 VkBufferUsageFlags usage;
555 VkBufferCreateFlags flags;
556 };
557
558 enum tu_dynamic_state_bits
559 {
560 TU_DYNAMIC_VIEWPORT = 1 << 0,
561 TU_DYNAMIC_SCISSOR = 1 << 1,
562 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
563 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
564 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
565 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
566 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
567 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
568 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
569 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
570 TU_DYNAMIC_ALL = (1 << 10) - 1,
571 };
572
573 struct tu_vertex_binding
574 {
575 struct tu_buffer *buffer;
576 VkDeviceSize offset;
577 };
578
579 struct tu_viewport_state
580 {
581 uint32_t count;
582 VkViewport viewports[MAX_VIEWPORTS];
583 };
584
585 struct tu_scissor_state
586 {
587 uint32_t count;
588 VkRect2D scissors[MAX_SCISSORS];
589 };
590
591 struct tu_discard_rectangle_state
592 {
593 uint32_t count;
594 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
595 };
596
597 struct tu_dynamic_state
598 {
599 /**
600 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
601 * Defines the set of saved dynamic state.
602 */
603 uint32_t mask;
604
605 struct tu_viewport_state viewport;
606
607 struct tu_scissor_state scissor;
608
609 float line_width;
610
611 struct
612 {
613 float bias;
614 float clamp;
615 float slope;
616 } depth_bias;
617
618 float blend_constants[4];
619
620 struct
621 {
622 float min;
623 float max;
624 } depth_bounds;
625
626 struct
627 {
628 uint32_t front;
629 uint32_t back;
630 } stencil_compare_mask;
631
632 struct
633 {
634 uint32_t front;
635 uint32_t back;
636 } stencil_write_mask;
637
638 struct
639 {
640 uint32_t front;
641 uint32_t back;
642 } stencil_reference;
643
644 struct tu_discard_rectangle_state discard_rectangle;
645 };
646
647 extern const struct tu_dynamic_state default_dynamic_state;
648
649 const char *
650 tu_get_debug_option_name(int id);
651
652 const char *
653 tu_get_perftest_option_name(int id);
654
655 /**
656 * Attachment state when recording a renderpass instance.
657 *
658 * The clear value is valid only if there exists a pending clear.
659 */
660 struct tu_attachment_state
661 {
662 VkImageAspectFlags pending_clear_aspects;
663 uint32_t cleared_views;
664 VkClearValue clear_value;
665 VkImageLayout current_layout;
666 };
667
668 struct tu_descriptor_state
669 {
670 struct tu_descriptor_set *sets[MAX_SETS];
671 uint32_t dirty;
672 uint32_t valid;
673 struct tu_push_descriptor_set push_set;
674 bool push_dirty;
675 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
676 };
677
678 struct tu_cmd_state
679 {
680 /* Vertex descriptors */
681 uint64_t vb_va;
682 unsigned vb_size;
683
684 struct tu_dynamic_state dynamic;
685
686 /* Index buffer */
687 struct tu_buffer *index_buffer;
688 uint64_t index_offset;
689 uint32_t index_type;
690 uint32_t max_index_count;
691 uint64_t index_va;
692 };
693
694 struct tu_cmd_pool
695 {
696 VkAllocationCallbacks alloc;
697 struct list_head cmd_buffers;
698 struct list_head free_cmd_buffers;
699 uint32_t queue_family_index;
700 };
701
702 struct tu_cmd_buffer_upload
703 {
704 uint8_t *map;
705 unsigned offset;
706 uint64_t size;
707 struct radeon_winsys_bo *upload_bo;
708 struct list_head list;
709 };
710
711 enum tu_cmd_buffer_status
712 {
713 TU_CMD_BUFFER_STATUS_INVALID,
714 TU_CMD_BUFFER_STATUS_INITIAL,
715 TU_CMD_BUFFER_STATUS_RECORDING,
716 TU_CMD_BUFFER_STATUS_EXECUTABLE,
717 TU_CMD_BUFFER_STATUS_PENDING,
718 };
719
720 struct tu_cmd_buffer
721 {
722 VK_LOADER_DATA _loader_data;
723
724 struct tu_device *device;
725
726 struct tu_cmd_pool *pool;
727 struct list_head pool_link;
728
729 VkCommandBufferUsageFlags usage_flags;
730 VkCommandBufferLevel level;
731 enum tu_cmd_buffer_status status;
732 struct radeon_cmdbuf *cs;
733 struct tu_cmd_state state;
734 struct tu_vertex_binding vertex_bindings[MAX_VBS];
735 uint32_t queue_family_index;
736
737 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
738 VkShaderStageFlags push_constant_stages;
739 struct tu_descriptor_set meta_push_descriptors;
740
741 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
742
743 struct tu_cmd_buffer_upload upload;
744
745 uint32_t scratch_size_needed;
746 uint32_t compute_scratch_size_needed;
747 uint32_t esgs_ring_size_needed;
748 uint32_t gsvs_ring_size_needed;
749 bool tess_rings_needed;
750 bool sample_positions_needed;
751
752 VkResult record_result;
753
754 uint32_t gfx9_fence_offset;
755 struct radeon_winsys_bo *gfx9_fence_bo;
756 uint32_t gfx9_fence_idx;
757 uint64_t gfx9_eop_bug_va;
758
759 /**
760 * Whether a query pool has been resetted and we have to flush caches.
761 */
762 bool pending_reset_query;
763 };
764
765 bool
766 tu_get_memory_fd(struct tu_device *device,
767 struct tu_device_memory *memory,
768 int *pFD);
769
770 /*
771 * Takes x,y,z as exact numbers of invocations, instead of blocks.
772 *
773 * Limitations: Can't call normal dispatch functions without binding or
774 * rebinding
775 * the compute pipeline.
776 */
777 void
778 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
779 uint32_t x,
780 uint32_t y,
781 uint32_t z);
782
783 struct tu_event
784 {
785 struct radeon_winsys_bo *bo;
786 uint64_t *map;
787 };
788
789 struct tu_shader_module;
790
791 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
792 #define TU_HASH_SHADER_SISCHED (1 << 1)
793 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
794 void
795 tu_hash_shaders(unsigned char *hash,
796 const VkPipelineShaderStageCreateInfo **stages,
797 const struct tu_pipeline_layout *layout,
798 const struct tu_pipeline_key *key,
799 uint32_t flags);
800
801 static inline gl_shader_stage
802 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
803 {
804 assert(__builtin_popcount(vk_stage) == 1);
805 return ffs(vk_stage) - 1;
806 }
807
808 static inline VkShaderStageFlagBits
809 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
810 {
811 return (1 << mesa_stage);
812 }
813
814 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
815
816 #define tu_foreach_stage(stage, stage_bits) \
817 for (gl_shader_stage stage, \
818 __tmp = (gl_shader_stage)((stage_bits)&TU_STAGE_MASK); \
819 stage = __builtin_ffs(__tmp) - 1, __tmp; \
820 __tmp &= ~(1 << (stage)))
821
822 struct tu_shader_module
823 {
824 struct nir_shader *nir;
825 unsigned char sha1[20];
826 uint32_t size;
827 char data[0];
828 };
829
830 struct tu_pipeline
831 {
832 struct tu_device *device;
833 struct tu_dynamic_state dynamic_state;
834
835 struct tu_pipeline_layout *layout;
836
837 bool need_indirect_descriptor_sets;
838 VkShaderStageFlags active_stages;
839 };
840
841 struct tu_userdata_info *
842 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
843 gl_shader_stage stage,
844 int idx);
845
846 struct tu_shader_variant *
847 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
848
849 struct tu_graphics_pipeline_create_info
850 {
851 bool use_rectlist;
852 bool db_depth_clear;
853 bool db_stencil_clear;
854 bool db_depth_disable_expclear;
855 bool db_stencil_disable_expclear;
856 bool db_flush_depth_inplace;
857 bool db_flush_stencil_inplace;
858 bool db_resummarize;
859 uint32_t custom_blend_mode;
860 };
861
862 VkResult
863 tu_graphics_pipeline_create(
864 VkDevice device,
865 VkPipelineCache cache,
866 const VkGraphicsPipelineCreateInfo *pCreateInfo,
867 const struct tu_graphics_pipeline_create_info *extra,
868 const VkAllocationCallbacks *alloc,
869 VkPipeline *pPipeline);
870
871 struct vk_format_description;
872 uint32_t
873 tu_translate_buffer_dataformat(const struct vk_format_description *desc,
874 int first_non_void);
875 uint32_t
876 tu_translate_buffer_numformat(const struct vk_format_description *desc,
877 int first_non_void);
878 uint32_t
879 tu_translate_colorformat(VkFormat format);
880 uint32_t
881 tu_translate_color_numformat(VkFormat format,
882 const struct vk_format_description *desc,
883 int first_non_void);
884 uint32_t
885 tu_colorformat_endian_swap(uint32_t colorformat);
886 unsigned
887 tu_translate_colorswap(VkFormat format, bool do_endian_swap);
888 uint32_t
889 tu_translate_dbformat(VkFormat format);
890 uint32_t
891 tu_translate_tex_dataformat(VkFormat format,
892 const struct vk_format_description *desc,
893 int first_non_void);
894 uint32_t
895 tu_translate_tex_numformat(VkFormat format,
896 const struct vk_format_description *desc,
897 int first_non_void);
898 bool
899 tu_format_pack_clear_color(VkFormat format,
900 uint32_t clear_vals[2],
901 VkClearColorValue *value);
902 bool
903 tu_is_colorbuffer_format_supported(VkFormat format, bool *blendable);
904 bool
905 tu_dcc_formats_compatible(VkFormat format1, VkFormat format2);
906
907 struct tu_image
908 {
909 VkImageType type;
910 /* The original VkFormat provided by the client. This may not match any
911 * of the actual surface formats.
912 */
913 VkFormat vk_format;
914 VkImageAspectFlags aspects;
915 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
916 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
917 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
918
919 VkDeviceSize size;
920 uint32_t alignment;
921
922 unsigned queue_family_mask;
923 bool exclusive;
924 bool shareable;
925
926 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
927 VkDeviceMemory owned_memory;
928 };
929
930 unsigned
931 tu_image_queue_family_mask(const struct tu_image *image,
932 uint32_t family,
933 uint32_t queue_family);
934
935 static inline uint32_t
936 tu_get_layerCount(const struct tu_image *image,
937 const VkImageSubresourceRange *range)
938 {
939 abort();
940 }
941
942 static inline uint32_t
943 tu_get_levelCount(const struct tu_image *image,
944 const VkImageSubresourceRange *range)
945 {
946 abort();
947 }
948
949 struct tu_image_view
950 {
951 struct tu_image *image; /**< VkImageViewCreateInfo::image */
952
953 VkImageViewType type;
954 VkImageAspectFlags aspect_mask;
955 VkFormat vk_format;
956 uint32_t base_layer;
957 uint32_t layer_count;
958 uint32_t base_mip;
959 uint32_t level_count;
960 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
961
962 uint32_t descriptor[16];
963
964 /* Descriptor for use as a storage image as opposed to a sampled image.
965 * This has a few differences for cube maps (e.g. type).
966 */
967 uint32_t storage_descriptor[16];
968 };
969
970 struct tu_sampler
971 {
972 };
973
974 struct tu_image_create_info
975 {
976 const VkImageCreateInfo *vk_info;
977 bool scanout;
978 bool no_metadata_planes;
979 };
980
981 VkResult
982 tu_image_create(VkDevice _device,
983 const struct tu_image_create_info *info,
984 const VkAllocationCallbacks *alloc,
985 VkImage *pImage);
986
987 VkResult
988 tu_image_from_gralloc(VkDevice device_h,
989 const VkImageCreateInfo *base_info,
990 const VkNativeBufferANDROID *gralloc_info,
991 const VkAllocationCallbacks *alloc,
992 VkImage *out_image_h);
993
994 void
995 tu_image_view_init(struct tu_image_view *view,
996 struct tu_device *device,
997 const VkImageViewCreateInfo *pCreateInfo);
998
999 struct tu_buffer_view
1000 {
1001 struct radeon_winsys_bo *bo;
1002 VkFormat vk_format;
1003 uint64_t range; /**< VkBufferViewCreateInfo::range */
1004 uint32_t state[4];
1005 };
1006 void
1007 tu_buffer_view_init(struct tu_buffer_view *view,
1008 struct tu_device *device,
1009 const VkBufferViewCreateInfo *pCreateInfo);
1010
1011 static inline struct VkExtent3D
1012 tu_sanitize_image_extent(const VkImageType imageType,
1013 const struct VkExtent3D imageExtent)
1014 {
1015 switch (imageType) {
1016 case VK_IMAGE_TYPE_1D:
1017 return (VkExtent3D){ imageExtent.width, 1, 1 };
1018 case VK_IMAGE_TYPE_2D:
1019 return (VkExtent3D){ imageExtent.width, imageExtent.height, 1 };
1020 case VK_IMAGE_TYPE_3D:
1021 return imageExtent;
1022 default:
1023 unreachable("invalid image type");
1024 }
1025 }
1026
1027 static inline struct VkOffset3D
1028 tu_sanitize_image_offset(const VkImageType imageType,
1029 const struct VkOffset3D imageOffset)
1030 {
1031 switch (imageType) {
1032 case VK_IMAGE_TYPE_1D:
1033 return (VkOffset3D){ imageOffset.x, 0, 0 };
1034 case VK_IMAGE_TYPE_2D:
1035 return (VkOffset3D){ imageOffset.x, imageOffset.y, 0 };
1036 case VK_IMAGE_TYPE_3D:
1037 return imageOffset;
1038 default:
1039 unreachable("invalid image type");
1040 }
1041 }
1042
1043 struct tu_attachment_info
1044 {
1045 struct tu_image_view *attachment;
1046 };
1047
1048 struct tu_framebuffer
1049 {
1050 uint32_t width;
1051 uint32_t height;
1052 uint32_t layers;
1053
1054 uint32_t attachment_count;
1055 struct tu_attachment_info attachments[0];
1056 };
1057
1058 struct tu_subpass_barrier
1059 {
1060 VkPipelineStageFlags src_stage_mask;
1061 VkAccessFlags src_access_mask;
1062 VkAccessFlags dst_access_mask;
1063 };
1064
1065 void
1066 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1067 const struct tu_subpass_barrier *barrier);
1068
1069 struct tu_subpass_attachment
1070 {
1071 uint32_t attachment;
1072 VkImageLayout layout;
1073 };
1074
1075 struct tu_subpass
1076 {
1077 uint32_t input_count;
1078 uint32_t color_count;
1079 struct tu_subpass_attachment *input_attachments;
1080 struct tu_subpass_attachment *color_attachments;
1081 struct tu_subpass_attachment *resolve_attachments;
1082 struct tu_subpass_attachment depth_stencil_attachment;
1083
1084 /** Subpass has at least one resolve attachment */
1085 bool has_resolve;
1086
1087 struct tu_subpass_barrier start_barrier;
1088
1089 uint32_t view_mask;
1090 VkSampleCountFlagBits max_sample_count;
1091 };
1092
1093 struct tu_render_pass_attachment
1094 {
1095 VkFormat format;
1096 uint32_t samples;
1097 VkAttachmentLoadOp load_op;
1098 VkAttachmentLoadOp stencil_load_op;
1099 VkImageLayout initial_layout;
1100 VkImageLayout final_layout;
1101 uint32_t view_mask;
1102 };
1103
1104 struct tu_render_pass
1105 {
1106 uint32_t attachment_count;
1107 uint32_t subpass_count;
1108 struct tu_subpass_attachment *subpass_attachments;
1109 struct tu_render_pass_attachment *attachments;
1110 struct tu_subpass_barrier end_barrier;
1111 struct tu_subpass subpasses[0];
1112 };
1113
1114 VkResult
1115 tu_device_init_meta(struct tu_device *device);
1116 void
1117 tu_device_finish_meta(struct tu_device *device);
1118
1119 struct tu_query_pool
1120 {
1121 struct radeon_winsys_bo *bo;
1122 uint32_t stride;
1123 uint32_t availability_offset;
1124 uint64_t size;
1125 char *ptr;
1126 VkQueryType type;
1127 uint32_t pipeline_stats_mask;
1128 };
1129
1130 struct tu_semaphore
1131 {
1132 /* use a winsys sem for non-exportable */
1133 struct radeon_winsys_sem *sem;
1134 uint32_t syncobj;
1135 uint32_t temp_syncobj;
1136 };
1137
1138 void
1139 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1140 VkPipelineBindPoint bind_point,
1141 struct tu_descriptor_set *set,
1142 unsigned idx);
1143
1144 void
1145 tu_update_descriptor_sets(struct tu_device *device,
1146 struct tu_cmd_buffer *cmd_buffer,
1147 VkDescriptorSet overrideSet,
1148 uint32_t descriptorWriteCount,
1149 const VkWriteDescriptorSet *pDescriptorWrites,
1150 uint32_t descriptorCopyCount,
1151 const VkCopyDescriptorSet *pDescriptorCopies);
1152
1153 void
1154 tu_update_descriptor_set_with_template(
1155 struct tu_device *device,
1156 struct tu_cmd_buffer *cmd_buffer,
1157 struct tu_descriptor_set *set,
1158 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
1159 const void *pData);
1160
1161 void
1162 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1163 VkPipelineBindPoint pipelineBindPoint,
1164 VkPipelineLayout _layout,
1165 uint32_t set,
1166 uint32_t descriptorWriteCount,
1167 const VkWriteDescriptorSet *pDescriptorWrites);
1168
1169 struct tu_fence
1170 {
1171 struct radeon_winsys_fence *fence;
1172 bool submitted;
1173 bool signalled;
1174
1175 uint32_t syncobj;
1176 uint32_t temp_syncobj;
1177 };
1178
1179 /* tu_nir_to_llvm.c */
1180 struct tu_shader_variant_info;
1181 struct tu_nir_compiler_options;
1182
1183 struct radeon_winsys_sem;
1184
1185 uint32_t
1186 tu_gem_new(struct tu_device *dev, uint64_t size, uint32_t flags);
1187 void
1188 tu_gem_close(struct tu_device *dev, uint32_t gem_handle);
1189 uint64_t
1190 tu_gem_info_offset(struct tu_device *dev, uint32_t gem_handle);
1191 uint64_t
1192 tu_gem_info_iova(struct tu_device *dev, uint32_t gem_handle);
1193
1194 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1195 \
1196 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1197 { \
1198 return (struct __tu_type *)_handle; \
1199 } \
1200 \
1201 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1202 { \
1203 return (__VkType)_obj; \
1204 }
1205
1206 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1207 \
1208 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1209 { \
1210 return (struct __tu_type *)(uintptr_t)_handle; \
1211 } \
1212 \
1213 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1214 { \
1215 return (__VkType)(uintptr_t)_obj; \
1216 }
1217
1218 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1219 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1220
1221 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1222 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1223 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1224 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1225 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1226
1227 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1228 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1229 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1230 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1231 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1232 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1233 VkDescriptorSetLayout)
1234 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1235 VkDescriptorUpdateTemplateKHR)
1236 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1237 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1238 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1239 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1240 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1241 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1242 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1243 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1244 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1245 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1246 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1247 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1248 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1249 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1250
1251 #endif /* TU_PRIVATE_H */