turnip: add some shader information in pipeline state
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53 #include "wsi_common.h"
54
55 #include "drm-uapi/msm_drm.h"
56 #include "ir3/ir3_compiler.h"
57 #include "ir3/ir3_shader.h"
58
59 #include "adreno_common.xml.h"
60 #include "adreno_pm4.xml.h"
61 #include "a6xx.xml.h"
62
63 #include "tu_descriptor_set.h"
64 #include "tu_extensions.h"
65
66 /* Pre-declarations needed for WSI entrypoints */
67 struct wl_surface;
68 struct wl_display;
69 typedef struct xcb_connection_t xcb_connection_t;
70 typedef uint32_t xcb_visualid_t;
71 typedef uint32_t xcb_window_t;
72
73 #include <vulkan/vk_android_native_buffer.h>
74 #include <vulkan/vk_icd.h>
75 #include <vulkan/vulkan.h>
76 #include <vulkan/vulkan_intel.h>
77
78 #include "tu_entrypoints.h"
79
80 #define MAX_VBS 32
81 #define MAX_VERTEX_ATTRIBS 32
82 #define MAX_RTS 8
83 #define MAX_VSC_PIPES 32
84 #define MAX_VIEWPORTS 1
85 #define MAX_SCISSORS 16
86 #define MAX_DISCARD_RECTANGLES 4
87 #define MAX_PUSH_CONSTANTS_SIZE 128
88 #define MAX_PUSH_DESCRIPTORS 32
89 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
90 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
91 #define MAX_DYNAMIC_BUFFERS \
92 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
93 #define MAX_SAMPLES_LOG2 4
94 #define NUM_META_FS_KEYS 13
95 #define TU_MAX_DRM_DEVICES 8
96 #define MAX_VIEWS 8
97
98 #define NUM_DEPTH_CLEAR_PIPELINES 3
99
100 /*
101 * This is the point we switch from using CP to compute shader
102 * for certain buffer operations.
103 */
104 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
105
106 #define A6XX_TEX_CONST_DWORDS 16
107 #define A6XX_TEX_SAMP_DWORDS 4
108
109 enum tu_mem_heap
110 {
111 TU_MEM_HEAP_VRAM,
112 TU_MEM_HEAP_VRAM_CPU_ACCESS,
113 TU_MEM_HEAP_GTT,
114 TU_MEM_HEAP_COUNT
115 };
116
117 enum tu_mem_type
118 {
119 TU_MEM_TYPE_VRAM,
120 TU_MEM_TYPE_GTT_WRITE_COMBINE,
121 TU_MEM_TYPE_VRAM_CPU_ACCESS,
122 TU_MEM_TYPE_GTT_CACHED,
123 TU_MEM_TYPE_COUNT
124 };
125
126 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
127
128 static inline uint32_t
129 align_u32(uint32_t v, uint32_t a)
130 {
131 assert(a != 0 && a == (a & -a));
132 return (v + a - 1) & ~(a - 1);
133 }
134
135 static inline uint32_t
136 align_u32_npot(uint32_t v, uint32_t a)
137 {
138 return (v + a - 1) / a * a;
139 }
140
141 static inline uint64_t
142 align_u64(uint64_t v, uint64_t a)
143 {
144 assert(a != 0 && a == (a & -a));
145 return (v + a - 1) & ~(a - 1);
146 }
147
148 static inline int32_t
149 align_i32(int32_t v, int32_t a)
150 {
151 assert(a != 0 && a == (a & -a));
152 return (v + a - 1) & ~(a - 1);
153 }
154
155 /** Alignment must be a power of 2. */
156 static inline bool
157 tu_is_aligned(uintmax_t n, uintmax_t a)
158 {
159 assert(a == (a & -a));
160 return (n & (a - 1)) == 0;
161 }
162
163 static inline uint32_t
164 round_up_u32(uint32_t v, uint32_t a)
165 {
166 return (v + a - 1) / a;
167 }
168
169 static inline uint64_t
170 round_up_u64(uint64_t v, uint64_t a)
171 {
172 return (v + a - 1) / a;
173 }
174
175 static inline uint32_t
176 tu_minify(uint32_t n, uint32_t levels)
177 {
178 if (unlikely(n == 0))
179 return 0;
180 else
181 return MAX2(n >> levels, 1);
182 }
183 static inline float
184 tu_clamp_f(float f, float min, float max)
185 {
186 assert(min < max);
187
188 if (f > max)
189 return max;
190 else if (f < min)
191 return min;
192 else
193 return f;
194 }
195
196 static inline bool
197 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
198 {
199 if (*inout_mask & clear_mask) {
200 *inout_mask &= ~clear_mask;
201 return true;
202 } else {
203 return false;
204 }
205 }
206
207 #define for_each_bit(b, dword) \
208 for (uint32_t __dword = (dword); \
209 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
210
211 #define typed_memcpy(dest, src, count) \
212 ({ \
213 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
214 memcpy((dest), (src), (count) * sizeof(*(src))); \
215 })
216
217 #define COND(bool, val) ((bool) ? (val) : 0)
218
219 /* Whenever we generate an error, pass it through this function. Useful for
220 * debugging, where we can break on it. Only call at error site, not when
221 * propagating errors. Might be useful to plug in a stack trace here.
222 */
223
224 struct tu_instance;
225
226 VkResult
227 __vk_errorf(struct tu_instance *instance,
228 VkResult error,
229 const char *file,
230 int line,
231 const char *format,
232 ...);
233
234 #define vk_error(instance, error) \
235 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
236 #define vk_errorf(instance, error, format, ...) \
237 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
238
239 void
240 __tu_finishme(const char *file, int line, const char *format, ...)
241 tu_printflike(3, 4);
242 void
243 tu_loge(const char *format, ...) tu_printflike(1, 2);
244 void
245 tu_loge_v(const char *format, va_list va);
246 void
247 tu_logi(const char *format, ...) tu_printflike(1, 2);
248 void
249 tu_logi_v(const char *format, va_list va);
250
251 /**
252 * Print a FINISHME message, including its source location.
253 */
254 #define tu_finishme(format, ...) \
255 do { \
256 static bool reported = false; \
257 if (!reported) { \
258 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
259 reported = true; \
260 } \
261 } while (0)
262
263 /* A non-fatal assert. Useful for debugging. */
264 #ifdef DEBUG
265 #define tu_assert(x) \
266 ({ \
267 if (unlikely(!(x))) \
268 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
269 })
270 #else
271 #define tu_assert(x)
272 #endif
273
274 /* Suppress -Wunused in stub functions */
275 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
276 static inline void
277 __tu_use_args(int ignore, ...)
278 {
279 }
280
281 #define tu_stub() \
282 do { \
283 tu_finishme("stub %s", __func__); \
284 } while (0)
285
286 void *
287 tu_lookup_entrypoint_unchecked(const char *name);
288 void *
289 tu_lookup_entrypoint_checked(
290 const char *name,
291 uint32_t core_version,
292 const struct tu_instance_extension_table *instance,
293 const struct tu_device_extension_table *device);
294
295 struct tu_physical_device
296 {
297 VK_LOADER_DATA _loader_data;
298
299 struct tu_instance *instance;
300
301 char path[20];
302 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
303 uint8_t driver_uuid[VK_UUID_SIZE];
304 uint8_t device_uuid[VK_UUID_SIZE];
305 uint8_t cache_uuid[VK_UUID_SIZE];
306
307 struct wsi_device wsi_device;
308
309 int local_fd;
310 int master_fd;
311
312 unsigned gpu_id;
313 uint32_t gmem_size;
314 uint32_t tile_align_w;
315 uint32_t tile_align_h;
316
317 /* This is the drivers on-disk cache used as a fallback as opposed to
318 * the pipeline cache defined by apps.
319 */
320 struct disk_cache *disk_cache;
321
322 struct tu_device_extension_table supported_extensions;
323 };
324
325 enum tu_debug_flags
326 {
327 TU_DEBUG_STARTUP = 1 << 0,
328 TU_DEBUG_NIR = 1 << 1,
329 TU_DEBUG_IR3 = 1 << 2,
330 };
331
332 struct tu_instance
333 {
334 VK_LOADER_DATA _loader_data;
335
336 VkAllocationCallbacks alloc;
337
338 uint32_t api_version;
339 int physical_device_count;
340 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
341
342 enum tu_debug_flags debug_flags;
343
344 struct vk_debug_report_instance debug_report_callbacks;
345
346 struct tu_instance_extension_table enabled_extensions;
347 };
348
349 VkResult
350 tu_wsi_init(struct tu_physical_device *physical_device);
351 void
352 tu_wsi_finish(struct tu_physical_device *physical_device);
353
354 bool
355 tu_instance_extension_supported(const char *name);
356 uint32_t
357 tu_physical_device_api_version(struct tu_physical_device *dev);
358 bool
359 tu_physical_device_extension_supported(struct tu_physical_device *dev,
360 const char *name);
361
362 struct cache_entry;
363
364 struct tu_pipeline_cache
365 {
366 struct tu_device *device;
367 pthread_mutex_t mutex;
368
369 uint32_t total_size;
370 uint32_t table_size;
371 uint32_t kernel_count;
372 struct cache_entry **hash_table;
373 bool modified;
374
375 VkAllocationCallbacks alloc;
376 };
377
378 struct tu_pipeline_key
379 {
380 };
381
382 void
383 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
384 struct tu_device *device);
385 void
386 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
387 void
388 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
389 const void *data,
390 size_t size);
391
392 struct tu_shader_variant;
393
394 bool
395 tu_create_shader_variants_from_pipeline_cache(
396 struct tu_device *device,
397 struct tu_pipeline_cache *cache,
398 const unsigned char *sha1,
399 struct tu_shader_variant **variants);
400
401 void
402 tu_pipeline_cache_insert_shaders(struct tu_device *device,
403 struct tu_pipeline_cache *cache,
404 const unsigned char *sha1,
405 struct tu_shader_variant **variants,
406 const void *const *codes,
407 const unsigned *code_sizes);
408
409 struct tu_meta_state
410 {
411 VkAllocationCallbacks alloc;
412
413 struct tu_pipeline_cache cache;
414 };
415
416 /* queue types */
417 #define TU_QUEUE_GENERAL 0
418
419 #define TU_MAX_QUEUE_FAMILIES 1
420
421 struct tu_fence
422 {
423 bool signaled;
424 int fd;
425 };
426
427 void
428 tu_fence_init(struct tu_fence *fence, bool signaled);
429 void
430 tu_fence_finish(struct tu_fence *fence);
431 void
432 tu_fence_update_fd(struct tu_fence *fence, int fd);
433 void
434 tu_fence_copy(struct tu_fence *fence, const struct tu_fence *src);
435 void
436 tu_fence_signal(struct tu_fence *fence);
437 void
438 tu_fence_wait_idle(struct tu_fence *fence);
439
440 struct tu_queue
441 {
442 VK_LOADER_DATA _loader_data;
443 struct tu_device *device;
444 uint32_t queue_family_index;
445 int queue_idx;
446 VkDeviceQueueCreateFlags flags;
447
448 uint32_t msm_queue_id;
449 struct tu_fence submit_fence;
450 };
451
452 struct tu_device
453 {
454 VK_LOADER_DATA _loader_data;
455
456 VkAllocationCallbacks alloc;
457
458 struct tu_instance *instance;
459
460 struct tu_meta_state meta_state;
461
462 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
463 int queue_count[TU_MAX_QUEUE_FAMILIES];
464
465 struct tu_physical_device *physical_device;
466
467 struct ir3_compiler *compiler;
468
469 /* Backup in-memory cache to be used if the app doesn't provide one */
470 struct tu_pipeline_cache *mem_cache;
471
472 struct list_head shader_slabs;
473 mtx_t shader_slab_mutex;
474
475 struct tu_device_extension_table enabled_extensions;
476 };
477
478 struct tu_bo
479 {
480 uint32_t gem_handle;
481 uint64_t size;
482 uint64_t iova;
483 void *map;
484 };
485
486 VkResult
487 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
488 VkResult
489 tu_bo_init_dmabuf(struct tu_device *dev,
490 struct tu_bo *bo,
491 uint64_t size,
492 int fd);
493 int
494 tu_bo_export_dmabuf(struct tu_device *dev, struct tu_bo *bo);
495 void
496 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
497 VkResult
498 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
499
500 struct tu_cs_entry
501 {
502 /* No ownership */
503 const struct tu_bo *bo;
504
505 uint32_t size;
506 uint32_t offset;
507 };
508
509 enum tu_cs_mode
510 {
511
512 /*
513 * A command stream in TU_CS_MODE_GROW mode grows automatically whenever it
514 * is full. tu_cs_begin must be called before command packet emission and
515 * tu_cs_end must be called after.
516 *
517 * This mode may create multiple entries internally. The entries must be
518 * submitted together.
519 */
520 TU_CS_MODE_GROW,
521
522 /*
523 * A command stream in TU_CS_MODE_EXTERNAL mode wraps an external,
524 * fixed-size buffer. tu_cs_begin and tu_cs_end are optional and have no
525 * effect on it.
526 *
527 * This mode does not create any entry or any BO.
528 */
529 TU_CS_MODE_EXTERNAL,
530
531 /*
532 * A command stream in TU_CS_MODE_SUB_STREAM mode does not support direct
533 * command packet emission. tu_cs_begin_sub_stream must be called to get a
534 * sub-stream to emit comamnd packets to. When done with the sub-stream,
535 * tu_cs_end_sub_stream must be called.
536 *
537 * This mode does not create any entry internally.
538 */
539 TU_CS_MODE_SUB_STREAM,
540 };
541
542 struct tu_cs
543 {
544 uint32_t *start;
545 uint32_t *cur;
546 uint32_t *reserved_end;
547 uint32_t *end;
548
549 enum tu_cs_mode mode;
550 uint32_t next_bo_size;
551
552 struct tu_cs_entry *entries;
553 uint32_t entry_count;
554 uint32_t entry_capacity;
555
556 struct tu_bo **bos;
557 uint32_t bo_count;
558 uint32_t bo_capacity;
559 };
560
561 struct tu_device_memory
562 {
563 struct tu_bo bo;
564 VkDeviceSize size;
565
566 /* for dedicated allocations */
567 struct tu_image *image;
568 struct tu_buffer *buffer;
569
570 uint32_t type_index;
571 void *map;
572 void *user_ptr;
573 };
574
575 struct tu_descriptor_range
576 {
577 uint64_t va;
578 uint32_t size;
579 };
580
581 struct tu_descriptor_set
582 {
583 const struct tu_descriptor_set_layout *layout;
584 uint32_t size;
585
586 uint64_t va;
587 uint32_t *mapped_ptr;
588 struct tu_descriptor_range *dynamic_descriptors;
589
590 struct tu_bo *descriptors[0];
591 };
592
593 struct tu_push_descriptor_set
594 {
595 struct tu_descriptor_set set;
596 uint32_t capacity;
597 };
598
599 struct tu_descriptor_pool_entry
600 {
601 uint32_t offset;
602 uint32_t size;
603 struct tu_descriptor_set *set;
604 };
605
606 struct tu_descriptor_pool
607 {
608 struct tu_bo bo;
609 uint64_t current_offset;
610 uint64_t size;
611
612 uint8_t *host_memory_base;
613 uint8_t *host_memory_ptr;
614 uint8_t *host_memory_end;
615
616 uint32_t entry_count;
617 uint32_t max_entry_count;
618 struct tu_descriptor_pool_entry entries[0];
619 };
620
621 struct tu_descriptor_update_template_entry
622 {
623 VkDescriptorType descriptor_type;
624
625 /* The number of descriptors to update */
626 uint32_t descriptor_count;
627
628 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
629 */
630 uint32_t dst_offset;
631
632 /* In dwords. Not valid/used for dynamic descriptors */
633 uint32_t dst_stride;
634
635 uint32_t buffer_offset;
636
637 /* Only valid for combined image samplers and samplers */
638 uint16_t has_sampler;
639
640 /* In bytes */
641 size_t src_offset;
642 size_t src_stride;
643
644 /* For push descriptors */
645 const uint32_t *immutable_samplers;
646 };
647
648 struct tu_descriptor_update_template
649 {
650 uint32_t entry_count;
651 VkPipelineBindPoint bind_point;
652 struct tu_descriptor_update_template_entry entry[0];
653 };
654
655 struct tu_buffer
656 {
657 VkDeviceSize size;
658
659 VkBufferUsageFlags usage;
660 VkBufferCreateFlags flags;
661
662 struct tu_bo *bo;
663 VkDeviceSize bo_offset;
664 };
665
666 enum tu_dynamic_state_bits
667 {
668 TU_DYNAMIC_VIEWPORT = 1 << 0,
669 TU_DYNAMIC_SCISSOR = 1 << 1,
670 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
671 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
672 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
673 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
674 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
675 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
676 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
677 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
678 TU_DYNAMIC_ALL = (1 << 10) - 1,
679 };
680
681 struct tu_vertex_binding
682 {
683 struct tu_buffer *buffer;
684 VkDeviceSize offset;
685 };
686
687 struct tu_viewport_state
688 {
689 uint32_t count;
690 VkViewport viewports[MAX_VIEWPORTS];
691 };
692
693 struct tu_scissor_state
694 {
695 uint32_t count;
696 VkRect2D scissors[MAX_SCISSORS];
697 };
698
699 struct tu_discard_rectangle_state
700 {
701 uint32_t count;
702 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
703 };
704
705 struct tu_dynamic_state
706 {
707 /**
708 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
709 * Defines the set of saved dynamic state.
710 */
711 uint32_t mask;
712
713 struct tu_viewport_state viewport;
714
715 struct tu_scissor_state scissor;
716
717 float line_width;
718
719 struct
720 {
721 float bias;
722 float clamp;
723 float slope;
724 } depth_bias;
725
726 float blend_constants[4];
727
728 struct
729 {
730 float min;
731 float max;
732 } depth_bounds;
733
734 struct
735 {
736 uint32_t front;
737 uint32_t back;
738 } stencil_compare_mask;
739
740 struct
741 {
742 uint32_t front;
743 uint32_t back;
744 } stencil_write_mask;
745
746 struct
747 {
748 uint32_t front;
749 uint32_t back;
750 } stencil_reference;
751
752 struct tu_discard_rectangle_state discard_rectangle;
753 };
754
755 extern const struct tu_dynamic_state default_dynamic_state;
756
757 const char *
758 tu_get_debug_option_name(int id);
759
760 const char *
761 tu_get_perftest_option_name(int id);
762
763 /**
764 * Attachment state when recording a renderpass instance.
765 *
766 * The clear value is valid only if there exists a pending clear.
767 */
768 struct tu_attachment_state
769 {
770 VkImageAspectFlags pending_clear_aspects;
771 uint32_t cleared_views;
772 VkClearValue clear_value;
773 VkImageLayout current_layout;
774 };
775
776 struct tu_descriptor_state
777 {
778 struct tu_descriptor_set *sets[MAX_SETS];
779 uint32_t dirty;
780 uint32_t valid;
781 struct tu_push_descriptor_set push_set;
782 bool push_dirty;
783 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
784 };
785
786 struct tu_tile
787 {
788 uint8_t pipe;
789 uint8_t slot;
790 VkOffset2D begin;
791 VkOffset2D end;
792 };
793
794 struct tu_tiling_config
795 {
796 VkRect2D render_area;
797 uint32_t buffer_cpp[MAX_RTS + 2];
798 uint32_t buffer_count;
799
800 /* position and size of the first tile */
801 VkRect2D tile0;
802 /* number of tiles */
803 VkExtent2D tile_count;
804
805 uint32_t gmem_offsets[MAX_RTS + 2];
806
807 /* size of the first VSC pipe */
808 VkExtent2D pipe0;
809 /* number of VSC pipes */
810 VkExtent2D pipe_count;
811
812 /* pipe register values */
813 uint32_t pipe_config[MAX_VSC_PIPES];
814 uint32_t pipe_sizes[MAX_VSC_PIPES];
815 };
816
817 enum tu_cmd_dirty_bits
818 {
819 TU_CMD_DIRTY_PIPELINE = 1 << 0,
820 TU_CMD_DIRTY_VERTEX_BUFFERS = 1 << 1,
821
822 TU_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 16,
823 TU_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 17,
824 TU_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 18,
825 TU_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 19,
826 };
827
828 struct tu_cmd_state
829 {
830 uint32_t dirty;
831
832 struct tu_pipeline *pipeline;
833
834 /* Vertex buffers */
835 struct
836 {
837 struct tu_buffer *buffers[MAX_VBS];
838 VkDeviceSize offsets[MAX_VBS];
839 } vb;
840
841 struct tu_dynamic_state dynamic;
842
843 /* Index buffer */
844 struct tu_buffer *index_buffer;
845 uint64_t index_offset;
846 uint32_t index_type;
847 uint32_t max_index_count;
848 uint64_t index_va;
849
850 const struct tu_render_pass *pass;
851 const struct tu_subpass *subpass;
852 const struct tu_framebuffer *framebuffer;
853 struct tu_attachment_state *attachments;
854
855 struct tu_tiling_config tiling_config;
856
857 struct tu_cs_entry tile_load_ib;
858 struct tu_cs_entry tile_store_ib;
859 };
860
861 struct tu_cmd_pool
862 {
863 VkAllocationCallbacks alloc;
864 struct list_head cmd_buffers;
865 struct list_head free_cmd_buffers;
866 uint32_t queue_family_index;
867 };
868
869 struct tu_cmd_buffer_upload
870 {
871 uint8_t *map;
872 unsigned offset;
873 uint64_t size;
874 struct list_head list;
875 };
876
877 enum tu_cmd_buffer_status
878 {
879 TU_CMD_BUFFER_STATUS_INVALID,
880 TU_CMD_BUFFER_STATUS_INITIAL,
881 TU_CMD_BUFFER_STATUS_RECORDING,
882 TU_CMD_BUFFER_STATUS_EXECUTABLE,
883 TU_CMD_BUFFER_STATUS_PENDING,
884 };
885
886 struct tu_bo_list
887 {
888 uint32_t count;
889 uint32_t capacity;
890 struct drm_msm_gem_submit_bo *bo_infos;
891 };
892
893 #define TU_BO_LIST_FAILED (~0)
894
895 void
896 tu_bo_list_init(struct tu_bo_list *list);
897 void
898 tu_bo_list_destroy(struct tu_bo_list *list);
899 void
900 tu_bo_list_reset(struct tu_bo_list *list);
901 uint32_t
902 tu_bo_list_add(struct tu_bo_list *list,
903 const struct tu_bo *bo,
904 uint32_t flags);
905 VkResult
906 tu_bo_list_merge(struct tu_bo_list *list, const struct tu_bo_list *other);
907
908 struct tu_cmd_buffer
909 {
910 VK_LOADER_DATA _loader_data;
911
912 struct tu_device *device;
913
914 struct tu_cmd_pool *pool;
915 struct list_head pool_link;
916
917 VkCommandBufferUsageFlags usage_flags;
918 VkCommandBufferLevel level;
919 enum tu_cmd_buffer_status status;
920
921 struct tu_cmd_state state;
922 struct tu_vertex_binding vertex_bindings[MAX_VBS];
923 uint32_t queue_family_index;
924
925 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
926 VkShaderStageFlags push_constant_stages;
927 struct tu_descriptor_set meta_push_descriptors;
928
929 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
930
931 struct tu_cmd_buffer_upload upload;
932
933 VkResult record_result;
934
935 struct tu_bo_list bo_list;
936 struct tu_cs cs;
937 struct tu_cs draw_cs;
938 struct tu_cs tile_cs;
939
940 uint16_t marker_reg;
941 uint32_t marker_seqno;
942
943 struct tu_bo scratch_bo;
944 uint32_t scratch_seqno;
945
946 bool wait_for_idle;
947 };
948
949 void
950 tu6_emit_event_write(struct tu_cmd_buffer *cmd,
951 struct tu_cs *cs,
952 enum vgt_event_type event,
953 bool need_seqno);
954
955 bool
956 tu_get_memory_fd(struct tu_device *device,
957 struct tu_device_memory *memory,
958 int *pFD);
959
960 /*
961 * Takes x,y,z as exact numbers of invocations, instead of blocks.
962 *
963 * Limitations: Can't call normal dispatch functions without binding or
964 * rebinding
965 * the compute pipeline.
966 */
967 void
968 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
969 uint32_t x,
970 uint32_t y,
971 uint32_t z);
972
973 struct tu_event
974 {
975 uint64_t *map;
976 };
977
978 struct tu_shader_module;
979
980 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
981 #define TU_HASH_SHADER_SISCHED (1 << 1)
982 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
983 void
984 tu_hash_shaders(unsigned char *hash,
985 const VkPipelineShaderStageCreateInfo **stages,
986 const struct tu_pipeline_layout *layout,
987 const struct tu_pipeline_key *key,
988 uint32_t flags);
989
990 static inline gl_shader_stage
991 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
992 {
993 assert(__builtin_popcount(vk_stage) == 1);
994 return ffs(vk_stage) - 1;
995 }
996
997 static inline VkShaderStageFlagBits
998 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
999 {
1000 return (1 << mesa_stage);
1001 }
1002
1003 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1004
1005 #define tu_foreach_stage(stage, stage_bits) \
1006 for (gl_shader_stage stage, \
1007 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
1008 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
1009
1010 struct tu_shader_module
1011 {
1012 unsigned char sha1[20];
1013
1014 uint32_t code_size;
1015 const uint32_t *code[0];
1016 };
1017
1018 struct tu_shader_compile_options
1019 {
1020 struct ir3_shader_key key;
1021
1022 bool optimize;
1023 bool include_binning_pass;
1024 };
1025
1026 struct tu_descriptor_map
1027 {
1028 unsigned num;
1029 int set[32];
1030 int binding[32];
1031 };
1032
1033 struct tu_shader
1034 {
1035 struct ir3_shader ir3_shader;
1036
1037 struct tu_descriptor_map texture_map;
1038 struct tu_descriptor_map sampler_map;
1039 struct tu_descriptor_map ubo_map;
1040
1041 /* This may be true for vertex shaders. When true, variants[1] is the
1042 * binning variant and binning_binary is non-NULL.
1043 */
1044 bool has_binning_pass;
1045
1046 void *binary;
1047 void *binning_binary;
1048
1049 struct ir3_shader_variant variants[0];
1050 };
1051
1052 struct tu_shader *
1053 tu_shader_create(struct tu_device *dev,
1054 gl_shader_stage stage,
1055 const VkPipelineShaderStageCreateInfo *stage_info,
1056 const VkAllocationCallbacks *alloc);
1057
1058 void
1059 tu_shader_destroy(struct tu_device *dev,
1060 struct tu_shader *shader,
1061 const VkAllocationCallbacks *alloc);
1062
1063 void
1064 tu_shader_compile_options_init(
1065 struct tu_shader_compile_options *options,
1066 const VkGraphicsPipelineCreateInfo *pipeline_info);
1067
1068 VkResult
1069 tu_shader_compile(struct tu_device *dev,
1070 struct tu_shader *shader,
1071 const struct tu_shader *next_stage,
1072 const struct tu_shader_compile_options *options,
1073 const VkAllocationCallbacks *alloc);
1074
1075 struct tu_program_descriptor_linkage
1076 {
1077 struct ir3_ubo_analysis_state ubo_state;
1078
1079 uint32_t constlen;
1080
1081 uint32_t offset_ubo; /* ubo pointers const offset */
1082 uint32_t num_ubo; /* number of ubo pointers */
1083
1084 struct tu_descriptor_map texture_map;
1085 struct tu_descriptor_map sampler_map;
1086 struct tu_descriptor_map ubo_map;
1087 };
1088
1089 struct tu_pipeline
1090 {
1091 struct tu_cs cs;
1092
1093 struct tu_dynamic_state dynamic_state;
1094
1095 struct tu_pipeline_layout *layout;
1096
1097 bool need_indirect_descriptor_sets;
1098 VkShaderStageFlags active_stages;
1099
1100 struct
1101 {
1102 struct tu_bo binary_bo;
1103 struct tu_cs_entry state_ib;
1104 struct tu_cs_entry binning_state_ib;
1105
1106 struct tu_program_descriptor_linkage link[MESA_SHADER_STAGES];
1107 } program;
1108
1109 struct
1110 {
1111 uint8_t bindings[MAX_VERTEX_ATTRIBS];
1112 uint16_t strides[MAX_VERTEX_ATTRIBS];
1113 uint16_t offsets[MAX_VERTEX_ATTRIBS];
1114 uint32_t count;
1115
1116 uint8_t binning_bindings[MAX_VERTEX_ATTRIBS];
1117 uint16_t binning_strides[MAX_VERTEX_ATTRIBS];
1118 uint16_t binning_offsets[MAX_VERTEX_ATTRIBS];
1119 uint32_t binning_count;
1120
1121 struct tu_cs_entry state_ib;
1122 struct tu_cs_entry binning_state_ib;
1123 } vi;
1124
1125 struct
1126 {
1127 enum pc_di_primtype primtype;
1128 bool primitive_restart;
1129 } ia;
1130
1131 struct
1132 {
1133 struct tu_cs_entry state_ib;
1134 } vp;
1135
1136 struct
1137 {
1138 uint32_t gras_su_cntl;
1139 struct tu_cs_entry state_ib;
1140 } rast;
1141
1142 struct
1143 {
1144 struct tu_cs_entry state_ib;
1145 } ds;
1146
1147 struct
1148 {
1149 struct tu_cs_entry state_ib;
1150 } blend;
1151 };
1152
1153 void
1154 tu6_emit_viewport(struct tu_cs *cs, const VkViewport *viewport);
1155
1156 void
1157 tu6_emit_scissor(struct tu_cs *cs, const VkRect2D *scissor);
1158
1159 void
1160 tu6_emit_gras_su_cntl(struct tu_cs *cs,
1161 uint32_t gras_su_cntl,
1162 float line_width);
1163
1164 void
1165 tu6_emit_depth_bias(struct tu_cs *cs,
1166 float constant_factor,
1167 float clamp,
1168 float slope_factor);
1169
1170 void
1171 tu6_emit_stencil_compare_mask(struct tu_cs *cs,
1172 uint32_t front,
1173 uint32_t back);
1174
1175 void
1176 tu6_emit_stencil_write_mask(struct tu_cs *cs, uint32_t front, uint32_t back);
1177
1178 void
1179 tu6_emit_stencil_reference(struct tu_cs *cs, uint32_t front, uint32_t back);
1180
1181 void
1182 tu6_emit_blend_constants(struct tu_cs *cs, const float constants[4]);
1183
1184 struct tu_userdata_info *
1185 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
1186 gl_shader_stage stage,
1187 int idx);
1188
1189 struct tu_shader_variant *
1190 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
1191
1192 struct tu_graphics_pipeline_create_info
1193 {
1194 bool use_rectlist;
1195 bool db_depth_clear;
1196 bool db_stencil_clear;
1197 bool db_depth_disable_expclear;
1198 bool db_stencil_disable_expclear;
1199 bool db_flush_depth_inplace;
1200 bool db_flush_stencil_inplace;
1201 bool db_resummarize;
1202 uint32_t custom_blend_mode;
1203 };
1204
1205 struct tu_native_format
1206 {
1207 int vtx; /* VFMTn_xxx or -1 */
1208 int tex; /* TFMTn_xxx or -1 */
1209 int rb; /* RBn_xxx or -1 */
1210 int swap; /* enum a3xx_color_swap */
1211 bool present; /* internal only; always true to external users */
1212 };
1213
1214 const struct tu_native_format *
1215 tu6_get_native_format(VkFormat format);
1216
1217 int
1218 tu_pack_clear_value(const VkClearValue *val,
1219 VkFormat format,
1220 uint32_t buf[4]);
1221 enum a6xx_2d_ifmt tu6_rb_fmt_to_ifmt(enum a6xx_color_fmt fmt);
1222
1223 struct tu_image_level
1224 {
1225 VkDeviceSize offset;
1226 VkDeviceSize size;
1227 uint32_t pitch;
1228 };
1229
1230 struct tu_image
1231 {
1232 VkImageType type;
1233 /* The original VkFormat provided by the client. This may not match any
1234 * of the actual surface formats.
1235 */
1236 VkFormat vk_format;
1237 VkImageAspectFlags aspects;
1238 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1239 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1240 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
1241 VkExtent3D extent;
1242 uint32_t level_count;
1243 uint32_t layer_count;
1244
1245 VkDeviceSize size;
1246 uint32_t alignment;
1247
1248 /* memory layout */
1249 VkDeviceSize layer_size;
1250 struct tu_image_level levels[15];
1251 unsigned tile_mode;
1252
1253 unsigned queue_family_mask;
1254 bool exclusive;
1255 bool shareable;
1256
1257 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
1258 VkDeviceMemory owned_memory;
1259
1260 /* Set when bound */
1261 struct tu_bo *bo;
1262 VkDeviceSize bo_offset;
1263 };
1264
1265 unsigned
1266 tu_image_queue_family_mask(const struct tu_image *image,
1267 uint32_t family,
1268 uint32_t queue_family);
1269
1270 static inline uint32_t
1271 tu_get_layerCount(const struct tu_image *image,
1272 const VkImageSubresourceRange *range)
1273 {
1274 return range->layerCount == VK_REMAINING_ARRAY_LAYERS
1275 ? image->layer_count - range->baseArrayLayer
1276 : range->layerCount;
1277 }
1278
1279 static inline uint32_t
1280 tu_get_levelCount(const struct tu_image *image,
1281 const VkImageSubresourceRange *range)
1282 {
1283 return range->levelCount == VK_REMAINING_MIP_LEVELS
1284 ? image->level_count - range->baseMipLevel
1285 : range->levelCount;
1286 }
1287
1288 struct tu_image_view
1289 {
1290 struct tu_image *image; /**< VkImageViewCreateInfo::image */
1291
1292 VkImageViewType type;
1293 VkImageAspectFlags aspect_mask;
1294 VkFormat vk_format;
1295 uint32_t base_layer;
1296 uint32_t layer_count;
1297 uint32_t base_mip;
1298 uint32_t level_count;
1299 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1300
1301 uint32_t descriptor[A6XX_TEX_CONST_DWORDS];
1302
1303 /* Descriptor for use as a storage image as opposed to a sampled image.
1304 * This has a few differences for cube maps (e.g. type).
1305 */
1306 uint32_t storage_descriptor[A6XX_TEX_CONST_DWORDS];
1307 };
1308
1309 struct tu_sampler
1310 {
1311 uint32_t state[A6XX_TEX_SAMP_DWORDS];
1312
1313 bool needs_border;
1314 };
1315
1316 struct tu_image_create_info
1317 {
1318 const VkImageCreateInfo *vk_info;
1319 bool scanout;
1320 bool no_metadata_planes;
1321 };
1322
1323 VkResult
1324 tu_image_create(VkDevice _device,
1325 const struct tu_image_create_info *info,
1326 const VkAllocationCallbacks *alloc,
1327 VkImage *pImage);
1328
1329 VkResult
1330 tu_image_from_gralloc(VkDevice device_h,
1331 const VkImageCreateInfo *base_info,
1332 const VkNativeBufferANDROID *gralloc_info,
1333 const VkAllocationCallbacks *alloc,
1334 VkImage *out_image_h);
1335
1336 void
1337 tu_image_view_init(struct tu_image_view *view,
1338 struct tu_device *device,
1339 const VkImageViewCreateInfo *pCreateInfo);
1340
1341 struct tu_buffer_view
1342 {
1343 VkFormat vk_format;
1344 uint64_t range; /**< VkBufferViewCreateInfo::range */
1345 uint32_t state[4];
1346 };
1347 void
1348 tu_buffer_view_init(struct tu_buffer_view *view,
1349 struct tu_device *device,
1350 const VkBufferViewCreateInfo *pCreateInfo);
1351
1352 static inline struct VkExtent3D
1353 tu_sanitize_image_extent(const VkImageType imageType,
1354 const struct VkExtent3D imageExtent)
1355 {
1356 switch (imageType) {
1357 case VK_IMAGE_TYPE_1D:
1358 return (VkExtent3D) { imageExtent.width, 1, 1 };
1359 case VK_IMAGE_TYPE_2D:
1360 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1361 case VK_IMAGE_TYPE_3D:
1362 return imageExtent;
1363 default:
1364 unreachable("invalid image type");
1365 }
1366 }
1367
1368 static inline struct VkOffset3D
1369 tu_sanitize_image_offset(const VkImageType imageType,
1370 const struct VkOffset3D imageOffset)
1371 {
1372 switch (imageType) {
1373 case VK_IMAGE_TYPE_1D:
1374 return (VkOffset3D) { imageOffset.x, 0, 0 };
1375 case VK_IMAGE_TYPE_2D:
1376 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1377 case VK_IMAGE_TYPE_3D:
1378 return imageOffset;
1379 default:
1380 unreachable("invalid image type");
1381 }
1382 }
1383
1384 struct tu_attachment_info
1385 {
1386 struct tu_image_view *attachment;
1387 };
1388
1389 struct tu_framebuffer
1390 {
1391 uint32_t width;
1392 uint32_t height;
1393 uint32_t layers;
1394
1395 uint32_t attachment_count;
1396 struct tu_attachment_info attachments[0];
1397 };
1398
1399 struct tu_subpass_barrier
1400 {
1401 VkPipelineStageFlags src_stage_mask;
1402 VkAccessFlags src_access_mask;
1403 VkAccessFlags dst_access_mask;
1404 };
1405
1406 void
1407 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1408 const struct tu_subpass_barrier *barrier);
1409
1410 struct tu_subpass_attachment
1411 {
1412 uint32_t attachment;
1413 VkImageLayout layout;
1414 };
1415
1416 struct tu_subpass
1417 {
1418 uint32_t input_count;
1419 uint32_t color_count;
1420 struct tu_subpass_attachment *input_attachments;
1421 struct tu_subpass_attachment *color_attachments;
1422 struct tu_subpass_attachment *resolve_attachments;
1423 struct tu_subpass_attachment depth_stencil_attachment;
1424
1425 /** Subpass has at least one resolve attachment */
1426 bool has_resolve;
1427
1428 struct tu_subpass_barrier start_barrier;
1429
1430 uint32_t view_mask;
1431 VkSampleCountFlagBits max_sample_count;
1432 };
1433
1434 struct tu_render_pass_attachment
1435 {
1436 VkFormat format;
1437 uint32_t samples;
1438 VkAttachmentLoadOp load_op;
1439 VkAttachmentLoadOp stencil_load_op;
1440 VkImageLayout initial_layout;
1441 VkImageLayout final_layout;
1442 uint32_t view_mask;
1443 };
1444
1445 struct tu_render_pass
1446 {
1447 uint32_t attachment_count;
1448 uint32_t subpass_count;
1449 struct tu_subpass_attachment *subpass_attachments;
1450 struct tu_render_pass_attachment *attachments;
1451 struct tu_subpass_barrier end_barrier;
1452 struct tu_subpass subpasses[0];
1453 };
1454
1455 VkResult
1456 tu_device_init_meta(struct tu_device *device);
1457 void
1458 tu_device_finish_meta(struct tu_device *device);
1459
1460 struct tu_query_pool
1461 {
1462 uint32_t stride;
1463 uint32_t availability_offset;
1464 uint64_t size;
1465 char *ptr;
1466 VkQueryType type;
1467 uint32_t pipeline_stats_mask;
1468 };
1469
1470 struct tu_semaphore
1471 {
1472 uint32_t syncobj;
1473 uint32_t temp_syncobj;
1474 };
1475
1476 void
1477 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1478 VkPipelineBindPoint bind_point,
1479 struct tu_descriptor_set *set,
1480 unsigned idx);
1481
1482 void
1483 tu_update_descriptor_sets(struct tu_device *device,
1484 struct tu_cmd_buffer *cmd_buffer,
1485 VkDescriptorSet overrideSet,
1486 uint32_t descriptorWriteCount,
1487 const VkWriteDescriptorSet *pDescriptorWrites,
1488 uint32_t descriptorCopyCount,
1489 const VkCopyDescriptorSet *pDescriptorCopies);
1490
1491 void
1492 tu_update_descriptor_set_with_template(
1493 struct tu_device *device,
1494 struct tu_cmd_buffer *cmd_buffer,
1495 struct tu_descriptor_set *set,
1496 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1497 const void *pData);
1498
1499 void
1500 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1501 VkPipelineBindPoint pipelineBindPoint,
1502 VkPipelineLayout _layout,
1503 uint32_t set,
1504 uint32_t descriptorWriteCount,
1505 const VkWriteDescriptorSet *pDescriptorWrites);
1506
1507 int
1508 tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
1509
1510 int
1511 tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
1512
1513 int
1514 tu_drm_submitqueue_new(const struct tu_device *dev,
1515 int priority,
1516 uint32_t *queue_id);
1517
1518 void
1519 tu_drm_submitqueue_close(const struct tu_device *dev, uint32_t queue_id);
1520
1521 uint32_t
1522 tu_gem_new(const struct tu_device *dev, uint64_t size, uint32_t flags);
1523 uint32_t
1524 tu_gem_import_dmabuf(const struct tu_device *dev,
1525 int prime_fd,
1526 uint64_t size);
1527 int
1528 tu_gem_export_dmabuf(const struct tu_device *dev, uint32_t gem_handle);
1529 void
1530 tu_gem_close(const struct tu_device *dev, uint32_t gem_handle);
1531 uint64_t
1532 tu_gem_info_offset(const struct tu_device *dev, uint32_t gem_handle);
1533 uint64_t
1534 tu_gem_info_iova(const struct tu_device *dev, uint32_t gem_handle);
1535
1536 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1537 \
1538 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1539 { \
1540 return (struct __tu_type *) _handle; \
1541 } \
1542 \
1543 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1544 { \
1545 return (__VkType) _obj; \
1546 }
1547
1548 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1549 \
1550 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1551 { \
1552 return (struct __tu_type *) (uintptr_t) _handle; \
1553 } \
1554 \
1555 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1556 { \
1557 return (__VkType)(uintptr_t) _obj; \
1558 }
1559
1560 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1561 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1562
1563 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1564 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1565 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1566 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1567 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1568
1569 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1570 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1571 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1572 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1573 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1574 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1575 VkDescriptorSetLayout)
1576 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1577 VkDescriptorUpdateTemplate)
1578 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1579 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1580 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1581 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1582 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1583 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1584 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1585 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1586 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1587 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1588 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1589 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1590 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1591 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1592
1593 #endif /* TU_PRIVATE_H */