turnip: add .clang-format
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53
54 #include "tu_descriptor_set.h"
55 #include "tu_extensions.h"
56
57 /* Pre-declarations needed for WSI entrypoints */
58 struct wl_surface;
59 struct wl_display;
60 typedef struct xcb_connection_t xcb_connection_t;
61 typedef uint32_t xcb_visualid_t;
62 typedef uint32_t xcb_window_t;
63
64 #include <vulkan/vk_android_native_buffer.h>
65 #include <vulkan/vk_icd.h>
66 #include <vulkan/vulkan.h>
67 #include <vulkan/vulkan_intel.h>
68
69 #include "drm/freedreno_ringbuffer.h"
70 #include "tu_entrypoints.h"
71
72 #define MAX_VBS 32
73 #define MAX_VERTEX_ATTRIBS 32
74 #define MAX_RTS 8
75 #define MAX_VIEWPORTS 16
76 #define MAX_SCISSORS 16
77 #define MAX_DISCARD_RECTANGLES 4
78 #define MAX_PUSH_CONSTANTS_SIZE 128
79 #define MAX_PUSH_DESCRIPTORS 32
80 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
81 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
82 #define MAX_DYNAMIC_BUFFERS \
83 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
84 #define MAX_SAMPLES_LOG2 4
85 #define NUM_META_FS_KEYS 13
86 #define TU_MAX_DRM_DEVICES 8
87 #define MAX_VIEWS 8
88
89 #define NUM_DEPTH_CLEAR_PIPELINES 3
90
91 /*
92 * This is the point we switch from using CP to compute shader
93 * for certain buffer operations.
94 */
95 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
96
97 enum tu_mem_heap
98 {
99 TU_MEM_HEAP_VRAM,
100 TU_MEM_HEAP_VRAM_CPU_ACCESS,
101 TU_MEM_HEAP_GTT,
102 TU_MEM_HEAP_COUNT
103 };
104
105 enum tu_mem_type
106 {
107 TU_MEM_TYPE_VRAM,
108 TU_MEM_TYPE_GTT_WRITE_COMBINE,
109 TU_MEM_TYPE_VRAM_CPU_ACCESS,
110 TU_MEM_TYPE_GTT_CACHED,
111 TU_MEM_TYPE_COUNT
112 };
113
114 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
115
116 static inline uint32_t
117 align_u32(uint32_t v, uint32_t a)
118 {
119 assert(a != 0 && a == (a & -a));
120 return (v + a - 1) & ~(a - 1);
121 }
122
123 static inline uint32_t
124 align_u32_npot(uint32_t v, uint32_t a)
125 {
126 return (v + a - 1) / a * a;
127 }
128
129 static inline uint64_t
130 align_u64(uint64_t v, uint64_t a)
131 {
132 assert(a != 0 && a == (a & -a));
133 return (v + a - 1) & ~(a - 1);
134 }
135
136 static inline int32_t
137 align_i32(int32_t v, int32_t a)
138 {
139 assert(a != 0 && a == (a & -a));
140 return (v + a - 1) & ~(a - 1);
141 }
142
143 /** Alignment must be a power of 2. */
144 static inline bool
145 tu_is_aligned(uintmax_t n, uintmax_t a)
146 {
147 assert(a == (a & -a));
148 return (n & (a - 1)) == 0;
149 }
150
151 static inline uint32_t
152 round_up_u32(uint32_t v, uint32_t a)
153 {
154 return (v + a - 1) / a;
155 }
156
157 static inline uint64_t
158 round_up_u64(uint64_t v, uint64_t a)
159 {
160 return (v + a - 1) / a;
161 }
162
163 static inline uint32_t
164 tu_minify(uint32_t n, uint32_t levels)
165 {
166 if (unlikely(n == 0))
167 return 0;
168 else
169 return MAX2(n >> levels, 1);
170 }
171 static inline float
172 tu_clamp_f(float f, float min, float max)
173 {
174 assert(min < max);
175
176 if (f > max)
177 return max;
178 else if (f < min)
179 return min;
180 else
181 return f;
182 }
183
184 static inline bool
185 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
186 {
187 if (*inout_mask & clear_mask) {
188 *inout_mask &= ~clear_mask;
189 return true;
190 } else {
191 return false;
192 }
193 }
194
195 #define for_each_bit(b, dword) \
196 for (uint32_t __dword = (dword); \
197 (b) = __builtin_ffs(__dword) - 1, __dword; __dword &= ~(1 << (b)))
198
199 #define typed_memcpy(dest, src, count) \
200 ({ \
201 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
202 memcpy((dest), (src), (count) * sizeof(*(src))); \
203 })
204
205 /* Whenever we generate an error, pass it through this function. Useful for
206 * debugging, where we can break on it. Only call at error site, not when
207 * propagating errors. Might be useful to plug in a stack trace here.
208 */
209
210 struct tu_instance;
211
212 VkResult
213 __vk_errorf(struct tu_instance *instance,
214 VkResult error,
215 const char *file,
216 int line,
217 const char *format,
218 ...);
219
220 #define vk_error(instance, error) \
221 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
222 #define vk_errorf(instance, error, format, ...) \
223 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
224
225 void
226 __tu_finishme(const char *file, int line, const char *format, ...)
227 tu_printflike(3, 4);
228 void
229 tu_loge(const char *format, ...) tu_printflike(1, 2);
230 void
231 tu_loge_v(const char *format, va_list va);
232 void
233 tu_logi(const char *format, ...) tu_printflike(1, 2);
234 void
235 tu_logi_v(const char *format, va_list va);
236
237 /**
238 * Print a FINISHME message, including its source location.
239 */
240 #define tu_finishme(format, ...) \
241 do { \
242 static bool reported = false; \
243 if (!reported) { \
244 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
245 reported = true; \
246 } \
247 } while (0)
248
249 /* A non-fatal assert. Useful for debugging. */
250 #ifdef DEBUG
251 #define tu_assert(x) \
252 ({ \
253 if (unlikely(!(x))) \
254 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
255 })
256 #else
257 #define tu_assert(x)
258 #endif
259
260 /* Suppress -Wunused in stub functions */
261 #define tu_use_args(...) __tu_use_args(0, ##__VA_ARGS__)
262 static inline void
263 __tu_use_args(int ignore, ...)
264 {
265 }
266
267 #define tu_stub() \
268 do { \
269 tu_finishme("stub %s", __func__); \
270 } while (0)
271
272 void *
273 tu_lookup_entrypoint_unchecked(const char *name);
274 void *
275 tu_lookup_entrypoint_checked(
276 const char *name,
277 uint32_t core_version,
278 const struct tu_instance_extension_table *instance,
279 const struct tu_device_extension_table *device);
280
281 struct tu_physical_device
282 {
283 VK_LOADER_DATA _loader_data;
284
285 struct tu_instance *instance;
286
287 char path[20];
288 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
289 uint8_t driver_uuid[VK_UUID_SIZE];
290 uint8_t device_uuid[VK_UUID_SIZE];
291 uint8_t cache_uuid[VK_UUID_SIZE];
292
293 int local_fd;
294 int master_fd;
295
296 struct fd_device *drm_device;
297 unsigned gpu_id;
298 uint32_t gmem_size;
299
300 /* This is the drivers on-disk cache used as a fallback as opposed to
301 * the pipeline cache defined by apps.
302 */
303 struct disk_cache *disk_cache;
304
305 struct tu_device_extension_table supported_extensions;
306 };
307
308 enum tu_debug_flags
309 {
310 TU_DEBUG_STARTUP = 1 << 0,
311 };
312
313 struct tu_instance
314 {
315 VK_LOADER_DATA _loader_data;
316
317 VkAllocationCallbacks alloc;
318
319 uint32_t api_version;
320 int physical_device_count;
321 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
322
323 enum tu_debug_flags debug_flags;
324
325 struct vk_debug_report_instance debug_report_callbacks;
326
327 struct tu_instance_extension_table enabled_extensions;
328 };
329
330 bool
331 tu_instance_extension_supported(const char *name);
332 uint32_t
333 tu_physical_device_api_version(struct tu_physical_device *dev);
334 bool
335 tu_physical_device_extension_supported(struct tu_physical_device *dev,
336 const char *name);
337
338 struct cache_entry;
339
340 struct tu_pipeline_cache
341 {
342 struct tu_device *device;
343 pthread_mutex_t mutex;
344
345 uint32_t total_size;
346 uint32_t table_size;
347 uint32_t kernel_count;
348 struct cache_entry **hash_table;
349 bool modified;
350
351 VkAllocationCallbacks alloc;
352 };
353
354 struct tu_pipeline_key
355 {
356 };
357
358 void
359 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
360 struct tu_device *device);
361 void
362 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
363 void
364 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
365 const void *data,
366 size_t size);
367
368 struct tu_shader_variant;
369
370 bool
371 tu_create_shader_variants_from_pipeline_cache(
372 struct tu_device *device,
373 struct tu_pipeline_cache *cache,
374 const unsigned char *sha1,
375 struct tu_shader_variant **variants);
376
377 void
378 tu_pipeline_cache_insert_shaders(struct tu_device *device,
379 struct tu_pipeline_cache *cache,
380 const unsigned char *sha1,
381 struct tu_shader_variant **variants,
382 const void *const *codes,
383 const unsigned *code_sizes);
384
385 struct tu_meta_state
386 {
387 VkAllocationCallbacks alloc;
388
389 struct tu_pipeline_cache cache;
390 };
391
392 /* queue types */
393 #define TU_QUEUE_GENERAL 0
394
395 #define TU_MAX_QUEUE_FAMILIES 1
396
397 struct tu_queue
398 {
399 VK_LOADER_DATA _loader_data;
400 struct tu_device *device;
401 uint32_t queue_family_index;
402 int queue_idx;
403 VkDeviceQueueCreateFlags flags;
404 };
405
406 struct tu_bo_list
407 {
408 unsigned capacity;
409 pthread_mutex_t mutex;
410 };
411
412 struct tu_device
413 {
414 VK_LOADER_DATA _loader_data;
415
416 VkAllocationCallbacks alloc;
417
418 struct tu_instance *instance;
419 struct radeon_winsys *ws;
420
421 struct tu_meta_state meta_state;
422
423 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
424 int queue_count[TU_MAX_QUEUE_FAMILIES];
425
426 struct tu_physical_device *physical_device;
427
428 /* Backup in-memory cache to be used if the app doesn't provide one */
429 struct tu_pipeline_cache *mem_cache;
430
431 struct list_head shader_slabs;
432 mtx_t shader_slab_mutex;
433
434 struct tu_device_extension_table enabled_extensions;
435
436 /* Whether the driver uses a global BO list. */
437 bool use_global_bo_list;
438
439 struct tu_bo_list bo_list;
440 };
441
442 struct tu_bo
443 {
444 uint32_t gem_handle;
445 uint64_t size;
446 uint64_t offset;
447 uint64_t iova;
448 void *map;
449 };
450
451 VkResult
452 tu_bo_init_new(struct tu_device *dev, struct tu_bo *bo, uint64_t size);
453 void
454 tu_bo_finish(struct tu_device *dev, struct tu_bo *bo);
455 VkResult
456 tu_bo_map(struct tu_device *dev, struct tu_bo *bo);
457
458 struct tu_device_memory
459 {
460 struct tu_bo bo;
461 VkDeviceSize size;
462
463 /* for dedicated allocations */
464 struct tu_image *image;
465 struct tu_buffer *buffer;
466
467 uint32_t type_index;
468 void *map;
469 void *user_ptr;
470 };
471
472 struct tu_descriptor_range
473 {
474 uint64_t va;
475 uint32_t size;
476 };
477
478 struct tu_descriptor_set
479 {
480 const struct tu_descriptor_set_layout *layout;
481 uint32_t size;
482
483 struct radeon_winsys_bo *bo;
484 uint64_t va;
485 uint32_t *mapped_ptr;
486 struct tu_descriptor_range *dynamic_descriptors;
487 };
488
489 struct tu_push_descriptor_set
490 {
491 struct tu_descriptor_set set;
492 uint32_t capacity;
493 };
494
495 struct tu_descriptor_pool_entry
496 {
497 uint32_t offset;
498 uint32_t size;
499 struct tu_descriptor_set *set;
500 };
501
502 struct tu_descriptor_pool
503 {
504 struct radeon_winsys_bo *bo;
505 uint8_t *mapped_ptr;
506 uint64_t current_offset;
507 uint64_t size;
508
509 uint8_t *host_memory_base;
510 uint8_t *host_memory_ptr;
511 uint8_t *host_memory_end;
512
513 uint32_t entry_count;
514 uint32_t max_entry_count;
515 struct tu_descriptor_pool_entry entries[0];
516 };
517
518 struct tu_descriptor_update_template_entry
519 {
520 VkDescriptorType descriptor_type;
521
522 /* The number of descriptors to update */
523 uint32_t descriptor_count;
524
525 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
526 */
527 uint32_t dst_offset;
528
529 /* In dwords. Not valid/used for dynamic descriptors */
530 uint32_t dst_stride;
531
532 uint32_t buffer_offset;
533
534 /* Only valid for combined image samplers and samplers */
535 uint16_t has_sampler;
536
537 /* In bytes */
538 size_t src_offset;
539 size_t src_stride;
540
541 /* For push descriptors */
542 const uint32_t *immutable_samplers;
543 };
544
545 struct tu_descriptor_update_template
546 {
547 uint32_t entry_count;
548 VkPipelineBindPoint bind_point;
549 struct tu_descriptor_update_template_entry entry[0];
550 };
551
552 struct tu_buffer
553 {
554 VkDeviceSize size;
555
556 VkBufferUsageFlags usage;
557 VkBufferCreateFlags flags;
558 };
559
560 enum tu_dynamic_state_bits
561 {
562 TU_DYNAMIC_VIEWPORT = 1 << 0,
563 TU_DYNAMIC_SCISSOR = 1 << 1,
564 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
565 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
566 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
567 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
568 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
569 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
570 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
571 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
572 TU_DYNAMIC_ALL = (1 << 10) - 1,
573 };
574
575 struct tu_vertex_binding
576 {
577 struct tu_buffer *buffer;
578 VkDeviceSize offset;
579 };
580
581 struct tu_viewport_state
582 {
583 uint32_t count;
584 VkViewport viewports[MAX_VIEWPORTS];
585 };
586
587 struct tu_scissor_state
588 {
589 uint32_t count;
590 VkRect2D scissors[MAX_SCISSORS];
591 };
592
593 struct tu_discard_rectangle_state
594 {
595 uint32_t count;
596 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
597 };
598
599 struct tu_dynamic_state
600 {
601 /**
602 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
603 * Defines the set of saved dynamic state.
604 */
605 uint32_t mask;
606
607 struct tu_viewport_state viewport;
608
609 struct tu_scissor_state scissor;
610
611 float line_width;
612
613 struct
614 {
615 float bias;
616 float clamp;
617 float slope;
618 } depth_bias;
619
620 float blend_constants[4];
621
622 struct
623 {
624 float min;
625 float max;
626 } depth_bounds;
627
628 struct
629 {
630 uint32_t front;
631 uint32_t back;
632 } stencil_compare_mask;
633
634 struct
635 {
636 uint32_t front;
637 uint32_t back;
638 } stencil_write_mask;
639
640 struct
641 {
642 uint32_t front;
643 uint32_t back;
644 } stencil_reference;
645
646 struct tu_discard_rectangle_state discard_rectangle;
647 };
648
649 extern const struct tu_dynamic_state default_dynamic_state;
650
651 const char *
652 tu_get_debug_option_name(int id);
653
654 const char *
655 tu_get_perftest_option_name(int id);
656
657 /**
658 * Attachment state when recording a renderpass instance.
659 *
660 * The clear value is valid only if there exists a pending clear.
661 */
662 struct tu_attachment_state
663 {
664 VkImageAspectFlags pending_clear_aspects;
665 uint32_t cleared_views;
666 VkClearValue clear_value;
667 VkImageLayout current_layout;
668 };
669
670 struct tu_descriptor_state
671 {
672 struct tu_descriptor_set *sets[MAX_SETS];
673 uint32_t dirty;
674 uint32_t valid;
675 struct tu_push_descriptor_set push_set;
676 bool push_dirty;
677 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
678 };
679
680 struct tu_cmd_state
681 {
682 /* Vertex descriptors */
683 uint64_t vb_va;
684 unsigned vb_size;
685
686 struct tu_dynamic_state dynamic;
687
688 /* Index buffer */
689 struct tu_buffer *index_buffer;
690 uint64_t index_offset;
691 uint32_t index_type;
692 uint32_t max_index_count;
693 uint64_t index_va;
694 };
695
696 struct tu_cmd_pool
697 {
698 VkAllocationCallbacks alloc;
699 struct list_head cmd_buffers;
700 struct list_head free_cmd_buffers;
701 uint32_t queue_family_index;
702 };
703
704 struct tu_cmd_buffer_upload
705 {
706 uint8_t *map;
707 unsigned offset;
708 uint64_t size;
709 struct radeon_winsys_bo *upload_bo;
710 struct list_head list;
711 };
712
713 enum tu_cmd_buffer_status
714 {
715 TU_CMD_BUFFER_STATUS_INVALID,
716 TU_CMD_BUFFER_STATUS_INITIAL,
717 TU_CMD_BUFFER_STATUS_RECORDING,
718 TU_CMD_BUFFER_STATUS_EXECUTABLE,
719 TU_CMD_BUFFER_STATUS_PENDING,
720 };
721
722 struct tu_cmd_buffer
723 {
724 VK_LOADER_DATA _loader_data;
725
726 struct tu_device *device;
727
728 struct tu_cmd_pool *pool;
729 struct list_head pool_link;
730
731 VkCommandBufferUsageFlags usage_flags;
732 VkCommandBufferLevel level;
733 enum tu_cmd_buffer_status status;
734 struct radeon_cmdbuf *cs;
735 struct tu_cmd_state state;
736 struct tu_vertex_binding vertex_bindings[MAX_VBS];
737 uint32_t queue_family_index;
738
739 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
740 VkShaderStageFlags push_constant_stages;
741 struct tu_descriptor_set meta_push_descriptors;
742
743 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
744
745 struct tu_cmd_buffer_upload upload;
746
747 uint32_t scratch_size_needed;
748 uint32_t compute_scratch_size_needed;
749 uint32_t esgs_ring_size_needed;
750 uint32_t gsvs_ring_size_needed;
751 bool tess_rings_needed;
752 bool sample_positions_needed;
753
754 VkResult record_result;
755
756 uint32_t gfx9_fence_offset;
757 struct radeon_winsys_bo *gfx9_fence_bo;
758 uint32_t gfx9_fence_idx;
759 uint64_t gfx9_eop_bug_va;
760
761 /**
762 * Whether a query pool has been resetted and we have to flush caches.
763 */
764 bool pending_reset_query;
765 };
766
767 bool
768 tu_get_memory_fd(struct tu_device *device,
769 struct tu_device_memory *memory,
770 int *pFD);
771
772 /*
773 * Takes x,y,z as exact numbers of invocations, instead of blocks.
774 *
775 * Limitations: Can't call normal dispatch functions without binding or
776 * rebinding
777 * the compute pipeline.
778 */
779 void
780 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
781 uint32_t x,
782 uint32_t y,
783 uint32_t z);
784
785 struct tu_event
786 {
787 struct radeon_winsys_bo *bo;
788 uint64_t *map;
789 };
790
791 struct tu_shader_module;
792
793 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
794 #define TU_HASH_SHADER_SISCHED (1 << 1)
795 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
796 void
797 tu_hash_shaders(unsigned char *hash,
798 const VkPipelineShaderStageCreateInfo **stages,
799 const struct tu_pipeline_layout *layout,
800 const struct tu_pipeline_key *key,
801 uint32_t flags);
802
803 static inline gl_shader_stage
804 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
805 {
806 assert(__builtin_popcount(vk_stage) == 1);
807 return ffs(vk_stage) - 1;
808 }
809
810 static inline VkShaderStageFlagBits
811 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
812 {
813 return (1 << mesa_stage);
814 }
815
816 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
817
818 #define tu_foreach_stage(stage, stage_bits) \
819 for (gl_shader_stage stage, \
820 __tmp = (gl_shader_stage)((stage_bits) &TU_STAGE_MASK); \
821 stage = __builtin_ffs(__tmp) - 1, __tmp; __tmp &= ~(1 << (stage)))
822
823 struct tu_shader_module
824 {
825 struct nir_shader *nir;
826 unsigned char sha1[20];
827 uint32_t size;
828 char data[0];
829 };
830
831 struct tu_pipeline
832 {
833 struct tu_device *device;
834 struct tu_dynamic_state dynamic_state;
835
836 struct tu_pipeline_layout *layout;
837
838 bool need_indirect_descriptor_sets;
839 VkShaderStageFlags active_stages;
840 };
841
842 struct tu_userdata_info *
843 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
844 gl_shader_stage stage,
845 int idx);
846
847 struct tu_shader_variant *
848 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
849
850 struct tu_graphics_pipeline_create_info
851 {
852 bool use_rectlist;
853 bool db_depth_clear;
854 bool db_stencil_clear;
855 bool db_depth_disable_expclear;
856 bool db_stencil_disable_expclear;
857 bool db_flush_depth_inplace;
858 bool db_flush_stencil_inplace;
859 bool db_resummarize;
860 uint32_t custom_blend_mode;
861 };
862
863 VkResult
864 tu_graphics_pipeline_create(
865 VkDevice device,
866 VkPipelineCache cache,
867 const VkGraphicsPipelineCreateInfo *pCreateInfo,
868 const struct tu_graphics_pipeline_create_info *extra,
869 const VkAllocationCallbacks *alloc,
870 VkPipeline *pPipeline);
871
872 struct vk_format_description;
873 uint32_t
874 tu_translate_buffer_dataformat(const struct vk_format_description *desc,
875 int first_non_void);
876 uint32_t
877 tu_translate_buffer_numformat(const struct vk_format_description *desc,
878 int first_non_void);
879 uint32_t
880 tu_translate_colorformat(VkFormat format);
881 uint32_t
882 tu_translate_color_numformat(VkFormat format,
883 const struct vk_format_description *desc,
884 int first_non_void);
885 uint32_t
886 tu_colorformat_endian_swap(uint32_t colorformat);
887 unsigned
888 tu_translate_colorswap(VkFormat format, bool do_endian_swap);
889 uint32_t
890 tu_translate_dbformat(VkFormat format);
891 uint32_t
892 tu_translate_tex_dataformat(VkFormat format,
893 const struct vk_format_description *desc,
894 int first_non_void);
895 uint32_t
896 tu_translate_tex_numformat(VkFormat format,
897 const struct vk_format_description *desc,
898 int first_non_void);
899 bool
900 tu_format_pack_clear_color(VkFormat format,
901 uint32_t clear_vals[2],
902 VkClearColorValue *value);
903 bool
904 tu_is_colorbuffer_format_supported(VkFormat format, bool *blendable);
905 bool
906 tu_dcc_formats_compatible(VkFormat format1, VkFormat format2);
907
908 struct tu_image_level
909 {
910 VkDeviceSize offset;
911 VkDeviceSize size;
912 uint32_t pitch;
913 };
914
915 struct tu_image
916 {
917 VkImageType type;
918 /* The original VkFormat provided by the client. This may not match any
919 * of the actual surface formats.
920 */
921 VkFormat vk_format;
922 VkImageAspectFlags aspects;
923 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
924 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
925 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
926 VkExtent3D extent;
927
928 VkDeviceSize size;
929 uint32_t alignment;
930
931 /* memory layout */
932 VkDeviceSize layer_size;
933 struct tu_image_level levels[15];
934 unsigned tile_mode;
935
936 unsigned queue_family_mask;
937 bool exclusive;
938 bool shareable;
939
940 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
941 VkDeviceMemory owned_memory;
942 };
943
944 unsigned
945 tu_image_queue_family_mask(const struct tu_image *image,
946 uint32_t family,
947 uint32_t queue_family);
948
949 static inline uint32_t
950 tu_get_layerCount(const struct tu_image *image,
951 const VkImageSubresourceRange *range)
952 {
953 abort();
954 }
955
956 static inline uint32_t
957 tu_get_levelCount(const struct tu_image *image,
958 const VkImageSubresourceRange *range)
959 {
960 abort();
961 }
962
963 struct tu_image_view
964 {
965 struct tu_image *image; /**< VkImageViewCreateInfo::image */
966
967 VkImageViewType type;
968 VkImageAspectFlags aspect_mask;
969 VkFormat vk_format;
970 uint32_t base_layer;
971 uint32_t layer_count;
972 uint32_t base_mip;
973 uint32_t level_count;
974 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
975
976 uint32_t descriptor[16];
977
978 /* Descriptor for use as a storage image as opposed to a sampled image.
979 * This has a few differences for cube maps (e.g. type).
980 */
981 uint32_t storage_descriptor[16];
982 };
983
984 struct tu_sampler
985 {
986 };
987
988 struct tu_image_create_info
989 {
990 const VkImageCreateInfo *vk_info;
991 bool scanout;
992 bool no_metadata_planes;
993 };
994
995 VkResult
996 tu_image_create(VkDevice _device,
997 const struct tu_image_create_info *info,
998 const VkAllocationCallbacks *alloc,
999 VkImage *pImage);
1000
1001 VkResult
1002 tu_image_from_gralloc(VkDevice device_h,
1003 const VkImageCreateInfo *base_info,
1004 const VkNativeBufferANDROID *gralloc_info,
1005 const VkAllocationCallbacks *alloc,
1006 VkImage *out_image_h);
1007
1008 void
1009 tu_image_view_init(struct tu_image_view *view,
1010 struct tu_device *device,
1011 const VkImageViewCreateInfo *pCreateInfo);
1012
1013 struct tu_buffer_view
1014 {
1015 struct radeon_winsys_bo *bo;
1016 VkFormat vk_format;
1017 uint64_t range; /**< VkBufferViewCreateInfo::range */
1018 uint32_t state[4];
1019 };
1020 void
1021 tu_buffer_view_init(struct tu_buffer_view *view,
1022 struct tu_device *device,
1023 const VkBufferViewCreateInfo *pCreateInfo);
1024
1025 static inline struct VkExtent3D
1026 tu_sanitize_image_extent(const VkImageType imageType,
1027 const struct VkExtent3D imageExtent)
1028 {
1029 switch (imageType) {
1030 case VK_IMAGE_TYPE_1D:
1031 return (VkExtent3D) { imageExtent.width, 1, 1 };
1032 case VK_IMAGE_TYPE_2D:
1033 return (VkExtent3D) { imageExtent.width, imageExtent.height, 1 };
1034 case VK_IMAGE_TYPE_3D:
1035 return imageExtent;
1036 default:
1037 unreachable("invalid image type");
1038 }
1039 }
1040
1041 static inline struct VkOffset3D
1042 tu_sanitize_image_offset(const VkImageType imageType,
1043 const struct VkOffset3D imageOffset)
1044 {
1045 switch (imageType) {
1046 case VK_IMAGE_TYPE_1D:
1047 return (VkOffset3D) { imageOffset.x, 0, 0 };
1048 case VK_IMAGE_TYPE_2D:
1049 return (VkOffset3D) { imageOffset.x, imageOffset.y, 0 };
1050 case VK_IMAGE_TYPE_3D:
1051 return imageOffset;
1052 default:
1053 unreachable("invalid image type");
1054 }
1055 }
1056
1057 struct tu_attachment_info
1058 {
1059 struct tu_image_view *attachment;
1060 };
1061
1062 struct tu_framebuffer
1063 {
1064 uint32_t width;
1065 uint32_t height;
1066 uint32_t layers;
1067
1068 uint32_t attachment_count;
1069 struct tu_attachment_info attachments[0];
1070 };
1071
1072 struct tu_subpass_barrier
1073 {
1074 VkPipelineStageFlags src_stage_mask;
1075 VkAccessFlags src_access_mask;
1076 VkAccessFlags dst_access_mask;
1077 };
1078
1079 void
1080 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1081 const struct tu_subpass_barrier *barrier);
1082
1083 struct tu_subpass_attachment
1084 {
1085 uint32_t attachment;
1086 VkImageLayout layout;
1087 };
1088
1089 struct tu_subpass
1090 {
1091 uint32_t input_count;
1092 uint32_t color_count;
1093 struct tu_subpass_attachment *input_attachments;
1094 struct tu_subpass_attachment *color_attachments;
1095 struct tu_subpass_attachment *resolve_attachments;
1096 struct tu_subpass_attachment depth_stencil_attachment;
1097
1098 /** Subpass has at least one resolve attachment */
1099 bool has_resolve;
1100
1101 struct tu_subpass_barrier start_barrier;
1102
1103 uint32_t view_mask;
1104 VkSampleCountFlagBits max_sample_count;
1105 };
1106
1107 struct tu_render_pass_attachment
1108 {
1109 VkFormat format;
1110 uint32_t samples;
1111 VkAttachmentLoadOp load_op;
1112 VkAttachmentLoadOp stencil_load_op;
1113 VkImageLayout initial_layout;
1114 VkImageLayout final_layout;
1115 uint32_t view_mask;
1116 };
1117
1118 struct tu_render_pass
1119 {
1120 uint32_t attachment_count;
1121 uint32_t subpass_count;
1122 struct tu_subpass_attachment *subpass_attachments;
1123 struct tu_render_pass_attachment *attachments;
1124 struct tu_subpass_barrier end_barrier;
1125 struct tu_subpass subpasses[0];
1126 };
1127
1128 VkResult
1129 tu_device_init_meta(struct tu_device *device);
1130 void
1131 tu_device_finish_meta(struct tu_device *device);
1132
1133 struct tu_query_pool
1134 {
1135 struct radeon_winsys_bo *bo;
1136 uint32_t stride;
1137 uint32_t availability_offset;
1138 uint64_t size;
1139 char *ptr;
1140 VkQueryType type;
1141 uint32_t pipeline_stats_mask;
1142 };
1143
1144 struct tu_semaphore
1145 {
1146 /* use a winsys sem for non-exportable */
1147 struct radeon_winsys_sem *sem;
1148 uint32_t syncobj;
1149 uint32_t temp_syncobj;
1150 };
1151
1152 void
1153 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1154 VkPipelineBindPoint bind_point,
1155 struct tu_descriptor_set *set,
1156 unsigned idx);
1157
1158 void
1159 tu_update_descriptor_sets(struct tu_device *device,
1160 struct tu_cmd_buffer *cmd_buffer,
1161 VkDescriptorSet overrideSet,
1162 uint32_t descriptorWriteCount,
1163 const VkWriteDescriptorSet *pDescriptorWrites,
1164 uint32_t descriptorCopyCount,
1165 const VkCopyDescriptorSet *pDescriptorCopies);
1166
1167 void
1168 tu_update_descriptor_set_with_template(
1169 struct tu_device *device,
1170 struct tu_cmd_buffer *cmd_buffer,
1171 struct tu_descriptor_set *set,
1172 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
1173 const void *pData);
1174
1175 void
1176 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1177 VkPipelineBindPoint pipelineBindPoint,
1178 VkPipelineLayout _layout,
1179 uint32_t set,
1180 uint32_t descriptorWriteCount,
1181 const VkWriteDescriptorSet *pDescriptorWrites);
1182
1183 struct tu_fence
1184 {
1185 struct radeon_winsys_fence *fence;
1186 bool submitted;
1187 bool signalled;
1188
1189 uint32_t syncobj;
1190 uint32_t temp_syncobj;
1191 };
1192
1193 /* tu_nir_to_llvm.c */
1194 struct tu_shader_variant_info;
1195 struct tu_nir_compiler_options;
1196
1197 struct radeon_winsys_sem;
1198
1199 uint32_t
1200 tu_gem_new(struct tu_device *dev, uint64_t size, uint32_t flags);
1201 void
1202 tu_gem_close(struct tu_device *dev, uint32_t gem_handle);
1203 uint64_t
1204 tu_gem_info_offset(struct tu_device *dev, uint32_t gem_handle);
1205 uint64_t
1206 tu_gem_info_iova(struct tu_device *dev, uint32_t gem_handle);
1207 int
1208 tu_drm_query_param(struct tu_physical_device *dev,
1209 uint32_t param,
1210 uint64_t *value);
1211
1212 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1213 \
1214 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1215 { \
1216 return (struct __tu_type *) _handle; \
1217 } \
1218 \
1219 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1220 { \
1221 return (__VkType) _obj; \
1222 }
1223
1224 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1225 \
1226 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1227 { \
1228 return (struct __tu_type *) (uintptr_t) _handle; \
1229 } \
1230 \
1231 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1232 { \
1233 return (__VkType)(uintptr_t) _obj; \
1234 }
1235
1236 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1237 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1238
1239 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1240 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1241 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1242 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1243 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1244
1245 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1246 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1247 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1248 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1249 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1250 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1251 VkDescriptorSetLayout)
1252 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1253 VkDescriptorUpdateTemplateKHR)
1254 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1255 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1256 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1257 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1258 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1259 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1260 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1261 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1262 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1263 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1264 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1265 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1266 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1267 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1268
1269 #endif /* TU_PRIVATE_H */