turnip: Fix indentation in function signatures
[mesa.git] / src / freedreno / vulkan / tu_private.h
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #ifndef TU_PRIVATE_H
29 #define TU_PRIVATE_H
30
31 #include <assert.h>
32 #include <pthread.h>
33 #include <stdbool.h>
34 #include <stdint.h>
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 #ifdef HAVE_VALGRIND
39 #include <memcheck.h>
40 #include <valgrind.h>
41 #define VG(x) x
42 #else
43 #define VG(x)
44 #endif
45
46 #include "c11/threads.h"
47 #include "compiler/shader_enums.h"
48 #include "main/macros.h"
49 #include "util/list.h"
50 #include "util/macros.h"
51 #include "vk_alloc.h"
52 #include "vk_debug_report.h"
53
54 #include "tu_descriptor_set.h"
55 #include "tu_extensions.h"
56
57 /* Pre-declarations needed for WSI entrypoints */
58 struct wl_surface;
59 struct wl_display;
60 typedef struct xcb_connection_t xcb_connection_t;
61 typedef uint32_t xcb_visualid_t;
62 typedef uint32_t xcb_window_t;
63
64 #include <vulkan/vk_android_native_buffer.h>
65 #include <vulkan/vk_icd.h>
66 #include <vulkan/vulkan.h>
67 #include <vulkan/vulkan_intel.h>
68
69 #include "drm/freedreno_ringbuffer.h"
70
71 #include "tu_entrypoints.h"
72
73 #define MAX_VBS 32
74 #define MAX_VERTEX_ATTRIBS 32
75 #define MAX_RTS 8
76 #define MAX_VIEWPORTS 16
77 #define MAX_SCISSORS 16
78 #define MAX_DISCARD_RECTANGLES 4
79 #define MAX_PUSH_CONSTANTS_SIZE 128
80 #define MAX_PUSH_DESCRIPTORS 32
81 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
82 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
83 #define MAX_DYNAMIC_BUFFERS \
84 (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
85 #define MAX_SAMPLES_LOG2 4
86 #define NUM_META_FS_KEYS 13
87 #define TU_MAX_DRM_DEVICES 8
88 #define MAX_VIEWS 8
89
90 #define NUM_DEPTH_CLEAR_PIPELINES 3
91
92 /*
93 * This is the point we switch from using CP to compute shader
94 * for certain buffer operations.
95 */
96 #define TU_BUFFER_OPS_CS_THRESHOLD 4096
97
98 enum tu_mem_heap
99 {
100 TU_MEM_HEAP_VRAM,
101 TU_MEM_HEAP_VRAM_CPU_ACCESS,
102 TU_MEM_HEAP_GTT,
103 TU_MEM_HEAP_COUNT
104 };
105
106 enum tu_mem_type
107 {
108 TU_MEM_TYPE_VRAM,
109 TU_MEM_TYPE_GTT_WRITE_COMBINE,
110 TU_MEM_TYPE_VRAM_CPU_ACCESS,
111 TU_MEM_TYPE_GTT_CACHED,
112 TU_MEM_TYPE_COUNT
113 };
114
115 #define tu_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
116
117 static inline uint32_t
118 align_u32(uint32_t v, uint32_t a)
119 {
120 assert(a != 0 && a == (a & -a));
121 return (v + a - 1) & ~(a - 1);
122 }
123
124 static inline uint32_t
125 align_u32_npot(uint32_t v, uint32_t a)
126 {
127 return (v + a - 1) / a * a;
128 }
129
130 static inline uint64_t
131 align_u64(uint64_t v, uint64_t a)
132 {
133 assert(a != 0 && a == (a & -a));
134 return (v + a - 1) & ~(a - 1);
135 }
136
137 static inline int32_t
138 align_i32(int32_t v, int32_t a)
139 {
140 assert(a != 0 && a == (a & -a));
141 return (v + a - 1) & ~(a - 1);
142 }
143
144 /** Alignment must be a power of 2. */
145 static inline bool
146 tu_is_aligned(uintmax_t n, uintmax_t a)
147 {
148 assert(a == (a & -a));
149 return (n & (a - 1)) == 0;
150 }
151
152 static inline uint32_t
153 round_up_u32(uint32_t v, uint32_t a)
154 {
155 return (v + a - 1) / a;
156 }
157
158 static inline uint64_t
159 round_up_u64(uint64_t v, uint64_t a)
160 {
161 return (v + a - 1) / a;
162 }
163
164 static inline uint32_t
165 tu_minify(uint32_t n, uint32_t levels)
166 {
167 if (unlikely(n == 0))
168 return 0;
169 else
170 return MAX2(n >> levels, 1);
171 }
172 static inline float
173 tu_clamp_f(float f, float min, float max)
174 {
175 assert(min < max);
176
177 if (f > max)
178 return max;
179 else if (f < min)
180 return min;
181 else
182 return f;
183 }
184
185 static inline bool
186 tu_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
187 {
188 if (*inout_mask & clear_mask) {
189 *inout_mask &= ~clear_mask;
190 return true;
191 } else {
192 return false;
193 }
194 }
195
196 #define for_each_bit(b, dword) \
197 for (uint32_t __dword = (dword); (b) = __builtin_ffs(__dword) - 1, __dword; \
198 __dword &= ~(1 << (b)))
199
200 #define typed_memcpy(dest, src, count) \
201 ({ \
202 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
203 memcpy((dest), (src), (count) * sizeof(*(src))); \
204 })
205
206 /* Whenever we generate an error, pass it through this function. Useful for
207 * debugging, where we can break on it. Only call at error site, not when
208 * propagating errors. Might be useful to plug in a stack trace here.
209 */
210
211 struct tu_instance;
212
213 VkResult
214 __vk_errorf(struct tu_instance *instance,
215 VkResult error,
216 const char *file,
217 int line,
218 const char *format,
219 ...);
220
221 #define vk_error(instance, error) \
222 __vk_errorf(instance, error, __FILE__, __LINE__, NULL);
223 #define vk_errorf(instance, error, format, ...) \
224 __vk_errorf(instance, error, __FILE__, __LINE__, format, ##__VA_ARGS__);
225
226 void
227 __tu_finishme(const char *file, int line, const char *format, ...)
228 tu_printflike(3, 4);
229 void
230 tu_loge(const char *format, ...) tu_printflike(1, 2);
231 void
232 tu_loge_v(const char *format, va_list va);
233 void
234 tu_logi(const char *format, ...) tu_printflike(1, 2);
235 void
236 tu_logi_v(const char *format, va_list va);
237
238 /**
239 * Print a FINISHME message, including its source location.
240 */
241 #define tu_finishme(format, ...) \
242 do { \
243 static bool reported = false; \
244 if (!reported) { \
245 __tu_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
246 reported = true; \
247 } \
248 } while (0)
249
250 /* A non-fatal assert. Useful for debugging. */
251 #ifdef DEBUG
252 #define tu_assert(x) \
253 ({ \
254 if (unlikely(!(x))) \
255 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
256 })
257 #else
258 #define tu_assert(x)
259 #endif
260
261 #define stub_return(v) \
262 do { \
263 tu_finishme("stub %s", __func__); \
264 return (v); \
265 } while (0)
266
267 #define stub() \
268 do { \
269 tu_finishme("stub %s", __func__); \
270 return; \
271 } while (0)
272
273 void *
274 tu_lookup_entrypoint_unchecked(const char *name);
275 void *
276 tu_lookup_entrypoint_checked(
277 const char *name,
278 uint32_t core_version,
279 const struct tu_instance_extension_table *instance,
280 const struct tu_device_extension_table *device);
281
282 struct tu_physical_device
283 {
284 VK_LOADER_DATA _loader_data;
285
286 struct tu_instance *instance;
287
288 char path[20];
289 char name[VK_MAX_PHYSICAL_DEVICE_NAME_SIZE];
290 uint8_t driver_uuid[VK_UUID_SIZE];
291 uint8_t device_uuid[VK_UUID_SIZE];
292 uint8_t cache_uuid[VK_UUID_SIZE];
293
294 int local_fd;
295 int master_fd;
296
297 struct fd_device *drm_device;
298 unsigned gpu_id;
299 uint32_t gmem_size;
300
301 /* This is the drivers on-disk cache used as a fallback as opposed to
302 * the pipeline cache defined by apps.
303 */
304 struct disk_cache *disk_cache;
305
306 struct tu_device_extension_table supported_extensions;
307 };
308
309 enum tu_debug_flags
310 {
311 TU_DEBUG_STARTUP = 1 << 0,
312 };
313
314 struct tu_instance
315 {
316 VK_LOADER_DATA _loader_data;
317
318 VkAllocationCallbacks alloc;
319
320 uint32_t api_version;
321 int physical_device_count;
322 struct tu_physical_device physical_devices[TU_MAX_DRM_DEVICES];
323
324 enum tu_debug_flags debug_flags;
325
326 struct vk_debug_report_instance debug_report_callbacks;
327
328 struct tu_instance_extension_table enabled_extensions;
329 };
330
331 bool
332 tu_instance_extension_supported(const char *name);
333 uint32_t
334 tu_physical_device_api_version(struct tu_physical_device *dev);
335 bool
336 tu_physical_device_extension_supported(struct tu_physical_device *dev,
337 const char *name);
338
339 struct cache_entry;
340
341 struct tu_pipeline_cache
342 {
343 struct tu_device *device;
344 pthread_mutex_t mutex;
345
346 uint32_t total_size;
347 uint32_t table_size;
348 uint32_t kernel_count;
349 struct cache_entry **hash_table;
350 bool modified;
351
352 VkAllocationCallbacks alloc;
353 };
354
355 struct tu_pipeline_key
356 {
357 };
358
359 void
360 tu_pipeline_cache_init(struct tu_pipeline_cache *cache,
361 struct tu_device *device);
362 void
363 tu_pipeline_cache_finish(struct tu_pipeline_cache *cache);
364 void
365 tu_pipeline_cache_load(struct tu_pipeline_cache *cache,
366 const void *data,
367 size_t size);
368
369 struct tu_shader_variant;
370
371 bool
372 tu_create_shader_variants_from_pipeline_cache(
373 struct tu_device *device,
374 struct tu_pipeline_cache *cache,
375 const unsigned char *sha1,
376 struct tu_shader_variant **variants);
377
378 void
379 tu_pipeline_cache_insert_shaders(struct tu_device *device,
380 struct tu_pipeline_cache *cache,
381 const unsigned char *sha1,
382 struct tu_shader_variant **variants,
383 const void *const *codes,
384 const unsigned *code_sizes);
385
386 struct tu_meta_state
387 {
388 VkAllocationCallbacks alloc;
389
390 struct tu_pipeline_cache cache;
391 };
392
393 /* queue types */
394 #define TU_QUEUE_GENERAL 0
395
396 #define TU_MAX_QUEUE_FAMILIES 1
397
398 struct tu_queue
399 {
400 VK_LOADER_DATA _loader_data;
401 struct tu_device *device;
402 uint32_t queue_family_index;
403 int queue_idx;
404 VkDeviceQueueCreateFlags flags;
405 };
406
407 struct tu_bo_list
408 {
409 unsigned capacity;
410 pthread_mutex_t mutex;
411 };
412
413 struct tu_device
414 {
415 VK_LOADER_DATA _loader_data;
416
417 VkAllocationCallbacks alloc;
418
419 struct tu_instance *instance;
420 struct radeon_winsys *ws;
421
422 struct tu_meta_state meta_state;
423
424 struct tu_queue *queues[TU_MAX_QUEUE_FAMILIES];
425 int queue_count[TU_MAX_QUEUE_FAMILIES];
426
427 struct tu_physical_device *physical_device;
428
429 /* Backup in-memory cache to be used if the app doesn't provide one */
430 struct tu_pipeline_cache *mem_cache;
431
432 struct list_head shader_slabs;
433 mtx_t shader_slab_mutex;
434
435 struct tu_device_extension_table enabled_extensions;
436
437 /* Whether the driver uses a global BO list. */
438 bool use_global_bo_list;
439
440 struct tu_bo_list bo_list;
441 };
442
443 struct tu_device_memory
444 {
445 struct fd_bo *bo;
446 VkDeviceSize size;
447
448 /* for dedicated allocations */
449 struct tu_image *image;
450 struct tu_buffer *buffer;
451
452 uint32_t type_index;
453 void *map;
454 void *user_ptr;
455 };
456
457 struct tu_descriptor_range
458 {
459 uint64_t va;
460 uint32_t size;
461 };
462
463 struct tu_descriptor_set
464 {
465 const struct tu_descriptor_set_layout *layout;
466 uint32_t size;
467
468 struct radeon_winsys_bo *bo;
469 uint64_t va;
470 uint32_t *mapped_ptr;
471 struct tu_descriptor_range *dynamic_descriptors;
472 };
473
474 struct tu_push_descriptor_set
475 {
476 struct tu_descriptor_set set;
477 uint32_t capacity;
478 };
479
480 struct tu_descriptor_pool_entry
481 {
482 uint32_t offset;
483 uint32_t size;
484 struct tu_descriptor_set *set;
485 };
486
487 struct tu_descriptor_pool
488 {
489 struct radeon_winsys_bo *bo;
490 uint8_t *mapped_ptr;
491 uint64_t current_offset;
492 uint64_t size;
493
494 uint8_t *host_memory_base;
495 uint8_t *host_memory_ptr;
496 uint8_t *host_memory_end;
497
498 uint32_t entry_count;
499 uint32_t max_entry_count;
500 struct tu_descriptor_pool_entry entries[0];
501 };
502
503 struct tu_descriptor_update_template_entry
504 {
505 VkDescriptorType descriptor_type;
506
507 /* The number of descriptors to update */
508 uint32_t descriptor_count;
509
510 /* Into mapped_ptr or dynamic_descriptors, in units of the respective array
511 */
512 uint32_t dst_offset;
513
514 /* In dwords. Not valid/used for dynamic descriptors */
515 uint32_t dst_stride;
516
517 uint32_t buffer_offset;
518
519 /* Only valid for combined image samplers and samplers */
520 uint16_t has_sampler;
521
522 /* In bytes */
523 size_t src_offset;
524 size_t src_stride;
525
526 /* For push descriptors */
527 const uint32_t *immutable_samplers;
528 };
529
530 struct tu_descriptor_update_template
531 {
532 uint32_t entry_count;
533 VkPipelineBindPoint bind_point;
534 struct tu_descriptor_update_template_entry entry[0];
535 };
536
537 struct tu_buffer
538 {
539 VkDeviceSize size;
540
541 VkBufferUsageFlags usage;
542 VkBufferCreateFlags flags;
543 };
544
545 enum tu_dynamic_state_bits
546 {
547 TU_DYNAMIC_VIEWPORT = 1 << 0,
548 TU_DYNAMIC_SCISSOR = 1 << 1,
549 TU_DYNAMIC_LINE_WIDTH = 1 << 2,
550 TU_DYNAMIC_DEPTH_BIAS = 1 << 3,
551 TU_DYNAMIC_BLEND_CONSTANTS = 1 << 4,
552 TU_DYNAMIC_DEPTH_BOUNDS = 1 << 5,
553 TU_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6,
554 TU_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7,
555 TU_DYNAMIC_STENCIL_REFERENCE = 1 << 8,
556 TU_DYNAMIC_DISCARD_RECTANGLE = 1 << 9,
557 TU_DYNAMIC_ALL = (1 << 10) - 1,
558 };
559
560 struct tu_vertex_binding
561 {
562 struct tu_buffer *buffer;
563 VkDeviceSize offset;
564 };
565
566 struct tu_viewport_state
567 {
568 uint32_t count;
569 VkViewport viewports[MAX_VIEWPORTS];
570 };
571
572 struct tu_scissor_state
573 {
574 uint32_t count;
575 VkRect2D scissors[MAX_SCISSORS];
576 };
577
578 struct tu_discard_rectangle_state
579 {
580 uint32_t count;
581 VkRect2D rectangles[MAX_DISCARD_RECTANGLES];
582 };
583
584 struct tu_dynamic_state
585 {
586 /**
587 * Bitmask of (1 << VK_DYNAMIC_STATE_*).
588 * Defines the set of saved dynamic state.
589 */
590 uint32_t mask;
591
592 struct tu_viewport_state viewport;
593
594 struct tu_scissor_state scissor;
595
596 float line_width;
597
598 struct
599 {
600 float bias;
601 float clamp;
602 float slope;
603 } depth_bias;
604
605 float blend_constants[4];
606
607 struct
608 {
609 float min;
610 float max;
611 } depth_bounds;
612
613 struct
614 {
615 uint32_t front;
616 uint32_t back;
617 } stencil_compare_mask;
618
619 struct
620 {
621 uint32_t front;
622 uint32_t back;
623 } stencil_write_mask;
624
625 struct
626 {
627 uint32_t front;
628 uint32_t back;
629 } stencil_reference;
630
631 struct tu_discard_rectangle_state discard_rectangle;
632 };
633
634 extern const struct tu_dynamic_state default_dynamic_state;
635
636 const char *
637 tu_get_debug_option_name(int id);
638
639 const char *
640 tu_get_perftest_option_name(int id);
641
642 /**
643 * Attachment state when recording a renderpass instance.
644 *
645 * The clear value is valid only if there exists a pending clear.
646 */
647 struct tu_attachment_state
648 {
649 VkImageAspectFlags pending_clear_aspects;
650 uint32_t cleared_views;
651 VkClearValue clear_value;
652 VkImageLayout current_layout;
653 };
654
655 struct tu_descriptor_state
656 {
657 struct tu_descriptor_set *sets[MAX_SETS];
658 uint32_t dirty;
659 uint32_t valid;
660 struct tu_push_descriptor_set push_set;
661 bool push_dirty;
662 uint32_t dynamic_buffers[4 * MAX_DYNAMIC_BUFFERS];
663 };
664
665 struct tu_cmd_state
666 {
667 /* Vertex descriptors */
668 uint64_t vb_va;
669 unsigned vb_size;
670
671 struct tu_dynamic_state dynamic;
672
673 /* Index buffer */
674 struct tu_buffer *index_buffer;
675 uint64_t index_offset;
676 uint32_t index_type;
677 uint32_t max_index_count;
678 uint64_t index_va;
679 };
680
681 struct tu_cmd_pool
682 {
683 VkAllocationCallbacks alloc;
684 struct list_head cmd_buffers;
685 struct list_head free_cmd_buffers;
686 uint32_t queue_family_index;
687 };
688
689 struct tu_cmd_buffer_upload
690 {
691 uint8_t *map;
692 unsigned offset;
693 uint64_t size;
694 struct radeon_winsys_bo *upload_bo;
695 struct list_head list;
696 };
697
698 enum tu_cmd_buffer_status
699 {
700 TU_CMD_BUFFER_STATUS_INVALID,
701 TU_CMD_BUFFER_STATUS_INITIAL,
702 TU_CMD_BUFFER_STATUS_RECORDING,
703 TU_CMD_BUFFER_STATUS_EXECUTABLE,
704 TU_CMD_BUFFER_STATUS_PENDING,
705 };
706
707 struct tu_cmd_buffer
708 {
709 VK_LOADER_DATA _loader_data;
710
711 struct tu_device *device;
712
713 struct tu_cmd_pool *pool;
714 struct list_head pool_link;
715
716 VkCommandBufferUsageFlags usage_flags;
717 VkCommandBufferLevel level;
718 enum tu_cmd_buffer_status status;
719 struct radeon_cmdbuf *cs;
720 struct tu_cmd_state state;
721 struct tu_vertex_binding vertex_bindings[MAX_VBS];
722 uint32_t queue_family_index;
723
724 uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE];
725 VkShaderStageFlags push_constant_stages;
726 struct tu_descriptor_set meta_push_descriptors;
727
728 struct tu_descriptor_state descriptors[VK_PIPELINE_BIND_POINT_RANGE_SIZE];
729
730 struct tu_cmd_buffer_upload upload;
731
732 uint32_t scratch_size_needed;
733 uint32_t compute_scratch_size_needed;
734 uint32_t esgs_ring_size_needed;
735 uint32_t gsvs_ring_size_needed;
736 bool tess_rings_needed;
737 bool sample_positions_needed;
738
739 VkResult record_result;
740
741 uint32_t gfx9_fence_offset;
742 struct radeon_winsys_bo *gfx9_fence_bo;
743 uint32_t gfx9_fence_idx;
744 uint64_t gfx9_eop_bug_va;
745
746 /**
747 * Whether a query pool has been resetted and we have to flush caches.
748 */
749 bool pending_reset_query;
750 };
751
752 bool
753 tu_get_memory_fd(struct tu_device *device,
754 struct tu_device_memory *memory,
755 int *pFD);
756
757 /*
758 * Takes x,y,z as exact numbers of invocations, instead of blocks.
759 *
760 * Limitations: Can't call normal dispatch functions without binding or
761 * rebinding
762 * the compute pipeline.
763 */
764 void
765 tu_unaligned_dispatch(struct tu_cmd_buffer *cmd_buffer,
766 uint32_t x,
767 uint32_t y,
768 uint32_t z);
769
770 struct tu_event
771 {
772 struct radeon_winsys_bo *bo;
773 uint64_t *map;
774 };
775
776 struct tu_shader_module;
777
778 #define TU_HASH_SHADER_IS_GEOM_COPY_SHADER (1 << 0)
779 #define TU_HASH_SHADER_SISCHED (1 << 1)
780 #define TU_HASH_SHADER_UNSAFE_MATH (1 << 2)
781 void
782 tu_hash_shaders(unsigned char *hash,
783 const VkPipelineShaderStageCreateInfo **stages,
784 const struct tu_pipeline_layout *layout,
785 const struct tu_pipeline_key *key,
786 uint32_t flags);
787
788 static inline gl_shader_stage
789 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
790 {
791 assert(__builtin_popcount(vk_stage) == 1);
792 return ffs(vk_stage) - 1;
793 }
794
795 static inline VkShaderStageFlagBits
796 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
797 {
798 return (1 << mesa_stage);
799 }
800
801 #define TU_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
802
803 #define tu_foreach_stage(stage, stage_bits) \
804 for (gl_shader_stage stage, \
805 __tmp = (gl_shader_stage)((stage_bits)&TU_STAGE_MASK); \
806 stage = __builtin_ffs(__tmp) - 1, __tmp; \
807 __tmp &= ~(1 << (stage)))
808
809 struct tu_shader_module
810 {
811 struct nir_shader *nir;
812 unsigned char sha1[20];
813 uint32_t size;
814 char data[0];
815 };
816
817 struct tu_pipeline
818 {
819 struct tu_device *device;
820 struct tu_dynamic_state dynamic_state;
821
822 struct tu_pipeline_layout *layout;
823
824 bool need_indirect_descriptor_sets;
825 VkShaderStageFlags active_stages;
826 };
827
828 struct tu_userdata_info *
829 tu_lookup_user_sgpr(struct tu_pipeline *pipeline,
830 gl_shader_stage stage,
831 int idx);
832
833 struct tu_shader_variant *
834 tu_get_shader(struct tu_pipeline *pipeline, gl_shader_stage stage);
835
836 struct tu_graphics_pipeline_create_info
837 {
838 bool use_rectlist;
839 bool db_depth_clear;
840 bool db_stencil_clear;
841 bool db_depth_disable_expclear;
842 bool db_stencil_disable_expclear;
843 bool db_flush_depth_inplace;
844 bool db_flush_stencil_inplace;
845 bool db_resummarize;
846 uint32_t custom_blend_mode;
847 };
848
849 VkResult
850 tu_graphics_pipeline_create(
851 VkDevice device,
852 VkPipelineCache cache,
853 const VkGraphicsPipelineCreateInfo *pCreateInfo,
854 const struct tu_graphics_pipeline_create_info *extra,
855 const VkAllocationCallbacks *alloc,
856 VkPipeline *pPipeline);
857
858 struct vk_format_description;
859 uint32_t
860 tu_translate_buffer_dataformat(const struct vk_format_description *desc,
861 int first_non_void);
862 uint32_t
863 tu_translate_buffer_numformat(const struct vk_format_description *desc,
864 int first_non_void);
865 uint32_t
866 tu_translate_colorformat(VkFormat format);
867 uint32_t
868 tu_translate_color_numformat(VkFormat format,
869 const struct vk_format_description *desc,
870 int first_non_void);
871 uint32_t
872 tu_colorformat_endian_swap(uint32_t colorformat);
873 unsigned
874 tu_translate_colorswap(VkFormat format, bool do_endian_swap);
875 uint32_t
876 tu_translate_dbformat(VkFormat format);
877 uint32_t
878 tu_translate_tex_dataformat(VkFormat format,
879 const struct vk_format_description *desc,
880 int first_non_void);
881 uint32_t
882 tu_translate_tex_numformat(VkFormat format,
883 const struct vk_format_description *desc,
884 int first_non_void);
885 bool
886 tu_format_pack_clear_color(VkFormat format,
887 uint32_t clear_vals[2],
888 VkClearColorValue *value);
889 bool
890 tu_is_colorbuffer_format_supported(VkFormat format, bool *blendable);
891 bool
892 tu_dcc_formats_compatible(VkFormat format1, VkFormat format2);
893
894 struct tu_image
895 {
896 VkImageType type;
897 /* The original VkFormat provided by the client. This may not match any
898 * of the actual surface formats.
899 */
900 VkFormat vk_format;
901 VkImageAspectFlags aspects;
902 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
903 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
904 VkImageCreateFlags flags; /** VkImageCreateInfo::flags */
905
906 VkDeviceSize size;
907 uint32_t alignment;
908
909 unsigned queue_family_mask;
910 bool exclusive;
911 bool shareable;
912
913 /* For VK_ANDROID_native_buffer, the WSI image owns the memory, */
914 VkDeviceMemory owned_memory;
915 };
916
917 unsigned
918 tu_image_queue_family_mask(const struct tu_image *image,
919 uint32_t family,
920 uint32_t queue_family);
921
922 static inline uint32_t
923 tu_get_layerCount(const struct tu_image *image,
924 const VkImageSubresourceRange *range)
925 {
926 abort();
927 }
928
929 static inline uint32_t
930 tu_get_levelCount(const struct tu_image *image,
931 const VkImageSubresourceRange *range)
932 {
933 abort();
934 }
935
936 struct tu_image_view
937 {
938 struct tu_image *image; /**< VkImageViewCreateInfo::image */
939
940 VkImageViewType type;
941 VkImageAspectFlags aspect_mask;
942 VkFormat vk_format;
943 uint32_t base_layer;
944 uint32_t layer_count;
945 uint32_t base_mip;
946 uint32_t level_count;
947 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
948
949 uint32_t descriptor[16];
950
951 /* Descriptor for use as a storage image as opposed to a sampled image.
952 * This has a few differences for cube maps (e.g. type).
953 */
954 uint32_t storage_descriptor[16];
955 };
956
957 struct tu_sampler
958 {
959 };
960
961 struct tu_image_create_info
962 {
963 const VkImageCreateInfo *vk_info;
964 bool scanout;
965 bool no_metadata_planes;
966 };
967
968 VkResult
969 tu_image_create(VkDevice _device,
970 const struct tu_image_create_info *info,
971 const VkAllocationCallbacks *alloc,
972 VkImage *pImage);
973
974 VkResult
975 tu_image_from_gralloc(VkDevice device_h,
976 const VkImageCreateInfo *base_info,
977 const VkNativeBufferANDROID *gralloc_info,
978 const VkAllocationCallbacks *alloc,
979 VkImage *out_image_h);
980
981 void
982 tu_image_view_init(struct tu_image_view *view,
983 struct tu_device *device,
984 const VkImageViewCreateInfo *pCreateInfo);
985
986 struct tu_buffer_view
987 {
988 struct radeon_winsys_bo *bo;
989 VkFormat vk_format;
990 uint64_t range; /**< VkBufferViewCreateInfo::range */
991 uint32_t state[4];
992 };
993 void
994 tu_buffer_view_init(struct tu_buffer_view *view,
995 struct tu_device *device,
996 const VkBufferViewCreateInfo *pCreateInfo);
997
998 static inline struct VkExtent3D
999 tu_sanitize_image_extent(const VkImageType imageType,
1000 const struct VkExtent3D imageExtent)
1001 {
1002 switch (imageType) {
1003 case VK_IMAGE_TYPE_1D:
1004 return (VkExtent3D){ imageExtent.width, 1, 1 };
1005 case VK_IMAGE_TYPE_2D:
1006 return (VkExtent3D){ imageExtent.width, imageExtent.height, 1 };
1007 case VK_IMAGE_TYPE_3D:
1008 return imageExtent;
1009 default:
1010 unreachable("invalid image type");
1011 }
1012 }
1013
1014 static inline struct VkOffset3D
1015 tu_sanitize_image_offset(const VkImageType imageType,
1016 const struct VkOffset3D imageOffset)
1017 {
1018 switch (imageType) {
1019 case VK_IMAGE_TYPE_1D:
1020 return (VkOffset3D){ imageOffset.x, 0, 0 };
1021 case VK_IMAGE_TYPE_2D:
1022 return (VkOffset3D){ imageOffset.x, imageOffset.y, 0 };
1023 case VK_IMAGE_TYPE_3D:
1024 return imageOffset;
1025 default:
1026 unreachable("invalid image type");
1027 }
1028 }
1029
1030 struct tu_attachment_info
1031 {
1032 struct tu_image_view *attachment;
1033 };
1034
1035 struct tu_framebuffer
1036 {
1037 uint32_t width;
1038 uint32_t height;
1039 uint32_t layers;
1040
1041 uint32_t attachment_count;
1042 struct tu_attachment_info attachments[0];
1043 };
1044
1045 struct tu_subpass_barrier
1046 {
1047 VkPipelineStageFlags src_stage_mask;
1048 VkAccessFlags src_access_mask;
1049 VkAccessFlags dst_access_mask;
1050 };
1051
1052 void
1053 tu_subpass_barrier(struct tu_cmd_buffer *cmd_buffer,
1054 const struct tu_subpass_barrier *barrier);
1055
1056 struct tu_subpass_attachment
1057 {
1058 uint32_t attachment;
1059 VkImageLayout layout;
1060 };
1061
1062 struct tu_subpass
1063 {
1064 uint32_t input_count;
1065 uint32_t color_count;
1066 struct tu_subpass_attachment *input_attachments;
1067 struct tu_subpass_attachment *color_attachments;
1068 struct tu_subpass_attachment *resolve_attachments;
1069 struct tu_subpass_attachment depth_stencil_attachment;
1070
1071 /** Subpass has at least one resolve attachment */
1072 bool has_resolve;
1073
1074 struct tu_subpass_barrier start_barrier;
1075
1076 uint32_t view_mask;
1077 VkSampleCountFlagBits max_sample_count;
1078 };
1079
1080 struct tu_render_pass_attachment
1081 {
1082 VkFormat format;
1083 uint32_t samples;
1084 VkAttachmentLoadOp load_op;
1085 VkAttachmentLoadOp stencil_load_op;
1086 VkImageLayout initial_layout;
1087 VkImageLayout final_layout;
1088 uint32_t view_mask;
1089 };
1090
1091 struct tu_render_pass
1092 {
1093 uint32_t attachment_count;
1094 uint32_t subpass_count;
1095 struct tu_subpass_attachment *subpass_attachments;
1096 struct tu_render_pass_attachment *attachments;
1097 struct tu_subpass_barrier end_barrier;
1098 struct tu_subpass subpasses[0];
1099 };
1100
1101 VkResult
1102 tu_device_init_meta(struct tu_device *device);
1103 void
1104 tu_device_finish_meta(struct tu_device *device);
1105
1106 struct tu_query_pool
1107 {
1108 struct radeon_winsys_bo *bo;
1109 uint32_t stride;
1110 uint32_t availability_offset;
1111 uint64_t size;
1112 char *ptr;
1113 VkQueryType type;
1114 uint32_t pipeline_stats_mask;
1115 };
1116
1117 struct tu_semaphore
1118 {
1119 /* use a winsys sem for non-exportable */
1120 struct radeon_winsys_sem *sem;
1121 uint32_t syncobj;
1122 uint32_t temp_syncobj;
1123 };
1124
1125 void
1126 tu_set_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1127 VkPipelineBindPoint bind_point,
1128 struct tu_descriptor_set *set,
1129 unsigned idx);
1130
1131 void
1132 tu_update_descriptor_sets(struct tu_device *device,
1133 struct tu_cmd_buffer *cmd_buffer,
1134 VkDescriptorSet overrideSet,
1135 uint32_t descriptorWriteCount,
1136 const VkWriteDescriptorSet *pDescriptorWrites,
1137 uint32_t descriptorCopyCount,
1138 const VkCopyDescriptorSet *pDescriptorCopies);
1139
1140 void
1141 tu_update_descriptor_set_with_template(
1142 struct tu_device *device,
1143 struct tu_cmd_buffer *cmd_buffer,
1144 struct tu_descriptor_set *set,
1145 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
1146 const void *pData);
1147
1148 void
1149 tu_meta_push_descriptor_set(struct tu_cmd_buffer *cmd_buffer,
1150 VkPipelineBindPoint pipelineBindPoint,
1151 VkPipelineLayout _layout,
1152 uint32_t set,
1153 uint32_t descriptorWriteCount,
1154 const VkWriteDescriptorSet *pDescriptorWrites);
1155
1156 struct tu_fence
1157 {
1158 struct radeon_winsys_fence *fence;
1159 bool submitted;
1160 bool signalled;
1161
1162 uint32_t syncobj;
1163 uint32_t temp_syncobj;
1164 };
1165
1166 /* tu_nir_to_llvm.c */
1167 struct tu_shader_variant_info;
1168 struct tu_nir_compiler_options;
1169
1170 struct radeon_winsys_sem;
1171
1172 #define TU_DEFINE_HANDLE_CASTS(__tu_type, __VkType) \
1173 \
1174 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1175 { \
1176 return (struct __tu_type *)_handle; \
1177 } \
1178 \
1179 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1180 { \
1181 return (__VkType)_obj; \
1182 }
1183
1184 #define TU_DEFINE_NONDISP_HANDLE_CASTS(__tu_type, __VkType) \
1185 \
1186 static inline struct __tu_type *__tu_type##_from_handle(__VkType _handle) \
1187 { \
1188 return (struct __tu_type *)(uintptr_t)_handle; \
1189 } \
1190 \
1191 static inline __VkType __tu_type##_to_handle(struct __tu_type *_obj) \
1192 { \
1193 return (__VkType)(uintptr_t)_obj; \
1194 }
1195
1196 #define TU_FROM_HANDLE(__tu_type, __name, __handle) \
1197 struct __tu_type *__name = __tu_type##_from_handle(__handle)
1198
1199 TU_DEFINE_HANDLE_CASTS(tu_cmd_buffer, VkCommandBuffer)
1200 TU_DEFINE_HANDLE_CASTS(tu_device, VkDevice)
1201 TU_DEFINE_HANDLE_CASTS(tu_instance, VkInstance)
1202 TU_DEFINE_HANDLE_CASTS(tu_physical_device, VkPhysicalDevice)
1203 TU_DEFINE_HANDLE_CASTS(tu_queue, VkQueue)
1204
1205 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_cmd_pool, VkCommandPool)
1206 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer, VkBuffer)
1207 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_buffer_view, VkBufferView)
1208 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, VkDescriptorPool)
1209 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, VkDescriptorSet)
1210 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout,
1211 VkDescriptorSetLayout)
1212 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template,
1213 VkDescriptorUpdateTemplateKHR)
1214 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_device_memory, VkDeviceMemory)
1215 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_fence, VkFence)
1216 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_event, VkEvent)
1217 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_framebuffer, VkFramebuffer)
1218 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image, VkImage)
1219 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_image_view, VkImageView);
1220 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_cache, VkPipelineCache)
1221 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline, VkPipeline)
1222 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, VkPipelineLayout)
1223 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_query_pool, VkQueryPool)
1224 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_render_pass, VkRenderPass)
1225 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_sampler, VkSampler)
1226 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_shader_module, VkShaderModule)
1227 TU_DEFINE_NONDISP_HANDLE_CASTS(tu_semaphore, VkSemaphore)
1228
1229 #endif /* TU_PRIVATE_H */