1 /**************************************************************************
3 * Copyright 2010 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
26 **************************************************************************/
29 #include "util/u_memory.h"
30 #include "util/u_math.h"
31 #include "tgsi/tgsi_parse.h"
32 #include "tgsi/tgsi_util.h"
33 #include "tgsi/tgsi_dump.h"
34 #include "tgsi/tgsi_strings.h"
35 #include "lp_bld_debug.h"
36 #include "lp_bld_tgsi.h"
42 * This is where we keep store the value of each channel of the IMM/TEMP/OUT
43 * register values, as we walk the shader.
45 struct analysis_context
47 struct lp_tgsi_info
*info
;
52 struct lp_tgsi_channel_info temp
[32][4];
57 * Describe the specified channel of the src register.
60 analyse_src(struct analysis_context
*ctx
,
61 struct lp_tgsi_channel_info
*chan_info
,
62 const struct tgsi_src_register
*src
,
65 chan_info
->file
= TGSI_FILE_NULL
;
66 if (!src
->Indirect
&& !src
->Absolute
&& !src
->Negate
) {
67 unsigned swizzle
= tgsi_util_get_src_register_swizzle(src
, chan
);
68 if (src
->File
== TGSI_FILE_TEMPORARY
) {
69 if (src
->Index
< Elements(ctx
->temp
)) {
70 *chan_info
= ctx
->temp
[src
->Index
][swizzle
];
73 chan_info
->file
= src
->File
;
74 if (src
->File
== TGSI_FILE_IMMEDIATE
) {
75 assert(src
->Index
< Elements(ctx
->imm
));
76 if (src
->Index
< Elements(ctx
->imm
)) {
77 chan_info
->u
.value
= ctx
->imm
[src
->Index
][swizzle
];
80 chan_info
->u
.index
= src
->Index
;
81 chan_info
->swizzle
= swizzle
;
89 * Whether this register channel refers to a specific immediate value.
92 is_immediate(const struct lp_tgsi_channel_info
*chan_info
, float value
)
94 return chan_info
->file
== TGSI_FILE_IMMEDIATE
&&
95 chan_info
->u
.value
== value
;
100 analyse_tex(struct analysis_context
*ctx
,
101 const struct tgsi_full_instruction
*inst
,
102 enum lp_build_tex_modifier modifier
)
104 struct lp_tgsi_info
*info
= ctx
->info
;
107 if (info
->num_texs
< Elements(info
->tex
)) {
108 struct lp_tgsi_texture_info
*tex_info
= &info
->tex
[info
->num_texs
];
109 boolean indirect
= FALSE
;
110 unsigned readmask
= 0;
112 tex_info
->target
= inst
->Texture
.Texture
;
113 switch (inst
->Texture
.Texture
) {
114 case TGSI_TEXTURE_1D
:
115 readmask
= TGSI_WRITEMASK_X
;
117 case TGSI_TEXTURE_1D_ARRAY
:
118 case TGSI_TEXTURE_2D
:
119 case TGSI_TEXTURE_RECT
:
120 readmask
= TGSI_WRITEMASK_XY
;
122 case TGSI_TEXTURE_SHADOW1D
:
123 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
124 case TGSI_TEXTURE_SHADOW2D
:
125 case TGSI_TEXTURE_SHADOWRECT
:
126 case TGSI_TEXTURE_2D_ARRAY
:
127 case TGSI_TEXTURE_3D
:
128 case TGSI_TEXTURE_CUBE
:
129 readmask
= TGSI_WRITEMASK_XYZ
;
131 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
132 case TGSI_TEXTURE_SHADOWCUBE
:
133 readmask
= TGSI_WRITEMASK_XYZW
;
140 if (modifier
== LP_BLD_TEX_MODIFIER_EXPLICIT_DERIV
) {
141 /* We don't track explicit derivatives, although we could */
143 tex_info
->unit
= inst
->Src
[3].Register
.Index
;
145 if (modifier
== LP_BLD_TEX_MODIFIER_PROJECTED
||
146 modifier
== LP_BLD_TEX_MODIFIER_LOD_BIAS
||
147 modifier
== LP_BLD_TEX_MODIFIER_EXPLICIT_LOD
) {
148 readmask
|= TGSI_WRITEMASK_W
;
150 tex_info
->unit
= inst
->Src
[1].Register
.Index
;
153 for (chan
= 0; chan
< 4; ++chan
) {
154 struct lp_tgsi_channel_info
*chan_info
= &tex_info
->coord
[chan
];
155 if (readmask
& (1 << chan
)) {
156 analyse_src(ctx
, chan_info
, &inst
->Src
[0].Register
, chan
);
157 if (chan_info
->file
!= TGSI_FILE_INPUT
) {
161 memset(chan_info
, 0, sizeof *chan_info
);
166 info
->indirect_textures
= TRUE
;
171 info
->indirect_textures
= TRUE
;
177 * Process an instruction, and update the register values accordingly.
180 analyse_instruction(struct analysis_context
*ctx
,
181 struct tgsi_full_instruction
*inst
)
183 struct lp_tgsi_info
*info
= ctx
->info
;
184 struct lp_tgsi_channel_info (*regs
)[4];
190 for (i
= 0; i
< inst
->Instruction
.NumDstRegs
; ++i
) {
191 const struct tgsi_dst_register
*dst
= &inst
->Dst
[i
].Register
;
194 * Get the lp_tgsi_channel_info array corresponding to the destination
198 if (dst
->File
== TGSI_FILE_TEMPORARY
) {
200 max_regs
= Elements(ctx
->temp
);
201 } else if (dst
->File
== TGSI_FILE_OUTPUT
) {
203 max_regs
= Elements(info
->output
);
204 } else if (dst
->File
== TGSI_FILE_ADDRESS
||
205 dst
->File
== TGSI_FILE_PREDICATE
) {
213 * Detect direct TEX instructions
216 switch (inst
->Instruction
.Opcode
) {
217 case TGSI_OPCODE_TEX
:
218 analyse_tex(ctx
, inst
, LP_BLD_TEX_MODIFIER_NONE
);
220 case TGSI_OPCODE_TXD
:
221 analyse_tex(ctx
, inst
, LP_BLD_TEX_MODIFIER_EXPLICIT_DERIV
);
223 case TGSI_OPCODE_TXB
:
224 analyse_tex(ctx
, inst
, LP_BLD_TEX_MODIFIER_LOD_BIAS
);
226 case TGSI_OPCODE_TXL
:
227 analyse_tex(ctx
, inst
, LP_BLD_TEX_MODIFIER_EXPLICIT_LOD
);
229 case TGSI_OPCODE_TXP
:
230 analyse_tex(ctx
, inst
, LP_BLD_TEX_MODIFIER_PROJECTED
);
237 * Keep track of assignments and writes
242 * It could be any register index so clear all register indices.
245 for (chan
= 0; chan
< 4; ++chan
) {
246 if (dst
->WriteMask
& (1 << chan
)) {
247 for (index
= 0; index
< max_regs
; ++index
) {
248 regs
[index
][chan
].file
= TGSI_FILE_NULL
;
252 } else if (dst
->Index
< max_regs
) {
254 * Update this destination register value.
257 struct lp_tgsi_channel_info res
[4];
259 memset(res
, 0, sizeof res
);
261 if (!inst
->Instruction
.Predicate
&&
262 !inst
->Instruction
.Saturate
) {
263 for (chan
= 0; chan
< 4; ++chan
) {
264 if (dst
->WriteMask
& (1 << chan
)) {
265 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_MOV
) {
266 analyse_src(ctx
, &res
[chan
],
267 &inst
->Src
[0].Register
, chan
);
268 } else if (inst
->Instruction
.Opcode
== TGSI_OPCODE_MUL
) {
270 * Propagate values across 1.0 and 0.0 multiplications.
273 struct lp_tgsi_channel_info src0
;
274 struct lp_tgsi_channel_info src1
;
276 analyse_src(ctx
, &src0
, &inst
->Src
[0].Register
, chan
);
277 analyse_src(ctx
, &src1
, &inst
->Src
[1].Register
, chan
);
279 if (is_immediate(&src0
, 0.0f
)) {
281 } else if (is_immediate(&src1
, 0.0f
)) {
283 } else if (is_immediate(&src0
, 1.0f
)) {
285 } else if (is_immediate(&src1
, 1.0f
)) {
293 for (chan
= 0; chan
< 4; ++chan
) {
294 if (dst
->WriteMask
& (1 << chan
)) {
295 regs
[dst
->Index
][chan
] = res
[chan
];
302 * Clear all temporaries information in presence of a control flow opcode.
305 switch (inst
->Instruction
.Opcode
) {
307 case TGSI_OPCODE_IFC
:
308 case TGSI_OPCODE_ELSE
:
309 case TGSI_OPCODE_ENDIF
:
310 case TGSI_OPCODE_BGNLOOP
:
311 case TGSI_OPCODE_BRK
:
312 case TGSI_OPCODE_BREAKC
:
313 case TGSI_OPCODE_CONT
:
314 case TGSI_OPCODE_ENDLOOP
:
315 case TGSI_OPCODE_CALLNZ
:
316 case TGSI_OPCODE_CAL
:
317 case TGSI_OPCODE_BGNSUB
:
318 case TGSI_OPCODE_ENDSUB
:
319 case TGSI_OPCODE_SWITCH
:
320 case TGSI_OPCODE_CASE
:
321 case TGSI_OPCODE_DEFAULT
:
322 case TGSI_OPCODE_ENDSWITCH
:
323 case TGSI_OPCODE_RET
:
324 case TGSI_OPCODE_END
:
325 /* XXX: Are there more cases? */
326 memset(&ctx
->temp
, 0, sizeof ctx
->temp
);
327 memset(&info
->output
, 0, sizeof info
->output
);
335 dump_info(const struct tgsi_token
*tokens
,
336 struct lp_tgsi_info
*info
)
341 tgsi_dump(tokens
, 0);
343 for (index
= 0; index
< info
->num_texs
; ++index
) {
344 const struct lp_tgsi_texture_info
*tex_info
= &info
->tex
[index
];
345 debug_printf("TEX[%u] =", index
);
346 for (chan
= 0; chan
< 4; ++chan
) {
347 const struct lp_tgsi_channel_info
*chan_info
=
348 &tex_info
->coord
[chan
];
349 if (chan_info
->file
!= TGSI_FILE_NULL
) {
350 debug_printf(" %s[%u].%c",
351 tgsi_file_names
[chan_info
->file
],
353 "xyzw01"[chan_info
->swizzle
]);
358 debug_printf(", SAMP[%u], %s\n",
360 tgsi_texture_names
[tex_info
->target
]);
363 for (index
= 0; index
< PIPE_MAX_SHADER_OUTPUTS
; ++index
) {
364 for (chan
= 0; chan
< 4; ++chan
) {
365 const struct lp_tgsi_channel_info
*chan_info
=
366 &info
->output
[index
][chan
];
367 if (chan_info
->file
!= TGSI_FILE_NULL
) {
368 debug_printf("OUT[%u].%c = ", index
, "xyzw"[chan
]);
369 if (chan_info
->file
== TGSI_FILE_IMMEDIATE
) {
370 debug_printf("%f", chan_info
->u
.value
);
372 const char *file_name
;
373 switch (chan_info
->file
) {
374 case TGSI_FILE_CONSTANT
:
377 case TGSI_FILE_INPUT
:
384 debug_printf("%s[%u].%c",
387 "xyzw01"[chan_info
->swizzle
]);
397 * Detect any direct relationship between the output color
400 lp_build_tgsi_info(const struct tgsi_token
*tokens
,
401 struct lp_tgsi_info
*info
)
403 struct tgsi_parse_context parse
;
404 struct analysis_context ctx
;
408 memset(info
, 0, sizeof *info
);
410 tgsi_scan_shader(tokens
, &info
->base
);
412 memset(&ctx
, 0, sizeof ctx
);
415 tgsi_parse_init(&parse
, tokens
);
417 while (!tgsi_parse_end_of_tokens(&parse
)) {
418 tgsi_parse_token(&parse
);
420 switch (parse
.FullToken
.Token
.Type
) {
421 case TGSI_TOKEN_TYPE_DECLARATION
:
424 case TGSI_TOKEN_TYPE_INSTRUCTION
:
426 struct tgsi_full_instruction
*inst
=
427 &parse
.FullToken
.FullInstruction
;
429 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_END
||
430 inst
->Instruction
.Opcode
== TGSI_OPCODE_BGNSUB
) {
431 /* We reached the end of main function body. */
435 analyse_instruction(&ctx
, inst
);
439 case TGSI_TOKEN_TYPE_IMMEDIATE
:
441 const unsigned size
=
442 parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
444 if (ctx
.num_imms
< Elements(ctx
.imm
)) {
445 for (chan
= 0; chan
< size
; ++chan
) {
446 float value
= parse
.FullToken
.FullImmediate
.u
[chan
].Float
;
447 ctx
.imm
[ctx
.num_imms
][chan
] = value
;
449 if (value
< 0.0f
|| value
> 1.0f
) {
450 info
->unclamped_immediates
= TRUE
;
458 case TGSI_TOKEN_TYPE_PROPERTY
:
467 tgsi_parse_free(&parse
);
471 * Link the output color values.
474 for (index
= 0; index
< PIPE_MAX_COLOR_BUFS
; ++index
) {
475 const struct lp_tgsi_channel_info null_output
[4];
476 info
->cbuf
[index
] = null_output
;
479 for (index
= 0; index
< info
->base
.num_outputs
; ++index
) {
480 unsigned semantic_name
= info
->base
.output_semantic_name
[index
];
481 unsigned semantic_index
= info
->base
.output_semantic_index
[index
];
482 if (semantic_name
== TGSI_SEMANTIC_COLOR
&&
483 semantic_index
< PIPE_MAX_COLOR_BUFS
) {
484 info
->cbuf
[semantic_index
] = info
->output
[index
];
488 if (gallivm_debug
& GALLIVM_DEBUG_TGSI
) {
489 dump_info(tokens
, info
);