2 * Copyright © 2014-2015 Broadcom
3 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "util/ralloc.h"
26 #include "glsl/nir/nir.h"
27 #include "glsl/nir/nir_builder.h"
28 #include "glsl/list.h"
29 #include "glsl/shader_enums.h"
31 #include "nir/tgsi_to_nir.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "tgsi/tgsi_dump.h"
34 #include "tgsi/tgsi_info.h"
35 #include "tgsi/tgsi_scan.h"
37 #define SWIZ(X, Y, Z, W) (unsigned[4]){ \
45 /** nir register containing this TGSI index. */
48 /** Offset (in vec4s) from the start of var for this TGSI index. */
53 union tgsi_full_token
*token
;
56 struct tgsi_shader_info
*scan
;
58 struct ttn_reg_info
*output_regs
;
59 struct ttn_reg_info
*temp_regs
;
60 nir_ssa_def
**imm_defs
;
62 nir_register
*addr_reg
;
65 * Stack of cf_node_lists where instructions should be pushed as we pop
66 * back out of the control flow stack.
68 * For each IF/ELSE/ENDIF block, if_stack[if_stack_pos] has where the else
69 * instructions should be placed, and if_stack[if_stack_pos - 1] has where
70 * the next instructions outside of the if/then/else block go.
72 struct exec_list
**if_stack
;
73 unsigned if_stack_pos
;
76 * Stack of cf_node_lists where instructions should be pushed as we pop
77 * back out of the control flow stack.
79 * loop_stack[loop_stack_pos - 1] contains the cf_node_list for the outside
82 struct exec_list
**loop_stack
;
83 unsigned loop_stack_pos
;
85 /* How many TGSI_FILE_IMMEDIATE vec4s have been parsed so far. */
89 #define ttn_swizzle(b, src, x, y, z, w) \
90 nir_swizzle(b, src, SWIZ(x, y, z, w), 4, false)
91 #define ttn_channel(b, src, swiz) \
92 nir_swizzle(b, src, SWIZ(swiz, swiz, swiz, swiz), 1, false)
95 ttn_src_for_dest(nir_builder
*b
, nir_alu_dest
*dest
)
98 memset(&src
, 0, sizeof(src
));
100 if (dest
->dest
.is_ssa
)
101 src
.src
= nir_src_for_ssa(&dest
->dest
.ssa
);
103 assert(!dest
->dest
.reg
.indirect
);
104 src
.src
= nir_src_for_reg(dest
->dest
.reg
.reg
);
105 src
.src
.reg
.base_offset
= dest
->dest
.reg
.base_offset
;
108 for (int i
= 0; i
< 4; i
++)
111 return nir_fmov_alu(b
, src
, 4);
115 ttn_emit_declaration(struct ttn_compile
*c
)
117 nir_builder
*b
= &c
->build
;
118 struct tgsi_full_declaration
*decl
= &c
->token
->FullDeclaration
;
119 unsigned array_size
= decl
->Range
.Last
- decl
->Range
.First
+ 1;
120 unsigned file
= decl
->Declaration
.File
;
123 if (file
== TGSI_FILE_TEMPORARY
) {
124 if (decl
->Declaration
.Array
) {
125 /* for arrays, we create variables instead of registers: */
126 nir_variable
*var
= rzalloc(b
->shader
, nir_variable
);
128 var
->type
= glsl_array_type(glsl_vec4_type(), array_size
);
129 var
->data
.mode
= nir_var_global
;
130 var
->name
= ralloc_asprintf(var
, "arr_%d", decl
->Array
.ArrayID
);
132 exec_list_push_tail(&b
->shader
->globals
, &var
->node
);
134 for (i
= 0; i
< array_size
; i
++) {
135 /* point all the matching slots to the same var,
136 * with appropriate offset set, mostly just so
137 * we know what to do when tgsi does a non-indirect
140 c
->temp_regs
[decl
->Range
.First
+ i
].reg
= NULL
;
141 c
->temp_regs
[decl
->Range
.First
+ i
].var
= var
;
142 c
->temp_regs
[decl
->Range
.First
+ i
].offset
= i
;
145 for (i
= 0; i
< array_size
; i
++) {
146 nir_register
*reg
= nir_local_reg_create(b
->impl
);
147 reg
->num_components
= 4;
148 c
->temp_regs
[decl
->Range
.First
+ i
].reg
= reg
;
149 c
->temp_regs
[decl
->Range
.First
+ i
].var
= NULL
;
150 c
->temp_regs
[decl
->Range
.First
+ i
].offset
= 0;
153 } else if (file
== TGSI_FILE_ADDRESS
) {
154 c
->addr_reg
= nir_local_reg_create(b
->impl
);
155 c
->addr_reg
->num_components
= 4;
156 } else if (file
== TGSI_FILE_SAMPLER
) {
157 /* Nothing to record for samplers. */
160 assert(file
== TGSI_FILE_INPUT
||
161 file
== TGSI_FILE_OUTPUT
||
162 file
== TGSI_FILE_CONSTANT
);
164 var
= rzalloc(b
->shader
, nir_variable
);
165 var
->data
.driver_location
= decl
->Range
.First
;
167 var
->type
= glsl_vec4_type();
169 var
->type
= glsl_array_type(var
->type
, array_size
);
172 case TGSI_FILE_INPUT
:
173 var
->data
.read_only
= true;
174 var
->data
.mode
= nir_var_shader_in
;
175 var
->name
= ralloc_asprintf(var
, "in_%d", decl
->Range
.First
);
177 /* We should probably translate to a VERT_ATTRIB_* or VARYING_SLOT_*
178 * instead, but nothing in NIR core is looking at the value
179 * currently, and this is less change to drivers.
181 var
->data
.location
= decl
->Semantic
.Name
;
182 var
->data
.index
= decl
->Semantic
.Index
;
184 /* We definitely need to translate the interpolation field, because
185 * nir_print will decode it.
187 switch (decl
->Interp
.Interpolate
) {
188 case TGSI_INTERPOLATE_CONSTANT
:
189 var
->data
.interpolation
= INTERP_QUALIFIER_FLAT
;
191 case TGSI_INTERPOLATE_LINEAR
:
192 var
->data
.interpolation
= INTERP_QUALIFIER_NOPERSPECTIVE
;
194 case TGSI_INTERPOLATE_PERSPECTIVE
:
195 var
->data
.interpolation
= INTERP_QUALIFIER_SMOOTH
;
199 exec_list_push_tail(&b
->shader
->inputs
, &var
->node
);
201 case TGSI_FILE_OUTPUT
: {
202 /* Since we can't load from outputs in the IR, we make temporaries
203 * for the outputs and emit stores to the real outputs at the end of
206 nir_register
*reg
= nir_local_reg_create(b
->impl
);
207 reg
->num_components
= 4;
209 reg
->num_array_elems
= array_size
;
211 var
->data
.mode
= nir_var_shader_out
;
212 var
->name
= ralloc_asprintf(var
, "out_%d", decl
->Range
.First
);
214 var
->data
.location
= decl
->Semantic
.Name
;
215 var
->data
.index
= decl
->Semantic
.Index
;
217 for (i
= 0; i
< array_size
; i
++) {
218 c
->output_regs
[decl
->Range
.First
+ i
].offset
= i
;
219 c
->output_regs
[decl
->Range
.First
+ i
].reg
= reg
;
222 exec_list_push_tail(&b
->shader
->outputs
, &var
->node
);
225 case TGSI_FILE_CONSTANT
:
226 var
->data
.mode
= nir_var_uniform
;
227 var
->name
= ralloc_asprintf(var
, "uniform_%d", decl
->Range
.First
);
229 exec_list_push_tail(&b
->shader
->uniforms
, &var
->node
);
232 unreachable("bad declaration file");
240 ttn_emit_immediate(struct ttn_compile
*c
)
242 nir_builder
*b
= &c
->build
;
243 struct tgsi_full_immediate
*tgsi_imm
= &c
->token
->FullImmediate
;
244 nir_load_const_instr
*load_const
;
247 load_const
= nir_load_const_instr_create(b
->shader
, 4);
248 c
->imm_defs
[c
->next_imm
] = &load_const
->def
;
251 for (i
= 0; i
< 4; i
++)
252 load_const
->value
.u
[i
] = tgsi_imm
->u
[i
].Uint
;
254 nir_instr_insert_after_cf_list(b
->cf_node_list
, &load_const
->instr
);
258 ttn_src_for_indirect(struct ttn_compile
*c
, struct tgsi_ind_register
*indirect
);
260 /* generate either a constant or indirect deref chain for accessing an
263 static nir_deref_var
*
264 ttn_array_deref(struct ttn_compile
*c
, nir_intrinsic_instr
*instr
,
265 nir_variable
*var
, unsigned offset
,
266 struct tgsi_ind_register
*indirect
)
268 nir_deref_var
*deref
= nir_deref_var_create(instr
, var
);
269 nir_deref_array
*arr
= nir_deref_array_create(deref
);
271 arr
->base_offset
= offset
;
272 arr
->deref
.type
= glsl_get_array_element(var
->type
);
275 arr
->deref_array_type
= nir_deref_array_type_indirect
;
276 arr
->indirect
= *ttn_src_for_indirect(c
, indirect
);
278 arr
->deref_array_type
= nir_deref_array_type_direct
;
281 deref
->deref
.child
= &arr
->deref
;
287 ttn_src_for_file_and_index(struct ttn_compile
*c
, unsigned file
, unsigned index
,
288 struct tgsi_ind_register
*indirect
)
290 nir_builder
*b
= &c
->build
;
293 memset(&src
, 0, sizeof(src
));
296 case TGSI_FILE_TEMPORARY
:
297 if (c
->temp_regs
[index
].var
) {
298 unsigned offset
= c
->temp_regs
[index
].offset
;
299 nir_variable
*var
= c
->temp_regs
[index
].var
;
300 nir_intrinsic_instr
*load
;
302 load
= nir_intrinsic_instr_create(b
->shader
,
303 nir_intrinsic_load_var
);
304 load
->num_components
= 4;
305 load
->variables
[0] = ttn_array_deref(c
, load
, var
, offset
, indirect
);
307 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 4, NULL
);
308 nir_instr_insert_after_cf_list(b
->cf_node_list
, &load
->instr
);
310 src
= nir_src_for_ssa(&load
->dest
.ssa
);
314 src
.reg
.reg
= c
->temp_regs
[index
].reg
;
318 case TGSI_FILE_ADDRESS
:
319 src
.reg
.reg
= c
->addr_reg
;
322 case TGSI_FILE_IMMEDIATE
:
323 src
= nir_src_for_ssa(c
->imm_defs
[index
]);
327 case TGSI_FILE_INPUT
:
328 case TGSI_FILE_CONSTANT
: {
329 nir_intrinsic_instr
*load
;
332 case TGSI_FILE_INPUT
:
333 load
= nir_intrinsic_instr_create(b
->shader
,
335 nir_intrinsic_load_input_indirect
:
336 nir_intrinsic_load_input
);
338 case TGSI_FILE_CONSTANT
:
339 load
= nir_intrinsic_instr_create(b
->shader
,
341 nir_intrinsic_load_uniform_indirect
:
342 nir_intrinsic_load_uniform
);
345 unreachable("No other load files supported");
349 load
->num_components
= 4;
350 load
->const_index
[0] = index
;
351 load
->const_index
[1] = 1;
353 nir_alu_src indirect_address
;
354 memset(&indirect_address
, 0, sizeof(indirect_address
));
355 indirect_address
.src
= nir_src_for_reg(c
->addr_reg
);
356 for (int i
= 0; i
< 4; i
++)
357 indirect_address
.swizzle
[i
] = indirect
->Swizzle
;
358 load
->src
[0] = nir_src_for_ssa(nir_imov_alu(b
, indirect_address
, 1));
360 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 4, NULL
);
361 nir_instr_insert_after_cf_list(b
->cf_node_list
, &load
->instr
);
363 src
= nir_src_for_ssa(&load
->dest
.ssa
);
368 unreachable("bad src file");
376 ttn_src_for_indirect(struct ttn_compile
*c
, struct tgsi_ind_register
*indirect
)
378 nir_builder
*b
= &c
->build
;
380 memset(&src
, 0, sizeof(src
));
381 for (int i
= 0; i
< 4; i
++)
382 src
.swizzle
[i
] = indirect
->Swizzle
;
383 src
.src
= ttn_src_for_file_and_index(c
,
385 indirect
->Index
, NULL
);
386 nir_src
*result
= ralloc(b
->shader
, nir_src
);
387 *result
= nir_src_for_ssa(nir_imov_alu(b
, src
, 1));
392 ttn_get_dest(struct ttn_compile
*c
, struct tgsi_full_dst_register
*tgsi_fdst
)
394 struct tgsi_dst_register
*tgsi_dst
= &tgsi_fdst
->Register
;
396 unsigned index
= tgsi_dst
->Index
;
398 memset(&dest
, 0, sizeof(dest
));
400 if (tgsi_dst
->File
== TGSI_FILE_TEMPORARY
) {
401 if (c
->temp_regs
[index
].var
) {
402 nir_builder
*b
= &c
->build
;
403 nir_intrinsic_instr
*load
;
404 struct tgsi_ind_register
*indirect
=
405 tgsi_dst
->Indirect
? &tgsi_fdst
->Indirect
: NULL
;
408 /* this works, because TGSI will give us a base offset
409 * (in case of indirect index) that points back into
410 * the array. Access can be direct or indirect, we
411 * don't really care. Just create a one-shot dst reg
412 * that will get store_var'd back into the array var
413 * at the end of ttn_emit_instruction()
415 reg
= nir_local_reg_create(c
->build
.impl
);
416 reg
->num_components
= 4;
417 dest
.dest
.reg
.reg
= reg
;
418 dest
.dest
.reg
.base_offset
= 0;
420 /* since the alu op might not write to all components
421 * of the temporary, we must first do a load_var to
422 * get the previous array elements into the register.
423 * This is one area that NIR could use a bit of
424 * improvement (or opt pass to clean up the mess
425 * once things are scalarized)
428 load
= nir_intrinsic_instr_create(c
->build
.shader
,
429 nir_intrinsic_load_var
);
430 load
->num_components
= 4;
432 ttn_array_deref(c
, load
, c
->temp_regs
[index
].var
,
433 c
->temp_regs
[index
].offset
,
436 load
->dest
= nir_dest_for_reg(reg
);
438 nir_instr_insert_after_cf_list(b
->cf_node_list
, &load
->instr
);
440 assert(!tgsi_dst
->Indirect
);
441 dest
.dest
.reg
.reg
= c
->temp_regs
[index
].reg
;
442 dest
.dest
.reg
.base_offset
= c
->temp_regs
[index
].offset
;
444 } else if (tgsi_dst
->File
== TGSI_FILE_OUTPUT
) {
445 dest
.dest
.reg
.reg
= c
->output_regs
[index
].reg
;
446 dest
.dest
.reg
.base_offset
= c
->output_regs
[index
].offset
;
447 } else if (tgsi_dst
->File
== TGSI_FILE_ADDRESS
) {
449 dest
.dest
.reg
.reg
= c
->addr_reg
;
452 dest
.write_mask
= tgsi_dst
->WriteMask
;
453 dest
.saturate
= false;
455 if (tgsi_dst
->Indirect
&& (tgsi_dst
->File
!= TGSI_FILE_TEMPORARY
))
456 dest
.dest
.reg
.indirect
= ttn_src_for_indirect(c
, &tgsi_fdst
->Indirect
);
461 static nir_variable
*
462 ttn_get_var(struct ttn_compile
*c
, struct tgsi_full_dst_register
*tgsi_fdst
)
464 struct tgsi_dst_register
*tgsi_dst
= &tgsi_fdst
->Register
;
465 unsigned index
= tgsi_dst
->Index
;
467 if (tgsi_dst
->File
== TGSI_FILE_TEMPORARY
) {
468 /* we should not have an indirect when there is no var! */
469 if (!c
->temp_regs
[index
].var
)
470 assert(!tgsi_dst
->Indirect
);
471 return c
->temp_regs
[index
].var
;
478 ttn_get_src(struct ttn_compile
*c
, struct tgsi_full_src_register
*tgsi_fsrc
)
480 nir_builder
*b
= &c
->build
;
481 struct tgsi_src_register
*tgsi_src
= &tgsi_fsrc
->Register
;
482 unsigned tgsi_opcode
= c
->token
->FullInstruction
.Instruction
.Opcode
;
483 unsigned tgsi_src_type
= tgsi_opcode_infer_src_type(tgsi_opcode
);
484 bool src_is_float
= !(tgsi_src_type
== TGSI_TYPE_SIGNED
||
485 tgsi_src_type
== TGSI_TYPE_UNSIGNED
);
488 memset(&src
, 0, sizeof(src
));
490 if (tgsi_src
->File
== TGSI_FILE_NULL
) {
491 return nir_imm_float(b
, 0.0);
492 } else if (tgsi_src
->File
== TGSI_FILE_SAMPLER
) {
493 /* Only the index of the sampler gets used in texturing, and it will
494 * handle looking that up on its own instead of using the nir_alu_src.
496 assert(!tgsi_src
->Indirect
);
499 src
.src
= ttn_src_for_file_and_index(c
,
502 (tgsi_src
->Indirect
?
503 &tgsi_fsrc
->Indirect
: NULL
));
506 src
.swizzle
[0] = tgsi_src
->SwizzleX
;
507 src
.swizzle
[1] = tgsi_src
->SwizzleY
;
508 src
.swizzle
[2] = tgsi_src
->SwizzleZ
;
509 src
.swizzle
[3] = tgsi_src
->SwizzleW
;
511 nir_ssa_def
*def
= nir_fmov_alu(b
, src
, 4);
513 if (tgsi_src
->Absolute
) {
515 def
= nir_fabs(b
, def
);
517 def
= nir_iabs(b
, def
);
520 if (tgsi_src
->Negate
) {
522 def
= nir_fneg(b
, def
);
524 def
= nir_ineg(b
, def
);
531 ttn_alu(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
533 unsigned num_srcs
= nir_op_infos
[op
].num_inputs
;
534 nir_alu_instr
*instr
= nir_alu_instr_create(b
->shader
, op
);
537 for (i
= 0; i
< num_srcs
; i
++)
538 instr
->src
[i
].src
= nir_src_for_ssa(src
[i
]);
541 nir_instr_insert_after_cf_list(b
->cf_node_list
, &instr
->instr
);
545 ttn_move_dest_masked(nir_builder
*b
, nir_alu_dest dest
,
546 nir_ssa_def
*def
, unsigned write_mask
)
548 if (!(dest
.write_mask
& write_mask
))
551 nir_alu_instr
*mov
= nir_alu_instr_create(b
->shader
, nir_op_imov
);
553 mov
->dest
.write_mask
&= write_mask
;
554 mov
->src
[0].src
= nir_src_for_ssa(def
);
555 for (unsigned i
= def
->num_components
; i
< 4; i
++)
556 mov
->src
[0].swizzle
[i
] = def
->num_components
- 1;
557 nir_instr_insert_after_cf_list(b
->cf_node_list
, &mov
->instr
);
561 ttn_move_dest(nir_builder
*b
, nir_alu_dest dest
, nir_ssa_def
*def
)
563 ttn_move_dest_masked(b
, dest
, def
, TGSI_WRITEMASK_XYZW
);
567 ttn_arl(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
569 ttn_move_dest(b
, dest
, nir_f2i(b
, nir_ffloor(b
, src
[0])));
572 /* EXP - Approximate Exponential Base 2
573 * dst.x = 2^{\lfloor src.x\rfloor}
574 * dst.y = src.x - \lfloor src.x\rfloor
579 ttn_exp(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
581 nir_ssa_def
*srcx
= ttn_channel(b
, src
[0], X
);
583 ttn_move_dest_masked(b
, dest
, nir_fexp2(b
, nir_ffloor(b
, srcx
)),
585 ttn_move_dest_masked(b
, dest
, nir_fsub(b
, srcx
, nir_ffloor(b
, srcx
)),
587 ttn_move_dest_masked(b
, dest
, nir_fexp2(b
, srcx
), TGSI_WRITEMASK_Z
);
588 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 1.0), TGSI_WRITEMASK_W
);
591 /* LOG - Approximate Logarithm Base 2
592 * dst.x = \lfloor\log_2{|src.x|}\rfloor
593 * dst.y = \frac{|src.x|}{2^{\lfloor\log_2{|src.x|}\rfloor}}
594 * dst.z = \log_2{|src.x|}
598 ttn_log(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
600 nir_ssa_def
*abs_srcx
= nir_fabs(b
, ttn_channel(b
, src
[0], X
));
601 nir_ssa_def
*log2
= nir_flog2(b
, abs_srcx
);
603 ttn_move_dest_masked(b
, dest
, nir_ffloor(b
, log2
), TGSI_WRITEMASK_X
);
604 ttn_move_dest_masked(b
, dest
,
605 nir_fdiv(b
, abs_srcx
, nir_fexp2(b
, nir_ffloor(b
, log2
))),
607 ttn_move_dest_masked(b
, dest
, nir_flog2(b
, abs_srcx
), TGSI_WRITEMASK_Z
);
608 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 1.0), TGSI_WRITEMASK_W
);
611 /* DST - Distance Vector
613 * dst.y = src0.y \times src1.y
618 ttn_dst(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
620 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 1.0), TGSI_WRITEMASK_X
);
621 ttn_move_dest_masked(b
, dest
, nir_fmul(b
, src
[0], src
[1]), TGSI_WRITEMASK_Y
);
622 ttn_move_dest_masked(b
, dest
, nir_fmov(b
, src
[0]), TGSI_WRITEMASK_Z
);
623 ttn_move_dest_masked(b
, dest
, nir_fmov(b
, src
[1]), TGSI_WRITEMASK_W
);
626 /* LIT - Light Coefficients
628 * dst.y = max(src.x, 0.0)
629 * dst.z = (src.x > 0.0) ? max(src.y, 0.0)^{clamp(src.w, -128.0, 128.0))} : 0
633 ttn_lit(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
635 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 1.0), TGSI_WRITEMASK_XW
);
637 ttn_move_dest_masked(b
, dest
, nir_fmax(b
, ttn_channel(b
, src
[0], X
),
638 nir_imm_float(b
, 0.0)), TGSI_WRITEMASK_Y
);
640 if (dest
.write_mask
& TGSI_WRITEMASK_Z
) {
641 nir_ssa_def
*src0_y
= ttn_channel(b
, src
[0], Y
);
642 nir_ssa_def
*wclamp
= nir_fmax(b
, nir_fmin(b
, ttn_channel(b
, src
[0], W
),
643 nir_imm_float(b
, 128.0)),
644 nir_imm_float(b
, -128.0));
645 nir_ssa_def
*pow
= nir_fpow(b
, nir_fmax(b
, src0_y
, nir_imm_float(b
, 0.0)),
648 ttn_move_dest_masked(b
, dest
,
651 nir_imm_float(b
, 0.0),
652 ttn_channel(b
, src
[0], X
)),
653 nir_imm_float(b
, 0.0),
660 * dst.x = \cos{src.x}
661 * dst.y = \sin{src.x}
666 ttn_scs(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
668 ttn_move_dest_masked(b
, dest
, nir_fcos(b
, ttn_channel(b
, src
[0], X
)),
670 ttn_move_dest_masked(b
, dest
, nir_fsin(b
, ttn_channel(b
, src
[0], X
)),
672 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 0.0), TGSI_WRITEMASK_Z
);
673 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 1.0), TGSI_WRITEMASK_W
);
677 ttn_sle(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
679 ttn_move_dest(b
, dest
, nir_sge(b
, src
[1], src
[0]));
683 ttn_sgt(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
685 ttn_move_dest(b
, dest
, nir_slt(b
, src
[1], src
[0]));
689 ttn_clamp(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
691 ttn_move_dest(b
, dest
, nir_fmin(b
, nir_fmax(b
, src
[0], src
[1]), src
[2]));
695 ttn_xpd(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
697 ttn_move_dest_masked(b
, dest
,
700 ttn_swizzle(b
, src
[0], Y
, Z
, X
, X
),
701 ttn_swizzle(b
, src
[1], Z
, X
, Y
, X
)),
703 ttn_swizzle(b
, src
[1], Y
, Z
, X
, X
),
704 ttn_swizzle(b
, src
[0], Z
, X
, Y
, X
))),
706 ttn_move_dest_masked(b
, dest
, nir_imm_float(b
, 1.0), TGSI_WRITEMASK_W
);
710 ttn_dp2a(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
712 ttn_move_dest(b
, dest
,
713 ttn_channel(b
, nir_fadd(b
, nir_fdot2(b
, src
[0], src
[1]),
719 ttn_dp2(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
721 ttn_move_dest(b
, dest
, nir_fdot2(b
, src
[0], src
[1]));
725 ttn_dp3(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
727 ttn_move_dest(b
, dest
, nir_fdot3(b
, src
[0], src
[1]));
731 ttn_dp4(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
733 ttn_move_dest(b
, dest
, nir_fdot4(b
, src
[0], src
[1]));
737 ttn_dph(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
739 ttn_move_dest(b
, dest
, nir_fadd(b
, nir_fdot3(b
, src
[0], src
[1]),
740 ttn_channel(b
, src
[1], W
)));
744 ttn_umad(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
746 ttn_move_dest(b
, dest
, nir_iadd(b
, nir_imul(b
, src
[0], src
[1]), src
[2]));
750 ttn_arr(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
752 ttn_move_dest(b
, dest
, nir_ffloor(b
, nir_fadd(b
, src
[0], nir_imm_float(b
, 0.5))));
756 ttn_cmp(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
758 ttn_move_dest(b
, dest
, nir_bcsel(b
,
759 nir_flt(b
, src
[0], nir_imm_float(b
, 0.0)),
764 ttn_ucmp(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
766 ttn_move_dest(b
, dest
, nir_bcsel(b
,
767 nir_ine(b
, src
[0], nir_imm_int(b
, 0)),
772 ttn_kill(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
774 nir_intrinsic_instr
*discard
=
775 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_discard
);
776 nir_instr_insert_after_cf_list(b
->cf_node_list
, &discard
->instr
);
780 ttn_kill_if(nir_builder
*b
, nir_op op
, nir_alu_dest dest
, nir_ssa_def
**src
)
782 nir_ssa_def
*cmp
= nir_bany4(b
, nir_flt(b
, src
[0], nir_imm_float(b
, 0.0)));
783 nir_intrinsic_instr
*discard
=
784 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_discard_if
);
785 discard
->src
[0] = nir_src_for_ssa(cmp
);
786 nir_instr_insert_after_cf_list(b
->cf_node_list
, &discard
->instr
);
790 ttn_if(struct ttn_compile
*c
, nir_ssa_def
*src
, bool is_uint
)
792 nir_builder
*b
= &c
->build
;
794 /* Save the outside-of-the-if-statement node list. */
795 c
->if_stack
[c
->if_stack_pos
] = b
->cf_node_list
;
798 src
= ttn_channel(b
, src
, X
);
800 nir_if
*if_stmt
= nir_if_create(b
->shader
);
802 if_stmt
->condition
= nir_src_for_ssa(nir_ine(b
, src
, nir_imm_int(b
, 0)));
804 if_stmt
->condition
= nir_src_for_ssa(nir_fne(b
, src
, nir_imm_int(b
, 0)));
806 nir_cf_node_insert_end(b
->cf_node_list
, &if_stmt
->cf_node
);
808 nir_builder_insert_after_cf_list(b
, &if_stmt
->then_list
);
810 c
->if_stack
[c
->if_stack_pos
] = &if_stmt
->else_list
;
815 ttn_else(struct ttn_compile
*c
)
817 nir_builder
*b
= &c
->build
;
819 nir_builder_insert_after_cf_list(b
, c
->if_stack
[c
->if_stack_pos
- 1]);
823 ttn_endif(struct ttn_compile
*c
)
825 nir_builder
*b
= &c
->build
;
827 c
->if_stack_pos
-= 2;
828 nir_builder_insert_after_cf_list(b
, c
->if_stack
[c
->if_stack_pos
]);
832 ttn_bgnloop(struct ttn_compile
*c
)
834 nir_builder
*b
= &c
->build
;
836 /* Save the outside-of-the-loop node list. */
837 c
->loop_stack
[c
->loop_stack_pos
] = b
->cf_node_list
;
840 nir_loop
*loop
= nir_loop_create(b
->shader
);
841 nir_cf_node_insert_end(b
->cf_node_list
, &loop
->cf_node
);
843 nir_builder_insert_after_cf_list(b
, &loop
->body
);
847 ttn_cont(nir_builder
*b
)
849 nir_jump_instr
*instr
= nir_jump_instr_create(b
->shader
, nir_jump_continue
);
850 nir_instr_insert_after_cf_list(b
->cf_node_list
, &instr
->instr
);
854 ttn_brk(nir_builder
*b
)
856 nir_jump_instr
*instr
= nir_jump_instr_create(b
->shader
, nir_jump_break
);
857 nir_instr_insert_after_cf_list(b
->cf_node_list
, &instr
->instr
);
861 ttn_endloop(struct ttn_compile
*c
)
863 nir_builder
*b
= &c
->build
;
866 nir_builder_insert_after_cf_list(b
, c
->loop_stack
[c
->loop_stack_pos
]);
870 ttn_tex(struct ttn_compile
*c
, nir_alu_dest dest
, nir_ssa_def
**src
)
872 nir_builder
*b
= &c
->build
;
873 struct tgsi_full_instruction
*tgsi_inst
= &c
->token
->FullInstruction
;
874 nir_tex_instr
*instr
;
878 switch (tgsi_inst
->Instruction
.Opcode
) {
879 case TGSI_OPCODE_TEX
:
883 case TGSI_OPCODE_TXP
:
887 case TGSI_OPCODE_TXB
:
891 case TGSI_OPCODE_TXL
:
895 case TGSI_OPCODE_TXF
:
899 case TGSI_OPCODE_TXD
:
904 fprintf(stderr
, "unknown TGSI tex op %d\n", tgsi_inst
->Instruction
.Opcode
);
908 if (tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOW1D
||
909 tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOW1D_ARRAY
||
910 tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOW2D
||
911 tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOW2D_ARRAY
||
912 tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWRECT
||
913 tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWCUBE
||
914 tgsi_inst
->Texture
.Texture
== TGSI_TEXTURE_SHADOWCUBE_ARRAY
) {
918 instr
= nir_tex_instr_create(b
->shader
, num_srcs
);
921 switch (tgsi_inst
->Texture
.Texture
) {
922 case TGSI_TEXTURE_1D
:
923 instr
->sampler_dim
= GLSL_SAMPLER_DIM_1D
;
925 case TGSI_TEXTURE_1D_ARRAY
:
926 instr
->sampler_dim
= GLSL_SAMPLER_DIM_1D
;
927 instr
->is_array
= true;
929 case TGSI_TEXTURE_SHADOW1D
:
930 instr
->sampler_dim
= GLSL_SAMPLER_DIM_1D
;
931 instr
->is_shadow
= true;
933 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
934 instr
->sampler_dim
= GLSL_SAMPLER_DIM_1D
;
935 instr
->is_shadow
= true;
936 instr
->is_array
= true;
938 case TGSI_TEXTURE_2D
:
939 instr
->sampler_dim
= GLSL_SAMPLER_DIM_2D
;
941 case TGSI_TEXTURE_2D_ARRAY
:
942 instr
->sampler_dim
= GLSL_SAMPLER_DIM_2D
;
943 instr
->is_array
= true;
945 case TGSI_TEXTURE_2D_MSAA
:
946 instr
->sampler_dim
= GLSL_SAMPLER_DIM_MS
;
948 case TGSI_TEXTURE_2D_ARRAY_MSAA
:
949 instr
->sampler_dim
= GLSL_SAMPLER_DIM_MS
;
950 instr
->is_array
= true;
952 case TGSI_TEXTURE_SHADOW2D
:
953 instr
->sampler_dim
= GLSL_SAMPLER_DIM_2D
;
954 instr
->is_shadow
= true;
956 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
957 instr
->sampler_dim
= GLSL_SAMPLER_DIM_2D
;
958 instr
->is_shadow
= true;
959 instr
->is_array
= true;
961 case TGSI_TEXTURE_3D
:
962 instr
->sampler_dim
= GLSL_SAMPLER_DIM_3D
;
964 case TGSI_TEXTURE_CUBE
:
965 instr
->sampler_dim
= GLSL_SAMPLER_DIM_CUBE
;
967 case TGSI_TEXTURE_CUBE_ARRAY
:
968 instr
->sampler_dim
= GLSL_SAMPLER_DIM_CUBE
;
969 instr
->is_array
= true;
971 case TGSI_TEXTURE_SHADOWCUBE
:
972 instr
->sampler_dim
= GLSL_SAMPLER_DIM_CUBE
;
973 instr
->is_shadow
= true;
975 case TGSI_TEXTURE_SHADOWCUBE_ARRAY
:
976 instr
->sampler_dim
= GLSL_SAMPLER_DIM_CUBE
;
977 instr
->is_shadow
= true;
978 instr
->is_array
= true;
980 case TGSI_TEXTURE_RECT
:
981 instr
->sampler_dim
= GLSL_SAMPLER_DIM_RECT
;
983 case TGSI_TEXTURE_SHADOWRECT
:
984 instr
->sampler_dim
= GLSL_SAMPLER_DIM_RECT
;
985 instr
->is_shadow
= true;
988 fprintf(stderr
, "Unknown TGSI texture target %d\n",
989 tgsi_inst
->Texture
.Texture
);
993 switch (instr
->sampler_dim
) {
994 case GLSL_SAMPLER_DIM_1D
:
995 case GLSL_SAMPLER_DIM_BUF
:
996 instr
->coord_components
= 1;
998 case GLSL_SAMPLER_DIM_2D
:
999 case GLSL_SAMPLER_DIM_RECT
:
1000 case GLSL_SAMPLER_DIM_EXTERNAL
:
1001 case GLSL_SAMPLER_DIM_MS
:
1002 instr
->coord_components
= 2;
1004 case GLSL_SAMPLER_DIM_3D
:
1005 case GLSL_SAMPLER_DIM_CUBE
:
1006 instr
->coord_components
= 3;
1010 if (instr
->is_array
)
1011 instr
->coord_components
++;
1013 assert(tgsi_inst
->Src
[1].Register
.File
== TGSI_FILE_SAMPLER
);
1014 instr
->sampler_index
= tgsi_inst
->Src
[1].Register
.Index
;
1016 unsigned src_number
= 0;
1018 if (tgsi_inst
->Instruction
.Opcode
!= TGSI_OPCODE_TXQ
) {
1019 instr
->src
[src_number
].src
=
1020 nir_src_for_ssa(nir_swizzle(b
, src
[0], SWIZ(X
, Y
, Z
, W
),
1021 instr
->coord_components
, false));
1022 instr
->src
[src_number
].src_type
= nir_tex_src_coord
;
1026 if (tgsi_inst
->Instruction
.Opcode
== TGSI_OPCODE_TXP
) {
1027 instr
->src
[src_number
].src
= nir_src_for_ssa(ttn_channel(b
, src
[0], W
));
1028 instr
->src
[src_number
].src_type
= nir_tex_src_projector
;
1032 if (tgsi_inst
->Instruction
.Opcode
== TGSI_OPCODE_TXB
) {
1033 instr
->src
[src_number
].src
= nir_src_for_ssa(ttn_channel(b
, src
[0], W
));
1034 instr
->src
[src_number
].src_type
= nir_tex_src_bias
;
1038 if (tgsi_inst
->Instruction
.Opcode
== TGSI_OPCODE_TXL
) {
1039 instr
->src
[src_number
].src
= nir_src_for_ssa(ttn_channel(b
, src
[0], W
));
1040 instr
->src
[src_number
].src_type
= nir_tex_src_lod
;
1044 if (instr
->is_shadow
) {
1045 if (instr
->coord_components
< 3)
1046 instr
->src
[src_number
].src
= nir_src_for_ssa(ttn_channel(b
, src
[0], Z
));
1048 instr
->src
[src_number
].src
= nir_src_for_ssa(ttn_channel(b
, src
[0], W
));
1050 instr
->src
[src_number
].src_type
= nir_tex_src_comparitor
;
1054 assert(src_number
== num_srcs
);
1056 nir_ssa_dest_init(&instr
->instr
, &instr
->dest
, 4, NULL
);
1057 nir_instr_insert_after_cf_list(b
->cf_node_list
, &instr
->instr
);
1059 /* Resolve the writemask on the texture op. */
1060 ttn_move_dest(b
, dest
, &instr
->dest
.ssa
);
1063 static const nir_op op_trans
[TGSI_OPCODE_LAST
] = {
1064 [TGSI_OPCODE_ARL
] = 0,
1065 [TGSI_OPCODE_MOV
] = nir_op_fmov
,
1066 [TGSI_OPCODE_LIT
] = 0,
1067 [TGSI_OPCODE_RCP
] = nir_op_frcp
,
1068 [TGSI_OPCODE_RSQ
] = nir_op_frsq
,
1069 [TGSI_OPCODE_EXP
] = 0,
1070 [TGSI_OPCODE_LOG
] = 0,
1071 [TGSI_OPCODE_MUL
] = nir_op_fmul
,
1072 [TGSI_OPCODE_ADD
] = nir_op_fadd
,
1073 [TGSI_OPCODE_DP3
] = 0,
1074 [TGSI_OPCODE_DP4
] = 0,
1075 [TGSI_OPCODE_DST
] = 0,
1076 [TGSI_OPCODE_MIN
] = nir_op_fmin
,
1077 [TGSI_OPCODE_MAX
] = nir_op_fmax
,
1078 [TGSI_OPCODE_SLT
] = nir_op_slt
,
1079 [TGSI_OPCODE_SGE
] = nir_op_sge
,
1080 [TGSI_OPCODE_MAD
] = nir_op_ffma
,
1081 [TGSI_OPCODE_SUB
] = nir_op_fsub
,
1082 [TGSI_OPCODE_LRP
] = 0,
1083 [TGSI_OPCODE_SQRT
] = nir_op_fsqrt
,
1084 [TGSI_OPCODE_DP2A
] = 0,
1085 [TGSI_OPCODE_FRC
] = nir_op_ffract
,
1086 [TGSI_OPCODE_CLAMP
] = 0,
1087 [TGSI_OPCODE_FLR
] = nir_op_ffloor
,
1088 [TGSI_OPCODE_ROUND
] = nir_op_fround_even
,
1089 [TGSI_OPCODE_EX2
] = nir_op_fexp2
,
1090 [TGSI_OPCODE_LG2
] = nir_op_flog2
,
1091 [TGSI_OPCODE_POW
] = nir_op_fpow
,
1092 [TGSI_OPCODE_XPD
] = 0,
1093 [TGSI_OPCODE_ABS
] = nir_op_fabs
,
1094 [TGSI_OPCODE_DPH
] = 0,
1095 [TGSI_OPCODE_COS
] = nir_op_fcos
,
1096 [TGSI_OPCODE_DDX
] = nir_op_fddx
,
1097 [TGSI_OPCODE_DDY
] = nir_op_fddy
,
1098 [TGSI_OPCODE_KILL
] = 0,
1099 [TGSI_OPCODE_PK2H
] = 0, /* XXX */
1100 [TGSI_OPCODE_PK2US
] = 0, /* XXX */
1101 [TGSI_OPCODE_PK4B
] = 0, /* XXX */
1102 [TGSI_OPCODE_PK4UB
] = 0, /* XXX */
1103 [TGSI_OPCODE_SEQ
] = nir_op_seq
,
1104 [TGSI_OPCODE_SGT
] = 0,
1105 [TGSI_OPCODE_SIN
] = nir_op_fsin
,
1106 [TGSI_OPCODE_SLE
] = 0,
1107 [TGSI_OPCODE_TEX
] = 0,
1108 [TGSI_OPCODE_TXD
] = 0,
1109 [TGSI_OPCODE_TXP
] = 0,
1110 [TGSI_OPCODE_UP2H
] = 0, /* XXX */
1111 [TGSI_OPCODE_UP2US
] = 0, /* XXX */
1112 [TGSI_OPCODE_UP4B
] = 0, /* XXX */
1113 [TGSI_OPCODE_UP4UB
] = 0, /* XXX */
1114 [TGSI_OPCODE_ARR
] = 0,
1116 /* No function calls, yet. */
1117 [TGSI_OPCODE_CAL
] = 0, /* XXX */
1118 [TGSI_OPCODE_RET
] = 0, /* XXX */
1120 [TGSI_OPCODE_SSG
] = nir_op_fsign
,
1121 [TGSI_OPCODE_CMP
] = 0,
1122 [TGSI_OPCODE_SCS
] = 0,
1123 [TGSI_OPCODE_TXB
] = 0,
1124 [TGSI_OPCODE_DIV
] = nir_op_fdiv
,
1125 [TGSI_OPCODE_DP2
] = 0,
1126 [TGSI_OPCODE_DP2A
] = 0,
1127 [TGSI_OPCODE_TXL
] = 0,
1129 [TGSI_OPCODE_BRK
] = 0,
1130 [TGSI_OPCODE_IF
] = 0,
1131 [TGSI_OPCODE_UIF
] = 0,
1132 [TGSI_OPCODE_ELSE
] = 0,
1133 [TGSI_OPCODE_ENDIF
] = 0,
1135 [TGSI_OPCODE_DDX_FINE
] = nir_op_fddx_fine
,
1136 [TGSI_OPCODE_DDY_FINE
] = nir_op_fddy_fine
,
1138 [TGSI_OPCODE_PUSHA
] = 0, /* XXX */
1139 [TGSI_OPCODE_POPA
] = 0, /* XXX */
1141 [TGSI_OPCODE_CEIL
] = nir_op_fceil
,
1142 [TGSI_OPCODE_I2F
] = nir_op_i2f
,
1143 [TGSI_OPCODE_NOT
] = nir_op_inot
,
1144 [TGSI_OPCODE_TRUNC
] = nir_op_ftrunc
,
1145 [TGSI_OPCODE_SHL
] = nir_op_ishl
,
1146 [TGSI_OPCODE_AND
] = nir_op_iand
,
1147 [TGSI_OPCODE_OR
] = nir_op_ior
,
1148 [TGSI_OPCODE_MOD
] = nir_op_umod
,
1149 [TGSI_OPCODE_XOR
] = nir_op_ixor
,
1150 [TGSI_OPCODE_SAD
] = 0, /* XXX */
1151 [TGSI_OPCODE_TXF
] = 0,
1152 [TGSI_OPCODE_TXQ
] = 0,
1154 [TGSI_OPCODE_CONT
] = 0,
1156 [TGSI_OPCODE_EMIT
] = 0, /* XXX */
1157 [TGSI_OPCODE_ENDPRIM
] = 0, /* XXX */
1159 [TGSI_OPCODE_BGNLOOP
] = 0,
1160 [TGSI_OPCODE_BGNSUB
] = 0, /* XXX: no function calls */
1161 [TGSI_OPCODE_ENDLOOP
] = 0,
1162 [TGSI_OPCODE_ENDSUB
] = 0, /* XXX: no function calls */
1164 [TGSI_OPCODE_TXQ_LZ
] = 0,
1165 [TGSI_OPCODE_NOP
] = 0,
1166 [TGSI_OPCODE_FSEQ
] = nir_op_feq
,
1167 [TGSI_OPCODE_FSGE
] = nir_op_fge
,
1168 [TGSI_OPCODE_FSLT
] = nir_op_flt
,
1169 [TGSI_OPCODE_FSNE
] = nir_op_fne
,
1171 /* No control flow yet */
1172 [TGSI_OPCODE_CALLNZ
] = 0, /* XXX */
1173 [TGSI_OPCODE_BREAKC
] = 0, /* not emitted by glsl_to_tgsi.cpp */
1175 [TGSI_OPCODE_KILL_IF
] = 0,
1177 [TGSI_OPCODE_END
] = 0,
1179 [TGSI_OPCODE_F2I
] = nir_op_f2i
,
1180 [TGSI_OPCODE_IDIV
] = nir_op_idiv
,
1181 [TGSI_OPCODE_IMAX
] = nir_op_imax
,
1182 [TGSI_OPCODE_IMIN
] = nir_op_imin
,
1183 [TGSI_OPCODE_INEG
] = nir_op_ineg
,
1184 [TGSI_OPCODE_ISGE
] = nir_op_ige
,
1185 [TGSI_OPCODE_ISHR
] = nir_op_ishr
,
1186 [TGSI_OPCODE_ISLT
] = nir_op_ilt
,
1187 [TGSI_OPCODE_F2U
] = nir_op_f2u
,
1188 [TGSI_OPCODE_U2F
] = nir_op_u2f
,
1189 [TGSI_OPCODE_UADD
] = nir_op_iadd
,
1190 [TGSI_OPCODE_UDIV
] = nir_op_udiv
,
1191 [TGSI_OPCODE_UMAD
] = 0,
1192 [TGSI_OPCODE_UMAX
] = nir_op_umax
,
1193 [TGSI_OPCODE_UMIN
] = nir_op_umin
,
1194 [TGSI_OPCODE_UMOD
] = nir_op_umod
,
1195 [TGSI_OPCODE_UMUL
] = nir_op_imul
,
1196 [TGSI_OPCODE_USEQ
] = nir_op_ieq
,
1197 [TGSI_OPCODE_USGE
] = nir_op_uge
,
1198 [TGSI_OPCODE_USHR
] = nir_op_ushr
,
1199 [TGSI_OPCODE_USLT
] = nir_op_ult
,
1200 [TGSI_OPCODE_USNE
] = nir_op_ine
,
1202 [TGSI_OPCODE_SWITCH
] = 0, /* not emitted by glsl_to_tgsi.cpp */
1203 [TGSI_OPCODE_CASE
] = 0, /* not emitted by glsl_to_tgsi.cpp */
1204 [TGSI_OPCODE_DEFAULT
] = 0, /* not emitted by glsl_to_tgsi.cpp */
1205 [TGSI_OPCODE_ENDSWITCH
] = 0, /* not emitted by glsl_to_tgsi.cpp */
1207 /* XXX: SAMPLE opcodes */
1209 [TGSI_OPCODE_UARL
] = nir_op_imov
,
1210 [TGSI_OPCODE_UCMP
] = 0,
1211 [TGSI_OPCODE_IABS
] = nir_op_iabs
,
1212 [TGSI_OPCODE_ISSG
] = nir_op_isign
,
1216 [TGSI_OPCODE_TEX2
] = 0,
1217 [TGSI_OPCODE_TXB2
] = 0,
1218 [TGSI_OPCODE_TXL2
] = 0,
1220 [TGSI_OPCODE_IMUL_HI
] = nir_op_imul_high
,
1221 [TGSI_OPCODE_UMUL_HI
] = nir_op_umul_high
,
1223 [TGSI_OPCODE_TG4
] = 0,
1224 [TGSI_OPCODE_LODQ
] = 0, /* XXX */
1226 [TGSI_OPCODE_IBFE
] = nir_op_ibitfield_extract
,
1227 [TGSI_OPCODE_UBFE
] = nir_op_ubitfield_extract
,
1228 [TGSI_OPCODE_BFI
] = nir_op_bitfield_insert
,
1229 [TGSI_OPCODE_BREV
] = nir_op_bitfield_reverse
,
1230 [TGSI_OPCODE_POPC
] = nir_op_bit_count
,
1231 [TGSI_OPCODE_LSB
] = nir_op_find_lsb
,
1232 [TGSI_OPCODE_IMSB
] = nir_op_ifind_msb
,
1233 [TGSI_OPCODE_UMSB
] = nir_op_ifind_msb
, /* XXX: signed vs unsigned */
1235 [TGSI_OPCODE_INTERP_CENTROID
] = 0, /* XXX */
1236 [TGSI_OPCODE_INTERP_SAMPLE
] = 0, /* XXX */
1237 [TGSI_OPCODE_INTERP_OFFSET
] = 0, /* XXX */
1241 ttn_emit_instruction(struct ttn_compile
*c
)
1243 nir_builder
*b
= &c
->build
;
1244 struct tgsi_full_instruction
*tgsi_inst
= &c
->token
->FullInstruction
;
1246 unsigned tgsi_op
= tgsi_inst
->Instruction
.Opcode
;
1247 struct tgsi_full_dst_register
*tgsi_dst
= &tgsi_inst
->Dst
[0];
1249 if (tgsi_op
== TGSI_OPCODE_END
)
1252 nir_ssa_def
*src
[TGSI_FULL_MAX_SRC_REGISTERS
];
1253 for (i
= 0; i
< TGSI_FULL_MAX_SRC_REGISTERS
; i
++) {
1254 src
[i
] = ttn_get_src(c
, &tgsi_inst
->Src
[i
]);
1256 nir_alu_dest dest
= ttn_get_dest(c
, tgsi_dst
);
1259 case TGSI_OPCODE_RSQ
:
1260 ttn_move_dest(b
, dest
, nir_frsq(b
, ttn_channel(b
, src
[0], X
)));
1263 case TGSI_OPCODE_SQRT
:
1264 ttn_move_dest(b
, dest
, nir_fsqrt(b
, ttn_channel(b
, src
[0], X
)));
1267 case TGSI_OPCODE_RCP
:
1268 ttn_move_dest(b
, dest
, nir_frcp(b
, ttn_channel(b
, src
[0], X
)));
1271 case TGSI_OPCODE_EX2
:
1272 ttn_move_dest(b
, dest
, nir_fexp2(b
, ttn_channel(b
, src
[0], X
)));
1275 case TGSI_OPCODE_LG2
:
1276 ttn_move_dest(b
, dest
, nir_flog2(b
, ttn_channel(b
, src
[0], X
)));
1279 case TGSI_OPCODE_POW
:
1280 ttn_move_dest(b
, dest
, nir_fpow(b
,
1281 ttn_channel(b
, src
[0], X
),
1282 ttn_channel(b
, src
[1], X
)));
1285 case TGSI_OPCODE_COS
:
1286 ttn_move_dest(b
, dest
, nir_fcos(b
, ttn_channel(b
, src
[0], X
)));
1289 case TGSI_OPCODE_SIN
:
1290 ttn_move_dest(b
, dest
, nir_fsin(b
, ttn_channel(b
, src
[0], X
)));
1293 case TGSI_OPCODE_ARL
:
1294 ttn_arl(b
, op_trans
[tgsi_op
], dest
, src
);
1297 case TGSI_OPCODE_EXP
:
1298 ttn_exp(b
, op_trans
[tgsi_op
], dest
, src
);
1301 case TGSI_OPCODE_LOG
:
1302 ttn_log(b
, op_trans
[tgsi_op
], dest
, src
);
1305 case TGSI_OPCODE_DST
:
1306 ttn_dst(b
, op_trans
[tgsi_op
], dest
, src
);
1309 case TGSI_OPCODE_LIT
:
1310 ttn_lit(b
, op_trans
[tgsi_op
], dest
, src
);
1313 case TGSI_OPCODE_CLAMP
:
1314 ttn_clamp(b
, op_trans
[tgsi_op
], dest
, src
);
1317 case TGSI_OPCODE_XPD
:
1318 ttn_xpd(b
, op_trans
[tgsi_op
], dest
, src
);
1321 case TGSI_OPCODE_DP2
:
1322 ttn_dp2(b
, op_trans
[tgsi_op
], dest
, src
);
1325 case TGSI_OPCODE_DP3
:
1326 ttn_dp3(b
, op_trans
[tgsi_op
], dest
, src
);
1329 case TGSI_OPCODE_DP4
:
1330 ttn_dp4(b
, op_trans
[tgsi_op
], dest
, src
);
1333 case TGSI_OPCODE_DP2A
:
1334 ttn_dp2a(b
, op_trans
[tgsi_op
], dest
, src
);
1337 case TGSI_OPCODE_DPH
:
1338 ttn_dph(b
, op_trans
[tgsi_op
], dest
, src
);
1341 case TGSI_OPCODE_UMAD
:
1342 ttn_umad(b
, op_trans
[tgsi_op
], dest
, src
);
1345 case TGSI_OPCODE_LRP
:
1346 ttn_move_dest(b
, dest
, nir_flrp(b
, src
[2], src
[1], src
[0]));
1349 case TGSI_OPCODE_KILL
:
1350 ttn_kill(b
, op_trans
[tgsi_op
], dest
, src
);
1353 case TGSI_OPCODE_ARR
:
1354 ttn_arr(b
, op_trans
[tgsi_op
], dest
, src
);
1357 case TGSI_OPCODE_CMP
:
1358 ttn_cmp(b
, op_trans
[tgsi_op
], dest
, src
);
1361 case TGSI_OPCODE_UCMP
:
1362 ttn_ucmp(b
, op_trans
[tgsi_op
], dest
, src
);
1365 case TGSI_OPCODE_SCS
:
1366 ttn_scs(b
, op_trans
[tgsi_op
], dest
, src
);
1369 case TGSI_OPCODE_SGT
:
1370 ttn_sgt(b
, op_trans
[tgsi_op
], dest
, src
);
1373 case TGSI_OPCODE_SLE
:
1374 ttn_sle(b
, op_trans
[tgsi_op
], dest
, src
);
1377 case TGSI_OPCODE_KILL_IF
:
1378 ttn_kill_if(b
, op_trans
[tgsi_op
], dest
, src
);
1381 case TGSI_OPCODE_TEX
:
1382 case TGSI_OPCODE_TXP
:
1383 case TGSI_OPCODE_TXL
:
1384 case TGSI_OPCODE_TXB
:
1385 case TGSI_OPCODE_TXD
:
1386 case TGSI_OPCODE_TXQ
:
1387 case TGSI_OPCODE_TXL2
:
1388 case TGSI_OPCODE_TXB2
:
1389 case TGSI_OPCODE_TXQ_LZ
:
1390 case TGSI_OPCODE_TXF
:
1391 case TGSI_OPCODE_TG4
:
1392 ttn_tex(c
, dest
, src
);
1395 case TGSI_OPCODE_NOP
:
1398 case TGSI_OPCODE_IF
:
1399 ttn_if(c
, src
[0], false);
1402 case TGSI_OPCODE_UIF
:
1403 ttn_if(c
, src
[0], true);
1406 case TGSI_OPCODE_ELSE
:
1410 case TGSI_OPCODE_ENDIF
:
1414 case TGSI_OPCODE_BGNLOOP
:
1418 case TGSI_OPCODE_BRK
:
1422 case TGSI_OPCODE_CONT
:
1426 case TGSI_OPCODE_ENDLOOP
:
1431 if (op_trans
[tgsi_op
] != 0 || tgsi_op
== TGSI_OPCODE_MOV
) {
1432 ttn_alu(b
, op_trans
[tgsi_op
], dest
, src
);
1434 fprintf(stderr
, "unknown TGSI opcode: %s\n",
1435 tgsi_get_opcode_name(tgsi_op
));
1441 if (tgsi_inst
->Instruction
.Saturate
) {
1442 assert(tgsi_inst
->Instruction
.Saturate
== TGSI_SAT_ZERO_ONE
);
1443 assert(!dest
.dest
.is_ssa
);
1444 ttn_move_dest(b
, dest
, nir_fsat(b
, ttn_src_for_dest(b
, &dest
)));
1447 /* if the dst has a matching var, append store_global to move
1448 * output from reg to var
1450 nir_variable
*var
= ttn_get_var(c
, tgsi_dst
);
1452 unsigned index
= tgsi_dst
->Register
.Index
;
1453 unsigned offset
= c
->temp_regs
[index
].offset
;
1454 nir_intrinsic_instr
*store
=
1455 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_store_var
);
1456 struct tgsi_ind_register
*indirect
= tgsi_dst
->Register
.Indirect
?
1457 &tgsi_dst
->Indirect
: NULL
;
1459 store
->num_components
= 4;
1460 store
->variables
[0] = ttn_array_deref(c
, store
, var
, offset
, indirect
);
1461 store
->src
[0] = nir_src_for_reg(dest
.dest
.reg
.reg
);
1463 nir_instr_insert_after_cf_list(b
->cf_node_list
, &store
->instr
);
1468 * Puts a NIR intrinsic to store of each TGSI_FILE_OUTPUT value to the output
1469 * variables at the end of the shader.
1471 * We don't generate these incrementally as the TGSI_FILE_OUTPUT values are
1472 * written, because there's no output load intrinsic, which means we couldn't
1473 * handle writemasks.
1476 ttn_add_output_stores(struct ttn_compile
*c
)
1478 nir_builder
*b
= &c
->build
;
1480 foreach_list_typed(nir_variable
, var
, node
, &b
->shader
->outputs
) {
1481 unsigned array_len
= MAX2(glsl_get_length(var
->type
), 1);
1484 for (i
= 0; i
< array_len
; i
++) {
1485 nir_intrinsic_instr
*store
=
1486 nir_intrinsic_instr_create(b
->shader
, nir_intrinsic_store_output
);
1487 store
->num_components
= 4;
1488 store
->const_index
[0] = var
->data
.driver_location
+ i
;
1489 store
->const_index
[1] = 1;
1490 store
->src
[0].reg
.reg
= c
->output_regs
[var
->data
.driver_location
].reg
;
1491 nir_instr_insert_after_cf_list(b
->cf_node_list
, &store
->instr
);
1497 tgsi_to_nir(const void *tgsi_tokens
,
1498 const nir_shader_compiler_options
*options
)
1500 struct tgsi_parse_context parser
;
1501 struct tgsi_shader_info scan
;
1502 struct ttn_compile
*c
;
1503 struct nir_shader
*s
;
1506 c
= rzalloc(NULL
, struct ttn_compile
);
1507 s
= nir_shader_create(NULL
, options
);
1509 nir_function
*func
= nir_function_create(s
, "main");
1510 nir_function_overload
*overload
= nir_function_overload_create(func
);
1511 nir_function_impl
*impl
= nir_function_impl_create(overload
);
1513 nir_builder_init(&c
->build
, impl
);
1514 nir_builder_insert_after_cf_list(&c
->build
, &impl
->body
);
1516 tgsi_scan_shader(tgsi_tokens
, &scan
);
1519 s
->num_inputs
= scan
.file_max
[TGSI_FILE_INPUT
] + 1;
1520 s
->num_uniforms
= scan
.file_max
[TGSI_FILE_CONSTANT
] + 1;
1521 s
->num_outputs
= scan
.file_max
[TGSI_FILE_OUTPUT
] + 1;
1523 c
->output_regs
= rzalloc_array(c
, struct ttn_reg_info
,
1524 scan
.file_max
[TGSI_FILE_OUTPUT
] + 1);
1525 c
->temp_regs
= rzalloc_array(c
, struct ttn_reg_info
,
1526 scan
.file_max
[TGSI_FILE_TEMPORARY
] + 1);
1527 c
->imm_defs
= rzalloc_array(c
, nir_ssa_def
*,
1528 scan
.file_max
[TGSI_FILE_IMMEDIATE
] + 1);
1530 c
->if_stack
= rzalloc_array(c
, struct exec_list
*,
1531 (scan
.opcode_count
[TGSI_OPCODE_IF
] +
1532 scan
.opcode_count
[TGSI_OPCODE_UIF
]) * 2);
1533 c
->loop_stack
= rzalloc_array(c
, struct exec_list
*,
1534 scan
.opcode_count
[TGSI_OPCODE_BGNLOOP
]);
1536 ret
= tgsi_parse_init(&parser
, tgsi_tokens
);
1537 assert(ret
== TGSI_PARSE_OK
);
1539 while (!tgsi_parse_end_of_tokens(&parser
)) {
1540 tgsi_parse_token(&parser
);
1541 c
->token
= &parser
.FullToken
;
1543 switch (parser
.FullToken
.Token
.Type
) {
1544 case TGSI_TOKEN_TYPE_DECLARATION
:
1545 ttn_emit_declaration(c
);
1548 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1549 ttn_emit_instruction(c
);
1552 case TGSI_TOKEN_TYPE_IMMEDIATE
:
1553 ttn_emit_immediate(c
);
1558 tgsi_parse_free(&parser
);
1560 ttn_add_output_stores(c
);