gallium/ttn: minor cleanup
[mesa.git] / src / gallium / auxiliary / nir / tgsi_to_nir.c
1 /*
2 * Copyright © 2014-2015 Broadcom
3 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "util/ralloc.h"
26 #include "glsl/nir/nir.h"
27 #include "glsl/nir/nir_builder.h"
28 #include "glsl/list.h"
29 #include "glsl/shader_enums.h"
30
31 #include "nir/tgsi_to_nir.h"
32 #include "tgsi/tgsi_parse.h"
33 #include "tgsi/tgsi_dump.h"
34 #include "tgsi/tgsi_info.h"
35 #include "tgsi/tgsi_scan.h"
36
37 #define SWIZ(X, Y, Z, W) (unsigned[4]){ \
38 TGSI_SWIZZLE_##X, \
39 TGSI_SWIZZLE_##Y, \
40 TGSI_SWIZZLE_##Z, \
41 TGSI_SWIZZLE_##W, \
42 }
43
44 struct ttn_reg_info {
45 /** nir register containing this TGSI index. */
46 nir_register *reg;
47 /** Offset (in vec4s) from the start of var for this TGSI index. */
48 int offset;
49 };
50
51 struct ttn_compile {
52 union tgsi_full_token *token;
53 nir_builder build;
54 struct nir_shader *s;
55 struct tgsi_shader_info *scan;
56
57 struct ttn_reg_info *output_regs;
58 struct ttn_reg_info *temp_regs;
59 nir_ssa_def **imm_defs;
60
61 nir_register *addr_reg;
62
63 /**
64 * Stack of cf_node_lists where instructions should be pushed as we pop
65 * back out of the control flow stack.
66 *
67 * For each IF/ELSE/ENDIF block, if_stack[if_stack_pos] has where the else
68 * instructions should be placed, and if_stack[if_stack_pos - 1] has where
69 * the next instructions outside of the if/then/else block go.
70 */
71 struct exec_list **if_stack;
72 unsigned if_stack_pos;
73
74 /**
75 * Stack of cf_node_lists where instructions should be pushed as we pop
76 * back out of the control flow stack.
77 *
78 * loop_stack[loop_stack_pos - 1] contains the cf_node_list for the outside
79 * of the loop.
80 */
81 struct exec_list **loop_stack;
82 unsigned loop_stack_pos;
83
84 /* How many TGSI_FILE_IMMEDIATE vec4s have been parsed so far. */
85 unsigned next_imm;
86 };
87
88 #define ttn_swizzle(b, src, x, y, z, w) \
89 nir_swizzle(b, src, SWIZ(x, y, z, w), 4, false)
90 #define ttn_channel(b, src, swiz) \
91 nir_swizzle(b, src, SWIZ(swiz, swiz, swiz, swiz), 1, false)
92
93 static nir_ssa_def *
94 ttn_src_for_dest(nir_builder *b, nir_alu_dest *dest)
95 {
96 nir_alu_src src;
97 memset(&src, 0, sizeof(src));
98
99 if (dest->dest.is_ssa)
100 src.src = nir_src_for_ssa(&dest->dest.ssa);
101 else {
102 assert(!dest->dest.reg.indirect);
103 src.src = nir_src_for_reg(dest->dest.reg.reg);
104 src.src.reg.base_offset = dest->dest.reg.base_offset;
105 }
106
107 for (int i = 0; i < 4; i++)
108 src.swizzle[i] = i;
109
110 return nir_fmov_alu(b, src, 4);
111 }
112
113 static void
114 ttn_emit_declaration(struct ttn_compile *c)
115 {
116 nir_builder *b = &c->build;
117 struct tgsi_full_declaration *decl = &c->token->FullDeclaration;
118 unsigned array_size = decl->Range.Last - decl->Range.First + 1;
119 unsigned file = decl->Declaration.File;
120 unsigned i;
121
122 if (file == TGSI_FILE_TEMPORARY) {
123 nir_register *reg;
124 if (c->scan->indirect_files & (1 << file)) {
125 reg = nir_local_reg_create(b->impl);
126 reg->num_components = 4;
127 reg->num_array_elems = array_size;
128
129 for (i = 0; i < array_size; i++) {
130 c->temp_regs[decl->Range.First + i].reg = reg;
131 c->temp_regs[decl->Range.First + i].offset = i;
132 }
133 } else {
134 for (i = 0; i < array_size; i++) {
135 reg = nir_local_reg_create(b->impl);
136 reg->num_components = 4;
137 c->temp_regs[decl->Range.First + i].reg = reg;
138 c->temp_regs[decl->Range.First + i].offset = 0;
139 }
140 }
141 } else if (file == TGSI_FILE_ADDRESS) {
142 c->addr_reg = nir_local_reg_create(b->impl);
143 c->addr_reg->num_components = 4;
144 } else if (file == TGSI_FILE_SAMPLER) {
145 /* Nothing to record for samplers. */
146 } else {
147 nir_variable *var;
148 assert(file == TGSI_FILE_INPUT ||
149 file == TGSI_FILE_OUTPUT ||
150 file == TGSI_FILE_CONSTANT);
151
152 var = rzalloc(b->shader, nir_variable);
153 var->data.driver_location = decl->Range.First;
154
155 var->type = glsl_vec4_type();
156 if (array_size > 1)
157 var->type = glsl_array_type(var->type, array_size);
158
159 switch (file) {
160 case TGSI_FILE_INPUT:
161 var->data.read_only = true;
162 var->data.mode = nir_var_shader_in;
163 var->name = ralloc_asprintf(var, "in_%d", decl->Range.First);
164
165 /* We should probably translate to a VERT_ATTRIB_* or VARYING_SLOT_*
166 * instead, but nothing in NIR core is looking at the value
167 * currently, and this is less change to drivers.
168 */
169 var->data.location = decl->Semantic.Name;
170 var->data.index = decl->Semantic.Index;
171
172 /* We definitely need to translate the interpolation field, because
173 * nir_print will decode it.
174 */
175 switch (decl->Interp.Interpolate) {
176 case TGSI_INTERPOLATE_CONSTANT:
177 var->data.interpolation = INTERP_QUALIFIER_FLAT;
178 break;
179 case TGSI_INTERPOLATE_LINEAR:
180 var->data.interpolation = INTERP_QUALIFIER_NOPERSPECTIVE;
181 break;
182 case TGSI_INTERPOLATE_PERSPECTIVE:
183 var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
184 break;
185 }
186
187 exec_list_push_tail(&b->shader->inputs, &var->node);
188 break;
189 case TGSI_FILE_OUTPUT: {
190 /* Since we can't load from outputs in the IR, we make temporaries
191 * for the outputs and emit stores to the real outputs at the end of
192 * the shader.
193 */
194 nir_register *reg = nir_local_reg_create(b->impl);
195 reg->num_components = 4;
196 if (array_size > 1)
197 reg->num_array_elems = array_size;
198
199 var->data.mode = nir_var_shader_out;
200 var->name = ralloc_asprintf(var, "out_%d", decl->Range.First);
201
202 var->data.location = decl->Semantic.Name;
203 var->data.index = decl->Semantic.Index;
204
205 for (i = 0; i < array_size; i++) {
206 c->output_regs[decl->Range.First + i].offset = i;
207 c->output_regs[decl->Range.First + i].reg = reg;
208 }
209
210 exec_list_push_tail(&b->shader->outputs, &var->node);
211 }
212 break;
213 case TGSI_FILE_CONSTANT:
214 var->data.mode = nir_var_uniform;
215 var->name = ralloc_asprintf(var, "uniform_%d", decl->Range.First);
216
217 exec_list_push_tail(&b->shader->uniforms, &var->node);
218 break;
219 default:
220 unreachable("bad declaration file");
221 return;
222 }
223
224 }
225 }
226
227 static void
228 ttn_emit_immediate(struct ttn_compile *c)
229 {
230 nir_builder *b = &c->build;
231 struct tgsi_full_immediate *tgsi_imm = &c->token->FullImmediate;
232 nir_load_const_instr *load_const;
233 int i;
234
235 load_const = nir_load_const_instr_create(b->shader, 4);
236 c->imm_defs[c->next_imm] = &load_const->def;
237 c->next_imm++;
238
239 for (i = 0; i < 4; i++)
240 load_const->value.u[i] = tgsi_imm->u[i].Uint;
241
242 nir_instr_insert_after_cf_list(b->cf_node_list, &load_const->instr);
243 }
244
245 static nir_src *
246 ttn_src_for_indirect(struct ttn_compile *c, struct tgsi_ind_register *indirect);
247
248 static nir_src
249 ttn_src_for_file_and_index(struct ttn_compile *c, unsigned file, unsigned index,
250 struct tgsi_ind_register *indirect)
251 {
252 nir_builder *b = &c->build;
253 nir_src src;
254
255 memset(&src, 0, sizeof(src));
256
257 switch (file) {
258 case TGSI_FILE_TEMPORARY:
259 src.reg.reg = c->temp_regs[index].reg;
260 src.reg.base_offset = c->temp_regs[index].offset;
261 if (indirect)
262 src.reg.indirect = ttn_src_for_indirect(c, indirect);
263 break;
264
265 case TGSI_FILE_ADDRESS:
266 src.reg.reg = c->addr_reg;
267 break;
268
269 case TGSI_FILE_IMMEDIATE:
270 src = nir_src_for_ssa(c->imm_defs[index]);
271 assert(!indirect);
272 break;
273
274 case TGSI_FILE_INPUT:
275 case TGSI_FILE_CONSTANT: {
276 nir_intrinsic_instr *load;
277
278 switch (file) {
279 case TGSI_FILE_INPUT:
280 load = nir_intrinsic_instr_create(b->shader,
281 indirect ?
282 nir_intrinsic_load_input_indirect :
283 nir_intrinsic_load_input);
284 break;
285 case TGSI_FILE_CONSTANT:
286 load = nir_intrinsic_instr_create(b->shader,
287 indirect ?
288 nir_intrinsic_load_uniform_indirect :
289 nir_intrinsic_load_uniform);
290 break;
291 default:
292 unreachable("No other load files supported");
293 break;
294 }
295
296 load->num_components = 4;
297 load->const_index[0] = index;
298 load->const_index[1] = 1;
299 if (indirect) {
300 nir_alu_src indirect_address;
301 memset(&indirect_address, 0, sizeof(indirect_address));
302 indirect_address.src = nir_src_for_reg(c->addr_reg);
303 for (int i = 0; i < 4; i++)
304 indirect_address.swizzle[i] = indirect->Swizzle;
305 load->src[0] = nir_src_for_ssa(nir_imov_alu(b, indirect_address, 1));
306 }
307 nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
308 nir_instr_insert_after_cf_list(b->cf_node_list, &load->instr);
309
310 src = nir_src_for_ssa(&load->dest.ssa);
311 break;
312 }
313
314 default:
315 unreachable("bad src file");
316 }
317
318
319 return src;
320 }
321
322 static nir_src *
323 ttn_src_for_indirect(struct ttn_compile *c, struct tgsi_ind_register *indirect)
324 {
325 nir_builder *b = &c->build;
326 nir_alu_src src;
327 memset(&src, 0, sizeof(src));
328 for (int i = 0; i < 4; i++)
329 src.swizzle[i] = indirect->Swizzle;
330 src.src = ttn_src_for_file_and_index(c,
331 indirect->File,
332 indirect->Index, NULL);
333 nir_src *result = ralloc(b->shader, nir_src);
334 *result = nir_src_for_ssa(nir_imov_alu(b, src, 1));
335 return result;
336 }
337
338 static nir_alu_dest
339 ttn_get_dest(struct ttn_compile *c, struct tgsi_full_dst_register *tgsi_fdst)
340 {
341 struct tgsi_dst_register *tgsi_dst = &tgsi_fdst->Register;
342 nir_alu_dest dest;
343 unsigned index = tgsi_dst->Index;
344
345 memset(&dest, 0, sizeof(dest));
346
347 if (tgsi_dst->File == TGSI_FILE_TEMPORARY) {
348 dest.dest.reg.reg = c->temp_regs[index].reg;
349 dest.dest.reg.base_offset = c->temp_regs[index].offset;
350 } else if (tgsi_dst->File == TGSI_FILE_OUTPUT) {
351 dest.dest.reg.reg = c->output_regs[index].reg;
352 dest.dest.reg.base_offset = c->output_regs[index].offset;
353 } else if (tgsi_dst->File == TGSI_FILE_ADDRESS) {
354 assert(index == 0);
355 dest.dest.reg.reg = c->addr_reg;
356 }
357
358 dest.write_mask = tgsi_dst->WriteMask;
359 dest.saturate = false;
360
361 if (tgsi_dst->Indirect)
362 dest.dest.reg.indirect = ttn_src_for_indirect(c, &tgsi_fdst->Indirect);
363
364 return dest;
365 }
366
367 static nir_ssa_def *
368 ttn_get_src(struct ttn_compile *c, struct tgsi_full_src_register *tgsi_fsrc)
369 {
370 nir_builder *b = &c->build;
371 struct tgsi_src_register *tgsi_src = &tgsi_fsrc->Register;
372 unsigned tgsi_opcode = c->token->FullInstruction.Instruction.Opcode;
373 unsigned tgsi_src_type = tgsi_opcode_infer_src_type(tgsi_opcode);
374 bool src_is_float = !(tgsi_src_type == TGSI_TYPE_SIGNED ||
375 tgsi_src_type == TGSI_TYPE_UNSIGNED);
376 nir_alu_src src;
377
378 memset(&src, 0, sizeof(src));
379
380 if (tgsi_src->File == TGSI_FILE_NULL) {
381 return nir_imm_float(b, 0.0);
382 } else if (tgsi_src->File == TGSI_FILE_SAMPLER) {
383 /* Only the index of the sampler gets used in texturing, and it will
384 * handle looking that up on its own instead of using the nir_alu_src.
385 */
386 assert(!tgsi_src->Indirect);
387 return NULL;
388 } else {
389 src.src = ttn_src_for_file_and_index(c,
390 tgsi_src->File,
391 tgsi_src->Index,
392 (tgsi_src->Indirect ?
393 &tgsi_fsrc->Indirect : NULL));
394 }
395
396 src.swizzle[0] = tgsi_src->SwizzleX;
397 src.swizzle[1] = tgsi_src->SwizzleY;
398 src.swizzle[2] = tgsi_src->SwizzleZ;
399 src.swizzle[3] = tgsi_src->SwizzleW;
400
401 nir_ssa_def *def = nir_fmov_alu(b, src, 4);
402
403 if (tgsi_src->Absolute) {
404 if (src_is_float)
405 def = nir_fabs(b, def);
406 else
407 def = nir_iabs(b, def);
408 }
409
410 if (tgsi_src->Negate) {
411 if (src_is_float)
412 def = nir_fneg(b, def);
413 else
414 def = nir_ineg(b, def);
415 }
416
417 return def;
418 }
419
420 static void
421 ttn_alu(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
422 {
423 unsigned num_srcs = nir_op_infos[op].num_inputs;
424 nir_alu_instr *instr = nir_alu_instr_create(b->shader, op);
425 unsigned i;
426
427 for (i = 0; i < num_srcs; i++)
428 instr->src[i].src = nir_src_for_ssa(src[i]);
429
430 instr->dest = dest;
431 nir_instr_insert_after_cf_list(b->cf_node_list, &instr->instr);
432 }
433
434 static void
435 ttn_move_dest_masked(nir_builder *b, nir_alu_dest dest,
436 nir_ssa_def *def, unsigned write_mask)
437 {
438 if (!(dest.write_mask & write_mask))
439 return;
440
441 nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_imov);
442 mov->dest = dest;
443 mov->dest.write_mask &= write_mask;
444 mov->src[0].src = nir_src_for_ssa(def);
445 for (unsigned i = def->num_components; i < 4; i++)
446 mov->src[0].swizzle[i] = def->num_components - 1;
447 nir_instr_insert_after_cf_list(b->cf_node_list, &mov->instr);
448 }
449
450 static void
451 ttn_move_dest(nir_builder *b, nir_alu_dest dest, nir_ssa_def *def)
452 {
453 ttn_move_dest_masked(b, dest, def, TGSI_WRITEMASK_XYZW);
454 }
455
456 static void
457 ttn_arl(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
458 {
459 ttn_move_dest(b, dest, nir_f2i(b, nir_ffloor(b, src[0])));
460 }
461
462 /* EXP - Approximate Exponential Base 2
463 * dst.x = 2^{\lfloor src.x\rfloor}
464 * dst.y = src.x - \lfloor src.x\rfloor
465 * dst.z = 2^{src.x}
466 * dst.w = 1.0
467 */
468 static void
469 ttn_exp(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
470 {
471 nir_ssa_def *srcx = ttn_channel(b, src[0], X);
472
473 ttn_move_dest_masked(b, dest, nir_fexp2(b, nir_ffloor(b, srcx)),
474 TGSI_WRITEMASK_X);
475 ttn_move_dest_masked(b, dest, nir_fsub(b, srcx, nir_ffloor(b, srcx)),
476 TGSI_WRITEMASK_Y);
477 ttn_move_dest_masked(b, dest, nir_fexp2(b, srcx), TGSI_WRITEMASK_Z);
478 ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_W);
479 }
480
481 /* LOG - Approximate Logarithm Base 2
482 * dst.x = \lfloor\log_2{|src.x|}\rfloor
483 * dst.y = \frac{|src.x|}{2^{\lfloor\log_2{|src.x|}\rfloor}}
484 * dst.z = \log_2{|src.x|}
485 * dst.w = 1.0
486 */
487 static void
488 ttn_log(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
489 {
490 nir_ssa_def *abs_srcx = nir_fabs(b, ttn_channel(b, src[0], X));
491 nir_ssa_def *log2 = nir_flog2(b, abs_srcx);
492
493 ttn_move_dest_masked(b, dest, nir_ffloor(b, log2), TGSI_WRITEMASK_X);
494 ttn_move_dest_masked(b, dest,
495 nir_fdiv(b, abs_srcx, nir_fexp2(b, nir_ffloor(b, log2))),
496 TGSI_WRITEMASK_Y);
497 ttn_move_dest_masked(b, dest, nir_flog2(b, abs_srcx), TGSI_WRITEMASK_Z);
498 ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_W);
499 }
500
501 /* DST - Distance Vector
502 * dst.x = 1.0
503 * dst.y = src0.y \times src1.y
504 * dst.z = src0.z
505 * dst.w = src1.w
506 */
507 static void
508 ttn_dst(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
509 {
510 ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_X);
511 ttn_move_dest_masked(b, dest, nir_fmul(b, src[0], src[1]), TGSI_WRITEMASK_Y);
512 ttn_move_dest_masked(b, dest, nir_fmov(b, src[0]), TGSI_WRITEMASK_Z);
513 ttn_move_dest_masked(b, dest, nir_fmov(b, src[1]), TGSI_WRITEMASK_W);
514 }
515
516 /* LIT - Light Coefficients
517 * dst.x = 1.0
518 * dst.y = max(src.x, 0.0)
519 * dst.z = (src.x > 0.0) ? max(src.y, 0.0)^{clamp(src.w, -128.0, 128.0))} : 0
520 * dst.w = 1.0
521 */
522 static void
523 ttn_lit(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
524 {
525 ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_XW);
526
527 ttn_move_dest_masked(b, dest, nir_fmax(b, ttn_channel(b, src[0], X),
528 nir_imm_float(b, 0.0)), TGSI_WRITEMASK_Y);
529
530 if (dest.write_mask & TGSI_WRITEMASK_Z) {
531 nir_ssa_def *src0_y = ttn_channel(b, src[0], Y);
532 nir_ssa_def *wclamp = nir_fmax(b, nir_fmin(b, ttn_channel(b, src[0], W),
533 nir_imm_float(b, 128.0)),
534 nir_imm_float(b, -128.0));
535 nir_ssa_def *pow = nir_fpow(b, nir_fmax(b, src0_y, nir_imm_float(b, 0.0)),
536 wclamp);
537
538 ttn_move_dest_masked(b, dest,
539 nir_bcsel(b,
540 nir_fge(b,
541 nir_imm_float(b, 0.0),
542 ttn_channel(b, src[0], X)),
543 nir_imm_float(b, 0.0),
544 pow),
545 TGSI_WRITEMASK_Z);
546 }
547 }
548
549 /* SCS - Sine Cosine
550 * dst.x = \cos{src.x}
551 * dst.y = \sin{src.x}
552 * dst.z = 0.0
553 * dst.w = 1.0
554 */
555 static void
556 ttn_scs(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
557 {
558 ttn_move_dest_masked(b, dest, nir_fcos(b, ttn_channel(b, src[0], X)),
559 TGSI_WRITEMASK_X);
560 ttn_move_dest_masked(b, dest, nir_fsin(b, ttn_channel(b, src[0], X)),
561 TGSI_WRITEMASK_Y);
562 ttn_move_dest_masked(b, dest, nir_imm_float(b, 0.0), TGSI_WRITEMASK_Z);
563 ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_W);
564 }
565
566 static void
567 ttn_sle(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
568 {
569 ttn_move_dest(b, dest, nir_sge(b, src[1], src[0]));
570 }
571
572 static void
573 ttn_sgt(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
574 {
575 ttn_move_dest(b, dest, nir_slt(b, src[1], src[0]));
576 }
577
578 static void
579 ttn_clamp(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
580 {
581 ttn_move_dest(b, dest, nir_fmin(b, nir_fmax(b, src[0], src[1]), src[2]));
582 }
583
584 static void
585 ttn_xpd(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
586 {
587 ttn_move_dest_masked(b, dest,
588 nir_fsub(b,
589 nir_fmul(b,
590 ttn_swizzle(b, src[0], Y, Z, X, X),
591 ttn_swizzle(b, src[1], Z, X, Y, X)),
592 nir_fmul(b,
593 ttn_swizzle(b, src[1], Y, Z, X, X),
594 ttn_swizzle(b, src[0], Z, X, Y, X))),
595 TGSI_WRITEMASK_XYZ);
596 ttn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), TGSI_WRITEMASK_W);
597 }
598
599 static void
600 ttn_dp2a(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
601 {
602 ttn_move_dest(b, dest,
603 ttn_channel(b, nir_fadd(b, nir_fdot2(b, src[0], src[1]),
604 src[2]),
605 X));
606 }
607
608 static void
609 ttn_dp2(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
610 {
611 ttn_move_dest(b, dest, nir_fdot2(b, src[0], src[1]));
612 }
613
614 static void
615 ttn_dp3(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
616 {
617 ttn_move_dest(b, dest, nir_fdot3(b, src[0], src[1]));
618 }
619
620 static void
621 ttn_dp4(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
622 {
623 ttn_move_dest(b, dest, nir_fdot4(b, src[0], src[1]));
624 }
625
626 static void
627 ttn_dph(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
628 {
629 ttn_move_dest(b, dest, nir_fadd(b, nir_fdot3(b, src[0], src[1]),
630 ttn_channel(b, src[1], W)));
631 }
632
633 static void
634 ttn_umad(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
635 {
636 ttn_move_dest(b, dest, nir_iadd(b, nir_imul(b, src[0], src[1]), src[2]));
637 }
638
639 static void
640 ttn_arr(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
641 {
642 ttn_move_dest(b, dest, nir_ffloor(b, nir_fadd(b, src[0], nir_imm_float(b, 0.5))));
643 }
644
645 static void
646 ttn_cmp(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
647 {
648 ttn_move_dest(b, dest, nir_bcsel(b,
649 nir_flt(b, src[0], nir_imm_float(b, 0.0)),
650 src[1], src[2]));
651 }
652
653 static void
654 ttn_ucmp(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
655 {
656 ttn_move_dest(b, dest, nir_bcsel(b,
657 nir_ine(b, src[0], nir_imm_int(b, 0)),
658 src[1], src[2]));
659 }
660
661 static void
662 ttn_kill(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
663 {
664 nir_intrinsic_instr *discard =
665 nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard);
666 nir_instr_insert_after_cf_list(b->cf_node_list, &discard->instr);
667 }
668
669 static void
670 ttn_kill_if(nir_builder *b, nir_op op, nir_alu_dest dest, nir_ssa_def **src)
671 {
672 nir_ssa_def *cmp = nir_bany4(b, nir_flt(b, src[0], nir_imm_float(b, 0.0)));
673 nir_intrinsic_instr *discard =
674 nir_intrinsic_instr_create(b->shader, nir_intrinsic_discard_if);
675 discard->src[0] = nir_src_for_ssa(cmp);
676 nir_instr_insert_after_cf_list(b->cf_node_list, &discard->instr);
677 }
678
679 static void
680 ttn_if(struct ttn_compile *c, nir_ssa_def *src, bool is_uint)
681 {
682 nir_builder *b = &c->build;
683
684 /* Save the outside-of-the-if-statement node list. */
685 c->if_stack[c->if_stack_pos] = b->cf_node_list;
686 c->if_stack_pos++;
687
688 src = ttn_channel(b, src, X);
689
690 nir_if *if_stmt = nir_if_create(b->shader);
691 if (is_uint) {
692 if_stmt->condition = nir_src_for_ssa(nir_ine(b, src, nir_imm_int(b, 0)));
693 } else {
694 if_stmt->condition = nir_src_for_ssa(nir_fne(b, src, nir_imm_int(b, 0)));
695 }
696 nir_cf_node_insert_end(b->cf_node_list, &if_stmt->cf_node);
697
698 nir_builder_insert_after_cf_list(b, &if_stmt->then_list);
699
700 c->if_stack[c->if_stack_pos] = &if_stmt->else_list;
701 c->if_stack_pos++;
702 }
703
704 static void
705 ttn_else(struct ttn_compile *c)
706 {
707 nir_builder *b = &c->build;
708
709 nir_builder_insert_after_cf_list(b, c->if_stack[c->if_stack_pos - 1]);
710 }
711
712 static void
713 ttn_endif(struct ttn_compile *c)
714 {
715 nir_builder *b = &c->build;
716
717 c->if_stack_pos -= 2;
718 nir_builder_insert_after_cf_list(b, c->if_stack[c->if_stack_pos]);
719 }
720
721 static void
722 ttn_bgnloop(struct ttn_compile *c)
723 {
724 nir_builder *b = &c->build;
725
726 /* Save the outside-of-the-loop node list. */
727 c->loop_stack[c->loop_stack_pos] = b->cf_node_list;
728 c->loop_stack_pos++;
729
730 nir_loop *loop = nir_loop_create(b->shader);
731 nir_cf_node_insert_end(b->cf_node_list, &loop->cf_node);
732
733 nir_builder_insert_after_cf_list(b, &loop->body);
734 }
735
736 static void
737 ttn_cont(nir_builder *b)
738 {
739 nir_jump_instr *instr = nir_jump_instr_create(b->shader, nir_jump_continue);
740 nir_instr_insert_after_cf_list(b->cf_node_list, &instr->instr);
741 }
742
743 static void
744 ttn_brk(nir_builder *b)
745 {
746 nir_jump_instr *instr = nir_jump_instr_create(b->shader, nir_jump_break);
747 nir_instr_insert_after_cf_list(b->cf_node_list, &instr->instr);
748 }
749
750 static void
751 ttn_endloop(struct ttn_compile *c)
752 {
753 nir_builder *b = &c->build;
754
755 c->loop_stack_pos--;
756 nir_builder_insert_after_cf_list(b, c->loop_stack[c->loop_stack_pos]);
757 }
758
759 static void
760 ttn_tex(struct ttn_compile *c, nir_alu_dest dest, nir_ssa_def **src)
761 {
762 nir_builder *b = &c->build;
763 struct tgsi_full_instruction *tgsi_inst = &c->token->FullInstruction;
764 nir_tex_instr *instr;
765 nir_texop op;
766 unsigned num_srcs;
767
768 switch (tgsi_inst->Instruction.Opcode) {
769 case TGSI_OPCODE_TEX:
770 op = nir_texop_tex;
771 num_srcs = 1;
772 break;
773 case TGSI_OPCODE_TXP:
774 op = nir_texop_tex;
775 num_srcs = 2;
776 break;
777 case TGSI_OPCODE_TXB:
778 op = nir_texop_txb;
779 num_srcs = 2;
780 break;
781 case TGSI_OPCODE_TXL:
782 op = nir_texop_txl;
783 num_srcs = 2;
784 break;
785 case TGSI_OPCODE_TXF:
786 op = nir_texop_txf;
787 num_srcs = 1;
788 break;
789 case TGSI_OPCODE_TXD:
790 op = nir_texop_txd;
791 num_srcs = 3;
792 break;
793 default:
794 fprintf(stderr, "unknown TGSI tex op %d\n", tgsi_inst->Instruction.Opcode);
795 abort();
796 }
797
798 if (tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D ||
799 tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOW1D_ARRAY ||
800 tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D ||
801 tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOW2D_ARRAY ||
802 tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOWRECT ||
803 tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE ||
804 tgsi_inst->Texture.Texture == TGSI_TEXTURE_SHADOWCUBE_ARRAY) {
805 num_srcs++;
806 }
807
808 instr = nir_tex_instr_create(b->shader, num_srcs);
809 instr->op = op;
810
811 switch (tgsi_inst->Texture.Texture) {
812 case TGSI_TEXTURE_1D:
813 instr->sampler_dim = GLSL_SAMPLER_DIM_1D;
814 break;
815 case TGSI_TEXTURE_1D_ARRAY:
816 instr->sampler_dim = GLSL_SAMPLER_DIM_1D;
817 instr->is_array = true;
818 break;
819 case TGSI_TEXTURE_SHADOW1D:
820 instr->sampler_dim = GLSL_SAMPLER_DIM_1D;
821 instr->is_shadow = true;
822 break;
823 case TGSI_TEXTURE_SHADOW1D_ARRAY:
824 instr->sampler_dim = GLSL_SAMPLER_DIM_1D;
825 instr->is_shadow = true;
826 instr->is_array = true;
827 break;
828 case TGSI_TEXTURE_2D:
829 instr->sampler_dim = GLSL_SAMPLER_DIM_2D;
830 break;
831 case TGSI_TEXTURE_2D_ARRAY:
832 instr->sampler_dim = GLSL_SAMPLER_DIM_2D;
833 instr->is_array = true;
834 break;
835 case TGSI_TEXTURE_2D_MSAA:
836 instr->sampler_dim = GLSL_SAMPLER_DIM_MS;
837 break;
838 case TGSI_TEXTURE_2D_ARRAY_MSAA:
839 instr->sampler_dim = GLSL_SAMPLER_DIM_MS;
840 instr->is_array = true;
841 break;
842 case TGSI_TEXTURE_SHADOW2D:
843 instr->sampler_dim = GLSL_SAMPLER_DIM_2D;
844 instr->is_shadow = true;
845 break;
846 case TGSI_TEXTURE_SHADOW2D_ARRAY:
847 instr->sampler_dim = GLSL_SAMPLER_DIM_2D;
848 instr->is_shadow = true;
849 instr->is_array = true;
850 break;
851 case TGSI_TEXTURE_3D:
852 instr->sampler_dim = GLSL_SAMPLER_DIM_3D;
853 break;
854 case TGSI_TEXTURE_CUBE:
855 instr->sampler_dim = GLSL_SAMPLER_DIM_CUBE;
856 break;
857 case TGSI_TEXTURE_CUBE_ARRAY:
858 instr->sampler_dim = GLSL_SAMPLER_DIM_CUBE;
859 instr->is_array = true;
860 break;
861 case TGSI_TEXTURE_SHADOWCUBE:
862 instr->sampler_dim = GLSL_SAMPLER_DIM_CUBE;
863 instr->is_shadow = true;
864 break;
865 case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
866 instr->sampler_dim = GLSL_SAMPLER_DIM_CUBE;
867 instr->is_shadow = true;
868 instr->is_array = true;
869 break;
870 case TGSI_TEXTURE_RECT:
871 instr->sampler_dim = GLSL_SAMPLER_DIM_RECT;
872 break;
873 case TGSI_TEXTURE_SHADOWRECT:
874 instr->sampler_dim = GLSL_SAMPLER_DIM_RECT;
875 instr->is_shadow = true;
876 break;
877 default:
878 fprintf(stderr, "Unknown TGSI texture target %d\n",
879 tgsi_inst->Texture.Texture);
880 abort();
881 }
882
883 switch (instr->sampler_dim) {
884 case GLSL_SAMPLER_DIM_1D:
885 case GLSL_SAMPLER_DIM_BUF:
886 instr->coord_components = 1;
887 break;
888 case GLSL_SAMPLER_DIM_2D:
889 case GLSL_SAMPLER_DIM_RECT:
890 case GLSL_SAMPLER_DIM_EXTERNAL:
891 case GLSL_SAMPLER_DIM_MS:
892 instr->coord_components = 2;
893 break;
894 case GLSL_SAMPLER_DIM_3D:
895 case GLSL_SAMPLER_DIM_CUBE:
896 instr->coord_components = 3;
897 break;
898 }
899
900 if (instr->is_array)
901 instr->coord_components++;
902
903 assert(tgsi_inst->Src[1].Register.File == TGSI_FILE_SAMPLER);
904 instr->sampler_index = tgsi_inst->Src[1].Register.Index;
905
906 unsigned src_number = 0;
907
908 if (tgsi_inst->Instruction.Opcode != TGSI_OPCODE_TXQ) {
909 instr->src[src_number].src =
910 nir_src_for_ssa(nir_swizzle(b, src[0], SWIZ(X, Y, Z, W),
911 instr->coord_components, false));
912 instr->src[src_number].src_type = nir_tex_src_coord;
913 src_number++;
914 }
915
916 if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXP) {
917 instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], W));
918 instr->src[src_number].src_type = nir_tex_src_projector;
919 src_number++;
920 }
921
922 if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXB) {
923 instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], W));
924 instr->src[src_number].src_type = nir_tex_src_bias;
925 src_number++;
926 }
927
928 if (tgsi_inst->Instruction.Opcode == TGSI_OPCODE_TXL) {
929 instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], W));
930 instr->src[src_number].src_type = nir_tex_src_lod;
931 src_number++;
932 }
933
934 if (instr->is_shadow) {
935 if (instr->coord_components < 3)
936 instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], Z));
937 else
938 instr->src[src_number].src = nir_src_for_ssa(ttn_channel(b, src[0], W));
939
940 instr->src[src_number].src_type = nir_tex_src_comparitor;
941 src_number++;
942 }
943
944 assert(src_number == num_srcs);
945
946 nir_ssa_dest_init(&instr->instr, &instr->dest, 4, NULL);
947 nir_instr_insert_after_cf_list(b->cf_node_list, &instr->instr);
948
949 /* Resolve the writemask on the texture op. */
950 ttn_move_dest(b, dest, &instr->dest.ssa);
951 }
952
953 static const nir_op op_trans[TGSI_OPCODE_LAST] = {
954 [TGSI_OPCODE_ARL] = 0,
955 [TGSI_OPCODE_MOV] = nir_op_fmov,
956 [TGSI_OPCODE_LIT] = 0,
957 [TGSI_OPCODE_RCP] = nir_op_frcp,
958 [TGSI_OPCODE_RSQ] = nir_op_frsq,
959 [TGSI_OPCODE_EXP] = 0,
960 [TGSI_OPCODE_LOG] = 0,
961 [TGSI_OPCODE_MUL] = nir_op_fmul,
962 [TGSI_OPCODE_ADD] = nir_op_fadd,
963 [TGSI_OPCODE_DP3] = 0,
964 [TGSI_OPCODE_DP4] = 0,
965 [TGSI_OPCODE_DST] = 0,
966 [TGSI_OPCODE_MIN] = nir_op_fmin,
967 [TGSI_OPCODE_MAX] = nir_op_fmax,
968 [TGSI_OPCODE_SLT] = nir_op_slt,
969 [TGSI_OPCODE_SGE] = nir_op_sge,
970 [TGSI_OPCODE_MAD] = nir_op_ffma,
971 [TGSI_OPCODE_SUB] = nir_op_fsub,
972 [TGSI_OPCODE_LRP] = 0,
973 [TGSI_OPCODE_SQRT] = nir_op_fsqrt,
974 [TGSI_OPCODE_DP2A] = 0,
975 [TGSI_OPCODE_FRC] = nir_op_ffract,
976 [TGSI_OPCODE_CLAMP] = 0,
977 [TGSI_OPCODE_FLR] = nir_op_ffloor,
978 [TGSI_OPCODE_ROUND] = nir_op_fround_even,
979 [TGSI_OPCODE_EX2] = nir_op_fexp2,
980 [TGSI_OPCODE_LG2] = nir_op_flog2,
981 [TGSI_OPCODE_POW] = nir_op_fpow,
982 [TGSI_OPCODE_XPD] = 0,
983 [TGSI_OPCODE_ABS] = nir_op_fabs,
984 [TGSI_OPCODE_DPH] = 0,
985 [TGSI_OPCODE_COS] = nir_op_fcos,
986 [TGSI_OPCODE_DDX] = nir_op_fddx,
987 [TGSI_OPCODE_DDY] = nir_op_fddy,
988 [TGSI_OPCODE_KILL] = 0,
989 [TGSI_OPCODE_PK2H] = 0, /* XXX */
990 [TGSI_OPCODE_PK2US] = 0, /* XXX */
991 [TGSI_OPCODE_PK4B] = 0, /* XXX */
992 [TGSI_OPCODE_PK4UB] = 0, /* XXX */
993 [TGSI_OPCODE_SEQ] = nir_op_seq,
994 [TGSI_OPCODE_SGT] = 0,
995 [TGSI_OPCODE_SIN] = nir_op_fsin,
996 [TGSI_OPCODE_SLE] = 0,
997 [TGSI_OPCODE_TEX] = 0,
998 [TGSI_OPCODE_TXD] = 0,
999 [TGSI_OPCODE_TXP] = 0,
1000 [TGSI_OPCODE_UP2H] = 0, /* XXX */
1001 [TGSI_OPCODE_UP2US] = 0, /* XXX */
1002 [TGSI_OPCODE_UP4B] = 0, /* XXX */
1003 [TGSI_OPCODE_UP4UB] = 0, /* XXX */
1004 [TGSI_OPCODE_ARR] = 0,
1005
1006 /* No function calls, yet. */
1007 [TGSI_OPCODE_CAL] = 0, /* XXX */
1008 [TGSI_OPCODE_RET] = 0, /* XXX */
1009
1010 [TGSI_OPCODE_SSG] = nir_op_fsign,
1011 [TGSI_OPCODE_CMP] = 0,
1012 [TGSI_OPCODE_SCS] = 0,
1013 [TGSI_OPCODE_TXB] = 0,
1014 [TGSI_OPCODE_DIV] = nir_op_fdiv,
1015 [TGSI_OPCODE_DP2] = 0,
1016 [TGSI_OPCODE_DP2A] = 0,
1017 [TGSI_OPCODE_TXL] = 0,
1018
1019 [TGSI_OPCODE_BRK] = 0,
1020 [TGSI_OPCODE_IF] = 0,
1021 [TGSI_OPCODE_UIF] = 0,
1022 [TGSI_OPCODE_ELSE] = 0,
1023 [TGSI_OPCODE_ENDIF] = 0,
1024
1025 [TGSI_OPCODE_DDX_FINE] = nir_op_fddx_fine,
1026 [TGSI_OPCODE_DDY_FINE] = nir_op_fddy_fine,
1027
1028 [TGSI_OPCODE_PUSHA] = 0, /* XXX */
1029 [TGSI_OPCODE_POPA] = 0, /* XXX */
1030
1031 [TGSI_OPCODE_CEIL] = nir_op_fceil,
1032 [TGSI_OPCODE_I2F] = nir_op_i2f,
1033 [TGSI_OPCODE_NOT] = nir_op_inot,
1034 [TGSI_OPCODE_TRUNC] = nir_op_ftrunc,
1035 [TGSI_OPCODE_SHL] = nir_op_ishl,
1036 [TGSI_OPCODE_AND] = nir_op_iand,
1037 [TGSI_OPCODE_OR] = nir_op_ior,
1038 [TGSI_OPCODE_MOD] = nir_op_umod,
1039 [TGSI_OPCODE_XOR] = nir_op_ixor,
1040 [TGSI_OPCODE_SAD] = 0, /* XXX */
1041 [TGSI_OPCODE_TXF] = 0,
1042 [TGSI_OPCODE_TXQ] = 0,
1043
1044 [TGSI_OPCODE_CONT] = 0,
1045
1046 [TGSI_OPCODE_EMIT] = 0, /* XXX */
1047 [TGSI_OPCODE_ENDPRIM] = 0, /* XXX */
1048
1049 [TGSI_OPCODE_BGNLOOP] = 0,
1050 [TGSI_OPCODE_BGNSUB] = 0, /* XXX: no function calls */
1051 [TGSI_OPCODE_ENDLOOP] = 0,
1052 [TGSI_OPCODE_ENDSUB] = 0, /* XXX: no function calls */
1053
1054 [TGSI_OPCODE_TXQ_LZ] = 0,
1055 [TGSI_OPCODE_NOP] = 0,
1056 [TGSI_OPCODE_FSEQ] = nir_op_feq,
1057 [TGSI_OPCODE_FSGE] = nir_op_fge,
1058 [TGSI_OPCODE_FSLT] = nir_op_flt,
1059 [TGSI_OPCODE_FSNE] = nir_op_fne,
1060
1061 /* No control flow yet */
1062 [TGSI_OPCODE_CALLNZ] = 0, /* XXX */
1063 [TGSI_OPCODE_BREAKC] = 0, /* not emitted by glsl_to_tgsi.cpp */
1064
1065 [TGSI_OPCODE_KILL_IF] = 0,
1066
1067 [TGSI_OPCODE_END] = 0,
1068
1069 [TGSI_OPCODE_F2I] = nir_op_f2i,
1070 [TGSI_OPCODE_IDIV] = nir_op_idiv,
1071 [TGSI_OPCODE_IMAX] = nir_op_imax,
1072 [TGSI_OPCODE_IMIN] = nir_op_imin,
1073 [TGSI_OPCODE_INEG] = nir_op_ineg,
1074 [TGSI_OPCODE_ISGE] = nir_op_ige,
1075 [TGSI_OPCODE_ISHR] = nir_op_ishr,
1076 [TGSI_OPCODE_ISLT] = nir_op_ilt,
1077 [TGSI_OPCODE_F2U] = nir_op_f2u,
1078 [TGSI_OPCODE_U2F] = nir_op_u2f,
1079 [TGSI_OPCODE_UADD] = nir_op_iadd,
1080 [TGSI_OPCODE_UDIV] = nir_op_udiv,
1081 [TGSI_OPCODE_UMAD] = 0,
1082 [TGSI_OPCODE_UMAX] = nir_op_umax,
1083 [TGSI_OPCODE_UMIN] = nir_op_umin,
1084 [TGSI_OPCODE_UMOD] = nir_op_umod,
1085 [TGSI_OPCODE_UMUL] = nir_op_imul,
1086 [TGSI_OPCODE_USEQ] = nir_op_ieq,
1087 [TGSI_OPCODE_USGE] = nir_op_uge,
1088 [TGSI_OPCODE_USHR] = nir_op_ushr,
1089 [TGSI_OPCODE_USLT] = nir_op_ult,
1090 [TGSI_OPCODE_USNE] = nir_op_ine,
1091
1092 [TGSI_OPCODE_SWITCH] = 0, /* not emitted by glsl_to_tgsi.cpp */
1093 [TGSI_OPCODE_CASE] = 0, /* not emitted by glsl_to_tgsi.cpp */
1094 [TGSI_OPCODE_DEFAULT] = 0, /* not emitted by glsl_to_tgsi.cpp */
1095 [TGSI_OPCODE_ENDSWITCH] = 0, /* not emitted by glsl_to_tgsi.cpp */
1096
1097 /* XXX: SAMPLE opcodes */
1098
1099 [TGSI_OPCODE_UARL] = nir_op_imov,
1100 [TGSI_OPCODE_UCMP] = 0,
1101 [TGSI_OPCODE_IABS] = nir_op_iabs,
1102 [TGSI_OPCODE_ISSG] = nir_op_isign,
1103
1104 /* XXX: atomics */
1105
1106 [TGSI_OPCODE_TEX2] = 0,
1107 [TGSI_OPCODE_TXB2] = 0,
1108 [TGSI_OPCODE_TXL2] = 0,
1109
1110 [TGSI_OPCODE_IMUL_HI] = nir_op_imul_high,
1111 [TGSI_OPCODE_UMUL_HI] = nir_op_umul_high,
1112
1113 [TGSI_OPCODE_TG4] = 0,
1114 [TGSI_OPCODE_LODQ] = 0, /* XXX */
1115
1116 [TGSI_OPCODE_IBFE] = nir_op_ibitfield_extract,
1117 [TGSI_OPCODE_UBFE] = nir_op_ubitfield_extract,
1118 [TGSI_OPCODE_BFI] = nir_op_bitfield_insert,
1119 [TGSI_OPCODE_BREV] = nir_op_bitfield_reverse,
1120 [TGSI_OPCODE_POPC] = nir_op_bit_count,
1121 [TGSI_OPCODE_LSB] = nir_op_find_lsb,
1122 [TGSI_OPCODE_IMSB] = nir_op_ifind_msb,
1123 [TGSI_OPCODE_UMSB] = nir_op_ifind_msb, /* XXX: signed vs unsigned */
1124
1125 [TGSI_OPCODE_INTERP_CENTROID] = 0, /* XXX */
1126 [TGSI_OPCODE_INTERP_SAMPLE] = 0, /* XXX */
1127 [TGSI_OPCODE_INTERP_OFFSET] = 0, /* XXX */
1128 };
1129
1130 static void
1131 ttn_emit_instruction(struct ttn_compile *c)
1132 {
1133 nir_builder *b = &c->build;
1134 struct tgsi_full_instruction *tgsi_inst = &c->token->FullInstruction;
1135 unsigned i;
1136 unsigned tgsi_op = tgsi_inst->Instruction.Opcode;
1137
1138 if (tgsi_op == TGSI_OPCODE_END)
1139 return;
1140
1141 nir_ssa_def *src[TGSI_FULL_MAX_SRC_REGISTERS];
1142 for (i = 0; i < TGSI_FULL_MAX_SRC_REGISTERS; i++) {
1143 src[i] = ttn_get_src(c, &tgsi_inst->Src[i]);
1144 }
1145 nir_alu_dest dest = ttn_get_dest(c, &tgsi_inst->Dst[0]);
1146
1147 switch (tgsi_op) {
1148 case TGSI_OPCODE_RSQ:
1149 ttn_move_dest(b, dest, nir_frsq(b, ttn_channel(b, src[0], X)));
1150 break;
1151
1152 case TGSI_OPCODE_SQRT:
1153 ttn_move_dest(b, dest, nir_fsqrt(b, ttn_channel(b, src[0], X)));
1154 break;
1155
1156 case TGSI_OPCODE_RCP:
1157 ttn_move_dest(b, dest, nir_frcp(b, ttn_channel(b, src[0], X)));
1158 break;
1159
1160 case TGSI_OPCODE_EX2:
1161 ttn_move_dest(b, dest, nir_fexp2(b, ttn_channel(b, src[0], X)));
1162 break;
1163
1164 case TGSI_OPCODE_LG2:
1165 ttn_move_dest(b, dest, nir_flog2(b, ttn_channel(b, src[0], X)));
1166 break;
1167
1168 case TGSI_OPCODE_POW:
1169 ttn_move_dest(b, dest, nir_fpow(b,
1170 ttn_channel(b, src[0], X),
1171 ttn_channel(b, src[1], X)));
1172 break;
1173
1174 case TGSI_OPCODE_COS:
1175 ttn_move_dest(b, dest, nir_fcos(b, ttn_channel(b, src[0], X)));
1176 break;
1177
1178 case TGSI_OPCODE_SIN:
1179 ttn_move_dest(b, dest, nir_fsin(b, ttn_channel(b, src[0], X)));
1180 break;
1181
1182 case TGSI_OPCODE_ARL:
1183 ttn_arl(b, op_trans[tgsi_op], dest, src);
1184 break;
1185
1186 case TGSI_OPCODE_EXP:
1187 ttn_exp(b, op_trans[tgsi_op], dest, src);
1188 break;
1189
1190 case TGSI_OPCODE_LOG:
1191 ttn_log(b, op_trans[tgsi_op], dest, src);
1192 break;
1193
1194 case TGSI_OPCODE_DST:
1195 ttn_dst(b, op_trans[tgsi_op], dest, src);
1196 break;
1197
1198 case TGSI_OPCODE_LIT:
1199 ttn_lit(b, op_trans[tgsi_op], dest, src);
1200 break;
1201
1202 case TGSI_OPCODE_CLAMP:
1203 ttn_clamp(b, op_trans[tgsi_op], dest, src);
1204 break;
1205
1206 case TGSI_OPCODE_XPD:
1207 ttn_xpd(b, op_trans[tgsi_op], dest, src);
1208 break;
1209
1210 case TGSI_OPCODE_DP2:
1211 ttn_dp2(b, op_trans[tgsi_op], dest, src);
1212 break;
1213
1214 case TGSI_OPCODE_DP3:
1215 ttn_dp3(b, op_trans[tgsi_op], dest, src);
1216 break;
1217
1218 case TGSI_OPCODE_DP4:
1219 ttn_dp4(b, op_trans[tgsi_op], dest, src);
1220 break;
1221
1222 case TGSI_OPCODE_DP2A:
1223 ttn_dp2a(b, op_trans[tgsi_op], dest, src);
1224 break;
1225
1226 case TGSI_OPCODE_DPH:
1227 ttn_dph(b, op_trans[tgsi_op], dest, src);
1228 break;
1229
1230 case TGSI_OPCODE_UMAD:
1231 ttn_umad(b, op_trans[tgsi_op], dest, src);
1232 break;
1233
1234 case TGSI_OPCODE_LRP:
1235 ttn_move_dest(b, dest, nir_flrp(b, src[2], src[1], src[0]));
1236 break;
1237
1238 case TGSI_OPCODE_KILL:
1239 ttn_kill(b, op_trans[tgsi_op], dest, src);
1240 break;
1241
1242 case TGSI_OPCODE_ARR:
1243 ttn_arr(b, op_trans[tgsi_op], dest, src);
1244 break;
1245
1246 case TGSI_OPCODE_CMP:
1247 ttn_cmp(b, op_trans[tgsi_op], dest, src);
1248 break;
1249
1250 case TGSI_OPCODE_UCMP:
1251 ttn_ucmp(b, op_trans[tgsi_op], dest, src);
1252 break;
1253
1254 case TGSI_OPCODE_SCS:
1255 ttn_scs(b, op_trans[tgsi_op], dest, src);
1256 break;
1257
1258 case TGSI_OPCODE_SGT:
1259 ttn_sgt(b, op_trans[tgsi_op], dest, src);
1260 break;
1261
1262 case TGSI_OPCODE_SLE:
1263 ttn_sle(b, op_trans[tgsi_op], dest, src);
1264 break;
1265
1266 case TGSI_OPCODE_KILL_IF:
1267 ttn_kill_if(b, op_trans[tgsi_op], dest, src);
1268 break;
1269
1270 case TGSI_OPCODE_TEX:
1271 case TGSI_OPCODE_TXP:
1272 case TGSI_OPCODE_TXL:
1273 case TGSI_OPCODE_TXB:
1274 case TGSI_OPCODE_TXD:
1275 case TGSI_OPCODE_TXQ:
1276 case TGSI_OPCODE_TXL2:
1277 case TGSI_OPCODE_TXB2:
1278 case TGSI_OPCODE_TXQ_LZ:
1279 case TGSI_OPCODE_TXF:
1280 case TGSI_OPCODE_TG4:
1281 ttn_tex(c, dest, src);
1282 break;
1283
1284 case TGSI_OPCODE_NOP:
1285 break;
1286
1287 case TGSI_OPCODE_IF:
1288 ttn_if(c, src[0], false);
1289 break;
1290
1291 case TGSI_OPCODE_UIF:
1292 ttn_if(c, src[0], true);
1293 break;
1294
1295 case TGSI_OPCODE_ELSE:
1296 ttn_else(c);
1297 break;
1298
1299 case TGSI_OPCODE_ENDIF:
1300 ttn_endif(c);
1301 break;
1302
1303 case TGSI_OPCODE_BGNLOOP:
1304 ttn_bgnloop(c);
1305 break;
1306
1307 case TGSI_OPCODE_BRK:
1308 ttn_brk(b);
1309 break;
1310
1311 case TGSI_OPCODE_CONT:
1312 ttn_cont(b);
1313 break;
1314
1315 case TGSI_OPCODE_ENDLOOP:
1316 ttn_endloop(c);
1317 break;
1318
1319 default:
1320 if (op_trans[tgsi_op] != 0 || tgsi_op == TGSI_OPCODE_MOV) {
1321 ttn_alu(b, op_trans[tgsi_op], dest, src);
1322 } else {
1323 fprintf(stderr, "unknown TGSI opcode: %s\n",
1324 tgsi_get_opcode_name(tgsi_op));
1325 abort();
1326 }
1327 break;
1328 }
1329
1330 if (tgsi_inst->Instruction.Saturate) {
1331 assert(tgsi_inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
1332 assert(!dest.dest.is_ssa);
1333 ttn_move_dest(b, dest, nir_fsat(b, ttn_src_for_dest(b, &dest)));
1334 }
1335 }
1336
1337 /**
1338 * Puts a NIR intrinsic to store of each TGSI_FILE_OUTPUT value to the output
1339 * variables at the end of the shader.
1340 *
1341 * We don't generate these incrementally as the TGSI_FILE_OUTPUT values are
1342 * written, because there's no output load intrinsic, which means we couldn't
1343 * handle writemasks.
1344 */
1345 static void
1346 ttn_add_output_stores(struct ttn_compile *c)
1347 {
1348 nir_builder *b = &c->build;
1349
1350 foreach_list_typed(nir_variable, var, node, &b->shader->outputs) {
1351 unsigned array_len = MAX2(glsl_get_length(var->type), 1);
1352 unsigned i;
1353
1354 for (i = 0; i < array_len; i++) {
1355 nir_intrinsic_instr *store =
1356 nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output);
1357 store->num_components = 4;
1358 store->const_index[0] = var->data.driver_location + i;
1359 store->const_index[1] = 1;
1360 store->src[0].reg.reg = c->output_regs[var->data.driver_location].reg;
1361 nir_instr_insert_after_cf_list(b->cf_node_list, &store->instr);
1362 }
1363 }
1364 }
1365
1366 struct nir_shader *
1367 tgsi_to_nir(const void *tgsi_tokens,
1368 const nir_shader_compiler_options *options)
1369 {
1370 struct tgsi_parse_context parser;
1371 struct tgsi_shader_info scan;
1372 struct ttn_compile *c;
1373 struct nir_shader *s;
1374 int ret;
1375
1376 c = rzalloc(NULL, struct ttn_compile);
1377 s = nir_shader_create(NULL, options);
1378
1379 nir_function *func = nir_function_create(s, "main");
1380 nir_function_overload *overload = nir_function_overload_create(func);
1381 nir_function_impl *impl = nir_function_impl_create(overload);
1382
1383 nir_builder_init(&c->build, impl);
1384 nir_builder_insert_after_cf_list(&c->build, &impl->body);
1385
1386 tgsi_scan_shader(tgsi_tokens, &scan);
1387 c->scan = &scan;
1388
1389 s->num_inputs = scan.file_max[TGSI_FILE_INPUT] + 1;
1390 s->num_uniforms = scan.file_max[TGSI_FILE_CONSTANT] + 1;
1391 s->num_outputs = scan.file_max[TGSI_FILE_OUTPUT] + 1;
1392
1393 c->output_regs = rzalloc_array(c, struct ttn_reg_info,
1394 scan.file_max[TGSI_FILE_OUTPUT] + 1);
1395 c->temp_regs = rzalloc_array(c, struct ttn_reg_info,
1396 scan.file_max[TGSI_FILE_TEMPORARY] + 1);
1397 c->imm_defs = rzalloc_array(c, nir_ssa_def *,
1398 scan.file_max[TGSI_FILE_IMMEDIATE] + 1);
1399
1400 c->if_stack = rzalloc_array(c, struct exec_list *,
1401 (scan.opcode_count[TGSI_OPCODE_IF] +
1402 scan.opcode_count[TGSI_OPCODE_UIF]) * 2);
1403 c->loop_stack = rzalloc_array(c, struct exec_list *,
1404 scan.opcode_count[TGSI_OPCODE_BGNLOOP]);
1405
1406 ret = tgsi_parse_init(&parser, tgsi_tokens);
1407 assert(ret == TGSI_PARSE_OK);
1408
1409 while (!tgsi_parse_end_of_tokens(&parser)) {
1410 tgsi_parse_token(&parser);
1411 c->token = &parser.FullToken;
1412
1413 switch (parser.FullToken.Token.Type) {
1414 case TGSI_TOKEN_TYPE_DECLARATION:
1415 ttn_emit_declaration(c);
1416 break;
1417
1418 case TGSI_TOKEN_TYPE_INSTRUCTION:
1419 ttn_emit_instruction(c);
1420 break;
1421
1422 case TGSI_TOKEN_TYPE_IMMEDIATE:
1423 ttn_emit_immediate(c);
1424 break;
1425 }
1426 }
1427
1428 tgsi_parse_free(&parser);
1429
1430 ttn_add_output_stores(c);
1431
1432 ralloc_free(c);
1433 return s;
1434 }