src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c

   1 /*
   2  * (C) Copyright IBM Corporation 2008
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
  19  * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file
  27  * Real-time assembly generation interface for Cell B.E. SPEs.
  28  *
  29  * \author Ian Romanick <idr@us.ibm.com>
  30  * \author Brian Paul
  31  */
  32
  33
  34 #include <stdio.h>
  35 #include "pipe/p_compiler.h"
  36 #include "util/u_memory.h"
  37 #include "rtasm_ppc_spe.h"
  38
  39
  40 #ifdef GALLIUM_CELL
  41 /**
  42  * SPE instruction types
  43  *
  44  * There are 6 primary instruction encodings used on the Cell's SPEs.  Each of
  45  * the following unions encodes one type.
  46  *
  47  * \bug
  48  * If, at some point, we start generating SPE code from a little-endian host
  49  * these unions will not work.
  50  */
  51 /*@{*/
  52 /**
  53  * Encode one output register with two input registers
  54  */
  55 union spe_inst_RR {
  56     uint32_t bits;
  57     struct {
  58         unsigned op:11;
  59         unsigned rB:7;
  60         unsigned rA:7;
  61         unsigned rT:7;
  62     } inst;
  63 };
  64
  65
  66 /**
  67  * Encode one output register with three input registers
  68  */
  69 union spe_inst_RRR {
  70     uint32_t bits;
  71     struct {
  72         unsigned op:4;
  73         unsigned rT:7;
  74         unsigned rB:7;
  75         unsigned rA:7;
  76         unsigned rC:7;
  77     } inst;
  78 };
  79
  80
  81 /**
  82  * Encode one output register with one input reg. and a 7-bit signed immed
  83  */
  84 union spe_inst_RI7 {
  85     uint32_t bits;
  86     struct {
  87         unsigned op:11;
  88         unsigned i7:7;
  89         unsigned rA:7;
  90         unsigned rT:7;
  91     } inst;
  92 };
  93
  94
  95 /**
  96  * Encode one output register with one input reg. and an 8-bit signed immed
  97  */
  98 union spe_inst_RI8 {
  99     uint32_t bits;
 100     struct {
 101         unsigned op:10;
 102         unsigned i8:8;
 103         unsigned rA:7;
 104         unsigned rT:7;
 105     } inst;
 106 };
 107
 108
 109 /**
 110  * Encode one output register with one input reg. and a 10-bit signed immed
 111  */
 112 union spe_inst_RI10 {
 113     uint32_t bits;
 114     struct {
 115         unsigned op:8;
 116         unsigned i10:10;
 117         unsigned rA:7;
 118         unsigned rT:7;
 119     } inst;
 120 };
 121
 122
 123 /**
 124  * Encode one output register with a 16-bit signed immediate
 125  */
 126 union spe_inst_RI16 {
 127     uint32_t bits;
 128     struct {
 129         unsigned op:9;
 130         unsigned i16:16;
 131         unsigned rT:7;
 132     } inst;
 133 };
 134
 135
 136 /**
 137  * Encode one output register with a 18-bit signed immediate
 138  */
 139 union spe_inst_RI18 {
 140     uint32_t bits;
 141     struct {
 142         unsigned op:7;
 143         unsigned i18:18;
 144         unsigned rT:7;
 145     } inst;
 146 };
 147 /*@}*/
 148
 149
 150 static void
 151 indent(const struct spe_function *p)
 152 {
 153    int i;
 154    for (i = 0; i < p->indent; i++) {
 155       putchar(' ');
 156    }
 157 }
 158
 159
 160 static const char *
 161 rem_prefix(const char *longname)
 162 {
 163    return longname + 4;
 164 }
 165
 166
 167 static void emit_RR(struct spe_function *p, unsigned op, unsigned rT,
 168                     unsigned rA, unsigned rB, const char *name)
 169 {
 170     union spe_inst_RR inst;
 171     inst.inst.op = op;
 172     inst.inst.rB = rB;
 173     inst.inst.rA = rA;
 174     inst.inst.rT = rT;
 175     p->store[p->num_inst++] = inst.bits;
 176     assert(p->num_inst <= p->max_inst);
 177     if (p->print) {
 178        indent(p);
 179        printf("%s\t$%d, $%d, $%d\n", rem_prefix(name), rT, rA, rB);
 180     }
 181 }
 182
 183
 184 static void emit_RRR(struct spe_function *p, unsigned op, unsigned rT,
 185                      unsigned rA, unsigned rB, unsigned rC, const char *name)
 186 {
 187     union spe_inst_RRR inst;
 188     inst.inst.op = op;
 189     inst.inst.rT = rT;
 190     inst.inst.rB = rB;
 191     inst.inst.rA = rA;
 192     inst.inst.rC = rC;
 193     p->store[p->num_inst++] = inst.bits;
 194     assert(p->num_inst <= p->max_inst);
 195     if (p->print) {
 196        indent(p);
 197        printf("%s\t$%d, $%d, $%d, $%d\n", rem_prefix(name), rT, rA, rB, rC);
 198     }
 199 }
 200
 201
 202 static void emit_RI7(struct spe_function *p, unsigned op, unsigned rT,
 203                      unsigned rA, int imm, const char *name)
 204 {
 205     union spe_inst_RI7 inst;
 206     inst.inst.op = op;
 207     inst.inst.i7 = imm;
 208     inst.inst.rA = rA;
 209     inst.inst.rT = rT;
 210     p->store[p->num_inst++] = inst.bits;
 211     assert(p->num_inst <= p->max_inst);
 212     if (p->print) {
 213        indent(p);
 214        printf("%s\t$%d, $%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 215     }
 216 }
 217
 218
 219
 220 static void emit_RI8(struct spe_function *p, unsigned op, unsigned rT,
 221                      unsigned rA, int imm, const char *name)
 222 {
 223     union spe_inst_RI8 inst;
 224     inst.inst.op = op;
 225     inst.inst.i8 = imm;
 226     inst.inst.rA = rA;
 227     inst.inst.rT = rT;
 228     p->store[p->num_inst++] = inst.bits;
 229     assert(p->num_inst <= p->max_inst);
 230     if (p->print) {
 231        indent(p);
 232        printf("%s\t$%d, $%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 233     }
 234 }
 235
 236
 237
 238 static void emit_RI10(struct spe_function *p, unsigned op, unsigned rT,
 239                       unsigned rA, int imm, const char *name)
 240 {
 241     union spe_inst_RI10 inst;
 242     inst.inst.op = op;
 243     inst.inst.i10 = imm;
 244     inst.inst.rA = rA;
 245     inst.inst.rT = rT;
 246     p->store[p->num_inst++] = inst.bits;
 247     assert(p->num_inst <= p->max_inst);
 248     if (p->print) {
 249        indent(p);
 250        if (strcmp(name, "spe_lqd") == 0 ||
 251            strcmp(name, "spe_stqd") == 0)
 252           printf("%s\t$%d, 0x%x($%d)\n", rem_prefix(name), rT, imm, rA);
 253        else
 254           printf("%s\t$%d, $%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 255     }
 256 }
 257
 258
 259 static void emit_RI16(struct spe_function *p, unsigned op, unsigned rT,
 260                       int imm, const char *name)
 261 {
 262     union spe_inst_RI16 inst;
 263     inst.inst.op = op;
 264     inst.inst.i16 = imm;
 265     inst.inst.rT = rT;
 266     p->store[p->num_inst++] = inst.bits;
 267     assert(p->num_inst <= p->max_inst);
 268     if (p->print) {
 269        indent(p);
 270        printf("%s\t$%d, 0x%x\n", rem_prefix(name), rT, imm);
 271     }
 272 }
 273
 274
 275 static void emit_RI18(struct spe_function *p, unsigned op, unsigned rT,
 276                       int imm, const char *name)
 277 {
 278     union spe_inst_RI18 inst;
 279     inst.inst.op = op;
 280     inst.inst.i18 = imm;
 281     inst.inst.rT = rT;
 282     p->store[p->num_inst++] = inst.bits;
 283     assert(p->num_inst <= p->max_inst);
 284     if (p->print) {
 285        indent(p);
 286        printf("%s\t$%d, 0x%x\n", rem_prefix(name), rT, imm);
 287     }
 288 }
 289
 290
 291
 292
 293 #define EMIT_(_name, _op) \
 294 void _name (struct spe_function *p, unsigned rT) \
 295 { \
 296    emit_RR(p, _op, rT, 0, 0, __FUNCTION__); \
 297 }
 298
 299 #define EMIT_R(_name, _op) \
 300 void _name (struct spe_function *p, unsigned rT, unsigned rA) \
 301 { \
 302    emit_RR(p, _op, rT, rA, 0, __FUNCTION__);                 \
 303 }
 304
 305 #define EMIT_RR(_name, _op) \
 306 void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB) \
 307 { \
 308    emit_RR(p, _op, rT, rA, rB, __FUNCTION__);                \
 309 }
 310
 311 #define EMIT_RRR(_name, _op) \
 312 void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB, unsigned rC) \
 313 { \
 314    emit_RRR(p, _op, rT, rA, rB, rC, __FUNCTION__);           \
 315 }
 316
 317 #define EMIT_RI7(_name, _op) \
 318 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 319 { \
 320    emit_RI7(p, _op, rT, rA, imm, __FUNCTION__);              \
 321 }
 322
 323 #define EMIT_RI8(_name, _op, bias) \
 324 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 325 { \
 326    emit_RI8(p, _op, rT, rA, bias - imm, __FUNCTION__);       \
 327 }
 328
 329 #define EMIT_RI10(_name, _op) \
 330 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 331 { \
 332    emit_RI10(p, _op, rT, rA, imm, __FUNCTION__);             \
 333 }
 334
 335 #define EMIT_RI16(_name, _op) \
 336 void _name (struct spe_function *p, unsigned rT, int imm) \
 337 { \
 338    emit_RI16(p, _op, rT, imm, __FUNCTION__);                 \
 339 }
 340
 341 #define EMIT_RI18(_name, _op) \
 342 void _name (struct spe_function *p, unsigned rT, int imm) \
 343 { \
 344    emit_RI18(p, _op, rT, imm, __FUNCTION__);                 \
 345 }
 346
 347 #define EMIT_I16(_name, _op) \
 348 void _name (struct spe_function *p, int imm) \
 349 { \
 350    emit_RI16(p, _op, 0, imm, __FUNCTION__);                  \
 351 }
 352
 353 #include "rtasm_ppc_spe.h"
 354
 355
 356 /**
 357  * Initialize an spe_function.
 358  * \param code_size  size of instruction buffer to allocate, in bytes.
 359  */
 360 void spe_init_func(struct spe_function *p, unsigned code_size)
 361 {
 362     p->store = align_malloc(code_size, 16);
 363     p->num_inst = 0;
 364     p->max_inst = code_size / SPE_INST_SIZE;
 365
 366     /* Conservatively treat R0 - R2 and R80 - R127 as non-volatile.
 367      */
 368     p->regs[0] = ~7;
 369     p->regs[1] = (1U << (80 - 64)) - 1;
 370
 371     p->print = false;
 372     p->indent = 0;
 373 }
 374
 375
 376 void spe_release_func(struct spe_function *p)
 377 {
 378     assert(p->num_inst <= p->max_inst);
 379     if (p->store != NULL) {
 380         align_free(p->store);
 381     }
 382     p->store = NULL;
 383 }
 384
 385
 386 /** Return current code size in bytes. */
 387 unsigned spe_code_size(const struct spe_function *p)
 388 {
 389    return p->num_inst * SPE_INST_SIZE;
 390 }
 391
 392
 393 /**
 394  * Allocate a SPE register.
 395  * \return register index or -1 if none left.
 396  */
 397 int spe_allocate_available_register(struct spe_function *p)
 398 {
 399    unsigned i;
 400    for (i = 0; i < SPE_NUM_REGS; i++) {
 401       const uint64_t mask = (1ULL << (i % 64));
 402       const unsigned idx = i / 64;
 403
 404       assert(idx < 2);
 405       if ((p->regs[idx] & mask) != 0) {
 406          p->regs[idx] &= ~mask;
 407          return i;
 408       }
 409    }
 410
 411    return -1;
 412 }
 413
 414
 415 /**
 416  * Mark the given SPE register as "allocated".
 417  */
 418 int spe_allocate_register(struct spe_function *p, int reg)
 419 {
 420    const unsigned idx = reg / 64;
 421    const unsigned bit = reg % 64;
 422
 423    assert(reg < SPE_NUM_REGS);
 424    assert((p->regs[idx] & (1ULL << bit)) != 0);
 425
 426    p->regs[idx] &= ~(1ULL << bit);
 427    return reg;
 428 }
 429
 430
 431 /**
 432  * Mark the given SPE register as "unallocated".
 433  */
 434 void spe_release_register(struct spe_function *p, int reg)
 435 {
 436    const unsigned idx = reg / 64;
 437    const unsigned bit = reg % 64;
 438
 439    assert(idx < 2);
 440
 441    assert(reg < SPE_NUM_REGS);
 442    assert((p->regs[idx] & (1ULL << bit)) == 0);
 443
 444    p->regs[idx] |= (1ULL << bit);
 445 }
 446
 447
 448 void
 449 spe_print_code(struct spe_function *p, boolean enable)
 450 {
 451    p->print = enable;
 452 }
 453
 454
 455 void
 456 spe_indent(struct spe_function *p, int spaces)
 457 {
 458    p->indent += spaces;
 459 }
 460
 461
 462 extern void
 463 spe_comment(struct spe_function *p, int rel_indent, const char *s)
 464 {
 465    if (p->print) {
 466       p->indent += rel_indent;
 467       indent(p);
 468       p->indent -= rel_indent;
 469       printf("# %s\n", s);
 470    }
 471 }
 472
 473
 474 /**
 475  * For branch instructions:
 476  * \param d  if 1, disable interupts if branch is taken
 477  * \param e  if 1, enable interupts if branch is taken
 478  * If d and e are both zero, don't change interupt status (right?)
 479  */
 480
 481 /** Branch Indirect to address in rA */
 482 void spe_bi(struct spe_function *p, unsigned rA, int d, int e)
 483 {
 484    emit_RI7(p, 0x1a8, 0, rA, (d << 5) | (e << 4), __FUNCTION__);
 485 }
 486
 487 /** Interupt Return */
 488 void spe_iret(struct spe_function *p, unsigned rA, int d, int e)
 489 {
 490    emit_RI7(p, 0x1aa, 0, rA, (d << 5) | (e << 4), __FUNCTION__);
 491 }
 492
 493 /** Branch indirect and set link on external data */
 494 void spe_bisled(struct spe_function *p, unsigned rT, unsigned rA, int d,
 495                 int e)
 496 {
 497    emit_RI7(p, 0x1ab, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 498 }
 499
 500 /** Branch indirect and set link.  Save PC in rT, jump to rA. */
 501 void spe_bisl(struct spe_function *p, unsigned rT, unsigned rA, int d,
 502                 int e)
 503 {
 504    emit_RI7(p, 0x1a9, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 505 }
 506
 507 /** Branch indirect if zero word.  If rT.word[0]==0, jump to rA. */
 508 void spe_biz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 509 {
 510    emit_RI7(p, 0x128, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 511 }
 512
 513 /** Branch indirect if non-zero word.  If rT.word[0]!=0, jump to rA. */
 514 void spe_binz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 515 {
 516    emit_RI7(p, 0x129, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 517 }
 518
 519 /** Branch indirect if zero halfword.  If rT.halfword[1]==0, jump to rA. */
 520 void spe_bihz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 521 {
 522    emit_RI7(p, 0x12a, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 523 }
 524
 525 /** Branch indirect if non-zero halfword.  If rT.halfword[1]!=0, jump to rA. */
 526 void spe_bihnz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 527 {
 528    emit_RI7(p, 0x12b, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 529 }
 530
 531
 532 /* Hint-for-branch instructions
 533  */
 534 #if 0
 535 hbr;
 536 hbra;
 537 hbrr;
 538 #endif
 539
 540
 541 /* Control instructions
 542  */
 543 #if 0
 544 stop;
 545 EMIT_RR  (spe_stopd, 0x140);
 546 EMIT_    (spe_lnop,  0x001);
 547 EMIT_    (spe_nop,   0x201);
 548 sync;
 549 EMIT_    (spe_dsync, 0x003);
 550 EMIT_R   (spe_mfspr, 0x00c);
 551 EMIT_R   (spe_mtspr, 0x10c);
 552 #endif
 553
 554
 555 /**
 556  ** Helper / "macro" instructions.
 557  ** Use somewhat verbose names as a reminder that these aren't native
 558  ** SPE instructions.
 559  **/
 560
 561
 562 void
 563 spe_load_float(struct spe_function *p, unsigned rT, float x)
 564 {
 565    if (x == 0.0f) {
 566       spe_il(p, rT, 0x0);
 567    }
 568    else if (x == 0.5f) {
 569       spe_ilhu(p, rT, 0x3f00);
 570    }
 571    else if (x == 1.0f) {
 572       spe_ilhu(p, rT, 0x3f80);
 573    }
 574    else if (x == -1.0f) {
 575       spe_ilhu(p, rT, 0xbf80);
 576    }
 577    else {
 578       union {
 579          float f;
 580          unsigned u;
 581       } bits;
 582       bits.f = x;
 583       spe_ilhu(p, rT, bits.u >> 16);
 584       spe_iohl(p, rT, bits.u & 0xffff);
 585    }
 586 }
 587
 588
 589 void
 590 spe_load_int(struct spe_function *p, unsigned rT, int i)
 591 {
 592    if (-32768 <= i && i <= 32767) {
 593       spe_il(p, rT, i);
 594    }
 595    else {
 596       spe_ilhu(p, rT, i >> 16);
 597       if (i & 0xffff)
 598          spe_iohl(p, rT, i & 0xffff);
 599    }
 600 }
 601
 602 void spe_load_uint(struct spe_function *p, unsigned rT, unsigned int ui)
 603 {
 604    /* If the whole value is in the lower 18 bits, use ila, which
 605     * doesn't sign-extend.  Otherwise, if the two halfwords of
 606     * the constant are identical, use ilh.  Otherwise, we have
 607     * to use ilhu followed by iohl.
 608     */
 609    if ((ui & 0xfffc0000) == ui) {
 610       spe_ila(p, rT, ui);
 611    }
 612    else if ((ui >> 16) == (ui & 0xffff)) {
 613       spe_ilh(p, rT, ui & 0xffff);
 614    }
 615    else {
 616       spe_ilhu(p, rT, ui >> 16);
 617       if (ui & 0xffff)
 618          spe_iohl(p, rT, ui & 0xffff);
 619    }
 620 }
 621
 622
 623 void
 624 spe_splat(struct spe_function *p, unsigned rT, unsigned rA)
 625 {
 626    /* Duplicate bytes 0, 1, 2, and 3 across the whole register */
 627    spe_ila(p, rT, 0x00010203);
 628    spe_shufb(p, rT, rA, rA, rT);
 629 }
 630
 631
 632 void
 633 spe_complement(struct spe_function *p, unsigned rT, unsigned rA)
 634 {
 635    spe_nor(p, rT, rA, rA);
 636 }
 637
 638
 639 void
 640 spe_move(struct spe_function *p, unsigned rT, unsigned rA)
 641 {
 642    /* Use different instructions depending on the instruction address
 643     * to take advantage of the dual pipelines.
 644     */
 645    if (p->num_inst & 1)
 646       spe_shlqbyi(p, rT, rA, 0);  /* odd pipe */
 647    else
 648       spe_ori(p, rT, rA, 0);  /* even pipe */
 649 }
 650
 651
 652 void
 653 spe_zero(struct spe_function *p, unsigned rT)
 654 {
 655    spe_xor(p, rT, rT, rT);
 656 }
 657
 658
 659 void
 660 spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
 661 {
 662    assert(word >= 0);
 663    assert(word <= 3);
 664
 665    if (word == 0) {
 666       int tmp1 = rT;
 667       spe_ila(p, tmp1, 66051);
 668       spe_shufb(p, rT, rA, rA, tmp1);
 669    }
 670    else {
 671       /* XXX review this, we may not need the rotqbyi instruction */
 672       int tmp1 = rT;
 673       int tmp2 = spe_allocate_available_register(p);
 674
 675       spe_ila(p, tmp1, 66051);
 676       spe_rotqbyi(p, tmp2, rA, 4 * word);
 677       spe_shufb(p, rT, tmp2, tmp2, tmp1);
 678
 679       spe_release_register(p, tmp2);
 680    }
 681 }
 682
 683 /**
 684  * For each 32-bit float element of rA and rB, choose the smaller of the
 685  * two, compositing them into the rT register.
 686  *
 687  * The Float Compare Greater Than (fcgt) instruction will put 1s into
 688  * compare_reg where rA > rB, and 0s where rA <= rB.
 689  *
 690  * Then the Select Bits (selb) instruction will take bits from rA where
 691  * compare_reg is 0, and from rB where compare_reg is 1; i.e., from rA
 692  * where rA <= rB and from rB where rB > rA, which is exactly the
 693  * "min" operation.
 694  *
 695  * The compare_reg could in many cases be the same as rT, unless
 696  * rT == rA || rt == rB.  But since this is common in constructions
 697  * like "x = min(x, a)", we always allocate a new register to be safe.
 698  */
 699 void
 700 spe_float_min(struct spe_function *p, unsigned rT, unsigned rA, unsigned rB)
 701 {
 702    unsigned int compare_reg = spe_allocate_available_register(p);
 703    spe_fcgt(p, compare_reg, rA, rB);
 704    spe_selb(p, rT, rA, rB, compare_reg);
 705    spe_release_register(p, compare_reg);
 706 }
 707
 708 /**
 709  * For each 32-bit float element of rA and rB, choose the greater of the
 710  * two, compositing them into the rT register.
 711  *
 712  * The logic is similar to that of spe_float_min() above; the only
 713  * difference is that the registers on spe_selb() have been reversed,
 714  * so that the larger of the two is selected instead of the smaller.
 715  */
 716 void
 717 spe_float_max(struct spe_function *p, unsigned rT, unsigned rA, unsigned rB)
 718 {
 719    unsigned int compare_reg = spe_allocate_available_register(p);
 720    spe_fcgt(p, compare_reg, rA, rB);
 721    spe_selb(p, rT, rB, rA, compare_reg);
 722    spe_release_register(p, compare_reg);
 723 }
 724
 725 #endif /* GALLIUM_CELL */