src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c

   1 /*
   2  * (C) Copyright IBM Corporation 2008
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
  19  * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file
  27  * Real-time assembly generation interface for Cell B.E. SPEs.
  28  *
  29  * \author Ian Romanick <idr@us.ibm.com>
  30  * \author Brian Paul
  31  */
  32
  33
  34 #include <stdio.h>
  35 #include "pipe/p_compiler.h"
  36 #include "util/u_memory.h"
  37 #include "rtasm_ppc_spe.h"
  38
  39
  40 #ifdef GALLIUM_CELL
  41 /**
  42  * SPE instruction types
  43  *
  44  * There are 6 primary instruction encodings used on the Cell's SPEs.  Each of
  45  * the following unions encodes one type.
  46  *
  47  * \bug
  48  * If, at some point, we start generating SPE code from a little-endian host
  49  * these unions will not work.
  50  */
  51 /*@{*/
  52 /**
  53  * Encode one output register with two input registers
  54  */
  55 union spe_inst_RR {
  56     uint32_t bits;
  57     struct {
  58         unsigned op:11;
  59         unsigned rB:7;
  60         unsigned rA:7;
  61         unsigned rT:7;
  62     } inst;
  63 };
  64
  65
  66 /**
  67  * Encode one output register with three input registers
  68  */
  69 union spe_inst_RRR {
  70     uint32_t bits;
  71     struct {
  72         unsigned op:4;
  73         unsigned rT:7;
  74         unsigned rB:7;
  75         unsigned rA:7;
  76         unsigned rC:7;
  77     } inst;
  78 };
  79
  80
  81 /**
  82  * Encode one output register with one input reg. and a 7-bit signed immed
  83  */
  84 union spe_inst_RI7 {
  85     uint32_t bits;
  86     struct {
  87         unsigned op:11;
  88         unsigned i7:7;
  89         unsigned rA:7;
  90         unsigned rT:7;
  91     } inst;
  92 };
  93
  94
  95 /**
  96  * Encode one output register with one input reg. and an 8-bit signed immed
  97  */
  98 union spe_inst_RI8 {
  99     uint32_t bits;
 100     struct {
 101         unsigned op:10;
 102         unsigned i8:8;
 103         unsigned rA:7;
 104         unsigned rT:7;
 105     } inst;
 106 };
 107
 108
 109 /**
 110  * Encode one output register with one input reg. and a 10-bit signed immed
 111  */
 112 union spe_inst_RI10 {
 113     uint32_t bits;
 114     struct {
 115         unsigned op:8;
 116         unsigned i10:10;
 117         unsigned rA:7;
 118         unsigned rT:7;
 119     } inst;
 120 };
 121
 122
 123 /**
 124  * Encode one output register with a 16-bit signed immediate
 125  */
 126 union spe_inst_RI16 {
 127     uint32_t bits;
 128     struct {
 129         unsigned op:9;
 130         unsigned i16:16;
 131         unsigned rT:7;
 132     } inst;
 133 };
 134
 135
 136 /**
 137  * Encode one output register with a 18-bit signed immediate
 138  */
 139 union spe_inst_RI18 {
 140     uint32_t bits;
 141     struct {
 142         unsigned op:7;
 143         unsigned i18:18;
 144         unsigned rT:7;
 145     } inst;
 146 };
 147 /*@}*/
 148
 149
 150 static void
 151 indent(const struct spe_function *p)
 152 {
 153    int i;
 154    for (i = 0; i < p->indent; i++) {
 155       putchar(' ');
 156    }
 157 }
 158
 159
 160 static const char *
 161 rem_prefix(const char *longname)
 162 {
 163    return longname + 4;
 164 }
 165
 166
 167 static void emit_RR(struct spe_function *p, unsigned op, unsigned rT,
 168                     unsigned rA, unsigned rB, const char *name)
 169 {
 170     union spe_inst_RR inst;
 171     inst.inst.op = op;
 172     inst.inst.rB = rB;
 173     inst.inst.rA = rA;
 174     inst.inst.rT = rT;
 175     p->store[p->num_inst++] = inst.bits;
 176     assert(p->num_inst <= p->max_inst);
 177     if (p->print) {
 178        indent(p);
 179        printf("%s\t$%d, $%d, $%d\n", rem_prefix(name), rT, rA, rB);
 180     }
 181 }
 182
 183
 184 static void emit_RRR(struct spe_function *p, unsigned op, unsigned rT,
 185                      unsigned rA, unsigned rB, unsigned rC, const char *name)
 186 {
 187     union spe_inst_RRR inst;
 188     inst.inst.op = op;
 189     inst.inst.rT = rT;
 190     inst.inst.rB = rB;
 191     inst.inst.rA = rA;
 192     inst.inst.rC = rC;
 193     p->store[p->num_inst++] = inst.bits;
 194     assert(p->num_inst <= p->max_inst);
 195     if (p->print) {
 196        indent(p);
 197        printf("%s\t$%d, $%d, $%d, $%d\n", rem_prefix(name), rT, rA, rB, rC);
 198     }
 199 }
 200
 201
 202 static void emit_RI7(struct spe_function *p, unsigned op, unsigned rT,
 203                      unsigned rA, int imm, const char *name)
 204 {
 205     union spe_inst_RI7 inst;
 206     inst.inst.op = op;
 207     inst.inst.i7 = imm;
 208     inst.inst.rA = rA;
 209     inst.inst.rT = rT;
 210     p->store[p->num_inst++] = inst.bits;
 211     assert(p->num_inst <= p->max_inst);
 212     if (p->print) {
 213        indent(p);
 214        printf("%s\t$%d, $%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 215     }
 216 }
 217
 218
 219
 220 static void emit_RI8(struct spe_function *p, unsigned op, unsigned rT,
 221                      unsigned rA, int imm, const char *name)
 222 {
 223     union spe_inst_RI8 inst;
 224     inst.inst.op = op;
 225     inst.inst.i8 = imm;
 226     inst.inst.rA = rA;
 227     inst.inst.rT = rT;
 228     p->store[p->num_inst++] = inst.bits;
 229     assert(p->num_inst <= p->max_inst);
 230     if (p->print) {
 231        indent(p);
 232        printf("%s\t$%d, $%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 233     }
 234 }
 235
 236
 237
 238 static void emit_RI10(struct spe_function *p, unsigned op, unsigned rT,
 239                       unsigned rA, int imm, const char *name)
 240 {
 241     union spe_inst_RI10 inst;
 242     inst.inst.op = op;
 243     inst.inst.i10 = imm;
 244     inst.inst.rA = rA;
 245     inst.inst.rT = rT;
 246     p->store[p->num_inst++] = inst.bits;
 247     assert(p->num_inst <= p->max_inst);
 248     if (p->print) {
 249        indent(p);
 250        if (strcmp(name, "spe_lqd") == 0 ||
 251            strcmp(name, "spe_stqd") == 0)
 252           printf("%s\t$%d, 0x%x($%d)\n", rem_prefix(name), rT, imm, rA);
 253        else
 254           printf("%s\t$%d, $%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 255     }
 256 }
 257
 258
 259 static void emit_RI16(struct spe_function *p, unsigned op, unsigned rT,
 260                       int imm, const char *name)
 261 {
 262     union spe_inst_RI16 inst;
 263     inst.inst.op = op;
 264     inst.inst.i16 = imm;
 265     inst.inst.rT = rT;
 266     p->store[p->num_inst++] = inst.bits;
 267     assert(p->num_inst <= p->max_inst);
 268     if (p->print) {
 269        indent(p);
 270        printf("%s\t$%d, 0x%x\n", rem_prefix(name), rT, imm);
 271     }
 272 }
 273
 274
 275 static void emit_RI18(struct spe_function *p, unsigned op, unsigned rT,
 276                       int imm, const char *name)
 277 {
 278     union spe_inst_RI18 inst;
 279     inst.inst.op = op;
 280     inst.inst.i18 = imm;
 281     inst.inst.rT = rT;
 282     p->store[p->num_inst++] = inst.bits;
 283     assert(p->num_inst <= p->max_inst);
 284     if (p->print) {
 285        indent(p);
 286        printf("%s\t$%d, 0x%x\n", rem_prefix(name), rT, imm);
 287     }
 288 }
 289
 290
 291
 292
 293 #define EMIT_(_name, _op) \
 294 void _name (struct spe_function *p, unsigned rT) \
 295 { \
 296    emit_RR(p, _op, rT, 0, 0, __FUNCTION__); \
 297 }
 298
 299 #define EMIT_R(_name, _op) \
 300 void _name (struct spe_function *p, unsigned rT, unsigned rA) \
 301 { \
 302    emit_RR(p, _op, rT, rA, 0, __FUNCTION__);                 \
 303 }
 304
 305 #define EMIT_RR(_name, _op) \
 306 void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB) \
 307 { \
 308    emit_RR(p, _op, rT, rA, rB, __FUNCTION__);                \
 309 }
 310
 311 #define EMIT_RRR(_name, _op) \
 312 void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB, unsigned rC) \
 313 { \
 314    emit_RRR(p, _op, rT, rA, rB, rC, __FUNCTION__);           \
 315 }
 316
 317 #define EMIT_RI7(_name, _op) \
 318 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 319 { \
 320    emit_RI7(p, _op, rT, rA, imm, __FUNCTION__);              \
 321 }
 322
 323 #define EMIT_RI8(_name, _op, bias) \
 324 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 325 { \
 326    emit_RI8(p, _op, rT, rA, bias - imm, __FUNCTION__);       \
 327 }
 328
 329 #define EMIT_RI10(_name, _op) \
 330 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 331 { \
 332    emit_RI10(p, _op, rT, rA, imm, __FUNCTION__);             \
 333 }
 334
 335 #define EMIT_RI16(_name, _op) \
 336 void _name (struct spe_function *p, unsigned rT, int imm) \
 337 { \
 338    emit_RI16(p, _op, rT, imm, __FUNCTION__);                 \
 339 }
 340
 341 #define EMIT_RI18(_name, _op) \
 342 void _name (struct spe_function *p, unsigned rT, int imm) \
 343 { \
 344    emit_RI18(p, _op, rT, imm, __FUNCTION__);                 \
 345 }
 346
 347 #define EMIT_I16(_name, _op) \
 348 void _name (struct spe_function *p, int imm) \
 349 { \
 350    emit_RI16(p, _op, 0, imm, __FUNCTION__);                  \
 351 }
 352
 353 #include "rtasm_ppc_spe.h"
 354
 355
 356 /**
 357  * Initialize an spe_function.
 358  * \param code_size  size of instruction buffer to allocate, in bytes.
 359  */
 360 void spe_init_func(struct spe_function *p, unsigned code_size)
 361 {
 362     p->store = align_malloc(code_size, 16);
 363     p->num_inst = 0;
 364     p->max_inst = code_size / SPE_INST_SIZE;
 365
 366     /* Conservatively treat R0 - R2 and R80 - R127 as non-volatile.
 367      */
 368     p->regs[0] = ~7;
 369     p->regs[1] = (1U << (80 - 64)) - 1;
 370
 371     p->print = false;
 372     p->indent = 0;
 373 }
 374
 375
 376 void spe_release_func(struct spe_function *p)
 377 {
 378     assert(p->num_inst <= p->max_inst);
 379     if (p->store != NULL) {
 380         align_free(p->store);
 381     }
 382     p->store = NULL;
 383 }
 384
 385
 386 /**
 387  * Allocate a SPE register.
 388  * \return register index or -1 if none left.
 389  */
 390 int spe_allocate_available_register(struct spe_function *p)
 391 {
 392    unsigned i;
 393    for (i = 0; i < SPE_NUM_REGS; i++) {
 394       const uint64_t mask = (1ULL << (i % 64));
 395       const unsigned idx = i / 64;
 396
 397       assert(idx < 2);
 398       if ((p->regs[idx] & mask) != 0) {
 399          p->regs[idx] &= ~mask;
 400          return i;
 401       }
 402    }
 403
 404    return -1;
 405 }
 406
 407
 408 /**
 409  * Mark the given SPE register as "allocated".
 410  */
 411 int spe_allocate_register(struct spe_function *p, int reg)
 412 {
 413    const unsigned idx = reg / 64;
 414    const unsigned bit = reg % 64;
 415
 416    assert(reg < SPE_NUM_REGS);
 417    assert((p->regs[idx] & (1ULL << bit)) != 0);
 418
 419    p->regs[idx] &= ~(1ULL << bit);
 420    return reg;
 421 }
 422
 423
 424 /**
 425  * Mark the given SPE register as "unallocated".
 426  */
 427 void spe_release_register(struct spe_function *p, int reg)
 428 {
 429    const unsigned idx = reg / 64;
 430    const unsigned bit = reg % 64;
 431
 432    assert(idx < 2);
 433
 434    assert(reg < SPE_NUM_REGS);
 435    assert((p->regs[idx] & (1ULL << bit)) == 0);
 436
 437    p->regs[idx] |= (1ULL << bit);
 438 }
 439
 440
 441 void
 442 spe_print_code(struct spe_function *p, boolean enable)
 443 {
 444    p->print = enable;
 445 }
 446
 447
 448 void
 449 spe_indent(struct spe_function *p, int spaces)
 450 {
 451    p->indent += spaces;
 452 }
 453
 454
 455 extern void
 456 spe_comment(struct spe_function *p, int rel_indent, const char *s)
 457 {
 458    if (p->print) {
 459       p->indent += rel_indent;
 460       indent(p);
 461       p->indent -= rel_indent;
 462       printf("# %s\n", s);
 463    }
 464 }
 465
 466
 467 /**
 468  * For branch instructions:
 469  * \param d  if 1, disable interupts if branch is taken
 470  * \param e  if 1, enable interupts if branch is taken
 471  * If d and e are both zero, don't change interupt status (right?)
 472  */
 473
 474 /** Branch Indirect to address in rA */
 475 void spe_bi(struct spe_function *p, unsigned rA, int d, int e)
 476 {
 477    emit_RI7(p, 0x1a8, 0, rA, (d << 5) | (e << 4), __FUNCTION__);
 478 }
 479
 480 /** Interupt Return */
 481 void spe_iret(struct spe_function *p, unsigned rA, int d, int e)
 482 {
 483    emit_RI7(p, 0x1aa, 0, rA, (d << 5) | (e << 4), __FUNCTION__);
 484 }
 485
 486 /** Branch indirect and set link on external data */
 487 void spe_bisled(struct spe_function *p, unsigned rT, unsigned rA, int d,
 488                 int e)
 489 {
 490    emit_RI7(p, 0x1ab, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 491 }
 492
 493 /** Branch indirect and set link.  Save PC in rT, jump to rA. */
 494 void spe_bisl(struct spe_function *p, unsigned rT, unsigned rA, int d,
 495                 int e)
 496 {
 497    emit_RI7(p, 0x1a9, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 498 }
 499
 500 /** Branch indirect if zero word.  If rT.word[0]==0, jump to rA. */
 501 void spe_biz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 502 {
 503    emit_RI7(p, 0x128, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 504 }
 505
 506 /** Branch indirect if non-zero word.  If rT.word[0]!=0, jump to rA. */
 507 void spe_binz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 508 {
 509    emit_RI7(p, 0x129, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 510 }
 511
 512 /** Branch indirect if zero halfword.  If rT.halfword[1]==0, jump to rA. */
 513 void spe_bihz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 514 {
 515    emit_RI7(p, 0x12a, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 516 }
 517
 518 /** Branch indirect if non-zero halfword.  If rT.halfword[1]!=0, jump to rA. */
 519 void spe_bihnz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 520 {
 521    emit_RI7(p, 0x12b, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 522 }
 523
 524
 525 /* Hint-for-branch instructions
 526  */
 527 #if 0
 528 hbr;
 529 hbra;
 530 hbrr;
 531 #endif
 532
 533
 534 /* Control instructions
 535  */
 536 #if 0
 537 stop;
 538 EMIT_RR  (spe_stopd, 0x140);
 539 EMIT_    (spe_lnop,  0x001);
 540 EMIT_    (spe_nop,   0x201);
 541 sync;
 542 EMIT_    (spe_dsync, 0x003);
 543 EMIT_R   (spe_mfspr, 0x00c);
 544 EMIT_R   (spe_mtspr, 0x10c);
 545 #endif
 546
 547
 548 /**
 549  ** Helper / "macro" instructions.
 550  ** Use somewhat verbose names as a reminder that these aren't native
 551  ** SPE instructions.
 552  **/
 553
 554
 555 void
 556 spe_load_float(struct spe_function *p, unsigned rT, float x)
 557 {
 558    if (x == 0.0f) {
 559       spe_il(p, rT, 0x0);
 560    }
 561    else if (x == 0.5f) {
 562       spe_ilhu(p, rT, 0x3f00);
 563    }
 564    else if (x == 1.0f) {
 565       spe_ilhu(p, rT, 0x3f80);
 566    }
 567    else if (x == -1.0f) {
 568       spe_ilhu(p, rT, 0xbf80);
 569    }
 570    else {
 571       union {
 572          float f;
 573          unsigned u;
 574       } bits;
 575       bits.f = x;
 576       spe_ilhu(p, rT, bits.u >> 16);
 577       spe_iohl(p, rT, bits.u & 0xffff);
 578    }
 579 }
 580
 581
 582 void
 583 spe_load_int(struct spe_function *p, unsigned rT, int i)
 584 {
 585    if (-32768 <= i && i <= 32767) {
 586       spe_il(p, rT, i);
 587    }
 588    else {
 589       spe_ilhu(p, rT, i >> 16);
 590       if (i & 0xffff)
 591          spe_iohl(p, rT, i & 0xffff);
 592    }
 593 }
 594
 595
 596 void
 597 spe_splat(struct spe_function *p, unsigned rT, unsigned rA)
 598 {
 599    spe_ila(p, rT, 66051);
 600    spe_shufb(p, rT, rA, rA, rT);
 601 }
 602
 603
 604 void
 605 spe_complement(struct spe_function *p, unsigned rT)
 606 {
 607    spe_nor(p, rT, rT, rT);
 608 }
 609
 610
 611 void
 612 spe_move(struct spe_function *p, unsigned rT, unsigned rA)
 613 {
 614    spe_ori(p, rT, rA, 0);
 615 }
 616
 617
 618 void
 619 spe_zero(struct spe_function *p, unsigned rT)
 620 {
 621    spe_xor(p, rT, rT, rT);
 622 }
 623
 624
 625 void
 626 spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
 627 {
 628    assert(word >= 0);
 629    assert(word <= 3);
 630
 631    if (word == 0) {
 632       int tmp1 = rT;
 633       spe_ila(p, tmp1, 66051);
 634       spe_shufb(p, rT, rA, rA, tmp1);
 635    }
 636    else {
 637       /* XXX review this, we may not need the rotqbyi instruction */
 638       int tmp1 = rT;
 639       int tmp2 = spe_allocate_available_register(p);
 640
 641       spe_ila(p, tmp1, 66051);
 642       spe_rotqbyi(p, tmp2, rA, 4 * word);
 643       spe_shufb(p, rT, tmp2, tmp2, tmp1);
 644
 645       spe_release_register(p, tmp2);
 646    }
 647 }
 648
 649 /* For each 32-bit float element of rA and rB, choose the smaller of the
 650  * two, compositing them into the rT register.
 651  *
 652  * The Float Compare Greater Than (fcgt) instruction will put 1s into
 653  * compare_reg where rA > rB, and 0s where rA <= rB.
 654  *
 655  * Then the Select Bits (selb) instruction will take bits from rA where
 656  * compare_reg is 0, and from rB where compare_reg is 1; i.e., from rA
 657  * where rA <= rB and from rB where rB > rA, which is exactly the
 658  * "min" operation.
 659  *
 660  * The compare_reg could in many cases be the same as rT, unless
 661  * rT == rA || rt == rB.  But since this is common in constructions
 662  * like "x = min(x, a)", we always allocate a new register to be safe.
 663  */
 664 void
 665 spe_float_min(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned int rB)
 666 {
 667    unsigned int compare_reg = spe_allocate_available_register(p);
 668    spe_fcgt(p, compare_reg, rA, rB);
 669    spe_selb(p, rT, rA, rB, compare_reg);
 670    spe_release_register(p, compare_reg);
 671 }
 672
 673 /* For each 32-bit float element of rA and rB, choose the greater of the
 674  * two, compositing them into the rT register.
 675  *
 676  * The logic is similar to that of spe_float_min() above; the only
 677  * difference is that the registers on spe_selb() have been reversed,
 678  * so that the larger of the two is selected instead of the smaller.
 679  */
 680 void
 681 spe_float_max(struct spe_function *p, unsigned int rT, unsigned int rA, unsigned int rB)
 682 {
 683    unsigned int compare_reg = spe_allocate_available_register(p);
 684    spe_fcgt(p, compare_reg, rA, rB);
 685    spe_selb(p, rT, rB, rA, compare_reg);
 686    spe_release_register(p, compare_reg);
 687 }
 688
 689 #endif /* GALLIUM_CELL */