src/gallium/auxiliary/rtasm/rtasm_ppc_spe.c

   1 /*
   2  * (C) Copyright IBM Corporation 2008
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
  19  * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file
  27  * Real-time assembly generation interface for Cell B.E. SPEs.
  28  *
  29  * \author Ian Romanick <idr@us.ibm.com>
  30  * \author Brian Paul
  31  */
  32
  33
  34 #include <stdio.h>
  35 #include "pipe/p_compiler.h"
  36 #include "util/u_memory.h"
  37 #include "rtasm_ppc_spe.h"
  38
  39
  40 #ifdef GALLIUM_CELL
  41 /**
  42  * SPE instruction types
  43  *
  44  * There are 6 primary instruction encodings used on the Cell's SPEs.  Each of
  45  * the following unions encodes one type.
  46  *
  47  * \bug
  48  * If, at some point, we start generating SPE code from a little-endian host
  49  * these unions will not work.
  50  */
  51 /*@{*/
  52 /**
  53  * Encode one output register with two input registers
  54  */
  55 union spe_inst_RR {
  56     uint32_t bits;
  57     struct {
  58         unsigned op:11;
  59         unsigned rB:7;
  60         unsigned rA:7;
  61         unsigned rT:7;
  62     } inst;
  63 };
  64
  65
  66 /**
  67  * Encode one output register with three input registers
  68  */
  69 union spe_inst_RRR {
  70     uint32_t bits;
  71     struct {
  72         unsigned op:4;
  73         unsigned rT:7;
  74         unsigned rB:7;
  75         unsigned rA:7;
  76         unsigned rC:7;
  77     } inst;
  78 };
  79
  80
  81 /**
  82  * Encode one output register with one input reg. and a 7-bit signed immed
  83  */
  84 union spe_inst_RI7 {
  85     uint32_t bits;
  86     struct {
  87         unsigned op:11;
  88         unsigned i7:7;
  89         unsigned rA:7;
  90         unsigned rT:7;
  91     } inst;
  92 };
  93
  94
  95 /**
  96  * Encode one output register with one input reg. and an 8-bit signed immed
  97  */
  98 union spe_inst_RI8 {
  99     uint32_t bits;
 100     struct {
 101         unsigned op:10;
 102         unsigned i8:8;
 103         unsigned rA:7;
 104         unsigned rT:7;
 105     } inst;
 106 };
 107
 108
 109 /**
 110  * Encode one output register with one input reg. and a 10-bit signed immed
 111  */
 112 union spe_inst_RI10 {
 113     uint32_t bits;
 114     struct {
 115         unsigned op:8;
 116         unsigned i10:10;
 117         unsigned rA:7;
 118         unsigned rT:7;
 119     } inst;
 120 };
 121
 122
 123 /**
 124  * Encode one output register with a 16-bit signed immediate
 125  */
 126 union spe_inst_RI16 {
 127     uint32_t bits;
 128     struct {
 129         unsigned op:9;
 130         unsigned i16:16;
 131         unsigned rT:7;
 132     } inst;
 133 };
 134
 135
 136 /**
 137  * Encode one output register with a 18-bit signed immediate
 138  */
 139 union spe_inst_RI18 {
 140     uint32_t bits;
 141     struct {
 142         unsigned op:7;
 143         unsigned i18:18;
 144         unsigned rT:7;
 145     } inst;
 146 };
 147 /*@}*/
 148
 149
 150 static void
 151 indent(const struct spe_function *p)
 152 {
 153    int i;
 154    for (i = 0; i < p->indent; i++) {
 155       putchar(' ');
 156    }
 157 }
 158
 159
 160 static const char *
 161 rem_prefix(const char *longname)
 162 {
 163    return longname + 4;
 164 }
 165
 166
 167 static void emit_RR(struct spe_function *p, unsigned op, unsigned rT,
 168                     unsigned rA, unsigned rB, const char *name)
 169 {
 170     union spe_inst_RR inst;
 171     inst.inst.op = op;
 172     inst.inst.rB = rB;
 173     inst.inst.rA = rA;
 174     inst.inst.rT = rT;
 175     p->store[p->num_inst++] = inst.bits;
 176     assert(p->num_inst <= p->max_inst);
 177     if (p->print) {
 178        indent(p);
 179        printf("%s\tr%d, r%d, r%d\n", rem_prefix(name), rT, rA, rB);
 180     }
 181 }
 182
 183
 184 static void emit_RRR(struct spe_function *p, unsigned op, unsigned rT,
 185                      unsigned rA, unsigned rB, unsigned rC, const char *name)
 186 {
 187     union spe_inst_RRR inst;
 188     inst.inst.op = op;
 189     inst.inst.rT = rT;
 190     inst.inst.rB = rB;
 191     inst.inst.rA = rA;
 192     inst.inst.rC = rC;
 193     p->store[p->num_inst++] = inst.bits;
 194     assert(p->num_inst <= p->max_inst);
 195     if (p->print) {
 196        indent(p);
 197        printf("%s\tr%d, r%d, r%d, r%d\n", rem_prefix(name), rT, rA, rB, rB);
 198     }
 199 }
 200
 201
 202 static void emit_RI7(struct spe_function *p, unsigned op, unsigned rT,
 203                      unsigned rA, int imm, const char *name)
 204 {
 205     union spe_inst_RI7 inst;
 206     inst.inst.op = op;
 207     inst.inst.i7 = imm;
 208     inst.inst.rA = rA;
 209     inst.inst.rT = rT;
 210     p->store[p->num_inst++] = inst.bits;
 211     assert(p->num_inst <= p->max_inst);
 212     if (p->print) {
 213        indent(p);
 214        printf("%s\tr%d, r%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 215     }
 216 }
 217
 218
 219
 220 static void emit_RI8(struct spe_function *p, unsigned op, unsigned rT,
 221                      unsigned rA, int imm, const char *name)
 222 {
 223     union spe_inst_RI8 inst;
 224     inst.inst.op = op;
 225     inst.inst.i8 = imm;
 226     inst.inst.rA = rA;
 227     inst.inst.rT = rT;
 228     p->store[p->num_inst++] = inst.bits;
 229     assert(p->num_inst <= p->max_inst);
 230     if (p->print) {
 231        indent(p);
 232        printf("%s\tr%d, r%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 233     }
 234 }
 235
 236
 237
 238 static void emit_RI10(struct spe_function *p, unsigned op, unsigned rT,
 239                       unsigned rA, int imm, const char *name)
 240 {
 241     union spe_inst_RI10 inst;
 242     inst.inst.op = op;
 243     inst.inst.i10 = imm;
 244     inst.inst.rA = rA;
 245     inst.inst.rT = rT;
 246     p->store[p->num_inst++] = inst.bits;
 247     assert(p->num_inst <= p->max_inst);
 248     if (p->print) {
 249        indent(p);
 250        printf("%s\tr%d, r%d, 0x%x\n", rem_prefix(name), rT, rA, imm);
 251     }
 252 }
 253
 254
 255 static void emit_RI16(struct spe_function *p, unsigned op, unsigned rT,
 256                       int imm, const char *name)
 257 {
 258     union spe_inst_RI16 inst;
 259     inst.inst.op = op;
 260     inst.inst.i16 = imm;
 261     inst.inst.rT = rT;
 262     p->store[p->num_inst++] = inst.bits;
 263     assert(p->num_inst <= p->max_inst);
 264     if (p->print) {
 265        indent(p);
 266        printf("%s\tr%d, 0x%x\n", rem_prefix(name), rT, imm);
 267     }
 268 }
 269
 270
 271 static void emit_RI18(struct spe_function *p, unsigned op, unsigned rT,
 272                       int imm, const char *name)
 273 {
 274     union spe_inst_RI18 inst;
 275     inst.inst.op = op;
 276     inst.inst.i18 = imm;
 277     inst.inst.rT = rT;
 278     p->store[p->num_inst++] = inst.bits;
 279     assert(p->num_inst <= p->max_inst);
 280     if (p->print) {
 281        indent(p);
 282        printf("%s\tr%d, 0x%x\n", rem_prefix(name), rT, imm);
 283     }
 284 }
 285
 286
 287
 288
 289 #define EMIT_(_name, _op) \
 290 void _name (struct spe_function *p, unsigned rT) \
 291 { \
 292    emit_RR(p, _op, rT, 0, 0, __FUNCTION__); \
 293 }
 294
 295 #define EMIT_R(_name, _op) \
 296 void _name (struct spe_function *p, unsigned rT, unsigned rA) \
 297 { \
 298    emit_RR(p, _op, rT, rA, 0, __FUNCTION__);                 \
 299 }
 300
 301 #define EMIT_RR(_name, _op) \
 302 void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB) \
 303 { \
 304    emit_RR(p, _op, rT, rA, rB, __FUNCTION__);                \
 305 }
 306
 307 #define EMIT_RRR(_name, _op) \
 308 void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB, unsigned rC) \
 309 { \
 310    emit_RRR(p, _op, rT, rA, rB, rC, __FUNCTION__);           \
 311 }
 312
 313 #define EMIT_RI7(_name, _op) \
 314 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 315 { \
 316    emit_RI7(p, _op, rT, rA, imm, __FUNCTION__);              \
 317 }
 318
 319 #define EMIT_RI8(_name, _op, bias) \
 320 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 321 { \
 322    emit_RI8(p, _op, rT, rA, bias - imm, __FUNCTION__);       \
 323 }
 324
 325 #define EMIT_RI10(_name, _op) \
 326 void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
 327 { \
 328    emit_RI10(p, _op, rT, rA, imm, __FUNCTION__);             \
 329 }
 330
 331 #define EMIT_RI16(_name, _op) \
 332 void _name (struct spe_function *p, unsigned rT, int imm) \
 333 { \
 334    emit_RI16(p, _op, rT, imm, __FUNCTION__);                 \
 335 }
 336
 337 #define EMIT_RI18(_name, _op) \
 338 void _name (struct spe_function *p, unsigned rT, int imm) \
 339 { \
 340    emit_RI18(p, _op, rT, imm, __FUNCTION__);                 \
 341 }
 342
 343 #define EMIT_I16(_name, _op) \
 344 void _name (struct spe_function *p, int imm) \
 345 { \
 346    emit_RI16(p, _op, 0, imm, __FUNCTION__);                  \
 347 }
 348
 349 #include "rtasm_ppc_spe.h"
 350
 351
 352 /**
 353  * Initialize an spe_function.
 354  * \param code_size  size of instruction buffer to allocate, in bytes.
 355  */
 356 void spe_init_func(struct spe_function *p, unsigned code_size)
 357 {
 358     p->store = align_malloc(code_size, 16);
 359     p->num_inst = 0;
 360     p->max_inst = code_size / SPE_INST_SIZE;
 361
 362     /* Conservatively treat R0 - R2 and R80 - R127 as non-volatile.
 363      */
 364     p->regs[0] = ~7;
 365     p->regs[1] = (1U << (80 - 64)) - 1;
 366
 367     p->print = false;
 368     p->indent = 0;
 369 }
 370
 371
 372 void spe_release_func(struct spe_function *p)
 373 {
 374     assert(p->num_inst <= p->max_inst);
 375     if (p->store != NULL) {
 376         align_free(p->store);
 377     }
 378     p->store = NULL;
 379 }
 380
 381
 382 /**
 383  * Alloate a SPE register.
 384  * \return register index or -1 if none left.
 385  */
 386 int spe_allocate_available_register(struct spe_function *p)
 387 {
 388    unsigned i;
 389    for (i = 0; i < SPE_NUM_REGS; i++) {
 390       const uint64_t mask = (1ULL << (i % 64));
 391       const unsigned idx = i / 64;
 392
 393       assert(idx < 2);
 394       if ((p->regs[idx] & mask) != 0) {
 395          p->regs[idx] &= ~mask;
 396          return i;
 397       }
 398    }
 399
 400    return -1;
 401 }
 402
 403
 404 /**
 405  * Mark the given SPE register as "allocated".
 406  */
 407 int spe_allocate_register(struct spe_function *p, int reg)
 408 {
 409    const unsigned idx = reg / 64;
 410    const unsigned bit = reg % 64;
 411
 412    assert(reg < SPE_NUM_REGS);
 413    assert((p->regs[idx] & (1ULL << bit)) != 0);
 414
 415    p->regs[idx] &= ~(1ULL << bit);
 416    return reg;
 417 }
 418
 419
 420 /**
 421  * Mark the given SPE register as "unallocated".
 422  */
 423 void spe_release_register(struct spe_function *p, int reg)
 424 {
 425    const unsigned idx = reg / 64;
 426    const unsigned bit = reg % 64;
 427
 428    assert(idx < 2);
 429
 430    assert(reg < SPE_NUM_REGS);
 431    assert((p->regs[idx] & (1ULL << bit)) == 0);
 432
 433    p->regs[idx] |= (1ULL << bit);
 434 }
 435
 436
 437 void
 438 spe_print_code(struct spe_function *p, boolean enable)
 439 {
 440    p->print = enable;
 441 }
 442
 443
 444 void
 445 spe_indent(struct spe_function *p, int spaces)
 446 {
 447    p->indent += spaces;
 448 }
 449
 450
 451 extern void
 452 spe_comment(struct spe_function *p, int rel_indent, const char *s)
 453 {
 454    if (p->print) {
 455       p->indent += rel_indent;
 456       indent(p);
 457       p->indent -= rel_indent;
 458       printf("%s\n", s);
 459    }
 460 }
 461
 462
 463 /**
 464  * For branch instructions:
 465  * \param d  if 1, disable interupts if branch is taken
 466  * \param e  if 1, enable interupts if branch is taken
 467  * If d and e are both zero, don't change interupt status (right?)
 468  */
 469
 470 /** Branch Indirect to address in rA */
 471 void spe_bi(struct spe_function *p, unsigned rA, int d, int e)
 472 {
 473    emit_RI7(p, 0x1a8, 0, rA, (d << 5) | (e << 4), __FUNCTION__);
 474 }
 475
 476 /** Interupt Return */
 477 void spe_iret(struct spe_function *p, unsigned rA, int d, int e)
 478 {
 479    emit_RI7(p, 0x1aa, 0, rA, (d << 5) | (e << 4), __FUNCTION__);
 480 }
 481
 482 /** Branch indirect and set link on external data */
 483 void spe_bisled(struct spe_function *p, unsigned rT, unsigned rA, int d,
 484                 int e)
 485 {
 486    emit_RI7(p, 0x1ab, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 487 }
 488
 489 /** Branch indirect and set link.  Save PC in rT, jump to rA. */
 490 void spe_bisl(struct spe_function *p, unsigned rT, unsigned rA, int d,
 491                 int e)
 492 {
 493    emit_RI7(p, 0x1a9, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 494 }
 495
 496 /** Branch indirect if zero word.  If rT.word[0]==0, jump to rA. */
 497 void spe_biz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 498 {
 499    emit_RI7(p, 0x128, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 500 }
 501
 502 /** Branch indirect if non-zero word.  If rT.word[0]!=0, jump to rA. */
 503 void spe_binz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 504 {
 505    emit_RI7(p, 0x129, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 506 }
 507
 508 /** Branch indirect if zero halfword.  If rT.halfword[1]==0, jump to rA. */
 509 void spe_bihz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 510 {
 511    emit_RI7(p, 0x12a, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 512 }
 513
 514 /** Branch indirect if non-zero halfword.  If rT.halfword[1]!=0, jump to rA. */
 515 void spe_bihnz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
 516 {
 517    emit_RI7(p, 0x12b, rT, rA, (d << 5) | (e << 4), __FUNCTION__);
 518 }
 519
 520
 521 /* Hint-for-branch instructions
 522  */
 523 #if 0
 524 hbr;
 525 hbra;
 526 hbrr;
 527 #endif
 528
 529
 530 /* Control instructions
 531  */
 532 #if 0
 533 stop;
 534 EMIT_RR  (spe_stopd, 0x140);
 535 EMIT_    (spe_lnop,  0x001);
 536 EMIT_    (spe_nop,   0x201);
 537 sync;
 538 EMIT_    (spe_dsync, 0x003);
 539 EMIT_R   (spe_mfspr, 0x00c);
 540 EMIT_R   (spe_mtspr, 0x10c);
 541 #endif
 542
 543
 544 /**
 545  ** Helper / "macro" instructions.
 546  ** Use somewhat verbose names as a reminder that these aren't native
 547  ** SPE instructions.
 548  **/
 549
 550
 551 void
 552 spe_load_float(struct spe_function *p, unsigned rT, float x)
 553 {
 554    if (x == 0.0f) {
 555       spe_il(p, rT, 0x0);
 556    }
 557    else if (x == 0.5f) {
 558       spe_ilhu(p, rT, 0x3f00);
 559    }
 560    else if (x == 1.0f) {
 561       spe_ilhu(p, rT, 0x3f80);
 562    }
 563    else if (x == -1.0f) {
 564       spe_ilhu(p, rT, 0xbf80);
 565    }
 566    else {
 567       union {
 568          float f;
 569          unsigned u;
 570       } bits;
 571       bits.f = x;
 572       spe_ilhu(p, rT, bits.u >> 16);
 573       spe_iohl(p, rT, bits.u & 0xffff);
 574    }
 575 }
 576
 577
 578 void
 579 spe_load_int(struct spe_function *p, unsigned rT, int i)
 580 {
 581    if (-32768 <= i && i <= 32767) {
 582       spe_il(p, rT, i);
 583    }
 584    else {
 585       spe_ilhu(p, rT, i >> 16);
 586       if (i & 0xffff)
 587          spe_iohl(p, rT, i & 0xffff);
 588    }
 589 }
 590
 591
 592 void
 593 spe_splat(struct spe_function *p, unsigned rT, unsigned rA)
 594 {
 595    spe_ila(p, rT, 66051);
 596    spe_shufb(p, rT, rA, rA, rT);
 597 }
 598
 599
 600 void
 601 spe_complement(struct spe_function *p, unsigned rT)
 602 {
 603    spe_nor(p, rT, rT, rT);
 604 }
 605
 606
 607 void
 608 spe_move(struct spe_function *p, unsigned rT, unsigned rA)
 609 {
 610    spe_ori(p, rT, rA, 0);
 611 }
 612
 613
 614 void
 615 spe_zero(struct spe_function *p, unsigned rT)
 616 {
 617    spe_xor(p, rT, rT, rT);
 618 }
 619
 620
 621 void
 622 spe_splat_word(struct spe_function *p, unsigned rT, unsigned rA, int word)
 623 {
 624    assert(word >= 0);
 625    assert(word <= 3);
 626
 627    if (word == 0) {
 628       int tmp1 = rT;
 629       spe_ila(p, tmp1, 66051);
 630       spe_shufb(p, rT, rA, rA, tmp1);
 631    }
 632    else {
 633       /* XXX review this, we may not need the rotqbyi instruction */
 634       int tmp1 = rT;
 635       int tmp2 = spe_allocate_available_register(p);
 636
 637       spe_ila(p, tmp1, 66051);
 638       spe_rotqbyi(p, tmp2, rA, 4 * word);
 639       spe_shufb(p, rT, tmp2, tmp2, tmp1);
 640
 641       spe_release_register(p, tmp2);
 642    }
 643 }
 644
 645
 646 #endif /* GALLIUM_CELL */