1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
30 * TGSI interpreter/executor.
32 * Flow control information:
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_memory.h"
62 #include "util/u_math.h"
67 #define TILE_TOP_LEFT 0
68 #define TILE_TOP_RIGHT 1
69 #define TILE_BOTTOM_LEFT 2
70 #define TILE_BOTTOM_RIGHT 3
73 micro_abs(union tgsi_exec_channel
*dst
,
74 const union tgsi_exec_channel
*src
)
76 dst
->f
[0] = fabsf(src
->f
[0]);
77 dst
->f
[1] = fabsf(src
->f
[1]);
78 dst
->f
[2] = fabsf(src
->f
[2]);
79 dst
->f
[3] = fabsf(src
->f
[3]);
83 micro_arl(union tgsi_exec_channel
*dst
,
84 const union tgsi_exec_channel
*src
)
86 dst
->i
[0] = (int)floorf(src
->f
[0]);
87 dst
->i
[1] = (int)floorf(src
->f
[1]);
88 dst
->i
[2] = (int)floorf(src
->f
[2]);
89 dst
->i
[3] = (int)floorf(src
->f
[3]);
93 micro_arr(union tgsi_exec_channel
*dst
,
94 const union tgsi_exec_channel
*src
)
96 dst
->i
[0] = (int)floorf(src
->f
[0] + 0.5f
);
97 dst
->i
[1] = (int)floorf(src
->f
[1] + 0.5f
);
98 dst
->i
[2] = (int)floorf(src
->f
[2] + 0.5f
);
99 dst
->i
[3] = (int)floorf(src
->f
[3] + 0.5f
);
103 micro_ceil(union tgsi_exec_channel
*dst
,
104 const union tgsi_exec_channel
*src
)
106 dst
->f
[0] = ceilf(src
->f
[0]);
107 dst
->f
[1] = ceilf(src
->f
[1]);
108 dst
->f
[2] = ceilf(src
->f
[2]);
109 dst
->f
[3] = ceilf(src
->f
[3]);
113 micro_cos(union tgsi_exec_channel
*dst
,
114 const union tgsi_exec_channel
*src
)
116 dst
->f
[0] = cosf(src
->f
[0]);
117 dst
->f
[1] = cosf(src
->f
[1]);
118 dst
->f
[2] = cosf(src
->f
[2]);
119 dst
->f
[3] = cosf(src
->f
[3]);
123 micro_ddx(union tgsi_exec_channel
*dst
,
124 const union tgsi_exec_channel
*src
)
129 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
133 micro_ddy(union tgsi_exec_channel
*dst
,
134 const union tgsi_exec_channel
*src
)
139 dst
->f
[3] = src
->f
[TILE_BOTTOM_LEFT
] - src
->f
[TILE_TOP_LEFT
];
143 micro_exp2(union tgsi_exec_channel
*dst
,
144 const union tgsi_exec_channel
*src
)
147 dst
->f
[0] = util_fast_exp2(src
->f
[0]);
148 dst
->f
[1] = util_fast_exp2(src
->f
[1]);
149 dst
->f
[2] = util_fast_exp2(src
->f
[2]);
150 dst
->f
[3] = util_fast_exp2(src
->f
[3]);
153 /* Inf is okay for this instruction, so clamp it to silence assertions. */
155 union tgsi_exec_channel clamped
;
157 for (i
= 0; i
< 4; i
++) {
158 if (src
->f
[i
] > 127.99999f
) {
159 clamped
.f
[i
] = 127.99999f
;
160 } else if (src
->f
[i
] < -126.99999f
) {
161 clamped
.f
[i
] = -126.99999f
;
163 clamped
.f
[i
] = src
->f
[i
];
169 dst
->f
[0] = powf(2.0f
, src
->f
[0]);
170 dst
->f
[1] = powf(2.0f
, src
->f
[1]);
171 dst
->f
[2] = powf(2.0f
, src
->f
[2]);
172 dst
->f
[3] = powf(2.0f
, src
->f
[3]);
173 #endif /* FAST_MATH */
177 micro_flr(union tgsi_exec_channel
*dst
,
178 const union tgsi_exec_channel
*src
)
180 dst
->f
[0] = floorf(src
->f
[0]);
181 dst
->f
[1] = floorf(src
->f
[1]);
182 dst
->f
[2] = floorf(src
->f
[2]);
183 dst
->f
[3] = floorf(src
->f
[3]);
187 micro_frc(union tgsi_exec_channel
*dst
,
188 const union tgsi_exec_channel
*src
)
190 dst
->f
[0] = src
->f
[0] - floorf(src
->f
[0]);
191 dst
->f
[1] = src
->f
[1] - floorf(src
->f
[1]);
192 dst
->f
[2] = src
->f
[2] - floorf(src
->f
[2]);
193 dst
->f
[3] = src
->f
[3] - floorf(src
->f
[3]);
197 micro_iabs(union tgsi_exec_channel
*dst
,
198 const union tgsi_exec_channel
*src
)
200 dst
->i
[0] = src
->i
[0] >= 0 ? src
->i
[0] : -src
->i
[0];
201 dst
->i
[1] = src
->i
[1] >= 0 ? src
->i
[1] : -src
->i
[1];
202 dst
->i
[2] = src
->i
[2] >= 0 ? src
->i
[2] : -src
->i
[2];
203 dst
->i
[3] = src
->i
[3] >= 0 ? src
->i
[3] : -src
->i
[3];
207 micro_ineg(union tgsi_exec_channel
*dst
,
208 const union tgsi_exec_channel
*src
)
210 dst
->i
[0] = -src
->i
[0];
211 dst
->i
[1] = -src
->i
[1];
212 dst
->i
[2] = -src
->i
[2];
213 dst
->i
[3] = -src
->i
[3];
217 micro_lg2(union tgsi_exec_channel
*dst
,
218 const union tgsi_exec_channel
*src
)
221 dst
->f
[0] = util_fast_log2(src
->f
[0]);
222 dst
->f
[1] = util_fast_log2(src
->f
[1]);
223 dst
->f
[2] = util_fast_log2(src
->f
[2]);
224 dst
->f
[3] = util_fast_log2(src
->f
[3]);
226 dst
->f
[0] = logf(src
->f
[0]) * 1.442695f
;
227 dst
->f
[1] = logf(src
->f
[1]) * 1.442695f
;
228 dst
->f
[2] = logf(src
->f
[2]) * 1.442695f
;
229 dst
->f
[3] = logf(src
->f
[3]) * 1.442695f
;
234 micro_lrp(union tgsi_exec_channel
*dst
,
235 const union tgsi_exec_channel
*src
)
237 dst
->f
[0] = src
[0].f
[0] * (src
[1].f
[0] - src
[2].f
[0]) + src
[2].f
[0];
238 dst
->f
[1] = src
[0].f
[1] * (src
[1].f
[1] - src
[2].f
[1]) + src
[2].f
[1];
239 dst
->f
[2] = src
[0].f
[2] * (src
[1].f
[2] - src
[2].f
[2]) + src
[2].f
[2];
240 dst
->f
[3] = src
[0].f
[3] * (src
[1].f
[3] - src
[2].f
[3]) + src
[2].f
[3];
244 micro_mad(union tgsi_exec_channel
*dst
,
245 const union tgsi_exec_channel
*src
)
247 dst
->f
[0] = src
[0].f
[0] * src
[1].f
[0] + src
[2].f
[0];
248 dst
->f
[1] = src
[0].f
[1] * src
[1].f
[1] + src
[2].f
[1];
249 dst
->f
[2] = src
[0].f
[2] * src
[1].f
[2] + src
[2].f
[2];
250 dst
->f
[3] = src
[0].f
[3] * src
[1].f
[3] + src
[2].f
[3];
254 micro_mov(union tgsi_exec_channel
*dst
,
255 const union tgsi_exec_channel
*src
)
257 dst
->u
[0] = src
->u
[0];
258 dst
->u
[1] = src
->u
[1];
259 dst
->u
[2] = src
->u
[2];
260 dst
->u
[3] = src
->u
[3];
264 micro_rcp(union tgsi_exec_channel
*dst
,
265 const union tgsi_exec_channel
*src
)
267 #if 0 /* for debugging */
268 assert(src
->f
[0] != 0.0f
);
269 assert(src
->f
[1] != 0.0f
);
270 assert(src
->f
[2] != 0.0f
);
271 assert(src
->f
[3] != 0.0f
);
273 dst
->f
[0] = 1.0f
/ src
->f
[0];
274 dst
->f
[1] = 1.0f
/ src
->f
[1];
275 dst
->f
[2] = 1.0f
/ src
->f
[2];
276 dst
->f
[3] = 1.0f
/ src
->f
[3];
280 micro_rnd(union tgsi_exec_channel
*dst
,
281 const union tgsi_exec_channel
*src
)
283 dst
->f
[0] = floorf(src
->f
[0] + 0.5f
);
284 dst
->f
[1] = floorf(src
->f
[1] + 0.5f
);
285 dst
->f
[2] = floorf(src
->f
[2] + 0.5f
);
286 dst
->f
[3] = floorf(src
->f
[3] + 0.5f
);
290 micro_rsq(union tgsi_exec_channel
*dst
,
291 const union tgsi_exec_channel
*src
)
293 #if 0 /* for debugging */
294 assert(src
->f
[0] != 0.0f
);
295 assert(src
->f
[1] != 0.0f
);
296 assert(src
->f
[2] != 0.0f
);
297 assert(src
->f
[3] != 0.0f
);
299 dst
->f
[0] = 1.0f
/ sqrtf(fabsf(src
->f
[0]));
300 dst
->f
[1] = 1.0f
/ sqrtf(fabsf(src
->f
[1]));
301 dst
->f
[2] = 1.0f
/ sqrtf(fabsf(src
->f
[2]));
302 dst
->f
[3] = 1.0f
/ sqrtf(fabsf(src
->f
[3]));
306 micro_seq(union tgsi_exec_channel
*dst
,
307 const union tgsi_exec_channel
*src
)
309 dst
->f
[0] = src
[0].f
[0] == src
[1].f
[0] ? 1.0f
: 0.0f
;
310 dst
->f
[1] = src
[0].f
[1] == src
[1].f
[1] ? 1.0f
: 0.0f
;
311 dst
->f
[2] = src
[0].f
[2] == src
[1].f
[2] ? 1.0f
: 0.0f
;
312 dst
->f
[3] = src
[0].f
[3] == src
[1].f
[3] ? 1.0f
: 0.0f
;
316 micro_sge(union tgsi_exec_channel
*dst
,
317 const union tgsi_exec_channel
*src
)
319 dst
->f
[0] = src
[0].f
[0] >= src
[1].f
[0] ? 1.0f
: 0.0f
;
320 dst
->f
[1] = src
[0].f
[1] >= src
[1].f
[1] ? 1.0f
: 0.0f
;
321 dst
->f
[2] = src
[0].f
[2] >= src
[1].f
[2] ? 1.0f
: 0.0f
;
322 dst
->f
[3] = src
[0].f
[3] >= src
[1].f
[3] ? 1.0f
: 0.0f
;
326 micro_sgn(union tgsi_exec_channel
*dst
,
327 const union tgsi_exec_channel
*src
)
329 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
330 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
331 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
332 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
336 micro_sgt(union tgsi_exec_channel
*dst
,
337 const union tgsi_exec_channel
*src
)
339 dst
->f
[0] = src
[0].f
[0] > src
[1].f
[0] ? 1.0f
: 0.0f
;
340 dst
->f
[1] = src
[0].f
[1] > src
[1].f
[1] ? 1.0f
: 0.0f
;
341 dst
->f
[2] = src
[0].f
[2] > src
[1].f
[2] ? 1.0f
: 0.0f
;
342 dst
->f
[3] = src
[0].f
[3] > src
[1].f
[3] ? 1.0f
: 0.0f
;
346 micro_sin(union tgsi_exec_channel
*dst
,
347 const union tgsi_exec_channel
*src
)
349 dst
->f
[0] = sinf(src
->f
[0]);
350 dst
->f
[1] = sinf(src
->f
[1]);
351 dst
->f
[2] = sinf(src
->f
[2]);
352 dst
->f
[3] = sinf(src
->f
[3]);
356 micro_sle(union tgsi_exec_channel
*dst
,
357 const union tgsi_exec_channel
*src
)
359 dst
->f
[0] = src
[0].f
[0] <= src
[1].f
[0] ? 1.0f
: 0.0f
;
360 dst
->f
[1] = src
[0].f
[1] <= src
[1].f
[1] ? 1.0f
: 0.0f
;
361 dst
->f
[2] = src
[0].f
[2] <= src
[1].f
[2] ? 1.0f
: 0.0f
;
362 dst
->f
[3] = src
[0].f
[3] <= src
[1].f
[3] ? 1.0f
: 0.0f
;
366 micro_slt(union tgsi_exec_channel
*dst
,
367 const union tgsi_exec_channel
*src
)
369 dst
->f
[0] = src
[0].f
[0] < src
[1].f
[0] ? 1.0f
: 0.0f
;
370 dst
->f
[1] = src
[0].f
[1] < src
[1].f
[1] ? 1.0f
: 0.0f
;
371 dst
->f
[2] = src
[0].f
[2] < src
[1].f
[2] ? 1.0f
: 0.0f
;
372 dst
->f
[3] = src
[0].f
[3] < src
[1].f
[3] ? 1.0f
: 0.0f
;
376 micro_sne(union tgsi_exec_channel
*dst
,
377 const union tgsi_exec_channel
*src
)
379 dst
->f
[0] = src
[0].f
[0] != src
[1].f
[0] ? 1.0f
: 0.0f
;
380 dst
->f
[1] = src
[0].f
[1] != src
[1].f
[1] ? 1.0f
: 0.0f
;
381 dst
->f
[2] = src
[0].f
[2] != src
[1].f
[2] ? 1.0f
: 0.0f
;
382 dst
->f
[3] = src
[0].f
[3] != src
[1].f
[3] ? 1.0f
: 0.0f
;
386 micro_trunc(union tgsi_exec_channel
*dst
,
387 const union tgsi_exec_channel
*src
)
389 dst
->f
[0] = (float)(int)src
->f
[0];
390 dst
->f
[1] = (float)(int)src
->f
[1];
391 dst
->f
[2] = (float)(int)src
->f
[2];
392 dst
->f
[3] = (float)(int)src
->f
[3];
401 enum tgsi_exec_datatype
{
402 TGSI_EXEC_DATA_FLOAT
,
408 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
410 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
411 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
412 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
413 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
414 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
415 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
416 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
417 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
418 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
419 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
420 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
421 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
422 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
423 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
424 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
425 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
426 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
427 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
428 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
429 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
430 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
431 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
432 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
433 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
434 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
435 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
436 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
437 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
438 #define TEMP_R0 TGSI_EXEC_TEMP_R0
439 #define TEMP_P0 TGSI_EXEC_TEMP_P0
441 #define IS_CHANNEL_ENABLED(INST, CHAN)\
442 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
444 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
445 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
447 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
448 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
449 if (IS_CHANNEL_ENABLED( INST, CHAN ))
451 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
452 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
453 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
456 /** The execution mask depends on the conditional mask and the loop mask */
457 #define UPDATE_EXEC_MASK(MACH) \
458 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
461 static const union tgsi_exec_channel ZeroVec
=
462 { { 0.0, 0.0, 0.0, 0.0 } };
464 static const union tgsi_exec_channel OneVec
= {
465 {1.0f
, 1.0f
, 1.0f
, 1.0f
}
470 * Assert that none of the float values in 'chan' are infinite or NaN.
471 * NaN and Inf may occur normally during program execution and should
472 * not lead to crashes, etc. But when debugging, it's helpful to catch
476 check_inf_or_nan(const union tgsi_exec_channel
*chan
)
478 assert(!util_is_inf_or_nan((chan
)->f
[0]));
479 assert(!util_is_inf_or_nan((chan
)->f
[1]));
480 assert(!util_is_inf_or_nan((chan
)->f
[2]));
481 assert(!util_is_inf_or_nan((chan
)->f
[3]));
487 print_chan(const char *msg
, const union tgsi_exec_channel
*chan
)
489 debug_printf("%s = {%f, %f, %f, %f}\n",
490 msg
, chan
->f
[0], chan
->f
[1], chan
->f
[2], chan
->f
[3]);
497 print_temp(const struct tgsi_exec_machine
*mach
, uint index
)
499 const struct tgsi_exec_vector
*tmp
= &mach
->Temps
[index
];
501 debug_printf("Temp[%u] =\n", index
);
502 for (i
= 0; i
< 4; i
++) {
503 debug_printf(" %c: { %f, %f, %f, %f }\n",
515 * Check if there's a potential src/dst register data dependency when
516 * using SOA execution.
519 * This would expand into:
524 * The second instruction will have the wrong value for t0 if executed as-is.
527 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
)
531 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
532 if (writemask
== TGSI_WRITEMASK_X
||
533 writemask
== TGSI_WRITEMASK_Y
||
534 writemask
== TGSI_WRITEMASK_Z
||
535 writemask
== TGSI_WRITEMASK_W
||
536 writemask
== TGSI_WRITEMASK_NONE
) {
537 /* no chance of data dependency */
541 /* loop over src regs */
542 for (i
= 0; i
< inst
->Instruction
.NumSrcRegs
; i
++) {
543 if ((inst
->Src
[i
].Register
.File
==
544 inst
->Dst
[0].Register
.File
) &&
545 (inst
->Src
[i
].Register
.Index
==
546 inst
->Dst
[0].Register
.Index
)) {
547 /* loop over dest channels */
548 uint channelsWritten
= 0x0;
549 FOR_EACH_ENABLED_CHANNEL(*inst
, chan
) {
550 /* check if we're reading a channel that's been written */
551 uint swizzle
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[i
], chan
);
552 if (channelsWritten
& (1 << swizzle
)) {
556 channelsWritten
|= (1 << chan
);
565 * Initialize machine state by expanding tokens to full instructions,
566 * allocating temporary storage, setting up constants, etc.
567 * After this, we can call tgsi_exec_machine_run() many times.
570 tgsi_exec_machine_bind_shader(
571 struct tgsi_exec_machine
*mach
,
572 const struct tgsi_token
*tokens
,
574 struct tgsi_sampler
**samplers
)
577 struct tgsi_parse_context parse
;
578 struct tgsi_exec_labels
*labels
= &mach
->Labels
;
579 struct tgsi_full_instruction
*instructions
;
580 struct tgsi_full_declaration
*declarations
;
581 uint maxInstructions
= 10, numInstructions
= 0;
582 uint maxDeclarations
= 10, numDeclarations
= 0;
586 tgsi_dump(tokens
, 0);
591 mach
->Tokens
= tokens
;
592 mach
->Samplers
= samplers
;
594 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
595 if (k
!= TGSI_PARSE_OK
) {
596 debug_printf( "Problem parsing!\n" );
600 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
604 declarations
= (struct tgsi_full_declaration
*)
605 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
611 instructions
= (struct tgsi_full_instruction
*)
612 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
615 FREE( declarations
);
619 while( !tgsi_parse_end_of_tokens( &parse
) ) {
620 uint pointer
= parse
.Position
;
623 tgsi_parse_token( &parse
);
624 switch( parse
.FullToken
.Token
.Type
) {
625 case TGSI_TOKEN_TYPE_DECLARATION
:
626 /* save expanded declaration */
627 if (numDeclarations
== maxDeclarations
) {
628 declarations
= REALLOC(declarations
,
630 * sizeof(struct tgsi_full_declaration
),
631 (maxDeclarations
+ 10)
632 * sizeof(struct tgsi_full_declaration
));
633 maxDeclarations
+= 10;
635 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
== TGSI_FILE_OUTPUT
) {
637 for (reg
= parse
.FullToken
.FullDeclaration
.Range
.First
;
638 reg
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
643 memcpy(declarations
+ numDeclarations
,
644 &parse
.FullToken
.FullDeclaration
,
645 sizeof(declarations
[0]));
649 case TGSI_TOKEN_TYPE_IMMEDIATE
:
651 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
653 assert( mach
->ImmLimit
+ 1 <= TGSI_EXEC_NUM_IMMEDIATES
);
655 for( i
= 0; i
< size
; i
++ ) {
656 mach
->Imms
[mach
->ImmLimit
][i
] =
657 parse
.FullToken
.FullImmediate
.u
[i
].Float
;
663 case TGSI_TOKEN_TYPE_INSTRUCTION
:
664 assert( labels
->count
< MAX_LABELS
);
666 labels
->labels
[labels
->count
][0] = instno
;
667 labels
->labels
[labels
->count
][1] = pointer
;
670 /* save expanded instruction */
671 if (numInstructions
== maxInstructions
) {
672 instructions
= REALLOC(instructions
,
674 * sizeof(struct tgsi_full_instruction
),
675 (maxInstructions
+ 10)
676 * sizeof(struct tgsi_full_instruction
));
677 maxInstructions
+= 10;
680 memcpy(instructions
+ numInstructions
,
681 &parse
.FullToken
.FullInstruction
,
682 sizeof(instructions
[0]));
687 case TGSI_TOKEN_TYPE_PROPERTY
:
694 tgsi_parse_free (&parse
);
696 if (mach
->Declarations
) {
697 FREE( mach
->Declarations
);
699 mach
->Declarations
= declarations
;
700 mach
->NumDeclarations
= numDeclarations
;
702 if (mach
->Instructions
) {
703 FREE( mach
->Instructions
);
705 mach
->Instructions
= instructions
;
706 mach
->NumInstructions
= numInstructions
;
710 struct tgsi_exec_machine
*
711 tgsi_exec_machine_create( void )
713 struct tgsi_exec_machine
*mach
;
716 mach
= align_malloc( sizeof *mach
, 16 );
720 memset(mach
, 0, sizeof(*mach
));
722 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
723 mach
->MaxGeometryShaderOutputs
= TGSI_MAX_TOTAL_VERTICES
;
724 mach
->Predicates
= &mach
->Temps
[TGSI_EXEC_TEMP_P0
];
726 /* Setup constants. */
727 for( i
= 0; i
< 4; i
++ ) {
728 mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
].u
[i
] = 0x00000000;
729 mach
->Temps
[TEMP_7F_I
].xyzw
[TEMP_7F_C
].u
[i
] = 0x7FFFFFFF;
730 mach
->Temps
[TEMP_80_I
].xyzw
[TEMP_80_C
].u
[i
] = 0x80000000;
731 mach
->Temps
[TEMP_FF_I
].xyzw
[TEMP_FF_C
].u
[i
] = 0xFFFFFFFF;
732 mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
].f
[i
] = 1.0f
;
733 mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
].f
[i
] = 2.0f
;
734 mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
].f
[i
] = 128.0f
;
735 mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
].f
[i
] = -128.0f
;
736 mach
->Temps
[TEMP_3_I
].xyzw
[TEMP_3_C
].f
[i
] = 3.0f
;
737 mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
].f
[i
] = 0.5f
;
741 /* silence warnings */
755 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
)
758 FREE(mach
->Instructions
);
759 FREE(mach
->Declarations
);
767 union tgsi_exec_channel
*dst
,
768 const union tgsi_exec_channel
*src0
,
769 const union tgsi_exec_channel
*src1
)
771 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
772 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
773 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
774 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
779 union tgsi_exec_channel
*dst
,
780 const union tgsi_exec_channel
*src0
,
781 const union tgsi_exec_channel
*src1
)
783 if (src1
->f
[0] != 0) {
784 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
786 if (src1
->f
[1] != 0) {
787 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
789 if (src1
->f
[2] != 0) {
790 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
792 if (src1
->f
[3] != 0) {
793 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
798 micro_float_clamp(union tgsi_exec_channel
*dst
,
799 const union tgsi_exec_channel
*src
)
803 for (i
= 0; i
< 4; i
++) {
804 if (src
->f
[i
] > 0.0f
) {
805 if (src
->f
[i
] > 1.884467e+019f
)
806 dst
->f
[i
] = 1.884467e+019f
;
807 else if (src
->f
[i
] < 5.42101e-020f
)
808 dst
->f
[i
] = 5.42101e-020f
;
810 dst
->f
[i
] = src
->f
[i
];
813 if (src
->f
[i
] < -1.884467e+019f
)
814 dst
->f
[i
] = -1.884467e+019f
;
815 else if (src
->f
[i
] > -5.42101e-020f
)
816 dst
->f
[i
] = -5.42101e-020f
;
818 dst
->f
[i
] = src
->f
[i
];
825 union tgsi_exec_channel
*dst
,
826 const union tgsi_exec_channel
*src0
,
827 const union tgsi_exec_channel
*src1
,
828 const union tgsi_exec_channel
*src2
,
829 const union tgsi_exec_channel
*src3
)
831 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
832 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
833 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
834 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
839 union tgsi_exec_channel
*dst
,
840 const union tgsi_exec_channel
*src0
,
841 const union tgsi_exec_channel
*src1
)
843 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
844 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
845 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
846 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
851 union tgsi_exec_channel
*dst
,
852 const union tgsi_exec_channel
*src0
,
853 const union tgsi_exec_channel
*src1
)
855 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
856 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
857 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
858 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
863 union tgsi_exec_channel
*dst
,
864 const union tgsi_exec_channel
*src0
,
865 const union tgsi_exec_channel
*src1
)
867 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
868 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
869 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
870 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
876 union tgsi_exec_channel
*dst0
,
877 union tgsi_exec_channel
*dst1
,
878 const union tgsi_exec_channel
*src0
,
879 const union tgsi_exec_channel
*src1
)
881 dst1
->i
[0] = src0
->i
[0] * src1
->i
[0];
882 dst1
->i
[1] = src0
->i
[1] * src1
->i
[1];
883 dst1
->i
[2] = src0
->i
[2] * src1
->i
[2];
884 dst1
->i
[3] = src0
->i
[3] * src1
->i
[3];
895 union tgsi_exec_channel
*dst0
,
896 union tgsi_exec_channel
*dst1
,
897 const union tgsi_exec_channel
*src0
,
898 const union tgsi_exec_channel
*src1
)
900 dst1
->u
[0] = src0
->u
[0] * src1
->u
[0];
901 dst1
->u
[1] = src0
->u
[1] * src1
->u
[1];
902 dst1
->u
[2] = src0
->u
[2] * src1
->u
[2];
903 dst1
->u
[3] = src0
->u
[3] * src1
->u
[3];
915 union tgsi_exec_channel
*dst
,
916 const union tgsi_exec_channel
*src0
,
917 const union tgsi_exec_channel
*src1
,
918 const union tgsi_exec_channel
*src2
)
920 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
921 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
922 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
923 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
929 union tgsi_exec_channel
*dst
,
930 const union tgsi_exec_channel
*src
)
932 dst
->f
[0] = -src
->f
[0];
933 dst
->f
[1] = -src
->f
[1];
934 dst
->f
[2] = -src
->f
[2];
935 dst
->f
[3] = -src
->f
[3];
940 union tgsi_exec_channel
*dst
,
941 const union tgsi_exec_channel
*src0
,
942 const union tgsi_exec_channel
*src1
)
945 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
946 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
947 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
948 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
950 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
951 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
952 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
953 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
958 micro_sqrt( union tgsi_exec_channel
*dst
,
959 const union tgsi_exec_channel
*src
)
961 dst
->f
[0] = sqrtf( src
->f
[0] );
962 dst
->f
[1] = sqrtf( src
->f
[1] );
963 dst
->f
[2] = sqrtf( src
->f
[2] );
964 dst
->f
[3] = sqrtf( src
->f
[3] );
969 union tgsi_exec_channel
*dst
,
970 const union tgsi_exec_channel
*src0
,
971 const union tgsi_exec_channel
*src1
)
973 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
974 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
975 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
976 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
980 fetch_src_file_channel(const struct tgsi_exec_machine
*mach
,
983 const union tgsi_exec_channel
*index
,
984 const union tgsi_exec_channel
*index2D
,
985 union tgsi_exec_channel
*chan
)
990 case TGSI_FILE_CONSTANT
:
991 for (i
= 0; i
< QUAD_SIZE
; i
++) {
992 assert(index2D
->i
[i
] >= 0 && index2D
->i
[i
] < PIPE_MAX_CONSTANT_BUFFERS
);
993 assert(mach
->Consts
[index2D
->i
[i
]]);
995 if (index
->i
[i
] < 0) {
998 const uint
*p
= (const uint
*)mach
->Consts
[index2D
->i
[i
]];
1000 chan
->u
[i
] = p
[index
->i
[i
] * 4 + swizzle
];
1005 case TGSI_FILE_INPUT
:
1006 case TGSI_FILE_SYSTEM_VALUE
:
1007 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1008 /* XXX: 2D indexing */
1009 chan
->u
[i
] = mach
->Inputs
[index2D
->i
[i
] * TGSI_EXEC_MAX_INPUT_ATTRIBS
+ index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1013 case TGSI_FILE_TEMPORARY
:
1014 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1015 assert(index
->i
[i
] < TGSI_EXEC_NUM_TEMPS
);
1016 assert(index2D
->i
[i
] == 0);
1018 chan
->u
[i
] = mach
->Temps
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1022 case TGSI_FILE_IMMEDIATE
:
1023 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1024 assert(index
->i
[i
] >= 0 && index
->i
[i
] < (int)mach
->ImmLimit
);
1025 assert(index2D
->i
[i
] == 0);
1027 chan
->f
[i
] = mach
->Imms
[index
->i
[i
]][swizzle
];
1031 case TGSI_FILE_ADDRESS
:
1032 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1033 assert(index
->i
[i
] >= 0);
1034 assert(index2D
->i
[i
] == 0);
1036 chan
->u
[i
] = mach
->Addrs
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1040 case TGSI_FILE_PREDICATE
:
1041 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1042 assert(index
->i
[i
] >= 0 && index
->i
[i
] < TGSI_EXEC_NUM_PREDS
);
1043 assert(index2D
->i
[i
] == 0);
1045 chan
->u
[i
] = mach
->Predicates
[0].xyzw
[swizzle
].u
[i
];
1049 case TGSI_FILE_OUTPUT
:
1050 /* vertex/fragment output vars can be read too */
1051 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1052 assert(index
->i
[i
] >= 0);
1053 assert(index2D
->i
[i
] == 0);
1055 chan
->u
[i
] = mach
->Outputs
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1061 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1068 fetch_source(const struct tgsi_exec_machine
*mach
,
1069 union tgsi_exec_channel
*chan
,
1070 const struct tgsi_full_src_register
*reg
,
1071 const uint chan_index
,
1072 enum tgsi_exec_datatype src_datatype
)
1074 union tgsi_exec_channel index
;
1075 union tgsi_exec_channel index2D
;
1078 /* We start with a direct index into a register file.
1082 * file = Register.File
1083 * [1] = Register.Index
1088 index
.i
[3] = reg
->Register
.Index
;
1090 /* There is an extra source register that indirectly subscripts
1091 * a register file. The direct index now becomes an offset
1092 * that is being added to the indirect register.
1096 * ind = Indirect.File
1097 * [2] = Indirect.Index
1098 * .x = Indirect.SwizzleX
1100 if (reg
->Register
.Indirect
) {
1101 union tgsi_exec_channel index2
;
1102 union tgsi_exec_channel indir_index
;
1103 const uint execmask
= mach
->ExecMask
;
1106 /* which address register (always zero now) */
1110 index2
.i
[3] = reg
->Indirect
.Index
;
1112 /* get current value of address register[swizzle] */
1113 swizzle
= tgsi_util_get_src_register_swizzle( ®
->Indirect
, CHAN_X
);
1114 fetch_src_file_channel(mach
,
1121 /* add value of address register to the offset */
1122 index
.i
[0] += indir_index
.i
[0];
1123 index
.i
[1] += indir_index
.i
[1];
1124 index
.i
[2] += indir_index
.i
[2];
1125 index
.i
[3] += indir_index
.i
[3];
1127 /* for disabled execution channels, zero-out the index to
1128 * avoid using a potential garbage value.
1130 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1131 if ((execmask
& (1 << i
)) == 0)
1136 /* There is an extra source register that is a second
1137 * subscript to a register file. Effectively it means that
1138 * the register file is actually a 2D array of registers.
1142 * [3] = Dimension.Index
1144 if (reg
->Register
.Dimension
) {
1148 index2D
.i
[3] = reg
->Dimension
.Index
;
1150 /* Again, the second subscript index can be addressed indirectly
1151 * identically to the first one.
1152 * Nothing stops us from indirectly addressing the indirect register,
1153 * but there is no need for that, so we won't exercise it.
1155 * file[ind[4].y+3][1],
1157 * ind = DimIndirect.File
1158 * [4] = DimIndirect.Index
1159 * .y = DimIndirect.SwizzleX
1161 if (reg
->Dimension
.Indirect
) {
1162 union tgsi_exec_channel index2
;
1163 union tgsi_exec_channel indir_index
;
1164 const uint execmask
= mach
->ExecMask
;
1170 index2
.i
[3] = reg
->DimIndirect
.Index
;
1172 swizzle
= tgsi_util_get_src_register_swizzle( ®
->DimIndirect
, CHAN_X
);
1173 fetch_src_file_channel(mach
,
1174 reg
->DimIndirect
.File
,
1180 index2D
.i
[0] += indir_index
.i
[0];
1181 index2D
.i
[1] += indir_index
.i
[1];
1182 index2D
.i
[2] += indir_index
.i
[2];
1183 index2D
.i
[3] += indir_index
.i
[3];
1185 /* for disabled execution channels, zero-out the index to
1186 * avoid using a potential garbage value.
1188 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1189 if ((execmask
& (1 << i
)) == 0) {
1195 /* If by any chance there was a need for a 3D array of register
1196 * files, we would have to check whether Dimension is followed
1197 * by a dimension register and continue the saga.
1206 swizzle
= tgsi_util_get_full_src_register_swizzle( reg
, chan_index
);
1207 fetch_src_file_channel(mach
,
1214 if (reg
->Register
.Absolute
) {
1215 if (src_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1216 micro_abs(chan
, chan
);
1218 micro_iabs(chan
, chan
);
1222 if (reg
->Register
.Negate
) {
1223 if (src_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1224 micro_neg(chan
, chan
);
1226 micro_ineg(chan
, chan
);
1232 store_dest(struct tgsi_exec_machine
*mach
,
1233 const union tgsi_exec_channel
*chan
,
1234 const struct tgsi_full_dst_register
*reg
,
1235 const struct tgsi_full_instruction
*inst
,
1237 enum tgsi_exec_datatype dst_datatype
)
1240 union tgsi_exec_channel null
;
1241 union tgsi_exec_channel
*dst
;
1242 uint execmask
= mach
->ExecMask
;
1243 int offset
= 0; /* indirection offset */
1247 if (0 && dst_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1248 check_inf_or_nan(chan
);
1251 /* There is an extra source register that indirectly subscripts
1252 * a register file. The direct index now becomes an offset
1253 * that is being added to the indirect register.
1257 * ind = Indirect.File
1258 * [2] = Indirect.Index
1259 * .x = Indirect.SwizzleX
1261 if (reg
->Register
.Indirect
) {
1262 union tgsi_exec_channel index
;
1263 union tgsi_exec_channel indir_index
;
1266 /* which address register (always zero for now) */
1270 index
.i
[3] = reg
->Indirect
.Index
;
1272 /* get current value of address register[swizzle] */
1273 swizzle
= tgsi_util_get_src_register_swizzle( ®
->Indirect
, CHAN_X
);
1275 /* fetch values from the address/indirection register */
1276 fetch_src_file_channel(mach
,
1283 /* save indirection offset */
1284 offset
= indir_index
.i
[0];
1287 switch (reg
->Register
.File
) {
1288 case TGSI_FILE_NULL
:
1292 case TGSI_FILE_OUTPUT
:
1293 index
= mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1294 + reg
->Register
.Index
;
1295 dst
= &mach
->Outputs
[offset
+ index
].xyzw
[chan_index
];
1297 if (TGSI_PROCESSOR_GEOMETRY
== mach
->Processor
) {
1298 fprintf(stderr
, "STORING OUT[%d] mask(%d), = (", offset
+ index
, execmask
);
1299 for (i
= 0; i
< QUAD_SIZE
; i
++)
1300 if (execmask
& (1 << i
))
1301 fprintf(stderr
, "%f, ", chan
->f
[i
]);
1302 fprintf(stderr
, ")\n");
1307 case TGSI_FILE_TEMPORARY
:
1308 index
= reg
->Register
.Index
;
1309 assert( index
< TGSI_EXEC_NUM_TEMPS
);
1310 dst
= &mach
->Temps
[offset
+ index
].xyzw
[chan_index
];
1313 case TGSI_FILE_ADDRESS
:
1314 index
= reg
->Register
.Index
;
1315 dst
= &mach
->Addrs
[index
].xyzw
[chan_index
];
1318 case TGSI_FILE_LOOP
:
1319 assert(reg
->Register
.Index
== 0);
1320 assert(mach
->LoopCounterStackTop
> 0);
1321 assert(chan_index
== CHAN_X
);
1322 dst
= &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[chan_index
];
1325 case TGSI_FILE_PREDICATE
:
1326 index
= reg
->Register
.Index
;
1327 assert(index
< TGSI_EXEC_NUM_PREDS
);
1328 dst
= &mach
->Predicates
[index
].xyzw
[chan_index
];
1336 if (inst
->Instruction
.Predicate
) {
1338 union tgsi_exec_channel
*pred
;
1340 switch (chan_index
) {
1342 swizzle
= inst
->Predicate
.SwizzleX
;
1345 swizzle
= inst
->Predicate
.SwizzleY
;
1348 swizzle
= inst
->Predicate
.SwizzleZ
;
1351 swizzle
= inst
->Predicate
.SwizzleW
;
1358 assert(inst
->Predicate
.Index
== 0);
1360 pred
= &mach
->Predicates
[inst
->Predicate
.Index
].xyzw
[swizzle
];
1362 if (inst
->Predicate
.Negate
) {
1363 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1365 execmask
&= ~(1 << i
);
1369 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1371 execmask
&= ~(1 << i
);
1377 switch (inst
->Instruction
.Saturate
) {
1379 for (i
= 0; i
< QUAD_SIZE
; i
++)
1380 if (execmask
& (1 << i
))
1381 dst
->i
[i
] = chan
->i
[i
];
1384 case TGSI_SAT_ZERO_ONE
:
1385 for (i
= 0; i
< QUAD_SIZE
; i
++)
1386 if (execmask
& (1 << i
)) {
1387 if (chan
->f
[i
] < 0.0f
)
1389 else if (chan
->f
[i
] > 1.0f
)
1392 dst
->i
[i
] = chan
->i
[i
];
1396 case TGSI_SAT_MINUS_PLUS_ONE
:
1397 for (i
= 0; i
< QUAD_SIZE
; i
++)
1398 if (execmask
& (1 << i
)) {
1399 if (chan
->f
[i
] < -1.0f
)
1401 else if (chan
->f
[i
] > 1.0f
)
1404 dst
->i
[i
] = chan
->i
[i
];
1413 #define FETCH(VAL,INDEX,CHAN)\
1414 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1416 #define STORE(VAL,INDEX,CHAN)\
1417 store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
1421 * Execute ARB-style KIL which is predicated by a src register.
1422 * Kill fragment if any of the four values is less than zero.
1425 exec_kil(struct tgsi_exec_machine
*mach
,
1426 const struct tgsi_full_instruction
*inst
)
1430 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1431 union tgsi_exec_channel r
[1];
1433 /* This mask stores component bits that were already tested. */
1436 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1441 /* unswizzle channel */
1442 swizzle
= tgsi_util_get_full_src_register_swizzle (
1446 /* check if the component has not been already tested */
1447 if (uniquemask
& (1 << swizzle
))
1449 uniquemask
|= 1 << swizzle
;
1451 FETCH(&r
[0], 0, chan_index
);
1452 for (i
= 0; i
< 4; i
++)
1453 if (r
[0].f
[i
] < 0.0f
)
1457 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1461 * Execute NVIDIA-style KIL which is predicated by a condition code.
1462 * Kill fragment if the condition code is TRUE.
1465 exec_kilp(struct tgsi_exec_machine
*mach
,
1466 const struct tgsi_full_instruction
*inst
)
1468 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1470 /* "unconditional" kil */
1471 kilmask
= mach
->ExecMask
;
1472 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1476 emit_vertex(struct tgsi_exec_machine
*mach
)
1478 /* FIXME: check for exec mask correctly
1480 for (i = 0; i < QUAD_SIZE; ++i) {
1481 if ((mach->ExecMask & (1 << i)))
1483 if (mach
->ExecMask
) {
1484 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += mach
->NumOutputs
;
1485 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
1490 emit_primitive(struct tgsi_exec_machine
*mach
)
1492 unsigned *prim_count
= &mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0];
1493 /* FIXME: check for exec mask correctly
1495 for (i = 0; i < QUAD_SIZE; ++i) {
1496 if ((mach->ExecMask & (1 << i)))
1498 if (mach
->ExecMask
) {
1500 debug_assert((*prim_count
* mach
->NumOutputs
) < mach
->MaxGeometryShaderOutputs
);
1501 mach
->Primitives
[*prim_count
] = 0;
1506 * Fetch four texture samples using STR texture coordinates.
1509 fetch_texel( struct tgsi_sampler
*sampler
,
1510 const union tgsi_exec_channel
*s
,
1511 const union tgsi_exec_channel
*t
,
1512 const union tgsi_exec_channel
*p
,
1513 const union tgsi_exec_channel
*c0
,
1514 enum tgsi_sampler_control control
,
1515 union tgsi_exec_channel
*r
,
1516 union tgsi_exec_channel
*g
,
1517 union tgsi_exec_channel
*b
,
1518 union tgsi_exec_channel
*a
)
1521 float rgba
[NUM_CHANNELS
][QUAD_SIZE
];
1523 sampler
->get_samples(sampler
, s
->f
, t
->f
, p
->f
, c0
->f
, control
, rgba
);
1525 for (j
= 0; j
< 4; j
++) {
1526 r
->f
[j
] = rgba
[0][j
];
1527 g
->f
[j
] = rgba
[1][j
];
1528 b
->f
[j
] = rgba
[2][j
];
1529 a
->f
[j
] = rgba
[3][j
];
1534 #define TEX_MODIFIER_NONE 0
1535 #define TEX_MODIFIER_PROJECTED 1
1536 #define TEX_MODIFIER_LOD_BIAS 2
1537 #define TEX_MODIFIER_EXPLICIT_LOD 3
1541 exec_tex(struct tgsi_exec_machine
*mach
,
1542 const struct tgsi_full_instruction
*inst
,
1545 const uint unit
= inst
->Src
[1].Register
.Index
;
1546 union tgsi_exec_channel r
[4];
1547 const union tgsi_exec_channel
*lod
= &ZeroVec
;
1548 enum tgsi_sampler_control control
;
1551 if (modifier
!= TEX_MODIFIER_NONE
) {
1552 FETCH(&r
[3], 0, CHAN_W
);
1553 if (modifier
!= TEX_MODIFIER_PROJECTED
) {
1558 if (modifier
== TEX_MODIFIER_EXPLICIT_LOD
) {
1559 control
= tgsi_sampler_lod_explicit
;
1561 control
= tgsi_sampler_lod_bias
;
1564 switch (inst
->Texture
.Texture
) {
1565 case TGSI_TEXTURE_1D
:
1566 case TGSI_TEXTURE_SHADOW1D
:
1567 FETCH(&r
[0], 0, CHAN_X
);
1569 if (modifier
== TEX_MODIFIER_PROJECTED
) {
1570 micro_div(&r
[0], &r
[0], &r
[3]);
1573 fetch_texel(mach
->Samplers
[unit
],
1574 &r
[0], &ZeroVec
, &ZeroVec
, lod
, /* S, T, P, LOD */
1576 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1579 case TGSI_TEXTURE_2D
:
1580 case TGSI_TEXTURE_RECT
:
1581 case TGSI_TEXTURE_SHADOW2D
:
1582 case TGSI_TEXTURE_SHADOWRECT
:
1583 FETCH(&r
[0], 0, CHAN_X
);
1584 FETCH(&r
[1], 0, CHAN_Y
);
1585 FETCH(&r
[2], 0, CHAN_Z
);
1587 if (modifier
== TEX_MODIFIER_PROJECTED
) {
1588 micro_div(&r
[0], &r
[0], &r
[3]);
1589 micro_div(&r
[1], &r
[1], &r
[3]);
1590 micro_div(&r
[2], &r
[2], &r
[3]);
1593 fetch_texel(mach
->Samplers
[unit
],
1594 &r
[0], &r
[1], &r
[2], lod
, /* S, T, P, LOD */
1596 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1599 case TGSI_TEXTURE_3D
:
1600 case TGSI_TEXTURE_CUBE
:
1601 FETCH(&r
[0], 0, CHAN_X
);
1602 FETCH(&r
[1], 0, CHAN_Y
);
1603 FETCH(&r
[2], 0, CHAN_Z
);
1605 if (modifier
== TEX_MODIFIER_PROJECTED
) {
1606 micro_div(&r
[0], &r
[0], &r
[3]);
1607 micro_div(&r
[1], &r
[1], &r
[3]);
1608 micro_div(&r
[2], &r
[2], &r
[3]);
1611 fetch_texel(mach
->Samplers
[unit
],
1612 &r
[0], &r
[1], &r
[2], lod
,
1614 &r
[0], &r
[1], &r
[2], &r
[3]);
1621 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
1622 STORE(&r
[chan_index
], 0, chan_index
);
1627 exec_txd(struct tgsi_exec_machine
*mach
,
1628 const struct tgsi_full_instruction
*inst
)
1630 const uint unit
= inst
->Src
[3].Register
.Index
;
1631 union tgsi_exec_channel r
[4];
1635 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1638 switch (inst
->Texture
.Texture
) {
1639 case TGSI_TEXTURE_1D
:
1640 case TGSI_TEXTURE_SHADOW1D
:
1642 FETCH(&r
[0], 0, CHAN_X
);
1644 fetch_texel(mach
->Samplers
[unit
],
1645 &r
[0], &ZeroVec
, &ZeroVec
, &ZeroVec
, /* S, T, P, BIAS */
1646 tgsi_sampler_lod_bias
,
1647 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1650 case TGSI_TEXTURE_2D
:
1651 case TGSI_TEXTURE_RECT
:
1652 case TGSI_TEXTURE_SHADOW2D
:
1653 case TGSI_TEXTURE_SHADOWRECT
:
1655 FETCH(&r
[0], 0, CHAN_X
);
1656 FETCH(&r
[1], 0, CHAN_Y
);
1657 FETCH(&r
[2], 0, CHAN_Z
);
1659 fetch_texel(mach
->Samplers
[unit
],
1660 &r
[0], &r
[1], &r
[2], &ZeroVec
, /* inputs */
1661 tgsi_sampler_lod_bias
,
1662 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1665 case TGSI_TEXTURE_3D
:
1666 case TGSI_TEXTURE_CUBE
:
1668 FETCH(&r
[0], 0, CHAN_X
);
1669 FETCH(&r
[1], 0, CHAN_Y
);
1670 FETCH(&r
[2], 0, CHAN_Z
);
1672 fetch_texel(mach
->Samplers
[unit
],
1673 &r
[0], &r
[1], &r
[2], &ZeroVec
,
1674 tgsi_sampler_lod_bias
,
1675 &r
[0], &r
[1], &r
[2], &r
[3]);
1682 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
1683 STORE(&r
[chan_index
], 0, chan_index
);
1689 * Evaluate a constant-valued coefficient at the position of the
1694 struct tgsi_exec_machine
*mach
,
1700 for( i
= 0; i
< QUAD_SIZE
; i
++ ) {
1701 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
1706 * Evaluate a linear-valued coefficient at the position of the
1711 struct tgsi_exec_machine
*mach
,
1715 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1716 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1717 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1718 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1719 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1720 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
1721 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
1722 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
1723 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
1727 * Evaluate a perspective-valued coefficient at the position of the
1731 eval_perspective_coef(
1732 struct tgsi_exec_machine
*mach
,
1736 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1737 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1738 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1739 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1740 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1741 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
1742 /* divide by W here */
1743 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
1744 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
1745 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
1746 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
1750 typedef void (* eval_coef_func
)(
1751 struct tgsi_exec_machine
*mach
,
1756 exec_declaration(struct tgsi_exec_machine
*mach
,
1757 const struct tgsi_full_declaration
*decl
)
1759 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
1760 if (decl
->Declaration
.File
== TGSI_FILE_INPUT
||
1761 decl
->Declaration
.File
== TGSI_FILE_SYSTEM_VALUE
) {
1762 uint first
, last
, mask
;
1764 first
= decl
->Range
.First
;
1765 last
= decl
->Range
.Last
;
1766 mask
= decl
->Declaration
.UsageMask
;
1768 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_FACE
) {
1771 assert(decl
->Semantic
.Index
== 0);
1772 assert(first
== last
);
1774 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1775 mach
->Inputs
[first
].xyzw
[0].f
[i
] = mach
->Face
;
1778 eval_coef_func eval
;
1781 switch (decl
->Declaration
.Interpolate
) {
1782 case TGSI_INTERPOLATE_CONSTANT
:
1783 eval
= eval_constant_coef
;
1786 case TGSI_INTERPOLATE_LINEAR
:
1787 eval
= eval_linear_coef
;
1790 case TGSI_INTERPOLATE_PERSPECTIVE
:
1791 eval
= eval_perspective_coef
;
1799 for (j
= 0; j
< NUM_CHANNELS
; j
++) {
1800 if (mask
& (1 << j
)) {
1801 for (i
= first
; i
<= last
; i
++) {
1811 typedef void (* micro_op
)(union tgsi_exec_channel
*dst
,
1812 const union tgsi_exec_channel
*src
);
1815 exec_scalar_unary(struct tgsi_exec_machine
*mach
,
1816 const struct tgsi_full_instruction
*inst
,
1818 enum tgsi_exec_datatype dst_datatype
,
1819 enum tgsi_exec_datatype src_datatype
)
1822 union tgsi_exec_channel src
;
1823 union tgsi_exec_channel dst
;
1825 fetch_source(mach
, &src
, &inst
->Src
[0], CHAN_X
, src_datatype
);
1827 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1828 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1829 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1835 exec_vector_unary(struct tgsi_exec_machine
*mach
,
1836 const struct tgsi_full_instruction
*inst
,
1838 enum tgsi_exec_datatype dst_datatype
,
1839 enum tgsi_exec_datatype src_datatype
)
1842 struct tgsi_exec_vector dst
;
1844 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1845 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1846 union tgsi_exec_channel src
;
1848 fetch_source(mach
, &src
, &inst
->Src
[0], chan
, src_datatype
);
1849 op(&dst
.xyzw
[chan
], &src
);
1852 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1853 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1854 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1860 exec_vector_binary(struct tgsi_exec_machine
*mach
,
1861 const struct tgsi_full_instruction
*inst
,
1863 enum tgsi_exec_datatype dst_datatype
,
1864 enum tgsi_exec_datatype src_datatype
)
1867 struct tgsi_exec_vector dst
;
1869 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1870 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1871 union tgsi_exec_channel src
[2];
1873 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
1874 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
1875 op(&dst
.xyzw
[chan
], src
);
1878 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1879 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1880 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1886 exec_vector_trinary(struct tgsi_exec_machine
*mach
,
1887 const struct tgsi_full_instruction
*inst
,
1889 enum tgsi_exec_datatype dst_datatype
,
1890 enum tgsi_exec_datatype src_datatype
)
1893 struct tgsi_exec_vector dst
;
1895 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1896 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1897 union tgsi_exec_channel src
[3];
1899 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
1900 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
1901 fetch_source(mach
, &src
[2], &inst
->Src
[2], chan
, src_datatype
);
1902 op(&dst
.xyzw
[chan
], src
);
1905 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1906 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1907 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1913 exec_dp3(struct tgsi_exec_machine
*mach
,
1914 const struct tgsi_full_instruction
*inst
)
1917 union tgsi_exec_channel arg
[3];
1919 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1920 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1921 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1923 for (chan
= CHAN_Y
; chan
<= CHAN_Z
; chan
++) {
1924 fetch_source(mach
, &arg
[0], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
1925 fetch_source(mach
, &arg
[1], &inst
->Src
[1], chan
, TGSI_EXEC_DATA_FLOAT
);
1926 micro_mad(&arg
[2], arg
);
1929 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1930 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1931 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
1937 exec_dp4(struct tgsi_exec_machine
*mach
,
1938 const struct tgsi_full_instruction
*inst
)
1941 union tgsi_exec_channel arg
[3];
1943 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1944 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1945 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1947 for (chan
= CHAN_Y
; chan
<= CHAN_W
; chan
++) {
1948 fetch_source(mach
, &arg
[0], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
1949 fetch_source(mach
, &arg
[1], &inst
->Src
[1], chan
, TGSI_EXEC_DATA_FLOAT
);
1950 micro_mad(&arg
[2], arg
);
1953 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1954 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1955 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
1961 exec_dp2a(struct tgsi_exec_machine
*mach
,
1962 const struct tgsi_full_instruction
*inst
)
1965 union tgsi_exec_channel arg
[3];
1967 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1968 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1969 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1971 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1972 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1973 micro_mad(&arg
[0], arg
);
1975 fetch_source(mach
, &arg
[1], &inst
->Src
[2], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1976 micro_add(&arg
[0], &arg
[0], &arg
[1]);
1978 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1979 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1980 store_dest(mach
, &arg
[0], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
1986 exec_dph(struct tgsi_exec_machine
*mach
,
1987 const struct tgsi_full_instruction
*inst
)
1990 union tgsi_exec_channel arg
[3];
1992 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1993 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1994 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1996 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1997 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1998 micro_mad(&arg
[2], arg
);
2000 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
2001 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
2002 micro_mad(&arg
[0], arg
);
2004 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
2005 micro_add(&arg
[0], &arg
[0], &arg
[1]);
2007 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
2008 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2009 store_dest(mach
, &arg
[0], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2015 exec_dp2(struct tgsi_exec_machine
*mach
,
2016 const struct tgsi_full_instruction
*inst
)
2019 union tgsi_exec_channel arg
[3];
2021 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2022 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2023 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
2025 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
2026 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
2027 micro_mad(&arg
[2], arg
);
2029 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
2030 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2031 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2037 exec_nrm4(struct tgsi_exec_machine
*mach
,
2038 const struct tgsi_full_instruction
*inst
)
2041 union tgsi_exec_channel arg
[4];
2042 union tgsi_exec_channel scale
;
2044 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2045 micro_mul(&scale
, &arg
[0], &arg
[0]);
2047 for (chan
= CHAN_Y
; chan
<= CHAN_W
; chan
++) {
2048 union tgsi_exec_channel product
;
2050 fetch_source(mach
, &arg
[chan
], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
2051 micro_mul(&product
, &arg
[chan
], &arg
[chan
]);
2052 micro_add(&scale
, &scale
, &product
);
2055 micro_rsq(&scale
, &scale
);
2057 for (chan
= CHAN_X
; chan
<= CHAN_W
; chan
++) {
2058 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2059 micro_mul(&arg
[chan
], &arg
[chan
], &scale
);
2060 store_dest(mach
, &arg
[chan
], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2066 exec_nrm3(struct tgsi_exec_machine
*mach
,
2067 const struct tgsi_full_instruction
*inst
)
2069 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XYZ
) {
2071 union tgsi_exec_channel arg
[3];
2072 union tgsi_exec_channel scale
;
2074 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2075 micro_mul(&scale
, &arg
[0], &arg
[0]);
2077 for (chan
= CHAN_Y
; chan
<= CHAN_Z
; chan
++) {
2078 union tgsi_exec_channel product
;
2080 fetch_source(mach
, &arg
[chan
], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
2081 micro_mul(&product
, &arg
[chan
], &arg
[chan
]);
2082 micro_add(&scale
, &scale
, &product
);
2085 micro_rsq(&scale
, &scale
);
2087 for (chan
= CHAN_X
; chan
<= CHAN_Z
; chan
++) {
2088 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2089 micro_mul(&arg
[chan
], &arg
[chan
], &scale
);
2090 store_dest(mach
, &arg
[chan
], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2095 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
2096 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
2101 exec_break(struct tgsi_exec_machine
*mach
)
2103 if (mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_LOOP
) {
2104 /* turn off loop channels for each enabled exec channel */
2105 mach
->LoopMask
&= ~mach
->ExecMask
;
2106 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2107 UPDATE_EXEC_MASK(mach
);
2109 assert(mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_SWITCH
);
2111 mach
->Switch
.mask
= 0x0;
2113 UPDATE_EXEC_MASK(mach
);
2118 exec_switch(struct tgsi_exec_machine
*mach
,
2119 const struct tgsi_full_instruction
*inst
)
2121 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
2122 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
2124 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
2125 fetch_source(mach
, &mach
->Switch
.selector
, &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_UINT
);
2126 mach
->Switch
.mask
= 0x0;
2127 mach
->Switch
.defaultMask
= 0x0;
2129 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
2130 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_SWITCH
;
2132 UPDATE_EXEC_MASK(mach
);
2136 exec_case(struct tgsi_exec_machine
*mach
,
2137 const struct tgsi_full_instruction
*inst
)
2139 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
2140 union tgsi_exec_channel src
;
2143 fetch_source(mach
, &src
, &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_UINT
);
2145 if (mach
->Switch
.selector
.u
[0] == src
.u
[0]) {
2148 if (mach
->Switch
.selector
.u
[1] == src
.u
[1]) {
2151 if (mach
->Switch
.selector
.u
[2] == src
.u
[2]) {
2154 if (mach
->Switch
.selector
.u
[3] == src
.u
[3]) {
2158 mach
->Switch
.defaultMask
|= mask
;
2160 mach
->Switch
.mask
|= mask
& prevMask
;
2162 UPDATE_EXEC_MASK(mach
);
2166 exec_default(struct tgsi_exec_machine
*mach
)
2168 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
2170 mach
->Switch
.mask
|= ~mach
->Switch
.defaultMask
& prevMask
;
2172 UPDATE_EXEC_MASK(mach
);
2176 exec_endswitch(struct tgsi_exec_machine
*mach
)
2178 mach
->Switch
= mach
->SwitchStack
[--mach
->SwitchStackTop
];
2179 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
2181 UPDATE_EXEC_MASK(mach
);
2185 micro_i2f(union tgsi_exec_channel
*dst
,
2186 const union tgsi_exec_channel
*src
)
2188 dst
->f
[0] = (float)src
->i
[0];
2189 dst
->f
[1] = (float)src
->i
[1];
2190 dst
->f
[2] = (float)src
->i
[2];
2191 dst
->f
[3] = (float)src
->i
[3];
2195 micro_not(union tgsi_exec_channel
*dst
,
2196 const union tgsi_exec_channel
*src
)
2198 dst
->u
[0] = ~src
->u
[0];
2199 dst
->u
[1] = ~src
->u
[1];
2200 dst
->u
[2] = ~src
->u
[2];
2201 dst
->u
[3] = ~src
->u
[3];
2205 micro_shl(union tgsi_exec_channel
*dst
,
2206 const union tgsi_exec_channel
*src
)
2208 dst
->u
[0] = src
[0].u
[0] << src
[1].u
[0];
2209 dst
->u
[1] = src
[0].u
[1] << src
[1].u
[1];
2210 dst
->u
[2] = src
[0].u
[2] << src
[1].u
[2];
2211 dst
->u
[3] = src
[0].u
[3] << src
[1].u
[3];
2215 micro_and(union tgsi_exec_channel
*dst
,
2216 const union tgsi_exec_channel
*src
)
2218 dst
->u
[0] = src
[0].u
[0] & src
[1].u
[0];
2219 dst
->u
[1] = src
[0].u
[1] & src
[1].u
[1];
2220 dst
->u
[2] = src
[0].u
[2] & src
[1].u
[2];
2221 dst
->u
[3] = src
[0].u
[3] & src
[1].u
[3];
2225 micro_or(union tgsi_exec_channel
*dst
,
2226 const union tgsi_exec_channel
*src
)
2228 dst
->u
[0] = src
[0].u
[0] | src
[1].u
[0];
2229 dst
->u
[1] = src
[0].u
[1] | src
[1].u
[1];
2230 dst
->u
[2] = src
[0].u
[2] | src
[1].u
[2];
2231 dst
->u
[3] = src
[0].u
[3] | src
[1].u
[3];
2235 micro_xor(union tgsi_exec_channel
*dst
,
2236 const union tgsi_exec_channel
*src
)
2238 dst
->u
[0] = src
[0].u
[0] ^ src
[1].u
[0];
2239 dst
->u
[1] = src
[0].u
[1] ^ src
[1].u
[1];
2240 dst
->u
[2] = src
[0].u
[2] ^ src
[1].u
[2];
2241 dst
->u
[3] = src
[0].u
[3] ^ src
[1].u
[3];
2245 micro_f2i(union tgsi_exec_channel
*dst
,
2246 const union tgsi_exec_channel
*src
)
2248 dst
->i
[0] = (int)src
->f
[0];
2249 dst
->i
[1] = (int)src
->f
[1];
2250 dst
->i
[2] = (int)src
->f
[2];
2251 dst
->i
[3] = (int)src
->f
[3];
2255 micro_idiv(union tgsi_exec_channel
*dst
,
2256 const union tgsi_exec_channel
*src
)
2258 dst
->i
[0] = src
[0].i
[0] / src
[1].i
[0];
2259 dst
->i
[1] = src
[0].i
[1] / src
[1].i
[1];
2260 dst
->i
[2] = src
[0].i
[2] / src
[1].i
[2];
2261 dst
->i
[3] = src
[0].i
[3] / src
[1].i
[3];
2265 micro_imax(union tgsi_exec_channel
*dst
,
2266 const union tgsi_exec_channel
*src
)
2268 dst
->i
[0] = src
[0].i
[0] > src
[1].i
[0] ? src
[0].i
[0] : src
[1].i
[0];
2269 dst
->i
[1] = src
[0].i
[1] > src
[1].i
[1] ? src
[0].i
[1] : src
[1].i
[1];
2270 dst
->i
[2] = src
[0].i
[2] > src
[1].i
[2] ? src
[0].i
[2] : src
[1].i
[2];
2271 dst
->i
[3] = src
[0].i
[3] > src
[1].i
[3] ? src
[0].i
[3] : src
[1].i
[3];
2275 micro_imin(union tgsi_exec_channel
*dst
,
2276 const union tgsi_exec_channel
*src
)
2278 dst
->i
[0] = src
[0].i
[0] < src
[1].i
[0] ? src
[0].i
[0] : src
[1].i
[0];
2279 dst
->i
[1] = src
[0].i
[1] < src
[1].i
[1] ? src
[0].i
[1] : src
[1].i
[1];
2280 dst
->i
[2] = src
[0].i
[2] < src
[1].i
[2] ? src
[0].i
[2] : src
[1].i
[2];
2281 dst
->i
[3] = src
[0].i
[3] < src
[1].i
[3] ? src
[0].i
[3] : src
[1].i
[3];
2285 micro_isge(union tgsi_exec_channel
*dst
,
2286 const union tgsi_exec_channel
*src
)
2288 dst
->i
[0] = src
[0].i
[0] >= src
[1].i
[0] ? -1 : 0;
2289 dst
->i
[1] = src
[0].i
[1] >= src
[1].i
[1] ? -1 : 0;
2290 dst
->i
[2] = src
[0].i
[2] >= src
[1].i
[2] ? -1 : 0;
2291 dst
->i
[3] = src
[0].i
[3] >= src
[1].i
[3] ? -1 : 0;
2295 micro_ishr(union tgsi_exec_channel
*dst
,
2296 const union tgsi_exec_channel
*src
)
2298 dst
->i
[0] = src
[0].i
[0] >> src
[1].i
[0];
2299 dst
->i
[1] = src
[0].i
[1] >> src
[1].i
[1];
2300 dst
->i
[2] = src
[0].i
[2] >> src
[1].i
[2];
2301 dst
->i
[3] = src
[0].i
[3] >> src
[1].i
[3];
2305 micro_islt(union tgsi_exec_channel
*dst
,
2306 const union tgsi_exec_channel
*src
)
2308 dst
->i
[0] = src
[0].i
[0] < src
[1].i
[0] ? -1 : 0;
2309 dst
->i
[1] = src
[0].i
[1] < src
[1].i
[1] ? -1 : 0;
2310 dst
->i
[2] = src
[0].i
[2] < src
[1].i
[2] ? -1 : 0;
2311 dst
->i
[3] = src
[0].i
[3] < src
[1].i
[3] ? -1 : 0;
2315 micro_f2u(union tgsi_exec_channel
*dst
,
2316 const union tgsi_exec_channel
*src
)
2318 dst
->u
[0] = (uint
)src
->f
[0];
2319 dst
->u
[1] = (uint
)src
->f
[1];
2320 dst
->u
[2] = (uint
)src
->f
[2];
2321 dst
->u
[3] = (uint
)src
->f
[3];
2325 micro_u2f(union tgsi_exec_channel
*dst
,
2326 const union tgsi_exec_channel
*src
)
2328 dst
->f
[0] = (float)src
->u
[0];
2329 dst
->f
[1] = (float)src
->u
[1];
2330 dst
->f
[2] = (float)src
->u
[2];
2331 dst
->f
[3] = (float)src
->u
[3];
2335 micro_uadd(union tgsi_exec_channel
*dst
,
2336 const union tgsi_exec_channel
*src
)
2338 dst
->u
[0] = src
[0].u
[0] + src
[1].u
[0];
2339 dst
->u
[1] = src
[0].u
[1] + src
[1].u
[1];
2340 dst
->u
[2] = src
[0].u
[2] + src
[1].u
[2];
2341 dst
->u
[3] = src
[0].u
[3] + src
[1].u
[3];
2345 micro_udiv(union tgsi_exec_channel
*dst
,
2346 const union tgsi_exec_channel
*src
)
2348 dst
->u
[0] = src
[0].u
[0] / src
[1].u
[0];
2349 dst
->u
[1] = src
[0].u
[1] / src
[1].u
[1];
2350 dst
->u
[2] = src
[0].u
[2] / src
[1].u
[2];
2351 dst
->u
[3] = src
[0].u
[3] / src
[1].u
[3];
2355 micro_umad(union tgsi_exec_channel
*dst
,
2356 const union tgsi_exec_channel
*src
)
2358 dst
->u
[0] = src
[0].u
[0] * src
[1].u
[0] + src
[2].u
[0];
2359 dst
->u
[1] = src
[0].u
[1] * src
[1].u
[1] + src
[2].u
[1];
2360 dst
->u
[2] = src
[0].u
[2] * src
[1].u
[2] + src
[2].u
[2];
2361 dst
->u
[3] = src
[0].u
[3] * src
[1].u
[3] + src
[2].u
[3];
2365 micro_umax(union tgsi_exec_channel
*dst
,
2366 const union tgsi_exec_channel
*src
)
2368 dst
->u
[0] = src
[0].u
[0] > src
[1].u
[0] ? src
[0].u
[0] : src
[1].u
[0];
2369 dst
->u
[1] = src
[0].u
[1] > src
[1].u
[1] ? src
[0].u
[1] : src
[1].u
[1];
2370 dst
->u
[2] = src
[0].u
[2] > src
[1].u
[2] ? src
[0].u
[2] : src
[1].u
[2];
2371 dst
->u
[3] = src
[0].u
[3] > src
[1].u
[3] ? src
[0].u
[3] : src
[1].u
[3];
2375 micro_umin(union tgsi_exec_channel
*dst
,
2376 const union tgsi_exec_channel
*src
)
2378 dst
->u
[0] = src
[0].u
[0] < src
[1].u
[0] ? src
[0].u
[0] : src
[1].u
[0];
2379 dst
->u
[1] = src
[0].u
[1] < src
[1].u
[1] ? src
[0].u
[1] : src
[1].u
[1];
2380 dst
->u
[2] = src
[0].u
[2] < src
[1].u
[2] ? src
[0].u
[2] : src
[1].u
[2];
2381 dst
->u
[3] = src
[0].u
[3] < src
[1].u
[3] ? src
[0].u
[3] : src
[1].u
[3];
2385 micro_umod(union tgsi_exec_channel
*dst
,
2386 const union tgsi_exec_channel
*src
)
2388 dst
->u
[0] = src
[0].u
[0] % src
[1].u
[0];
2389 dst
->u
[1] = src
[0].u
[1] % src
[1].u
[1];
2390 dst
->u
[2] = src
[0].u
[2] % src
[1].u
[2];
2391 dst
->u
[3] = src
[0].u
[3] % src
[1].u
[3];
2395 micro_umul(union tgsi_exec_channel
*dst
,
2396 const union tgsi_exec_channel
*src
)
2398 dst
->u
[0] = src
[0].u
[0] * src
[1].u
[0];
2399 dst
->u
[1] = src
[0].u
[1] * src
[1].u
[1];
2400 dst
->u
[2] = src
[0].u
[2] * src
[1].u
[2];
2401 dst
->u
[3] = src
[0].u
[3] * src
[1].u
[3];
2405 micro_useq(union tgsi_exec_channel
*dst
,
2406 const union tgsi_exec_channel
*src
)
2408 dst
->u
[0] = src
[0].u
[0] == src
[1].u
[0] ? ~0 : 0;
2409 dst
->u
[1] = src
[0].u
[1] == src
[1].u
[1] ? ~0 : 0;
2410 dst
->u
[2] = src
[0].u
[2] == src
[1].u
[2] ? ~0 : 0;
2411 dst
->u
[3] = src
[0].u
[3] == src
[1].u
[3] ? ~0 : 0;
2415 micro_usge(union tgsi_exec_channel
*dst
,
2416 const union tgsi_exec_channel
*src
)
2418 dst
->u
[0] = src
[0].u
[0] >= src
[1].u
[0] ? ~0 : 0;
2419 dst
->u
[1] = src
[0].u
[1] >= src
[1].u
[1] ? ~0 : 0;
2420 dst
->u
[2] = src
[0].u
[2] >= src
[1].u
[2] ? ~0 : 0;
2421 dst
->u
[3] = src
[0].u
[3] >= src
[1].u
[3] ? ~0 : 0;
2425 micro_ushr(union tgsi_exec_channel
*dst
,
2426 const union tgsi_exec_channel
*src
)
2428 dst
->u
[0] = src
[0].u
[0] >> src
[1].u
[0];
2429 dst
->u
[1] = src
[0].u
[1] >> src
[1].u
[1];
2430 dst
->u
[2] = src
[0].u
[2] >> src
[1].u
[2];
2431 dst
->u
[3] = src
[0].u
[3] >> src
[1].u
[3];
2435 micro_uslt(union tgsi_exec_channel
*dst
,
2436 const union tgsi_exec_channel
*src
)
2438 dst
->u
[0] = src
[0].u
[0] < src
[1].u
[0] ? ~0 : 0;
2439 dst
->u
[1] = src
[0].u
[1] < src
[1].u
[1] ? ~0 : 0;
2440 dst
->u
[2] = src
[0].u
[2] < src
[1].u
[2] ? ~0 : 0;
2441 dst
->u
[3] = src
[0].u
[3] < src
[1].u
[3] ? ~0 : 0;
2445 micro_usne(union tgsi_exec_channel
*dst
,
2446 const union tgsi_exec_channel
*src
)
2448 dst
->u
[0] = src
[0].u
[0] != src
[1].u
[0] ? ~0 : 0;
2449 dst
->u
[1] = src
[0].u
[1] != src
[1].u
[1] ? ~0 : 0;
2450 dst
->u
[2] = src
[0].u
[2] != src
[1].u
[2] ? ~0 : 0;
2451 dst
->u
[3] = src
[0].u
[3] != src
[1].u
[3] ? ~0 : 0;
2456 struct tgsi_exec_machine
*mach
,
2457 const struct tgsi_full_instruction
*inst
,
2461 union tgsi_exec_channel r
[10];
2462 union tgsi_exec_channel d
[8];
2466 switch (inst
->Instruction
.Opcode
) {
2467 case TGSI_OPCODE_ARL
:
2468 exec_vector_unary(mach
, inst
, micro_arl
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
2471 case TGSI_OPCODE_MOV
:
2472 exec_vector_unary(mach
, inst
, micro_mov
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
2475 case TGSI_OPCODE_LIT
:
2476 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2477 FETCH( &r
[0], 0, CHAN_X
);
2478 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2479 micro_max(&d
[CHAN_Y
], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2482 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2483 FETCH( &r
[1], 0, CHAN_Y
);
2484 micro_max( &r
[1], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2486 FETCH( &r
[2], 0, CHAN_W
);
2487 micro_min( &r
[2], &r
[2], &mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
] );
2488 micro_max( &r
[2], &r
[2], &mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
] );
2489 micro_pow( &r
[1], &r
[1], &r
[2] );
2490 micro_lt(&d
[CHAN_Z
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2493 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2494 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2496 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2497 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2500 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2501 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2503 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2504 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2508 case TGSI_OPCODE_RCP
:
2509 exec_scalar_unary(mach
, inst
, micro_rcp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2512 case TGSI_OPCODE_RSQ
:
2513 exec_scalar_unary(mach
, inst
, micro_rsq
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2516 case TGSI_OPCODE_EXP
:
2517 FETCH( &r
[0], 0, CHAN_X
);
2518 micro_flr( &r
[1], &r
[0] ); /* r1 = floor(r0) */
2519 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2520 micro_exp2( &r
[2], &r
[1] ); /* r2 = 2 ^ r1 */
2521 STORE( &r
[2], 0, CHAN_X
); /* store r2 */
2523 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2524 micro_sub( &r
[2], &r
[0], &r
[1] ); /* r2 = r0 - r1 */
2525 STORE( &r
[2], 0, CHAN_Y
); /* store r2 */
2527 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2528 micro_exp2( &r
[2], &r
[0] ); /* r2 = 2 ^ r0 */
2529 STORE( &r
[2], 0, CHAN_Z
); /* store r2 */
2531 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2532 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2536 case TGSI_OPCODE_LOG
:
2537 FETCH( &r
[0], 0, CHAN_X
);
2538 micro_abs( &r
[2], &r
[0] ); /* r2 = abs(r0) */
2539 micro_lg2( &r
[1], &r
[2] ); /* r1 = lg2(r2) */
2540 micro_flr( &r
[0], &r
[1] ); /* r0 = floor(r1) */
2541 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2542 STORE( &r
[0], 0, CHAN_X
);
2544 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2545 micro_exp2( &r
[0], &r
[0] ); /* r0 = 2 ^ r0 */
2546 micro_div( &r
[0], &r
[2], &r
[0] ); /* r0 = r2 / r0 */
2547 STORE( &r
[0], 0, CHAN_Y
);
2549 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2550 STORE( &r
[1], 0, CHAN_Z
);
2552 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2553 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2557 case TGSI_OPCODE_MUL
:
2558 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2559 FETCH(&r
[0], 0, chan_index
);
2560 FETCH(&r
[1], 1, chan_index
);
2561 micro_mul(&d
[chan_index
], &r
[0], &r
[1]);
2563 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2564 STORE(&d
[chan_index
], 0, chan_index
);
2568 case TGSI_OPCODE_ADD
:
2569 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2570 FETCH( &r
[0], 0, chan_index
);
2571 FETCH( &r
[1], 1, chan_index
);
2572 micro_add(&d
[chan_index
], &r
[0], &r
[1]);
2574 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2575 STORE(&d
[chan_index
], 0, chan_index
);
2579 case TGSI_OPCODE_DP3
:
2580 exec_dp3(mach
, inst
);
2583 case TGSI_OPCODE_DP4
:
2584 exec_dp4(mach
, inst
);
2587 case TGSI_OPCODE_DST
:
2588 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2589 FETCH( &r
[0], 0, CHAN_Y
);
2590 FETCH( &r
[1], 1, CHAN_Y
);
2591 micro_mul(&d
[CHAN_Y
], &r
[0], &r
[1]);
2593 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2594 FETCH(&d
[CHAN_Z
], 0, CHAN_Z
);
2596 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2597 FETCH(&d
[CHAN_W
], 1, CHAN_W
);
2600 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2601 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2603 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2604 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2606 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2607 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2609 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2610 STORE(&d
[CHAN_W
], 0, CHAN_W
);
2614 case TGSI_OPCODE_MIN
:
2615 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2616 FETCH(&r
[0], 0, chan_index
);
2617 FETCH(&r
[1], 1, chan_index
);
2619 /* XXX use micro_min()?? */
2620 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &r
[0], &r
[1]);
2622 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2623 STORE(&d
[chan_index
], 0, chan_index
);
2627 case TGSI_OPCODE_MAX
:
2628 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2629 FETCH(&r
[0], 0, chan_index
);
2630 FETCH(&r
[1], 1, chan_index
);
2632 /* XXX use micro_max()?? */
2633 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &r
[1], &r
[0] );
2635 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2636 STORE(&d
[chan_index
], 0, chan_index
);
2640 case TGSI_OPCODE_SLT
:
2641 exec_vector_binary(mach
, inst
, micro_slt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2644 case TGSI_OPCODE_SGE
:
2645 exec_vector_binary(mach
, inst
, micro_sge
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2648 case TGSI_OPCODE_MAD
:
2649 exec_vector_trinary(mach
, inst
, micro_mad
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2652 case TGSI_OPCODE_SUB
:
2653 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2654 FETCH(&r
[0], 0, chan_index
);
2655 FETCH(&r
[1], 1, chan_index
);
2656 micro_sub(&d
[chan_index
], &r
[0], &r
[1]);
2658 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2659 STORE(&d
[chan_index
], 0, chan_index
);
2663 case TGSI_OPCODE_LRP
:
2664 exec_vector_trinary(mach
, inst
, micro_lrp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2667 case TGSI_OPCODE_CND
:
2668 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2669 FETCH(&r
[0], 0, chan_index
);
2670 FETCH(&r
[1], 1, chan_index
);
2671 FETCH(&r
[2], 2, chan_index
);
2672 micro_lt(&d
[chan_index
], &mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
], &r
[2], &r
[0], &r
[1]);
2674 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2675 STORE(&d
[chan_index
], 0, chan_index
);
2679 case TGSI_OPCODE_DP2A
:
2680 exec_dp2a(mach
, inst
);
2683 case TGSI_OPCODE_FRC
:
2684 exec_vector_unary(mach
, inst
, micro_frc
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2687 case TGSI_OPCODE_CLAMP
:
2688 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2689 FETCH(&r
[0], 0, chan_index
);
2690 FETCH(&r
[1], 1, chan_index
);
2691 micro_max(&r
[0], &r
[0], &r
[1]);
2692 FETCH(&r
[1], 2, chan_index
);
2693 micro_min(&d
[chan_index
], &r
[0], &r
[1]);
2695 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2696 STORE(&d
[chan_index
], 0, chan_index
);
2700 case TGSI_OPCODE_FLR
:
2701 exec_vector_unary(mach
, inst
, micro_flr
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2704 case TGSI_OPCODE_ROUND
:
2705 exec_vector_unary(mach
, inst
, micro_rnd
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2708 case TGSI_OPCODE_EX2
:
2709 exec_scalar_unary(mach
, inst
, micro_exp2
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2712 case TGSI_OPCODE_LG2
:
2713 exec_scalar_unary(mach
, inst
, micro_lg2
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2716 case TGSI_OPCODE_POW
:
2717 FETCH(&r
[0], 0, CHAN_X
);
2718 FETCH(&r
[1], 1, CHAN_X
);
2720 micro_pow( &r
[0], &r
[0], &r
[1] );
2722 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2723 STORE( &r
[0], 0, chan_index
);
2727 case TGSI_OPCODE_XPD
:
2728 FETCH(&r
[0], 0, CHAN_Y
);
2729 FETCH(&r
[1], 1, CHAN_Z
);
2731 micro_mul( &r
[2], &r
[0], &r
[1] );
2733 FETCH(&r
[3], 0, CHAN_Z
);
2734 FETCH(&r
[4], 1, CHAN_Y
);
2736 micro_mul( &r
[5], &r
[3], &r
[4] );
2737 micro_sub(&d
[CHAN_X
], &r
[2], &r
[5]);
2739 FETCH(&r
[2], 1, CHAN_X
);
2741 micro_mul( &r
[3], &r
[3], &r
[2] );
2743 FETCH(&r
[5], 0, CHAN_X
);
2745 micro_mul( &r
[1], &r
[1], &r
[5] );
2746 micro_sub(&d
[CHAN_Y
], &r
[3], &r
[1]);
2748 micro_mul( &r
[5], &r
[5], &r
[4] );
2749 micro_mul( &r
[0], &r
[0], &r
[2] );
2750 micro_sub(&d
[CHAN_Z
], &r
[5], &r
[0]);
2752 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2753 STORE(&d
[CHAN_X
], 0, CHAN_X
);
2755 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2756 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2758 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2759 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2761 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2762 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2766 case TGSI_OPCODE_ABS
:
2767 exec_vector_unary(mach
, inst
, micro_abs
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2770 case TGSI_OPCODE_RCC
:
2771 FETCH(&r
[0], 0, CHAN_X
);
2772 micro_div(&r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0]);
2773 micro_float_clamp(&r
[0], &r
[0]);
2774 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2775 STORE(&r
[0], 0, chan_index
);
2779 case TGSI_OPCODE_DPH
:
2780 exec_dph(mach
, inst
);
2783 case TGSI_OPCODE_COS
:
2784 exec_scalar_unary(mach
, inst
, micro_cos
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2787 case TGSI_OPCODE_DDX
:
2788 exec_vector_unary(mach
, inst
, micro_ddx
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2791 case TGSI_OPCODE_DDY
:
2792 exec_vector_unary(mach
, inst
, micro_ddy
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2795 case TGSI_OPCODE_KILP
:
2796 exec_kilp (mach
, inst
);
2799 case TGSI_OPCODE_KIL
:
2800 exec_kil (mach
, inst
);
2803 case TGSI_OPCODE_PK2H
:
2807 case TGSI_OPCODE_PK2US
:
2811 case TGSI_OPCODE_PK4B
:
2815 case TGSI_OPCODE_PK4UB
:
2819 case TGSI_OPCODE_RFL
:
2820 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2821 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2822 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2823 /* r0 = dp3(src0, src0) */
2824 FETCH(&r
[2], 0, CHAN_X
);
2825 micro_mul(&r
[0], &r
[2], &r
[2]);
2826 FETCH(&r
[4], 0, CHAN_Y
);
2827 micro_mul(&r
[8], &r
[4], &r
[4]);
2828 micro_add(&r
[0], &r
[0], &r
[8]);
2829 FETCH(&r
[6], 0, CHAN_Z
);
2830 micro_mul(&r
[8], &r
[6], &r
[6]);
2831 micro_add(&r
[0], &r
[0], &r
[8]);
2833 /* r1 = dp3(src0, src1) */
2834 FETCH(&r
[3], 1, CHAN_X
);
2835 micro_mul(&r
[1], &r
[2], &r
[3]);
2836 FETCH(&r
[5], 1, CHAN_Y
);
2837 micro_mul(&r
[8], &r
[4], &r
[5]);
2838 micro_add(&r
[1], &r
[1], &r
[8]);
2839 FETCH(&r
[7], 1, CHAN_Z
);
2840 micro_mul(&r
[8], &r
[6], &r
[7]);
2841 micro_add(&r
[1], &r
[1], &r
[8]);
2843 /* r1 = 2 * r1 / r0 */
2844 micro_add(&r
[1], &r
[1], &r
[1]);
2845 micro_div(&r
[1], &r
[1], &r
[0]);
2847 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2848 micro_mul(&r
[2], &r
[2], &r
[1]);
2849 micro_sub(&r
[2], &r
[2], &r
[3]);
2850 STORE(&r
[2], 0, CHAN_X
);
2852 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2853 micro_mul(&r
[4], &r
[4], &r
[1]);
2854 micro_sub(&r
[4], &r
[4], &r
[5]);
2855 STORE(&r
[4], 0, CHAN_Y
);
2857 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2858 micro_mul(&r
[6], &r
[6], &r
[1]);
2859 micro_sub(&r
[6], &r
[6], &r
[7]);
2860 STORE(&r
[6], 0, CHAN_Z
);
2863 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2864 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2868 case TGSI_OPCODE_SEQ
:
2869 exec_vector_binary(mach
, inst
, micro_seq
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2872 case TGSI_OPCODE_SFL
:
2873 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2874 STORE(&mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, chan_index
);
2878 case TGSI_OPCODE_SGT
:
2879 exec_vector_binary(mach
, inst
, micro_sgt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2882 case TGSI_OPCODE_SIN
:
2883 exec_scalar_unary(mach
, inst
, micro_sin
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2886 case TGSI_OPCODE_SLE
:
2887 exec_vector_binary(mach
, inst
, micro_sle
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2890 case TGSI_OPCODE_SNE
:
2891 exec_vector_binary(mach
, inst
, micro_sne
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2894 case TGSI_OPCODE_STR
:
2895 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2896 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, chan_index
);
2900 case TGSI_OPCODE_TEX
:
2901 /* simple texture lookup */
2902 /* src[0] = texcoord */
2903 /* src[1] = sampler unit */
2904 exec_tex(mach
, inst
, TEX_MODIFIER_NONE
);
2907 case TGSI_OPCODE_TXB
:
2908 /* Texture lookup with lod bias */
2909 /* src[0] = texcoord (src[0].w = LOD bias) */
2910 /* src[1] = sampler unit */
2911 exec_tex(mach
, inst
, TEX_MODIFIER_LOD_BIAS
);
2914 case TGSI_OPCODE_TXD
:
2915 /* Texture lookup with explict partial derivatives */
2916 /* src[0] = texcoord */
2917 /* src[1] = d[strq]/dx */
2918 /* src[2] = d[strq]/dy */
2919 /* src[3] = sampler unit */
2920 exec_txd(mach
, inst
);
2923 case TGSI_OPCODE_TXL
:
2924 /* Texture lookup with explit LOD */
2925 /* src[0] = texcoord (src[0].w = LOD) */
2926 /* src[1] = sampler unit */
2927 exec_tex(mach
, inst
, TEX_MODIFIER_EXPLICIT_LOD
);
2930 case TGSI_OPCODE_TXP
:
2931 /* Texture lookup with projection */
2932 /* src[0] = texcoord (src[0].w = projection) */
2933 /* src[1] = sampler unit */
2934 exec_tex(mach
, inst
, TEX_MODIFIER_PROJECTED
);
2937 case TGSI_OPCODE_UP2H
:
2941 case TGSI_OPCODE_UP2US
:
2945 case TGSI_OPCODE_UP4B
:
2949 case TGSI_OPCODE_UP4UB
:
2953 case TGSI_OPCODE_X2D
:
2954 FETCH(&r
[0], 1, CHAN_X
);
2955 FETCH(&r
[1], 1, CHAN_Y
);
2956 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2957 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2958 FETCH(&r
[2], 2, CHAN_X
);
2959 micro_mul(&r
[2], &r
[2], &r
[0]);
2960 FETCH(&r
[3], 2, CHAN_Y
);
2961 micro_mul(&r
[3], &r
[3], &r
[1]);
2962 micro_add(&r
[2], &r
[2], &r
[3]);
2963 FETCH(&r
[3], 0, CHAN_X
);
2964 micro_add(&d
[CHAN_X
], &r
[2], &r
[3]);
2967 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2968 IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2969 FETCH(&r
[2], 2, CHAN_Z
);
2970 micro_mul(&r
[2], &r
[2], &r
[0]);
2971 FETCH(&r
[3], 2, CHAN_W
);
2972 micro_mul(&r
[3], &r
[3], &r
[1]);
2973 micro_add(&r
[2], &r
[2], &r
[3]);
2974 FETCH(&r
[3], 0, CHAN_Y
);
2975 micro_add(&d
[CHAN_Y
], &r
[2], &r
[3]);
2978 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2979 STORE(&d
[CHAN_X
], 0, CHAN_X
);
2981 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2982 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2984 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2985 STORE(&d
[CHAN_X
], 0, CHAN_Z
);
2987 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2988 STORE(&d
[CHAN_Y
], 0, CHAN_W
);
2992 case TGSI_OPCODE_ARA
:
2996 case TGSI_OPCODE_ARR
:
2997 exec_vector_unary(mach
, inst
, micro_arr
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
3000 case TGSI_OPCODE_BRA
:
3004 case TGSI_OPCODE_CAL
:
3005 /* skip the call if no execution channels are enabled */
3006 if (mach
->ExecMask
) {
3009 /* First, record the depths of the execution stacks.
3010 * This is important for deeply nested/looped return statements.
3011 * We have to unwind the stacks by the correct amount. For a
3012 * real code generator, we could determine the number of entries
3013 * to pop off each stack with simple static analysis and avoid
3014 * implementing this data structure at run time.
3016 mach
->CallStack
[mach
->CallStackTop
].CondStackTop
= mach
->CondStackTop
;
3017 mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
= mach
->LoopStackTop
;
3018 mach
->CallStack
[mach
->CallStackTop
].ContStackTop
= mach
->ContStackTop
;
3019 mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
= mach
->SwitchStackTop
;
3020 mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
= mach
->BreakStackTop
;
3021 /* note that PC was already incremented above */
3022 mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
= *pc
;
3024 mach
->CallStackTop
++;
3026 /* Second, push the Cond, Loop, Cont, Func stacks */
3027 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
3028 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3029 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3030 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
3031 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
3032 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
3034 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
3035 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
3036 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
3037 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
3038 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
3039 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
3041 /* Finally, jump to the subroutine */
3042 *pc
= inst
->Label
.Label
;
3046 case TGSI_OPCODE_RET
:
3047 mach
->FuncMask
&= ~mach
->ExecMask
;
3048 UPDATE_EXEC_MASK(mach
);
3050 if (mach
->FuncMask
== 0x0) {
3051 /* really return now (otherwise, keep executing */
3053 if (mach
->CallStackTop
== 0) {
3054 /* returning from main() */
3059 assert(mach
->CallStackTop
> 0);
3060 mach
->CallStackTop
--;
3062 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
3063 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
3065 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
3066 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
3068 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
3069 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
3071 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
3072 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
3074 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
3075 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
3077 assert(mach
->FuncStackTop
> 0);
3078 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
3080 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
3082 UPDATE_EXEC_MASK(mach
);
3086 case TGSI_OPCODE_SSG
:
3087 exec_vector_unary(mach
, inst
, micro_sgn
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
3090 case TGSI_OPCODE_CMP
:
3091 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3092 FETCH(&r
[0], 0, chan_index
);
3093 FETCH(&r
[1], 1, chan_index
);
3094 FETCH(&r
[2], 2, chan_index
);
3095 micro_lt(&d
[chan_index
], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[1], &r
[2]);
3097 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
3098 STORE(&d
[chan_index
], 0, chan_index
);
3102 case TGSI_OPCODE_SCS
:
3103 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
3104 FETCH( &r
[0], 0, CHAN_X
);
3105 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
3106 micro_cos(&r
[1], &r
[0]);
3107 STORE(&r
[1], 0, CHAN_X
);
3109 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
3110 micro_sin(&r
[1], &r
[0]);
3111 STORE(&r
[1], 0, CHAN_Y
);
3114 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Z
) ) {
3115 STORE( &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, CHAN_Z
);
3117 if( IS_CHANNEL_ENABLED( *inst
, CHAN_W
) ) {
3118 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
3122 case TGSI_OPCODE_NRM
:
3123 exec_nrm3(mach
, inst
);
3126 case TGSI_OPCODE_NRM4
:
3127 exec_nrm4(mach
, inst
);
3130 case TGSI_OPCODE_DIV
:
3134 case TGSI_OPCODE_DP2
:
3135 exec_dp2(mach
, inst
);
3138 case TGSI_OPCODE_IF
:
3140 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
3141 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
3142 FETCH( &r
[0], 0, CHAN_X
);
3143 /* update CondMask */
3145 mach
->CondMask
&= ~0x1;
3148 mach
->CondMask
&= ~0x2;
3151 mach
->CondMask
&= ~0x4;
3154 mach
->CondMask
&= ~0x8;
3156 UPDATE_EXEC_MASK(mach
);
3157 /* Todo: If CondMask==0, jump to ELSE */
3160 case TGSI_OPCODE_ELSE
:
3161 /* invert CondMask wrt previous mask */
3164 assert(mach
->CondStackTop
> 0);
3165 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
3166 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
3167 UPDATE_EXEC_MASK(mach
);
3168 /* Todo: If CondMask==0, jump to ENDIF */
3172 case TGSI_OPCODE_ENDIF
:
3174 assert(mach
->CondStackTop
> 0);
3175 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
3176 UPDATE_EXEC_MASK(mach
);
3179 case TGSI_OPCODE_END
:
3180 /* halt execution */
3184 case TGSI_OPCODE_REP
:
3188 case TGSI_OPCODE_ENDREP
:
3192 case TGSI_OPCODE_PUSHA
:
3196 case TGSI_OPCODE_POPA
:
3200 case TGSI_OPCODE_CEIL
:
3201 exec_vector_unary(mach
, inst
, micro_ceil
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
3204 case TGSI_OPCODE_I2F
:
3205 exec_vector_unary(mach
, inst
, micro_i2f
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_INT
);
3208 case TGSI_OPCODE_NOT
:
3209 exec_vector_unary(mach
, inst
, micro_not
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3212 case TGSI_OPCODE_TRUNC
:
3213 exec_vector_unary(mach
, inst
, micro_trunc
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
3216 case TGSI_OPCODE_SHL
:
3217 exec_vector_binary(mach
, inst
, micro_shl
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3220 case TGSI_OPCODE_AND
:
3221 exec_vector_binary(mach
, inst
, micro_and
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3224 case TGSI_OPCODE_OR
:
3225 exec_vector_binary(mach
, inst
, micro_or
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3228 case TGSI_OPCODE_MOD
:
3232 case TGSI_OPCODE_XOR
:
3233 exec_vector_binary(mach
, inst
, micro_xor
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3236 case TGSI_OPCODE_SAD
:
3240 case TGSI_OPCODE_TXF
:
3244 case TGSI_OPCODE_TXQ
:
3248 case TGSI_OPCODE_EMIT
:
3252 case TGSI_OPCODE_ENDPRIM
:
3253 emit_primitive(mach
);
3256 case TGSI_OPCODE_BGNFOR
:
3257 assert(mach
->LoopCounterStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3258 for (chan_index
= 0; chan_index
< 3; chan_index
++) {
3259 FETCH( &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
].xyzw
[chan_index
], 0, chan_index
);
3261 ++mach
->LoopCounterStackTop
;
3262 STORE(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
], 0, CHAN_X
);
3263 /* update LoopMask */
3264 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[0] <= 0.0f
) {
3265 mach
->LoopMask
&= ~0x1;
3267 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[1] <= 0.0f
) {
3268 mach
->LoopMask
&= ~0x2;
3270 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[2] <= 0.0f
) {
3271 mach
->LoopMask
&= ~0x4;
3273 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[3] <= 0.0f
) {
3274 mach
->LoopMask
&= ~0x8;
3276 /* TODO: if mach->LoopMask == 0, jump to end of loop */
3277 UPDATE_EXEC_MASK(mach
);
3278 /* fall-through (for now) */
3279 case TGSI_OPCODE_BGNLOOP
:
3280 /* push LoopMask and ContMasks */
3281 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3282 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3283 assert(mach
->LoopLabelStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3284 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
3286 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
3287 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
3288 mach
->LoopLabelStack
[mach
->LoopLabelStackTop
++] = *pc
- 1;
3289 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
3290 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_LOOP
;
3293 case TGSI_OPCODE_ENDFOR
:
3294 assert(mach
->LoopCounterStackTop
> 0);
3295 micro_sub(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
],
3296 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
],
3297 &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
]);
3298 /* update LoopMask */
3299 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[0] <= 0.0f
) {
3300 mach
->LoopMask
&= ~0x1;
3302 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[1] <= 0.0f
) {
3303 mach
->LoopMask
&= ~0x2;
3305 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[2] <= 0.0f
) {
3306 mach
->LoopMask
&= ~0x4;
3308 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[3] <= 0.0f
) {
3309 mach
->LoopMask
&= ~0x8;
3311 micro_add(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
],
3312 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
],
3313 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Z
]);
3314 assert(mach
->LoopLabelStackTop
> 0);
3315 inst
= mach
->Instructions
+ mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1];
3316 STORE(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
].xyzw
[CHAN_X
], 0, CHAN_X
);
3317 /* Restore ContMask, but don't pop */
3318 assert(mach
->ContStackTop
> 0);
3319 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3320 UPDATE_EXEC_MASK(mach
);
3321 if (mach
->ExecMask
) {
3322 /* repeat loop: jump to instruction just past BGNLOOP */
3323 assert(mach
->LoopLabelStackTop
> 0);
3324 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
3327 /* exit loop: pop LoopMask */
3328 assert(mach
->LoopStackTop
> 0);
3329 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3331 assert(mach
->ContStackTop
> 0);
3332 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3333 assert(mach
->LoopLabelStackTop
> 0);
3334 --mach
->LoopLabelStackTop
;
3335 assert(mach
->LoopCounterStackTop
> 0);
3336 --mach
->LoopCounterStackTop
;
3338 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3340 UPDATE_EXEC_MASK(mach
);
3343 case TGSI_OPCODE_ENDLOOP
:
3344 /* Restore ContMask, but don't pop */
3345 assert(mach
->ContStackTop
> 0);
3346 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3347 UPDATE_EXEC_MASK(mach
);
3348 if (mach
->ExecMask
) {
3349 /* repeat loop: jump to instruction just past BGNLOOP */
3350 assert(mach
->LoopLabelStackTop
> 0);
3351 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
3354 /* exit loop: pop LoopMask */
3355 assert(mach
->LoopStackTop
> 0);
3356 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3358 assert(mach
->ContStackTop
> 0);
3359 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3360 assert(mach
->LoopLabelStackTop
> 0);
3361 --mach
->LoopLabelStackTop
;
3363 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3365 UPDATE_EXEC_MASK(mach
);
3368 case TGSI_OPCODE_BRK
:
3372 case TGSI_OPCODE_CONT
:
3373 /* turn off cont channels for each enabled exec channel */
3374 mach
->ContMask
&= ~mach
->ExecMask
;
3375 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3376 UPDATE_EXEC_MASK(mach
);
3379 case TGSI_OPCODE_BGNSUB
:
3383 case TGSI_OPCODE_ENDSUB
:
3385 * XXX: This really should be a no-op. We should never reach this opcode.
3388 assert(mach
->CallStackTop
> 0);
3389 mach
->CallStackTop
--;
3391 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
3392 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
3394 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
3395 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
3397 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
3398 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
3400 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
3401 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
3403 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
3404 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
3406 assert(mach
->FuncStackTop
> 0);
3407 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
3409 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
3411 UPDATE_EXEC_MASK(mach
);
3414 case TGSI_OPCODE_NOP
:
3417 case TGSI_OPCODE_BREAKC
:
3418 FETCH(&r
[0], 0, CHAN_X
);
3419 /* update CondMask */
3420 if (r
[0].u
[0] && (mach
->ExecMask
& 0x1)) {
3421 mach
->LoopMask
&= ~0x1;
3423 if (r
[0].u
[1] && (mach
->ExecMask
& 0x2)) {
3424 mach
->LoopMask
&= ~0x2;
3426 if (r
[0].u
[2] && (mach
->ExecMask
& 0x4)) {
3427 mach
->LoopMask
&= ~0x4;
3429 if (r
[0].u
[3] && (mach
->ExecMask
& 0x8)) {
3430 mach
->LoopMask
&= ~0x8;
3432 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3433 UPDATE_EXEC_MASK(mach
);
3436 case TGSI_OPCODE_F2I
:
3437 exec_vector_unary(mach
, inst
, micro_f2i
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
3440 case TGSI_OPCODE_IDIV
:
3441 exec_vector_binary(mach
, inst
, micro_idiv
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3444 case TGSI_OPCODE_IMAX
:
3445 exec_vector_binary(mach
, inst
, micro_imax
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3448 case TGSI_OPCODE_IMIN
:
3449 exec_vector_binary(mach
, inst
, micro_imin
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3452 case TGSI_OPCODE_INEG
:
3453 exec_vector_unary(mach
, inst
, micro_ineg
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3456 case TGSI_OPCODE_ISGE
:
3457 exec_vector_binary(mach
, inst
, micro_isge
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3460 case TGSI_OPCODE_ISHR
:
3461 exec_vector_binary(mach
, inst
, micro_ishr
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3464 case TGSI_OPCODE_ISLT
:
3465 exec_vector_binary(mach
, inst
, micro_islt
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3468 case TGSI_OPCODE_F2U
:
3469 exec_vector_unary(mach
, inst
, micro_f2u
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
3472 case TGSI_OPCODE_U2F
:
3473 exec_vector_unary(mach
, inst
, micro_u2f
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_UINT
);
3476 case TGSI_OPCODE_UADD
:
3477 exec_vector_binary(mach
, inst
, micro_uadd
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3480 case TGSI_OPCODE_UDIV
:
3481 exec_vector_binary(mach
, inst
, micro_udiv
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3484 case TGSI_OPCODE_UMAD
:
3485 exec_vector_trinary(mach
, inst
, micro_umad
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3488 case TGSI_OPCODE_UMAX
:
3489 exec_vector_binary(mach
, inst
, micro_umax
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3492 case TGSI_OPCODE_UMIN
:
3493 exec_vector_binary(mach
, inst
, micro_umin
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3496 case TGSI_OPCODE_UMOD
:
3497 exec_vector_binary(mach
, inst
, micro_umod
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3500 case TGSI_OPCODE_UMUL
:
3501 exec_vector_binary(mach
, inst
, micro_umul
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3504 case TGSI_OPCODE_USEQ
:
3505 exec_vector_binary(mach
, inst
, micro_useq
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3508 case TGSI_OPCODE_USGE
:
3509 exec_vector_binary(mach
, inst
, micro_usge
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3512 case TGSI_OPCODE_USHR
:
3513 exec_vector_binary(mach
, inst
, micro_ushr
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3516 case TGSI_OPCODE_USLT
:
3517 exec_vector_binary(mach
, inst
, micro_uslt
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3520 case TGSI_OPCODE_USNE
:
3521 exec_vector_binary(mach
, inst
, micro_usne
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3524 case TGSI_OPCODE_SWITCH
:
3525 exec_switch(mach
, inst
);
3528 case TGSI_OPCODE_CASE
:
3529 exec_case(mach
, inst
);
3532 case TGSI_OPCODE_DEFAULT
:
3536 case TGSI_OPCODE_ENDSWITCH
:
3537 exec_endswitch(mach
);
3546 #define DEBUG_EXECUTION 0
3550 * Run TGSI interpreter.
3551 * \return bitmask of "alive" quad components
3554 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
3559 mach
->CondMask
= 0xf;
3560 mach
->LoopMask
= 0xf;
3561 mach
->ContMask
= 0xf;
3562 mach
->FuncMask
= 0xf;
3563 mach
->ExecMask
= 0xf;
3565 mach
->Switch
.mask
= 0xf;
3567 assert(mach
->CondStackTop
== 0);
3568 assert(mach
->LoopStackTop
== 0);
3569 assert(mach
->ContStackTop
== 0);
3570 assert(mach
->SwitchStackTop
== 0);
3571 assert(mach
->BreakStackTop
== 0);
3572 assert(mach
->CallStackTop
== 0);
3574 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
3575 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
3577 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
3578 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
3579 mach
->Primitives
[0] = 0;
3582 for (i
= 0; i
< QUAD_SIZE
; i
++) {
3583 mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
].u
[i
] =
3584 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_X_SHIFT
) |
3585 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Y_SHIFT
) |
3586 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Z_SHIFT
) |
3587 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_W_SHIFT
);
3590 /* execute declarations (interpolants) */
3591 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
3592 exec_declaration( mach
, mach
->Declarations
+i
);
3597 struct tgsi_exec_vector temps
[TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
];
3598 struct tgsi_exec_vector outputs
[PIPE_MAX_ATTRIBS
];
3601 memcpy(temps
, mach
->Temps
, sizeof(temps
));
3602 memcpy(outputs
, mach
->Outputs
, sizeof(outputs
));
3605 /* execute instructions, until pc is set to -1 */
3611 tgsi_dump_instruction(&mach
->Instructions
[pc
], inst
++);
3614 assert(pc
< (int) mach
->NumInstructions
);
3615 exec_instruction(mach
, mach
->Instructions
+ pc
, &pc
);
3618 for (i
= 0; i
< TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
; i
++) {
3619 if (memcmp(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]))) {
3622 memcpy(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]));
3623 debug_printf("TEMP[%2u] = ", i
);
3624 for (j
= 0; j
< 4; j
++) {
3628 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3629 temps
[i
].xyzw
[0].f
[j
], temps
[i
].xyzw
[0].u
[j
],
3630 temps
[i
].xyzw
[1].f
[j
], temps
[i
].xyzw
[1].u
[j
],
3631 temps
[i
].xyzw
[2].f
[j
], temps
[i
].xyzw
[2].u
[j
],
3632 temps
[i
].xyzw
[3].f
[j
], temps
[i
].xyzw
[3].u
[j
]);
3636 for (i
= 0; i
< PIPE_MAX_ATTRIBS
; i
++) {
3637 if (memcmp(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]))) {
3640 memcpy(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]));
3641 debug_printf("OUT[%2u] = ", i
);
3642 for (j
= 0; j
< 4; j
++) {
3646 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3647 outputs
[i
].xyzw
[0].f
[j
], outputs
[i
].xyzw
[0].u
[j
],
3648 outputs
[i
].xyzw
[1].f
[j
], outputs
[i
].xyzw
[1].u
[j
],
3649 outputs
[i
].xyzw
[2].f
[j
], outputs
[i
].xyzw
[2].u
[j
],
3650 outputs
[i
].xyzw
[3].f
[j
], outputs
[i
].xyzw
[3].u
[j
]);
3659 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3660 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
3662 * Scale back depth component.
3664 for (i
= 0; i
< 4; i
++)
3665 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
3669 assert(mach
->CondStackTop
== 0);
3670 assert(mach
->LoopStackTop
== 0);
3671 assert(mach
->ContStackTop
== 0);
3672 assert(mach
->SwitchStackTop
== 0);
3673 assert(mach
->BreakStackTop
== 0);
3674 assert(mach
->CallStackTop
== 0);
3676 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];