1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
30 * TGSI interpreter/executor.
32 * Flow control information:
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_memory.h"
62 #include "util/u_math.h"
67 #define TILE_TOP_LEFT 0
68 #define TILE_TOP_RIGHT 1
69 #define TILE_BOTTOM_LEFT 2
70 #define TILE_BOTTOM_RIGHT 3
73 micro_abs(union tgsi_exec_channel
*dst
,
74 const union tgsi_exec_channel
*src
)
76 dst
->f
[0] = fabsf(src
->f
[0]);
77 dst
->f
[1] = fabsf(src
->f
[1]);
78 dst
->f
[2] = fabsf(src
->f
[2]);
79 dst
->f
[3] = fabsf(src
->f
[3]);
83 micro_arl(union tgsi_exec_channel
*dst
,
84 const union tgsi_exec_channel
*src
)
86 dst
->i
[0] = (int)floorf(src
->f
[0]);
87 dst
->i
[1] = (int)floorf(src
->f
[1]);
88 dst
->i
[2] = (int)floorf(src
->f
[2]);
89 dst
->i
[3] = (int)floorf(src
->f
[3]);
93 micro_arr(union tgsi_exec_channel
*dst
,
94 const union tgsi_exec_channel
*src
)
96 dst
->i
[0] = (int)floorf(src
->f
[0] + 0.5f
);
97 dst
->i
[1] = (int)floorf(src
->f
[1] + 0.5f
);
98 dst
->i
[2] = (int)floorf(src
->f
[2] + 0.5f
);
99 dst
->i
[3] = (int)floorf(src
->f
[3] + 0.5f
);
103 micro_ceil(union tgsi_exec_channel
*dst
,
104 const union tgsi_exec_channel
*src
)
106 dst
->f
[0] = ceilf(src
->f
[0]);
107 dst
->f
[1] = ceilf(src
->f
[1]);
108 dst
->f
[2] = ceilf(src
->f
[2]);
109 dst
->f
[3] = ceilf(src
->f
[3]);
113 micro_cos(union tgsi_exec_channel
*dst
,
114 const union tgsi_exec_channel
*src
)
116 dst
->f
[0] = cosf(src
->f
[0]);
117 dst
->f
[1] = cosf(src
->f
[1]);
118 dst
->f
[2] = cosf(src
->f
[2]);
119 dst
->f
[3] = cosf(src
->f
[3]);
123 micro_ddx(union tgsi_exec_channel
*dst
,
124 const union tgsi_exec_channel
*src
)
129 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
133 micro_ddy(union tgsi_exec_channel
*dst
,
134 const union tgsi_exec_channel
*src
)
139 dst
->f
[3] = src
->f
[TILE_BOTTOM_LEFT
] - src
->f
[TILE_TOP_LEFT
];
143 micro_exp2(union tgsi_exec_channel
*dst
,
144 const union tgsi_exec_channel
*src
)
147 dst
->f
[0] = util_fast_exp2(src
->f
[0]);
148 dst
->f
[1] = util_fast_exp2(src
->f
[1]);
149 dst
->f
[2] = util_fast_exp2(src
->f
[2]);
150 dst
->f
[3] = util_fast_exp2(src
->f
[3]);
153 /* Inf is okay for this instruction, so clamp it to silence assertions. */
155 union tgsi_exec_channel clamped
;
157 for (i
= 0; i
< 4; i
++) {
158 if (src
->f
[i
] > 127.99999f
) {
159 clamped
.f
[i
] = 127.99999f
;
160 } else if (src
->f
[i
] < -126.99999f
) {
161 clamped
.f
[i
] = -126.99999f
;
163 clamped
.f
[i
] = src
->f
[i
];
169 dst
->f
[0] = powf(2.0f
, src
->f
[0]);
170 dst
->f
[1] = powf(2.0f
, src
->f
[1]);
171 dst
->f
[2] = powf(2.0f
, src
->f
[2]);
172 dst
->f
[3] = powf(2.0f
, src
->f
[3]);
173 #endif /* FAST_MATH */
177 micro_flr(union tgsi_exec_channel
*dst
,
178 const union tgsi_exec_channel
*src
)
180 dst
->f
[0] = floorf(src
->f
[0]);
181 dst
->f
[1] = floorf(src
->f
[1]);
182 dst
->f
[2] = floorf(src
->f
[2]);
183 dst
->f
[3] = floorf(src
->f
[3]);
187 micro_frc(union tgsi_exec_channel
*dst
,
188 const union tgsi_exec_channel
*src
)
190 dst
->f
[0] = src
->f
[0] - floorf(src
->f
[0]);
191 dst
->f
[1] = src
->f
[1] - floorf(src
->f
[1]);
192 dst
->f
[2] = src
->f
[2] - floorf(src
->f
[2]);
193 dst
->f
[3] = src
->f
[3] - floorf(src
->f
[3]);
197 micro_iabs(union tgsi_exec_channel
*dst
,
198 const union tgsi_exec_channel
*src
)
200 dst
->i
[0] = src
->i
[0] >= 0 ? src
->i
[0] : -src
->i
[0];
201 dst
->i
[1] = src
->i
[1] >= 0 ? src
->i
[1] : -src
->i
[1];
202 dst
->i
[2] = src
->i
[2] >= 0 ? src
->i
[2] : -src
->i
[2];
203 dst
->i
[3] = src
->i
[3] >= 0 ? src
->i
[3] : -src
->i
[3];
207 micro_ineg(union tgsi_exec_channel
*dst
,
208 const union tgsi_exec_channel
*src
)
210 dst
->i
[0] = -src
->i
[0];
211 dst
->i
[1] = -src
->i
[1];
212 dst
->i
[2] = -src
->i
[2];
213 dst
->i
[3] = -src
->i
[3];
217 micro_lg2(union tgsi_exec_channel
*dst
,
218 const union tgsi_exec_channel
*src
)
221 dst
->f
[0] = util_fast_log2(src
->f
[0]);
222 dst
->f
[1] = util_fast_log2(src
->f
[1]);
223 dst
->f
[2] = util_fast_log2(src
->f
[2]);
224 dst
->f
[3] = util_fast_log2(src
->f
[3]);
226 dst
->f
[0] = logf(src
->f
[0]) * 1.442695f
;
227 dst
->f
[1] = logf(src
->f
[1]) * 1.442695f
;
228 dst
->f
[2] = logf(src
->f
[2]) * 1.442695f
;
229 dst
->f
[3] = logf(src
->f
[3]) * 1.442695f
;
234 micro_lrp(union tgsi_exec_channel
*dst
,
235 const union tgsi_exec_channel
*src
)
237 dst
->f
[0] = src
[0].f
[0] * (src
[1].f
[0] - src
[2].f
[0]) + src
[2].f
[0];
238 dst
->f
[1] = src
[0].f
[1] * (src
[1].f
[1] - src
[2].f
[1]) + src
[2].f
[1];
239 dst
->f
[2] = src
[0].f
[2] * (src
[1].f
[2] - src
[2].f
[2]) + src
[2].f
[2];
240 dst
->f
[3] = src
[0].f
[3] * (src
[1].f
[3] - src
[2].f
[3]) + src
[2].f
[3];
244 micro_mad(union tgsi_exec_channel
*dst
,
245 const union tgsi_exec_channel
*src
)
247 dst
->f
[0] = src
[0].f
[0] * src
[1].f
[0] + src
[2].f
[0];
248 dst
->f
[1] = src
[0].f
[1] * src
[1].f
[1] + src
[2].f
[1];
249 dst
->f
[2] = src
[0].f
[2] * src
[1].f
[2] + src
[2].f
[2];
250 dst
->f
[3] = src
[0].f
[3] * src
[1].f
[3] + src
[2].f
[3];
254 micro_mov(union tgsi_exec_channel
*dst
,
255 const union tgsi_exec_channel
*src
)
257 dst
->u
[0] = src
->u
[0];
258 dst
->u
[1] = src
->u
[1];
259 dst
->u
[2] = src
->u
[2];
260 dst
->u
[3] = src
->u
[3];
264 micro_rcp(union tgsi_exec_channel
*dst
,
265 const union tgsi_exec_channel
*src
)
267 #if 0 /* for debugging */
268 assert(src
->f
[0] != 0.0f
);
269 assert(src
->f
[1] != 0.0f
);
270 assert(src
->f
[2] != 0.0f
);
271 assert(src
->f
[3] != 0.0f
);
273 dst
->f
[0] = 1.0f
/ src
->f
[0];
274 dst
->f
[1] = 1.0f
/ src
->f
[1];
275 dst
->f
[2] = 1.0f
/ src
->f
[2];
276 dst
->f
[3] = 1.0f
/ src
->f
[3];
280 micro_rnd(union tgsi_exec_channel
*dst
,
281 const union tgsi_exec_channel
*src
)
283 dst
->f
[0] = floorf(src
->f
[0] + 0.5f
);
284 dst
->f
[1] = floorf(src
->f
[1] + 0.5f
);
285 dst
->f
[2] = floorf(src
->f
[2] + 0.5f
);
286 dst
->f
[3] = floorf(src
->f
[3] + 0.5f
);
290 micro_rsq(union tgsi_exec_channel
*dst
,
291 const union tgsi_exec_channel
*src
)
293 #if 0 /* for debugging */
294 assert(src
->f
[0] != 0.0f
);
295 assert(src
->f
[1] != 0.0f
);
296 assert(src
->f
[2] != 0.0f
);
297 assert(src
->f
[3] != 0.0f
);
299 dst
->f
[0] = 1.0f
/ sqrtf(fabsf(src
->f
[0]));
300 dst
->f
[1] = 1.0f
/ sqrtf(fabsf(src
->f
[1]));
301 dst
->f
[2] = 1.0f
/ sqrtf(fabsf(src
->f
[2]));
302 dst
->f
[3] = 1.0f
/ sqrtf(fabsf(src
->f
[3]));
306 micro_seq(union tgsi_exec_channel
*dst
,
307 const union tgsi_exec_channel
*src
)
309 dst
->f
[0] = src
[0].f
[0] == src
[1].f
[0] ? 1.0f
: 0.0f
;
310 dst
->f
[1] = src
[0].f
[1] == src
[1].f
[1] ? 1.0f
: 0.0f
;
311 dst
->f
[2] = src
[0].f
[2] == src
[1].f
[2] ? 1.0f
: 0.0f
;
312 dst
->f
[3] = src
[0].f
[3] == src
[1].f
[3] ? 1.0f
: 0.0f
;
316 micro_sge(union tgsi_exec_channel
*dst
,
317 const union tgsi_exec_channel
*src
)
319 dst
->f
[0] = src
[0].f
[0] >= src
[1].f
[0] ? 1.0f
: 0.0f
;
320 dst
->f
[1] = src
[0].f
[1] >= src
[1].f
[1] ? 1.0f
: 0.0f
;
321 dst
->f
[2] = src
[0].f
[2] >= src
[1].f
[2] ? 1.0f
: 0.0f
;
322 dst
->f
[3] = src
[0].f
[3] >= src
[1].f
[3] ? 1.0f
: 0.0f
;
326 micro_sgn(union tgsi_exec_channel
*dst
,
327 const union tgsi_exec_channel
*src
)
329 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
330 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
331 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
332 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
336 micro_sgt(union tgsi_exec_channel
*dst
,
337 const union tgsi_exec_channel
*src
)
339 dst
->f
[0] = src
[0].f
[0] > src
[1].f
[0] ? 1.0f
: 0.0f
;
340 dst
->f
[1] = src
[0].f
[1] > src
[1].f
[1] ? 1.0f
: 0.0f
;
341 dst
->f
[2] = src
[0].f
[2] > src
[1].f
[2] ? 1.0f
: 0.0f
;
342 dst
->f
[3] = src
[0].f
[3] > src
[1].f
[3] ? 1.0f
: 0.0f
;
346 micro_sin(union tgsi_exec_channel
*dst
,
347 const union tgsi_exec_channel
*src
)
349 dst
->f
[0] = sinf(src
->f
[0]);
350 dst
->f
[1] = sinf(src
->f
[1]);
351 dst
->f
[2] = sinf(src
->f
[2]);
352 dst
->f
[3] = sinf(src
->f
[3]);
356 micro_sle(union tgsi_exec_channel
*dst
,
357 const union tgsi_exec_channel
*src
)
359 dst
->f
[0] = src
[0].f
[0] <= src
[1].f
[0] ? 1.0f
: 0.0f
;
360 dst
->f
[1] = src
[0].f
[1] <= src
[1].f
[1] ? 1.0f
: 0.0f
;
361 dst
->f
[2] = src
[0].f
[2] <= src
[1].f
[2] ? 1.0f
: 0.0f
;
362 dst
->f
[3] = src
[0].f
[3] <= src
[1].f
[3] ? 1.0f
: 0.0f
;
366 micro_slt(union tgsi_exec_channel
*dst
,
367 const union tgsi_exec_channel
*src
)
369 dst
->f
[0] = src
[0].f
[0] < src
[1].f
[0] ? 1.0f
: 0.0f
;
370 dst
->f
[1] = src
[0].f
[1] < src
[1].f
[1] ? 1.0f
: 0.0f
;
371 dst
->f
[2] = src
[0].f
[2] < src
[1].f
[2] ? 1.0f
: 0.0f
;
372 dst
->f
[3] = src
[0].f
[3] < src
[1].f
[3] ? 1.0f
: 0.0f
;
376 micro_sne(union tgsi_exec_channel
*dst
,
377 const union tgsi_exec_channel
*src
)
379 dst
->f
[0] = src
[0].f
[0] != src
[1].f
[0] ? 1.0f
: 0.0f
;
380 dst
->f
[1] = src
[0].f
[1] != src
[1].f
[1] ? 1.0f
: 0.0f
;
381 dst
->f
[2] = src
[0].f
[2] != src
[1].f
[2] ? 1.0f
: 0.0f
;
382 dst
->f
[3] = src
[0].f
[3] != src
[1].f
[3] ? 1.0f
: 0.0f
;
386 micro_trunc(union tgsi_exec_channel
*dst
,
387 const union tgsi_exec_channel
*src
)
389 dst
->f
[0] = (float)(int)src
->f
[0];
390 dst
->f
[1] = (float)(int)src
->f
[1];
391 dst
->f
[2] = (float)(int)src
->f
[2];
392 dst
->f
[3] = (float)(int)src
->f
[3];
401 enum tgsi_exec_datatype
{
402 TGSI_EXEC_DATA_FLOAT
,
408 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
410 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
411 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
412 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
413 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
414 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
415 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
416 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
417 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
418 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
419 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
420 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
421 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
422 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
423 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
424 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
425 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
426 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
427 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
428 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
429 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
430 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
431 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
432 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
433 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
434 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
435 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
436 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
437 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
438 #define TEMP_R0 TGSI_EXEC_TEMP_R0
439 #define TEMP_P0 TGSI_EXEC_TEMP_P0
441 #define IS_CHANNEL_ENABLED(INST, CHAN)\
442 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
444 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
445 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
447 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
448 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
449 if (IS_CHANNEL_ENABLED( INST, CHAN ))
451 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
452 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
453 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
456 /** The execution mask depends on the conditional mask and the loop mask */
457 #define UPDATE_EXEC_MASK(MACH) \
458 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
461 static const union tgsi_exec_channel ZeroVec
=
462 { { 0.0, 0.0, 0.0, 0.0 } };
466 * Assert that none of the float values in 'chan' are infinite or NaN.
467 * NaN and Inf may occur normally during program execution and should
468 * not lead to crashes, etc. But when debugging, it's helpful to catch
472 check_inf_or_nan(const union tgsi_exec_channel
*chan
)
474 assert(!util_is_inf_or_nan((chan
)->f
[0]));
475 assert(!util_is_inf_or_nan((chan
)->f
[1]));
476 assert(!util_is_inf_or_nan((chan
)->f
[2]));
477 assert(!util_is_inf_or_nan((chan
)->f
[3]));
483 print_chan(const char *msg
, const union tgsi_exec_channel
*chan
)
485 debug_printf("%s = {%f, %f, %f, %f}\n",
486 msg
, chan
->f
[0], chan
->f
[1], chan
->f
[2], chan
->f
[3]);
493 print_temp(const struct tgsi_exec_machine
*mach
, uint index
)
495 const struct tgsi_exec_vector
*tmp
= &mach
->Temps
[index
];
497 debug_printf("Temp[%u] =\n", index
);
498 for (i
= 0; i
< 4; i
++) {
499 debug_printf(" %c: { %f, %f, %f, %f }\n",
511 * Check if there's a potential src/dst register data dependency when
512 * using SOA execution.
515 * This would expand into:
520 * The second instruction will have the wrong value for t0 if executed as-is.
523 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
)
527 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
528 if (writemask
== TGSI_WRITEMASK_X
||
529 writemask
== TGSI_WRITEMASK_Y
||
530 writemask
== TGSI_WRITEMASK_Z
||
531 writemask
== TGSI_WRITEMASK_W
||
532 writemask
== TGSI_WRITEMASK_NONE
) {
533 /* no chance of data dependency */
537 /* loop over src regs */
538 for (i
= 0; i
< inst
->Instruction
.NumSrcRegs
; i
++) {
539 if ((inst
->Src
[i
].Register
.File
==
540 inst
->Dst
[0].Register
.File
) &&
541 (inst
->Src
[i
].Register
.Index
==
542 inst
->Dst
[0].Register
.Index
)) {
543 /* loop over dest channels */
544 uint channelsWritten
= 0x0;
545 FOR_EACH_ENABLED_CHANNEL(*inst
, chan
) {
546 /* check if we're reading a channel that's been written */
547 uint swizzle
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[i
], chan
);
548 if (channelsWritten
& (1 << swizzle
)) {
552 channelsWritten
|= (1 << chan
);
561 * Initialize machine state by expanding tokens to full instructions,
562 * allocating temporary storage, setting up constants, etc.
563 * After this, we can call tgsi_exec_machine_run() many times.
566 tgsi_exec_machine_bind_shader(
567 struct tgsi_exec_machine
*mach
,
568 const struct tgsi_token
*tokens
,
570 struct tgsi_sampler
**samplers
)
573 struct tgsi_parse_context parse
;
574 struct tgsi_exec_labels
*labels
= &mach
->Labels
;
575 struct tgsi_full_instruction
*instructions
;
576 struct tgsi_full_declaration
*declarations
;
577 uint maxInstructions
= 10, numInstructions
= 0;
578 uint maxDeclarations
= 10, numDeclarations
= 0;
582 tgsi_dump(tokens
, 0);
587 mach
->Tokens
= tokens
;
588 mach
->Samplers
= samplers
;
590 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
591 if (k
!= TGSI_PARSE_OK
) {
592 debug_printf( "Problem parsing!\n" );
596 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
600 declarations
= (struct tgsi_full_declaration
*)
601 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
607 instructions
= (struct tgsi_full_instruction
*)
608 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
611 FREE( declarations
);
615 while( !tgsi_parse_end_of_tokens( &parse
) ) {
616 uint pointer
= parse
.Position
;
619 tgsi_parse_token( &parse
);
620 switch( parse
.FullToken
.Token
.Type
) {
621 case TGSI_TOKEN_TYPE_DECLARATION
:
622 /* save expanded declaration */
623 if (numDeclarations
== maxDeclarations
) {
624 declarations
= REALLOC(declarations
,
626 * sizeof(struct tgsi_full_declaration
),
627 (maxDeclarations
+ 10)
628 * sizeof(struct tgsi_full_declaration
));
629 maxDeclarations
+= 10;
631 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
== TGSI_FILE_OUTPUT
) {
633 for (reg
= parse
.FullToken
.FullDeclaration
.Range
.First
;
634 reg
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
639 memcpy(declarations
+ numDeclarations
,
640 &parse
.FullToken
.FullDeclaration
,
641 sizeof(declarations
[0]));
645 case TGSI_TOKEN_TYPE_IMMEDIATE
:
647 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
649 assert( mach
->ImmLimit
+ 1 <= TGSI_EXEC_NUM_IMMEDIATES
);
651 for( i
= 0; i
< size
; i
++ ) {
652 mach
->Imms
[mach
->ImmLimit
][i
] =
653 parse
.FullToken
.FullImmediate
.u
[i
].Float
;
659 case TGSI_TOKEN_TYPE_INSTRUCTION
:
660 assert( labels
->count
< MAX_LABELS
);
662 labels
->labels
[labels
->count
][0] = instno
;
663 labels
->labels
[labels
->count
][1] = pointer
;
666 /* save expanded instruction */
667 if (numInstructions
== maxInstructions
) {
668 instructions
= REALLOC(instructions
,
670 * sizeof(struct tgsi_full_instruction
),
671 (maxInstructions
+ 10)
672 * sizeof(struct tgsi_full_instruction
));
673 maxInstructions
+= 10;
676 memcpy(instructions
+ numInstructions
,
677 &parse
.FullToken
.FullInstruction
,
678 sizeof(instructions
[0]));
683 case TGSI_TOKEN_TYPE_PROPERTY
:
690 tgsi_parse_free (&parse
);
692 if (mach
->Declarations
) {
693 FREE( mach
->Declarations
);
695 mach
->Declarations
= declarations
;
696 mach
->NumDeclarations
= numDeclarations
;
698 if (mach
->Instructions
) {
699 FREE( mach
->Instructions
);
701 mach
->Instructions
= instructions
;
702 mach
->NumInstructions
= numInstructions
;
706 struct tgsi_exec_machine
*
707 tgsi_exec_machine_create( void )
709 struct tgsi_exec_machine
*mach
;
712 mach
= align_malloc( sizeof *mach
, 16 );
716 memset(mach
, 0, sizeof(*mach
));
718 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
719 mach
->MaxGeometryShaderOutputs
= TGSI_MAX_TOTAL_VERTICES
;
720 mach
->Predicates
= &mach
->Temps
[TGSI_EXEC_TEMP_P0
];
722 /* Setup constants. */
723 for( i
= 0; i
< 4; i
++ ) {
724 mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
].u
[i
] = 0x00000000;
725 mach
->Temps
[TEMP_7F_I
].xyzw
[TEMP_7F_C
].u
[i
] = 0x7FFFFFFF;
726 mach
->Temps
[TEMP_80_I
].xyzw
[TEMP_80_C
].u
[i
] = 0x80000000;
727 mach
->Temps
[TEMP_FF_I
].xyzw
[TEMP_FF_C
].u
[i
] = 0xFFFFFFFF;
728 mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
].f
[i
] = 1.0f
;
729 mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
].f
[i
] = 2.0f
;
730 mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
].f
[i
] = 128.0f
;
731 mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
].f
[i
] = -128.0f
;
732 mach
->Temps
[TEMP_3_I
].xyzw
[TEMP_3_C
].f
[i
] = 3.0f
;
733 mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
].f
[i
] = 0.5f
;
737 /* silence warnings */
751 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
)
754 FREE(mach
->Instructions
);
755 FREE(mach
->Declarations
);
763 union tgsi_exec_channel
*dst
,
764 const union tgsi_exec_channel
*src0
,
765 const union tgsi_exec_channel
*src1
)
767 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
768 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
769 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
770 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
775 union tgsi_exec_channel
*dst
,
776 const union tgsi_exec_channel
*src0
,
777 const union tgsi_exec_channel
*src1
)
779 if (src1
->f
[0] != 0) {
780 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
782 if (src1
->f
[1] != 0) {
783 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
785 if (src1
->f
[2] != 0) {
786 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
788 if (src1
->f
[3] != 0) {
789 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
794 micro_float_clamp(union tgsi_exec_channel
*dst
,
795 const union tgsi_exec_channel
*src
)
799 for (i
= 0; i
< 4; i
++) {
800 if (src
->f
[i
] > 0.0f
) {
801 if (src
->f
[i
] > 1.884467e+019f
)
802 dst
->f
[i
] = 1.884467e+019f
;
803 else if (src
->f
[i
] < 5.42101e-020f
)
804 dst
->f
[i
] = 5.42101e-020f
;
806 dst
->f
[i
] = src
->f
[i
];
809 if (src
->f
[i
] < -1.884467e+019f
)
810 dst
->f
[i
] = -1.884467e+019f
;
811 else if (src
->f
[i
] > -5.42101e-020f
)
812 dst
->f
[i
] = -5.42101e-020f
;
814 dst
->f
[i
] = src
->f
[i
];
821 union tgsi_exec_channel
*dst
,
822 const union tgsi_exec_channel
*src0
,
823 const union tgsi_exec_channel
*src1
,
824 const union tgsi_exec_channel
*src2
,
825 const union tgsi_exec_channel
*src3
)
827 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
828 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
829 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
830 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
835 union tgsi_exec_channel
*dst
,
836 const union tgsi_exec_channel
*src0
,
837 const union tgsi_exec_channel
*src1
)
839 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
840 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
841 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
842 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
847 union tgsi_exec_channel
*dst
,
848 const union tgsi_exec_channel
*src0
,
849 const union tgsi_exec_channel
*src1
)
851 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
852 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
853 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
854 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
859 union tgsi_exec_channel
*dst
,
860 const union tgsi_exec_channel
*src0
,
861 const union tgsi_exec_channel
*src1
)
863 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
864 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
865 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
866 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
872 union tgsi_exec_channel
*dst0
,
873 union tgsi_exec_channel
*dst1
,
874 const union tgsi_exec_channel
*src0
,
875 const union tgsi_exec_channel
*src1
)
877 dst1
->i
[0] = src0
->i
[0] * src1
->i
[0];
878 dst1
->i
[1] = src0
->i
[1] * src1
->i
[1];
879 dst1
->i
[2] = src0
->i
[2] * src1
->i
[2];
880 dst1
->i
[3] = src0
->i
[3] * src1
->i
[3];
891 union tgsi_exec_channel
*dst0
,
892 union tgsi_exec_channel
*dst1
,
893 const union tgsi_exec_channel
*src0
,
894 const union tgsi_exec_channel
*src1
)
896 dst1
->u
[0] = src0
->u
[0] * src1
->u
[0];
897 dst1
->u
[1] = src0
->u
[1] * src1
->u
[1];
898 dst1
->u
[2] = src0
->u
[2] * src1
->u
[2];
899 dst1
->u
[3] = src0
->u
[3] * src1
->u
[3];
911 union tgsi_exec_channel
*dst
,
912 const union tgsi_exec_channel
*src0
,
913 const union tgsi_exec_channel
*src1
,
914 const union tgsi_exec_channel
*src2
)
916 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
917 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
918 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
919 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
925 union tgsi_exec_channel
*dst
,
926 const union tgsi_exec_channel
*src
)
928 dst
->f
[0] = -src
->f
[0];
929 dst
->f
[1] = -src
->f
[1];
930 dst
->f
[2] = -src
->f
[2];
931 dst
->f
[3] = -src
->f
[3];
936 union tgsi_exec_channel
*dst
,
937 const union tgsi_exec_channel
*src0
,
938 const union tgsi_exec_channel
*src1
)
941 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
942 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
943 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
944 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
946 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
947 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
948 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
949 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
954 micro_sqrt( union tgsi_exec_channel
*dst
,
955 const union tgsi_exec_channel
*src
)
957 dst
->f
[0] = sqrtf( src
->f
[0] );
958 dst
->f
[1] = sqrtf( src
->f
[1] );
959 dst
->f
[2] = sqrtf( src
->f
[2] );
960 dst
->f
[3] = sqrtf( src
->f
[3] );
965 union tgsi_exec_channel
*dst
,
966 const union tgsi_exec_channel
*src0
,
967 const union tgsi_exec_channel
*src1
)
969 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
970 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
971 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
972 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
976 fetch_src_file_channel(const struct tgsi_exec_machine
*mach
,
979 const union tgsi_exec_channel
*index
,
980 const union tgsi_exec_channel
*index2D
,
981 union tgsi_exec_channel
*chan
)
986 case TGSI_FILE_CONSTANT
:
987 for (i
= 0; i
< QUAD_SIZE
; i
++) {
988 assert(index2D
->i
[i
] >= 0 && index2D
->i
[i
] < PIPE_MAX_CONSTANT_BUFFERS
);
989 assert(mach
->Consts
[index2D
->i
[i
]]);
991 if (index
->i
[i
] < 0) {
994 const uint
*p
= (const uint
*)mach
->Consts
[index2D
->i
[i
]];
996 chan
->u
[i
] = p
[index
->i
[i
] * 4 + swizzle
];
1001 case TGSI_FILE_INPUT
:
1002 case TGSI_FILE_SYSTEM_VALUE
:
1003 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1004 /* XXX: 2D indexing */
1005 chan
->u
[i
] = mach
->Inputs
[index2D
->i
[i
] * TGSI_EXEC_MAX_INPUT_ATTRIBS
+ index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1009 case TGSI_FILE_TEMPORARY
:
1010 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1011 assert(index
->i
[i
] < TGSI_EXEC_NUM_TEMPS
);
1012 assert(index2D
->i
[i
] == 0);
1014 chan
->u
[i
] = mach
->Temps
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1018 case TGSI_FILE_IMMEDIATE
:
1019 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1020 assert(index
->i
[i
] >= 0 && index
->i
[i
] < (int)mach
->ImmLimit
);
1021 assert(index2D
->i
[i
] == 0);
1023 chan
->f
[i
] = mach
->Imms
[index
->i
[i
]][swizzle
];
1027 case TGSI_FILE_ADDRESS
:
1028 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1029 assert(index
->i
[i
] >= 0);
1030 assert(index2D
->i
[i
] == 0);
1032 chan
->u
[i
] = mach
->Addrs
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1036 case TGSI_FILE_PREDICATE
:
1037 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1038 assert(index
->i
[i
] >= 0 && index
->i
[i
] < TGSI_EXEC_NUM_PREDS
);
1039 assert(index2D
->i
[i
] == 0);
1041 chan
->u
[i
] = mach
->Predicates
[0].xyzw
[swizzle
].u
[i
];
1045 case TGSI_FILE_OUTPUT
:
1046 /* vertex/fragment output vars can be read too */
1047 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1048 assert(index
->i
[i
] >= 0);
1049 assert(index2D
->i
[i
] == 0);
1051 chan
->u
[i
] = mach
->Outputs
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1057 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1064 fetch_source(const struct tgsi_exec_machine
*mach
,
1065 union tgsi_exec_channel
*chan
,
1066 const struct tgsi_full_src_register
*reg
,
1067 const uint chan_index
,
1068 enum tgsi_exec_datatype src_datatype
)
1070 union tgsi_exec_channel index
;
1071 union tgsi_exec_channel index2D
;
1074 /* We start with a direct index into a register file.
1078 * file = Register.File
1079 * [1] = Register.Index
1084 index
.i
[3] = reg
->Register
.Index
;
1086 /* There is an extra source register that indirectly subscripts
1087 * a register file. The direct index now becomes an offset
1088 * that is being added to the indirect register.
1092 * ind = Indirect.File
1093 * [2] = Indirect.Index
1094 * .x = Indirect.SwizzleX
1096 if (reg
->Register
.Indirect
) {
1097 union tgsi_exec_channel index2
;
1098 union tgsi_exec_channel indir_index
;
1099 const uint execmask
= mach
->ExecMask
;
1102 /* which address register (always zero now) */
1106 index2
.i
[3] = reg
->Indirect
.Index
;
1108 /* get current value of address register[swizzle] */
1109 swizzle
= tgsi_util_get_src_register_swizzle( ®
->Indirect
, CHAN_X
);
1110 fetch_src_file_channel(mach
,
1117 /* add value of address register to the offset */
1118 index
.i
[0] += indir_index
.i
[0];
1119 index
.i
[1] += indir_index
.i
[1];
1120 index
.i
[2] += indir_index
.i
[2];
1121 index
.i
[3] += indir_index
.i
[3];
1123 /* for disabled execution channels, zero-out the index to
1124 * avoid using a potential garbage value.
1126 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1127 if ((execmask
& (1 << i
)) == 0)
1132 /* There is an extra source register that is a second
1133 * subscript to a register file. Effectively it means that
1134 * the register file is actually a 2D array of registers.
1138 * [3] = Dimension.Index
1140 if (reg
->Register
.Dimension
) {
1144 index2D
.i
[3] = reg
->Dimension
.Index
;
1146 /* Again, the second subscript index can be addressed indirectly
1147 * identically to the first one.
1148 * Nothing stops us from indirectly addressing the indirect register,
1149 * but there is no need for that, so we won't exercise it.
1151 * file[ind[4].y+3][1],
1153 * ind = DimIndirect.File
1154 * [4] = DimIndirect.Index
1155 * .y = DimIndirect.SwizzleX
1157 if (reg
->Dimension
.Indirect
) {
1158 union tgsi_exec_channel index2
;
1159 union tgsi_exec_channel indir_index
;
1160 const uint execmask
= mach
->ExecMask
;
1166 index2
.i
[3] = reg
->DimIndirect
.Index
;
1168 swizzle
= tgsi_util_get_src_register_swizzle( ®
->DimIndirect
, CHAN_X
);
1169 fetch_src_file_channel(mach
,
1170 reg
->DimIndirect
.File
,
1176 index2D
.i
[0] += indir_index
.i
[0];
1177 index2D
.i
[1] += indir_index
.i
[1];
1178 index2D
.i
[2] += indir_index
.i
[2];
1179 index2D
.i
[3] += indir_index
.i
[3];
1181 /* for disabled execution channels, zero-out the index to
1182 * avoid using a potential garbage value.
1184 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1185 if ((execmask
& (1 << i
)) == 0) {
1191 /* If by any chance there was a need for a 3D array of register
1192 * files, we would have to check whether Dimension is followed
1193 * by a dimension register and continue the saga.
1202 swizzle
= tgsi_util_get_full_src_register_swizzle( reg
, chan_index
);
1203 fetch_src_file_channel(mach
,
1210 if (reg
->Register
.Absolute
) {
1211 if (src_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1212 micro_abs(chan
, chan
);
1214 micro_iabs(chan
, chan
);
1218 if (reg
->Register
.Negate
) {
1219 if (src_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1220 micro_neg(chan
, chan
);
1222 micro_ineg(chan
, chan
);
1228 store_dest(struct tgsi_exec_machine
*mach
,
1229 const union tgsi_exec_channel
*chan
,
1230 const struct tgsi_full_dst_register
*reg
,
1231 const struct tgsi_full_instruction
*inst
,
1233 enum tgsi_exec_datatype dst_datatype
)
1236 union tgsi_exec_channel null
;
1237 union tgsi_exec_channel
*dst
;
1238 uint execmask
= mach
->ExecMask
;
1239 int offset
= 0; /* indirection offset */
1243 if (0 && dst_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1244 check_inf_or_nan(chan
);
1247 /* There is an extra source register that indirectly subscripts
1248 * a register file. The direct index now becomes an offset
1249 * that is being added to the indirect register.
1253 * ind = Indirect.File
1254 * [2] = Indirect.Index
1255 * .x = Indirect.SwizzleX
1257 if (reg
->Register
.Indirect
) {
1258 union tgsi_exec_channel index
;
1259 union tgsi_exec_channel indir_index
;
1262 /* which address register (always zero for now) */
1266 index
.i
[3] = reg
->Indirect
.Index
;
1268 /* get current value of address register[swizzle] */
1269 swizzle
= tgsi_util_get_src_register_swizzle( ®
->Indirect
, CHAN_X
);
1271 /* fetch values from the address/indirection register */
1272 fetch_src_file_channel(mach
,
1279 /* save indirection offset */
1280 offset
= indir_index
.i
[0];
1283 switch (reg
->Register
.File
) {
1284 case TGSI_FILE_NULL
:
1288 case TGSI_FILE_OUTPUT
:
1289 index
= mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1290 + reg
->Register
.Index
;
1291 dst
= &mach
->Outputs
[offset
+ index
].xyzw
[chan_index
];
1293 if (TGSI_PROCESSOR_GEOMETRY
== mach
->Processor
) {
1294 fprintf(stderr
, "STORING OUT[%d] mask(%d), = (", offset
+ index
, execmask
);
1295 for (i
= 0; i
< QUAD_SIZE
; i
++)
1296 if (execmask
& (1 << i
))
1297 fprintf(stderr
, "%f, ", chan
->f
[i
]);
1298 fprintf(stderr
, ")\n");
1303 case TGSI_FILE_TEMPORARY
:
1304 index
= reg
->Register
.Index
;
1305 assert( index
< TGSI_EXEC_NUM_TEMPS
);
1306 dst
= &mach
->Temps
[offset
+ index
].xyzw
[chan_index
];
1309 case TGSI_FILE_ADDRESS
:
1310 index
= reg
->Register
.Index
;
1311 dst
= &mach
->Addrs
[index
].xyzw
[chan_index
];
1314 case TGSI_FILE_LOOP
:
1315 assert(reg
->Register
.Index
== 0);
1316 assert(mach
->LoopCounterStackTop
> 0);
1317 assert(chan_index
== CHAN_X
);
1318 dst
= &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[chan_index
];
1321 case TGSI_FILE_PREDICATE
:
1322 index
= reg
->Register
.Index
;
1323 assert(index
< TGSI_EXEC_NUM_PREDS
);
1324 dst
= &mach
->Predicates
[index
].xyzw
[chan_index
];
1332 if (inst
->Instruction
.Predicate
) {
1334 union tgsi_exec_channel
*pred
;
1336 switch (chan_index
) {
1338 swizzle
= inst
->Predicate
.SwizzleX
;
1341 swizzle
= inst
->Predicate
.SwizzleY
;
1344 swizzle
= inst
->Predicate
.SwizzleZ
;
1347 swizzle
= inst
->Predicate
.SwizzleW
;
1354 assert(inst
->Predicate
.Index
== 0);
1356 pred
= &mach
->Predicates
[inst
->Predicate
.Index
].xyzw
[swizzle
];
1358 if (inst
->Predicate
.Negate
) {
1359 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1361 execmask
&= ~(1 << i
);
1365 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1367 execmask
&= ~(1 << i
);
1373 switch (inst
->Instruction
.Saturate
) {
1375 for (i
= 0; i
< QUAD_SIZE
; i
++)
1376 if (execmask
& (1 << i
))
1377 dst
->i
[i
] = chan
->i
[i
];
1380 case TGSI_SAT_ZERO_ONE
:
1381 for (i
= 0; i
< QUAD_SIZE
; i
++)
1382 if (execmask
& (1 << i
)) {
1383 if (chan
->f
[i
] < 0.0f
)
1385 else if (chan
->f
[i
] > 1.0f
)
1388 dst
->i
[i
] = chan
->i
[i
];
1392 case TGSI_SAT_MINUS_PLUS_ONE
:
1393 for (i
= 0; i
< QUAD_SIZE
; i
++)
1394 if (execmask
& (1 << i
)) {
1395 if (chan
->f
[i
] < -1.0f
)
1397 else if (chan
->f
[i
] > 1.0f
)
1400 dst
->i
[i
] = chan
->i
[i
];
1409 #define FETCH(VAL,INDEX,CHAN)\
1410 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1412 #define STORE(VAL,INDEX,CHAN)\
1413 store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
1417 * Execute ARB-style KIL which is predicated by a src register.
1418 * Kill fragment if any of the four values is less than zero.
1421 exec_kil(struct tgsi_exec_machine
*mach
,
1422 const struct tgsi_full_instruction
*inst
)
1426 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1427 union tgsi_exec_channel r
[1];
1429 /* This mask stores component bits that were already tested. */
1432 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1437 /* unswizzle channel */
1438 swizzle
= tgsi_util_get_full_src_register_swizzle (
1442 /* check if the component has not been already tested */
1443 if (uniquemask
& (1 << swizzle
))
1445 uniquemask
|= 1 << swizzle
;
1447 FETCH(&r
[0], 0, chan_index
);
1448 for (i
= 0; i
< 4; i
++)
1449 if (r
[0].f
[i
] < 0.0f
)
1453 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1457 * Execute NVIDIA-style KIL which is predicated by a condition code.
1458 * Kill fragment if the condition code is TRUE.
1461 exec_kilp(struct tgsi_exec_machine
*mach
,
1462 const struct tgsi_full_instruction
*inst
)
1464 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1466 /* "unconditional" kil */
1467 kilmask
= mach
->ExecMask
;
1468 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1472 emit_vertex(struct tgsi_exec_machine
*mach
)
1474 /* FIXME: check for exec mask correctly
1476 for (i = 0; i < QUAD_SIZE; ++i) {
1477 if ((mach->ExecMask & (1 << i)))
1479 if (mach
->ExecMask
) {
1480 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += mach
->NumOutputs
;
1481 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
1486 emit_primitive(struct tgsi_exec_machine
*mach
)
1488 unsigned *prim_count
= &mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0];
1489 /* FIXME: check for exec mask correctly
1491 for (i = 0; i < QUAD_SIZE; ++i) {
1492 if ((mach->ExecMask & (1 << i)))
1494 if (mach
->ExecMask
) {
1496 debug_assert((*prim_count
* mach
->NumOutputs
) < mach
->MaxGeometryShaderOutputs
);
1497 mach
->Primitives
[*prim_count
] = 0;
1502 * Fetch four texture samples using STR texture coordinates.
1505 fetch_texel( struct tgsi_sampler
*sampler
,
1506 const union tgsi_exec_channel
*s
,
1507 const union tgsi_exec_channel
*t
,
1508 const union tgsi_exec_channel
*p
,
1509 const union tgsi_exec_channel
*c0
,
1510 enum tgsi_sampler_control control
,
1511 union tgsi_exec_channel
*r
,
1512 union tgsi_exec_channel
*g
,
1513 union tgsi_exec_channel
*b
,
1514 union tgsi_exec_channel
*a
)
1517 float rgba
[NUM_CHANNELS
][QUAD_SIZE
];
1519 sampler
->get_samples(sampler
, s
->f
, t
->f
, p
->f
, c0
->f
, control
, rgba
);
1521 for (j
= 0; j
< 4; j
++) {
1522 r
->f
[j
] = rgba
[0][j
];
1523 g
->f
[j
] = rgba
[1][j
];
1524 b
->f
[j
] = rgba
[2][j
];
1525 a
->f
[j
] = rgba
[3][j
];
1530 #define TEX_MODIFIER_NONE 0
1531 #define TEX_MODIFIER_PROJECTED 1
1532 #define TEX_MODIFIER_LOD_BIAS 2
1533 #define TEX_MODIFIER_EXPLICIT_LOD 3
1537 exec_tex(struct tgsi_exec_machine
*mach
,
1538 const struct tgsi_full_instruction
*inst
,
1541 const uint unit
= inst
->Src
[1].Register
.Index
;
1542 union tgsi_exec_channel r
[4];
1543 const union tgsi_exec_channel
*lod
= &ZeroVec
;
1544 enum tgsi_sampler_control control
;
1547 if (modifier
!= TEX_MODIFIER_NONE
) {
1548 FETCH(&r
[3], 0, CHAN_W
);
1549 if (modifier
!= TEX_MODIFIER_PROJECTED
) {
1554 if (modifier
== TEX_MODIFIER_EXPLICIT_LOD
) {
1555 control
= tgsi_sampler_lod_explicit
;
1557 control
= tgsi_sampler_lod_bias
;
1560 switch (inst
->Texture
.Texture
) {
1561 case TGSI_TEXTURE_1D
:
1562 case TGSI_TEXTURE_SHADOW1D
:
1563 FETCH(&r
[0], 0, CHAN_X
);
1565 if (modifier
== TEX_MODIFIER_PROJECTED
) {
1566 micro_div(&r
[0], &r
[0], &r
[3]);
1569 fetch_texel(mach
->Samplers
[unit
],
1570 &r
[0], &ZeroVec
, &ZeroVec
, lod
, /* S, T, P, LOD */
1572 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1575 case TGSI_TEXTURE_2D
:
1576 case TGSI_TEXTURE_RECT
:
1577 case TGSI_TEXTURE_SHADOW2D
:
1578 case TGSI_TEXTURE_SHADOWRECT
:
1579 FETCH(&r
[0], 0, CHAN_X
);
1580 FETCH(&r
[1], 0, CHAN_Y
);
1581 FETCH(&r
[2], 0, CHAN_Z
);
1583 if (modifier
== TEX_MODIFIER_PROJECTED
) {
1584 micro_div(&r
[0], &r
[0], &r
[3]);
1585 micro_div(&r
[1], &r
[1], &r
[3]);
1586 micro_div(&r
[2], &r
[2], &r
[3]);
1589 fetch_texel(mach
->Samplers
[unit
],
1590 &r
[0], &r
[1], &r
[2], lod
, /* S, T, P, LOD */
1592 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1595 case TGSI_TEXTURE_3D
:
1596 case TGSI_TEXTURE_CUBE
:
1597 FETCH(&r
[0], 0, CHAN_X
);
1598 FETCH(&r
[1], 0, CHAN_Y
);
1599 FETCH(&r
[2], 0, CHAN_Z
);
1601 if (modifier
== TEX_MODIFIER_PROJECTED
) {
1602 micro_div(&r
[0], &r
[0], &r
[3]);
1603 micro_div(&r
[1], &r
[1], &r
[3]);
1604 micro_div(&r
[2], &r
[2], &r
[3]);
1607 fetch_texel(mach
->Samplers
[unit
],
1608 &r
[0], &r
[1], &r
[2], lod
,
1610 &r
[0], &r
[1], &r
[2], &r
[3]);
1617 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
1618 STORE(&r
[chan_index
], 0, chan_index
);
1623 exec_txd(struct tgsi_exec_machine
*mach
,
1624 const struct tgsi_full_instruction
*inst
)
1626 const uint unit
= inst
->Src
[3].Register
.Index
;
1627 union tgsi_exec_channel r
[4];
1631 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1634 switch (inst
->Texture
.Texture
) {
1635 case TGSI_TEXTURE_1D
:
1636 case TGSI_TEXTURE_SHADOW1D
:
1638 FETCH(&r
[0], 0, CHAN_X
);
1640 fetch_texel(mach
->Samplers
[unit
],
1641 &r
[0], &ZeroVec
, &ZeroVec
, &ZeroVec
, /* S, T, P, BIAS */
1642 tgsi_sampler_lod_bias
,
1643 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1646 case TGSI_TEXTURE_2D
:
1647 case TGSI_TEXTURE_RECT
:
1648 case TGSI_TEXTURE_SHADOW2D
:
1649 case TGSI_TEXTURE_SHADOWRECT
:
1651 FETCH(&r
[0], 0, CHAN_X
);
1652 FETCH(&r
[1], 0, CHAN_Y
);
1653 FETCH(&r
[2], 0, CHAN_Z
);
1655 fetch_texel(mach
->Samplers
[unit
],
1656 &r
[0], &r
[1], &r
[2], &ZeroVec
, /* inputs */
1657 tgsi_sampler_lod_bias
,
1658 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1661 case TGSI_TEXTURE_3D
:
1662 case TGSI_TEXTURE_CUBE
:
1664 FETCH(&r
[0], 0, CHAN_X
);
1665 FETCH(&r
[1], 0, CHAN_Y
);
1666 FETCH(&r
[2], 0, CHAN_Z
);
1668 fetch_texel(mach
->Samplers
[unit
],
1669 &r
[0], &r
[1], &r
[2], &ZeroVec
,
1670 tgsi_sampler_lod_bias
,
1671 &r
[0], &r
[1], &r
[2], &r
[3]);
1678 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
1679 STORE(&r
[chan_index
], 0, chan_index
);
1685 * Evaluate a constant-valued coefficient at the position of the
1690 struct tgsi_exec_machine
*mach
,
1696 for( i
= 0; i
< QUAD_SIZE
; i
++ ) {
1697 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
1702 * Evaluate a linear-valued coefficient at the position of the
1707 struct tgsi_exec_machine
*mach
,
1711 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1712 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1713 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1714 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1715 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1716 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
1717 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
1718 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
1719 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
1723 * Evaluate a perspective-valued coefficient at the position of the
1727 eval_perspective_coef(
1728 struct tgsi_exec_machine
*mach
,
1732 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1733 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1734 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1735 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1736 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1737 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
1738 /* divide by W here */
1739 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
1740 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
1741 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
1742 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
1746 typedef void (* eval_coef_func
)(
1747 struct tgsi_exec_machine
*mach
,
1752 exec_declaration(struct tgsi_exec_machine
*mach
,
1753 const struct tgsi_full_declaration
*decl
)
1755 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
1756 if (decl
->Declaration
.File
== TGSI_FILE_INPUT
||
1757 decl
->Declaration
.File
== TGSI_FILE_SYSTEM_VALUE
) {
1758 uint first
, last
, mask
;
1760 first
= decl
->Range
.First
;
1761 last
= decl
->Range
.Last
;
1762 mask
= decl
->Declaration
.UsageMask
;
1764 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_FACE
) {
1767 assert(decl
->Semantic
.Index
== 0);
1768 assert(first
== last
);
1770 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1771 mach
->Inputs
[first
].xyzw
[0].f
[i
] = mach
->Face
;
1774 eval_coef_func eval
;
1777 switch (decl
->Declaration
.Interpolate
) {
1778 case TGSI_INTERPOLATE_CONSTANT
:
1779 eval
= eval_constant_coef
;
1782 case TGSI_INTERPOLATE_LINEAR
:
1783 eval
= eval_linear_coef
;
1786 case TGSI_INTERPOLATE_PERSPECTIVE
:
1787 eval
= eval_perspective_coef
;
1795 for (j
= 0; j
< NUM_CHANNELS
; j
++) {
1796 if (mask
& (1 << j
)) {
1797 for (i
= first
; i
<= last
; i
++) {
1807 typedef void (* micro_op
)(union tgsi_exec_channel
*dst
,
1808 const union tgsi_exec_channel
*src
);
1811 exec_scalar_unary(struct tgsi_exec_machine
*mach
,
1812 const struct tgsi_full_instruction
*inst
,
1814 enum tgsi_exec_datatype dst_datatype
,
1815 enum tgsi_exec_datatype src_datatype
)
1818 union tgsi_exec_channel src
;
1819 union tgsi_exec_channel dst
;
1821 fetch_source(mach
, &src
, &inst
->Src
[0], CHAN_X
, src_datatype
);
1823 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1824 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1825 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1831 exec_vector_unary(struct tgsi_exec_machine
*mach
,
1832 const struct tgsi_full_instruction
*inst
,
1834 enum tgsi_exec_datatype dst_datatype
,
1835 enum tgsi_exec_datatype src_datatype
)
1838 struct tgsi_exec_vector dst
;
1840 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1841 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1842 union tgsi_exec_channel src
;
1844 fetch_source(mach
, &src
, &inst
->Src
[0], chan
, src_datatype
);
1845 op(&dst
.xyzw
[chan
], &src
);
1848 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1849 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1850 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1856 exec_vector_binary(struct tgsi_exec_machine
*mach
,
1857 const struct tgsi_full_instruction
*inst
,
1859 enum tgsi_exec_datatype dst_datatype
,
1860 enum tgsi_exec_datatype src_datatype
)
1863 struct tgsi_exec_vector dst
;
1865 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1866 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1867 union tgsi_exec_channel src
[2];
1869 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
1870 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
1871 op(&dst
.xyzw
[chan
], src
);
1874 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1875 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1876 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1882 exec_vector_trinary(struct tgsi_exec_machine
*mach
,
1883 const struct tgsi_full_instruction
*inst
,
1885 enum tgsi_exec_datatype dst_datatype
,
1886 enum tgsi_exec_datatype src_datatype
)
1889 struct tgsi_exec_vector dst
;
1891 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1892 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1893 union tgsi_exec_channel src
[3];
1895 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
1896 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
1897 fetch_source(mach
, &src
[2], &inst
->Src
[2], chan
, src_datatype
);
1898 op(&dst
.xyzw
[chan
], src
);
1901 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1902 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1903 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
1909 exec_dp3(struct tgsi_exec_machine
*mach
,
1910 const struct tgsi_full_instruction
*inst
)
1913 union tgsi_exec_channel arg
[3];
1915 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1916 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1917 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1919 for (chan
= CHAN_Y
; chan
<= CHAN_Z
; chan
++) {
1920 fetch_source(mach
, &arg
[0], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
1921 fetch_source(mach
, &arg
[1], &inst
->Src
[1], chan
, TGSI_EXEC_DATA_FLOAT
);
1922 micro_mad(&arg
[2], arg
);
1925 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1926 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1927 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
1933 exec_dp4(struct tgsi_exec_machine
*mach
,
1934 const struct tgsi_full_instruction
*inst
)
1937 union tgsi_exec_channel arg
[3];
1939 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1940 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1941 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1943 for (chan
= CHAN_Y
; chan
<= CHAN_W
; chan
++) {
1944 fetch_source(mach
, &arg
[0], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
1945 fetch_source(mach
, &arg
[1], &inst
->Src
[1], chan
, TGSI_EXEC_DATA_FLOAT
);
1946 micro_mad(&arg
[2], arg
);
1949 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1950 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1951 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
1957 exec_dp2a(struct tgsi_exec_machine
*mach
,
1958 const struct tgsi_full_instruction
*inst
)
1961 union tgsi_exec_channel arg
[3];
1963 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1964 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1965 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1967 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1968 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1969 micro_mad(&arg
[0], arg
);
1971 fetch_source(mach
, &arg
[1], &inst
->Src
[2], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1972 micro_add(&arg
[0], &arg
[0], &arg
[1]);
1974 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1975 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1976 store_dest(mach
, &arg
[0], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
1982 exec_dph(struct tgsi_exec_machine
*mach
,
1983 const struct tgsi_full_instruction
*inst
)
1986 union tgsi_exec_channel arg
[3];
1988 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1989 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
1990 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
1992 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1993 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
1994 micro_mad(&arg
[2], arg
);
1996 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
1997 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
1998 micro_mad(&arg
[0], arg
);
2000 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
2001 micro_add(&arg
[0], &arg
[0], &arg
[1]);
2003 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
2004 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2005 store_dest(mach
, &arg
[0], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2011 exec_dp2(struct tgsi_exec_machine
*mach
,
2012 const struct tgsi_full_instruction
*inst
)
2015 union tgsi_exec_channel arg
[3];
2017 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2018 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2019 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
2021 fetch_source(mach
, &arg
[0], &inst
->Src
[0], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
2022 fetch_source(mach
, &arg
[1], &inst
->Src
[1], CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
2023 micro_mad(&arg
[2], arg
);
2025 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
2026 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2027 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2033 exec_break(struct tgsi_exec_machine
*mach
)
2035 if (mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_LOOP
) {
2036 /* turn off loop channels for each enabled exec channel */
2037 mach
->LoopMask
&= ~mach
->ExecMask
;
2038 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2039 UPDATE_EXEC_MASK(mach
);
2041 assert(mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_SWITCH
);
2043 mach
->Switch
.mask
= 0x0;
2045 UPDATE_EXEC_MASK(mach
);
2050 exec_switch(struct tgsi_exec_machine
*mach
,
2051 const struct tgsi_full_instruction
*inst
)
2053 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
2054 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
2056 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
2057 fetch_source(mach
, &mach
->Switch
.selector
, &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_UINT
);
2058 mach
->Switch
.mask
= 0x0;
2059 mach
->Switch
.defaultMask
= 0x0;
2061 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
2062 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_SWITCH
;
2064 UPDATE_EXEC_MASK(mach
);
2068 exec_case(struct tgsi_exec_machine
*mach
,
2069 const struct tgsi_full_instruction
*inst
)
2071 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
2072 union tgsi_exec_channel src
;
2075 fetch_source(mach
, &src
, &inst
->Src
[0], CHAN_X
, TGSI_EXEC_DATA_UINT
);
2077 if (mach
->Switch
.selector
.u
[0] == src
.u
[0]) {
2080 if (mach
->Switch
.selector
.u
[1] == src
.u
[1]) {
2083 if (mach
->Switch
.selector
.u
[2] == src
.u
[2]) {
2086 if (mach
->Switch
.selector
.u
[3] == src
.u
[3]) {
2090 mach
->Switch
.defaultMask
|= mask
;
2092 mach
->Switch
.mask
|= mask
& prevMask
;
2094 UPDATE_EXEC_MASK(mach
);
2098 exec_default(struct tgsi_exec_machine
*mach
)
2100 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
2102 mach
->Switch
.mask
|= ~mach
->Switch
.defaultMask
& prevMask
;
2104 UPDATE_EXEC_MASK(mach
);
2108 exec_endswitch(struct tgsi_exec_machine
*mach
)
2110 mach
->Switch
= mach
->SwitchStack
[--mach
->SwitchStackTop
];
2111 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
2113 UPDATE_EXEC_MASK(mach
);
2117 micro_i2f(union tgsi_exec_channel
*dst
,
2118 const union tgsi_exec_channel
*src
)
2120 dst
->f
[0] = (float)src
->i
[0];
2121 dst
->f
[1] = (float)src
->i
[1];
2122 dst
->f
[2] = (float)src
->i
[2];
2123 dst
->f
[3] = (float)src
->i
[3];
2127 micro_not(union tgsi_exec_channel
*dst
,
2128 const union tgsi_exec_channel
*src
)
2130 dst
->u
[0] = ~src
->u
[0];
2131 dst
->u
[1] = ~src
->u
[1];
2132 dst
->u
[2] = ~src
->u
[2];
2133 dst
->u
[3] = ~src
->u
[3];
2137 micro_shl(union tgsi_exec_channel
*dst
,
2138 const union tgsi_exec_channel
*src
)
2140 dst
->u
[0] = src
[0].u
[0] << src
[1].u
[0];
2141 dst
->u
[1] = src
[0].u
[1] << src
[1].u
[1];
2142 dst
->u
[2] = src
[0].u
[2] << src
[1].u
[2];
2143 dst
->u
[3] = src
[0].u
[3] << src
[1].u
[3];
2147 micro_and(union tgsi_exec_channel
*dst
,
2148 const union tgsi_exec_channel
*src
)
2150 dst
->u
[0] = src
[0].u
[0] & src
[1].u
[0];
2151 dst
->u
[1] = src
[0].u
[1] & src
[1].u
[1];
2152 dst
->u
[2] = src
[0].u
[2] & src
[1].u
[2];
2153 dst
->u
[3] = src
[0].u
[3] & src
[1].u
[3];
2157 micro_or(union tgsi_exec_channel
*dst
,
2158 const union tgsi_exec_channel
*src
)
2160 dst
->u
[0] = src
[0].u
[0] | src
[1].u
[0];
2161 dst
->u
[1] = src
[0].u
[1] | src
[1].u
[1];
2162 dst
->u
[2] = src
[0].u
[2] | src
[1].u
[2];
2163 dst
->u
[3] = src
[0].u
[3] | src
[1].u
[3];
2167 micro_xor(union tgsi_exec_channel
*dst
,
2168 const union tgsi_exec_channel
*src
)
2170 dst
->u
[0] = src
[0].u
[0] ^ src
[1].u
[0];
2171 dst
->u
[1] = src
[0].u
[1] ^ src
[1].u
[1];
2172 dst
->u
[2] = src
[0].u
[2] ^ src
[1].u
[2];
2173 dst
->u
[3] = src
[0].u
[3] ^ src
[1].u
[3];
2177 micro_f2i(union tgsi_exec_channel
*dst
,
2178 const union tgsi_exec_channel
*src
)
2180 dst
->i
[0] = (int)src
->f
[0];
2181 dst
->i
[1] = (int)src
->f
[1];
2182 dst
->i
[2] = (int)src
->f
[2];
2183 dst
->i
[3] = (int)src
->f
[3];
2187 micro_idiv(union tgsi_exec_channel
*dst
,
2188 const union tgsi_exec_channel
*src
)
2190 dst
->i
[0] = src
[0].i
[0] / src
[1].i
[0];
2191 dst
->i
[1] = src
[0].i
[1] / src
[1].i
[1];
2192 dst
->i
[2] = src
[0].i
[2] / src
[1].i
[2];
2193 dst
->i
[3] = src
[0].i
[3] / src
[1].i
[3];
2197 micro_imax(union tgsi_exec_channel
*dst
,
2198 const union tgsi_exec_channel
*src
)
2200 dst
->i
[0] = src
[0].i
[0] > src
[1].i
[0] ? src
[0].i
[0] : src
[1].i
[0];
2201 dst
->i
[1] = src
[0].i
[1] > src
[1].i
[1] ? src
[0].i
[1] : src
[1].i
[1];
2202 dst
->i
[2] = src
[0].i
[2] > src
[1].i
[2] ? src
[0].i
[2] : src
[1].i
[2];
2203 dst
->i
[3] = src
[0].i
[3] > src
[1].i
[3] ? src
[0].i
[3] : src
[1].i
[3];
2207 micro_imin(union tgsi_exec_channel
*dst
,
2208 const union tgsi_exec_channel
*src
)
2210 dst
->i
[0] = src
[0].i
[0] < src
[1].i
[0] ? src
[0].i
[0] : src
[1].i
[0];
2211 dst
->i
[1] = src
[0].i
[1] < src
[1].i
[1] ? src
[0].i
[1] : src
[1].i
[1];
2212 dst
->i
[2] = src
[0].i
[2] < src
[1].i
[2] ? src
[0].i
[2] : src
[1].i
[2];
2213 dst
->i
[3] = src
[0].i
[3] < src
[1].i
[3] ? src
[0].i
[3] : src
[1].i
[3];
2217 micro_isge(union tgsi_exec_channel
*dst
,
2218 const union tgsi_exec_channel
*src
)
2220 dst
->i
[0] = src
[0].i
[0] >= src
[1].i
[0] ? -1 : 0;
2221 dst
->i
[1] = src
[0].i
[1] >= src
[1].i
[1] ? -1 : 0;
2222 dst
->i
[2] = src
[0].i
[2] >= src
[1].i
[2] ? -1 : 0;
2223 dst
->i
[3] = src
[0].i
[3] >= src
[1].i
[3] ? -1 : 0;
2227 micro_ishr(union tgsi_exec_channel
*dst
,
2228 const union tgsi_exec_channel
*src
)
2230 dst
->i
[0] = src
[0].i
[0] >> src
[1].i
[0];
2231 dst
->i
[1] = src
[0].i
[1] >> src
[1].i
[1];
2232 dst
->i
[2] = src
[0].i
[2] >> src
[1].i
[2];
2233 dst
->i
[3] = src
[0].i
[3] >> src
[1].i
[3];
2237 micro_islt(union tgsi_exec_channel
*dst
,
2238 const union tgsi_exec_channel
*src
)
2240 dst
->i
[0] = src
[0].i
[0] < src
[1].i
[0] ? -1 : 0;
2241 dst
->i
[1] = src
[0].i
[1] < src
[1].i
[1] ? -1 : 0;
2242 dst
->i
[2] = src
[0].i
[2] < src
[1].i
[2] ? -1 : 0;
2243 dst
->i
[3] = src
[0].i
[3] < src
[1].i
[3] ? -1 : 0;
2247 micro_f2u(union tgsi_exec_channel
*dst
,
2248 const union tgsi_exec_channel
*src
)
2250 dst
->u
[0] = (uint
)src
->f
[0];
2251 dst
->u
[1] = (uint
)src
->f
[1];
2252 dst
->u
[2] = (uint
)src
->f
[2];
2253 dst
->u
[3] = (uint
)src
->f
[3];
2257 micro_u2f(union tgsi_exec_channel
*dst
,
2258 const union tgsi_exec_channel
*src
)
2260 dst
->f
[0] = (float)src
->u
[0];
2261 dst
->f
[1] = (float)src
->u
[1];
2262 dst
->f
[2] = (float)src
->u
[2];
2263 dst
->f
[3] = (float)src
->u
[3];
2267 micro_uadd(union tgsi_exec_channel
*dst
,
2268 const union tgsi_exec_channel
*src
)
2270 dst
->u
[0] = src
[0].u
[0] + src
[1].u
[0];
2271 dst
->u
[1] = src
[0].u
[1] + src
[1].u
[1];
2272 dst
->u
[2] = src
[0].u
[2] + src
[1].u
[2];
2273 dst
->u
[3] = src
[0].u
[3] + src
[1].u
[3];
2277 micro_udiv(union tgsi_exec_channel
*dst
,
2278 const union tgsi_exec_channel
*src
)
2280 dst
->u
[0] = src
[0].u
[0] / src
[1].u
[0];
2281 dst
->u
[1] = src
[0].u
[1] / src
[1].u
[1];
2282 dst
->u
[2] = src
[0].u
[2] / src
[1].u
[2];
2283 dst
->u
[3] = src
[0].u
[3] / src
[1].u
[3];
2287 micro_umad(union tgsi_exec_channel
*dst
,
2288 const union tgsi_exec_channel
*src
)
2290 dst
->u
[0] = src
[0].u
[0] * src
[1].u
[0] + src
[2].u
[0];
2291 dst
->u
[1] = src
[0].u
[1] * src
[1].u
[1] + src
[2].u
[1];
2292 dst
->u
[2] = src
[0].u
[2] * src
[1].u
[2] + src
[2].u
[2];
2293 dst
->u
[3] = src
[0].u
[3] * src
[1].u
[3] + src
[2].u
[3];
2297 micro_umax(union tgsi_exec_channel
*dst
,
2298 const union tgsi_exec_channel
*src
)
2300 dst
->u
[0] = src
[0].u
[0] > src
[1].u
[0] ? src
[0].u
[0] : src
[1].u
[0];
2301 dst
->u
[1] = src
[0].u
[1] > src
[1].u
[1] ? src
[0].u
[1] : src
[1].u
[1];
2302 dst
->u
[2] = src
[0].u
[2] > src
[1].u
[2] ? src
[0].u
[2] : src
[1].u
[2];
2303 dst
->u
[3] = src
[0].u
[3] > src
[1].u
[3] ? src
[0].u
[3] : src
[1].u
[3];
2307 micro_umin(union tgsi_exec_channel
*dst
,
2308 const union tgsi_exec_channel
*src
)
2310 dst
->u
[0] = src
[0].u
[0] < src
[1].u
[0] ? src
[0].u
[0] : src
[1].u
[0];
2311 dst
->u
[1] = src
[0].u
[1] < src
[1].u
[1] ? src
[0].u
[1] : src
[1].u
[1];
2312 dst
->u
[2] = src
[0].u
[2] < src
[1].u
[2] ? src
[0].u
[2] : src
[1].u
[2];
2313 dst
->u
[3] = src
[0].u
[3] < src
[1].u
[3] ? src
[0].u
[3] : src
[1].u
[3];
2317 micro_umod(union tgsi_exec_channel
*dst
,
2318 const union tgsi_exec_channel
*src
)
2320 dst
->u
[0] = src
[0].u
[0] % src
[1].u
[0];
2321 dst
->u
[1] = src
[0].u
[1] % src
[1].u
[1];
2322 dst
->u
[2] = src
[0].u
[2] % src
[1].u
[2];
2323 dst
->u
[3] = src
[0].u
[3] % src
[1].u
[3];
2327 micro_umul(union tgsi_exec_channel
*dst
,
2328 const union tgsi_exec_channel
*src
)
2330 dst
->u
[0] = src
[0].u
[0] * src
[1].u
[0];
2331 dst
->u
[1] = src
[0].u
[1] * src
[1].u
[1];
2332 dst
->u
[2] = src
[0].u
[2] * src
[1].u
[2];
2333 dst
->u
[3] = src
[0].u
[3] * src
[1].u
[3];
2337 micro_useq(union tgsi_exec_channel
*dst
,
2338 const union tgsi_exec_channel
*src
)
2340 dst
->u
[0] = src
[0].u
[0] == src
[1].u
[0] ? ~0 : 0;
2341 dst
->u
[1] = src
[0].u
[1] == src
[1].u
[1] ? ~0 : 0;
2342 dst
->u
[2] = src
[0].u
[2] == src
[1].u
[2] ? ~0 : 0;
2343 dst
->u
[3] = src
[0].u
[3] == src
[1].u
[3] ? ~0 : 0;
2347 micro_usge(union tgsi_exec_channel
*dst
,
2348 const union tgsi_exec_channel
*src
)
2350 dst
->u
[0] = src
[0].u
[0] >= src
[1].u
[0] ? ~0 : 0;
2351 dst
->u
[1] = src
[0].u
[1] >= src
[1].u
[1] ? ~0 : 0;
2352 dst
->u
[2] = src
[0].u
[2] >= src
[1].u
[2] ? ~0 : 0;
2353 dst
->u
[3] = src
[0].u
[3] >= src
[1].u
[3] ? ~0 : 0;
2357 micro_ushr(union tgsi_exec_channel
*dst
,
2358 const union tgsi_exec_channel
*src
)
2360 dst
->u
[0] = src
[0].u
[0] >> src
[1].u
[0];
2361 dst
->u
[1] = src
[0].u
[1] >> src
[1].u
[1];
2362 dst
->u
[2] = src
[0].u
[2] >> src
[1].u
[2];
2363 dst
->u
[3] = src
[0].u
[3] >> src
[1].u
[3];
2367 micro_uslt(union tgsi_exec_channel
*dst
,
2368 const union tgsi_exec_channel
*src
)
2370 dst
->u
[0] = src
[0].u
[0] < src
[1].u
[0] ? ~0 : 0;
2371 dst
->u
[1] = src
[0].u
[1] < src
[1].u
[1] ? ~0 : 0;
2372 dst
->u
[2] = src
[0].u
[2] < src
[1].u
[2] ? ~0 : 0;
2373 dst
->u
[3] = src
[0].u
[3] < src
[1].u
[3] ? ~0 : 0;
2377 micro_usne(union tgsi_exec_channel
*dst
,
2378 const union tgsi_exec_channel
*src
)
2380 dst
->u
[0] = src
[0].u
[0] != src
[1].u
[0] ? ~0 : 0;
2381 dst
->u
[1] = src
[0].u
[1] != src
[1].u
[1] ? ~0 : 0;
2382 dst
->u
[2] = src
[0].u
[2] != src
[1].u
[2] ? ~0 : 0;
2383 dst
->u
[3] = src
[0].u
[3] != src
[1].u
[3] ? ~0 : 0;
2388 struct tgsi_exec_machine
*mach
,
2389 const struct tgsi_full_instruction
*inst
,
2393 union tgsi_exec_channel r
[10];
2394 union tgsi_exec_channel d
[8];
2398 switch (inst
->Instruction
.Opcode
) {
2399 case TGSI_OPCODE_ARL
:
2400 exec_vector_unary(mach
, inst
, micro_arl
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
2403 case TGSI_OPCODE_MOV
:
2404 exec_vector_unary(mach
, inst
, micro_mov
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
2407 case TGSI_OPCODE_LIT
:
2408 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2409 FETCH( &r
[0], 0, CHAN_X
);
2410 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2411 micro_max(&d
[CHAN_Y
], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2414 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2415 FETCH( &r
[1], 0, CHAN_Y
);
2416 micro_max( &r
[1], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2418 FETCH( &r
[2], 0, CHAN_W
);
2419 micro_min( &r
[2], &r
[2], &mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
] );
2420 micro_max( &r
[2], &r
[2], &mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
] );
2421 micro_pow( &r
[1], &r
[1], &r
[2] );
2422 micro_lt(&d
[CHAN_Z
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2425 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2426 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2428 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2429 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2432 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2433 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2435 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2436 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2440 case TGSI_OPCODE_RCP
:
2441 exec_scalar_unary(mach
, inst
, micro_rcp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2444 case TGSI_OPCODE_RSQ
:
2445 exec_scalar_unary(mach
, inst
, micro_rsq
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2448 case TGSI_OPCODE_EXP
:
2449 FETCH( &r
[0], 0, CHAN_X
);
2450 micro_flr( &r
[1], &r
[0] ); /* r1 = floor(r0) */
2451 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2452 micro_exp2( &r
[2], &r
[1] ); /* r2 = 2 ^ r1 */
2453 STORE( &r
[2], 0, CHAN_X
); /* store r2 */
2455 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2456 micro_sub( &r
[2], &r
[0], &r
[1] ); /* r2 = r0 - r1 */
2457 STORE( &r
[2], 0, CHAN_Y
); /* store r2 */
2459 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2460 micro_exp2( &r
[2], &r
[0] ); /* r2 = 2 ^ r0 */
2461 STORE( &r
[2], 0, CHAN_Z
); /* store r2 */
2463 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2464 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2468 case TGSI_OPCODE_LOG
:
2469 FETCH( &r
[0], 0, CHAN_X
);
2470 micro_abs( &r
[2], &r
[0] ); /* r2 = abs(r0) */
2471 micro_lg2( &r
[1], &r
[2] ); /* r1 = lg2(r2) */
2472 micro_flr( &r
[0], &r
[1] ); /* r0 = floor(r1) */
2473 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2474 STORE( &r
[0], 0, CHAN_X
);
2476 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2477 micro_exp2( &r
[0], &r
[0] ); /* r0 = 2 ^ r0 */
2478 micro_div( &r
[0], &r
[2], &r
[0] ); /* r0 = r2 / r0 */
2479 STORE( &r
[0], 0, CHAN_Y
);
2481 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2482 STORE( &r
[1], 0, CHAN_Z
);
2484 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2485 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2489 case TGSI_OPCODE_MUL
:
2490 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2491 FETCH(&r
[0], 0, chan_index
);
2492 FETCH(&r
[1], 1, chan_index
);
2493 micro_mul(&d
[chan_index
], &r
[0], &r
[1]);
2495 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2496 STORE(&d
[chan_index
], 0, chan_index
);
2500 case TGSI_OPCODE_ADD
:
2501 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2502 FETCH( &r
[0], 0, chan_index
);
2503 FETCH( &r
[1], 1, chan_index
);
2504 micro_add(&d
[chan_index
], &r
[0], &r
[1]);
2506 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2507 STORE(&d
[chan_index
], 0, chan_index
);
2511 case TGSI_OPCODE_DP3
:
2512 exec_dp3(mach
, inst
);
2515 case TGSI_OPCODE_DP4
:
2516 exec_dp4(mach
, inst
);
2519 case TGSI_OPCODE_DST
:
2520 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2521 FETCH( &r
[0], 0, CHAN_Y
);
2522 FETCH( &r
[1], 1, CHAN_Y
);
2523 micro_mul(&d
[CHAN_Y
], &r
[0], &r
[1]);
2525 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2526 FETCH(&d
[CHAN_Z
], 0, CHAN_Z
);
2528 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2529 FETCH(&d
[CHAN_W
], 1, CHAN_W
);
2532 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2533 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2535 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2536 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2538 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2539 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2541 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2542 STORE(&d
[CHAN_W
], 0, CHAN_W
);
2546 case TGSI_OPCODE_MIN
:
2547 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2548 FETCH(&r
[0], 0, chan_index
);
2549 FETCH(&r
[1], 1, chan_index
);
2551 /* XXX use micro_min()?? */
2552 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &r
[0], &r
[1]);
2554 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2555 STORE(&d
[chan_index
], 0, chan_index
);
2559 case TGSI_OPCODE_MAX
:
2560 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2561 FETCH(&r
[0], 0, chan_index
);
2562 FETCH(&r
[1], 1, chan_index
);
2564 /* XXX use micro_max()?? */
2565 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &r
[1], &r
[0] );
2567 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2568 STORE(&d
[chan_index
], 0, chan_index
);
2572 case TGSI_OPCODE_SLT
:
2573 exec_vector_binary(mach
, inst
, micro_slt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2576 case TGSI_OPCODE_SGE
:
2577 exec_vector_binary(mach
, inst
, micro_sge
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2580 case TGSI_OPCODE_MAD
:
2581 exec_vector_trinary(mach
, inst
, micro_mad
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2584 case TGSI_OPCODE_SUB
:
2585 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2586 FETCH(&r
[0], 0, chan_index
);
2587 FETCH(&r
[1], 1, chan_index
);
2588 micro_sub(&d
[chan_index
], &r
[0], &r
[1]);
2590 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2591 STORE(&d
[chan_index
], 0, chan_index
);
2595 case TGSI_OPCODE_LRP
:
2596 exec_vector_trinary(mach
, inst
, micro_lrp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2599 case TGSI_OPCODE_CND
:
2600 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2601 FETCH(&r
[0], 0, chan_index
);
2602 FETCH(&r
[1], 1, chan_index
);
2603 FETCH(&r
[2], 2, chan_index
);
2604 micro_lt(&d
[chan_index
], &mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
], &r
[2], &r
[0], &r
[1]);
2606 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2607 STORE(&d
[chan_index
], 0, chan_index
);
2611 case TGSI_OPCODE_DP2A
:
2612 exec_dp2a(mach
, inst
);
2615 case TGSI_OPCODE_FRC
:
2616 exec_vector_unary(mach
, inst
, micro_frc
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2619 case TGSI_OPCODE_CLAMP
:
2620 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2621 FETCH(&r
[0], 0, chan_index
);
2622 FETCH(&r
[1], 1, chan_index
);
2623 micro_max(&r
[0], &r
[0], &r
[1]);
2624 FETCH(&r
[1], 2, chan_index
);
2625 micro_min(&d
[chan_index
], &r
[0], &r
[1]);
2627 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2628 STORE(&d
[chan_index
], 0, chan_index
);
2632 case TGSI_OPCODE_FLR
:
2633 exec_vector_unary(mach
, inst
, micro_flr
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2636 case TGSI_OPCODE_ROUND
:
2637 exec_vector_unary(mach
, inst
, micro_rnd
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2640 case TGSI_OPCODE_EX2
:
2641 exec_scalar_unary(mach
, inst
, micro_exp2
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2644 case TGSI_OPCODE_LG2
:
2645 exec_scalar_unary(mach
, inst
, micro_lg2
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2648 case TGSI_OPCODE_POW
:
2649 FETCH(&r
[0], 0, CHAN_X
);
2650 FETCH(&r
[1], 1, CHAN_X
);
2652 micro_pow( &r
[0], &r
[0], &r
[1] );
2654 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2655 STORE( &r
[0], 0, chan_index
);
2659 case TGSI_OPCODE_XPD
:
2660 FETCH(&r
[0], 0, CHAN_Y
);
2661 FETCH(&r
[1], 1, CHAN_Z
);
2663 micro_mul( &r
[2], &r
[0], &r
[1] );
2665 FETCH(&r
[3], 0, CHAN_Z
);
2666 FETCH(&r
[4], 1, CHAN_Y
);
2668 micro_mul( &r
[5], &r
[3], &r
[4] );
2669 micro_sub(&d
[CHAN_X
], &r
[2], &r
[5]);
2671 FETCH(&r
[2], 1, CHAN_X
);
2673 micro_mul( &r
[3], &r
[3], &r
[2] );
2675 FETCH(&r
[5], 0, CHAN_X
);
2677 micro_mul( &r
[1], &r
[1], &r
[5] );
2678 micro_sub(&d
[CHAN_Y
], &r
[3], &r
[1]);
2680 micro_mul( &r
[5], &r
[5], &r
[4] );
2681 micro_mul( &r
[0], &r
[0], &r
[2] );
2682 micro_sub(&d
[CHAN_Z
], &r
[5], &r
[0]);
2684 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2685 STORE(&d
[CHAN_X
], 0, CHAN_X
);
2687 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2688 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2690 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2691 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2693 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2694 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2698 case TGSI_OPCODE_ABS
:
2699 exec_vector_unary(mach
, inst
, micro_abs
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2702 case TGSI_OPCODE_RCC
:
2703 FETCH(&r
[0], 0, CHAN_X
);
2704 micro_div(&r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0]);
2705 micro_float_clamp(&r
[0], &r
[0]);
2706 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2707 STORE(&r
[0], 0, chan_index
);
2711 case TGSI_OPCODE_DPH
:
2712 exec_dph(mach
, inst
);
2715 case TGSI_OPCODE_COS
:
2716 exec_scalar_unary(mach
, inst
, micro_cos
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2719 case TGSI_OPCODE_DDX
:
2720 exec_vector_unary(mach
, inst
, micro_ddx
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2723 case TGSI_OPCODE_DDY
:
2724 exec_vector_unary(mach
, inst
, micro_ddy
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2727 case TGSI_OPCODE_KILP
:
2728 exec_kilp (mach
, inst
);
2731 case TGSI_OPCODE_KIL
:
2732 exec_kil (mach
, inst
);
2735 case TGSI_OPCODE_PK2H
:
2739 case TGSI_OPCODE_PK2US
:
2743 case TGSI_OPCODE_PK4B
:
2747 case TGSI_OPCODE_PK4UB
:
2751 case TGSI_OPCODE_RFL
:
2752 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2753 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2754 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2755 /* r0 = dp3(src0, src0) */
2756 FETCH(&r
[2], 0, CHAN_X
);
2757 micro_mul(&r
[0], &r
[2], &r
[2]);
2758 FETCH(&r
[4], 0, CHAN_Y
);
2759 micro_mul(&r
[8], &r
[4], &r
[4]);
2760 micro_add(&r
[0], &r
[0], &r
[8]);
2761 FETCH(&r
[6], 0, CHAN_Z
);
2762 micro_mul(&r
[8], &r
[6], &r
[6]);
2763 micro_add(&r
[0], &r
[0], &r
[8]);
2765 /* r1 = dp3(src0, src1) */
2766 FETCH(&r
[3], 1, CHAN_X
);
2767 micro_mul(&r
[1], &r
[2], &r
[3]);
2768 FETCH(&r
[5], 1, CHAN_Y
);
2769 micro_mul(&r
[8], &r
[4], &r
[5]);
2770 micro_add(&r
[1], &r
[1], &r
[8]);
2771 FETCH(&r
[7], 1, CHAN_Z
);
2772 micro_mul(&r
[8], &r
[6], &r
[7]);
2773 micro_add(&r
[1], &r
[1], &r
[8]);
2775 /* r1 = 2 * r1 / r0 */
2776 micro_add(&r
[1], &r
[1], &r
[1]);
2777 micro_div(&r
[1], &r
[1], &r
[0]);
2779 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2780 micro_mul(&r
[2], &r
[2], &r
[1]);
2781 micro_sub(&r
[2], &r
[2], &r
[3]);
2782 STORE(&r
[2], 0, CHAN_X
);
2784 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2785 micro_mul(&r
[4], &r
[4], &r
[1]);
2786 micro_sub(&r
[4], &r
[4], &r
[5]);
2787 STORE(&r
[4], 0, CHAN_Y
);
2789 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2790 micro_mul(&r
[6], &r
[6], &r
[1]);
2791 micro_sub(&r
[6], &r
[6], &r
[7]);
2792 STORE(&r
[6], 0, CHAN_Z
);
2795 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2796 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2800 case TGSI_OPCODE_SEQ
:
2801 exec_vector_binary(mach
, inst
, micro_seq
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2804 case TGSI_OPCODE_SFL
:
2805 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2806 STORE(&mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, chan_index
);
2810 case TGSI_OPCODE_SGT
:
2811 exec_vector_binary(mach
, inst
, micro_sgt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2814 case TGSI_OPCODE_SIN
:
2815 exec_scalar_unary(mach
, inst
, micro_sin
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2818 case TGSI_OPCODE_SLE
:
2819 exec_vector_binary(mach
, inst
, micro_sle
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2822 case TGSI_OPCODE_SNE
:
2823 exec_vector_binary(mach
, inst
, micro_sne
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
2826 case TGSI_OPCODE_STR
:
2827 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2828 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, chan_index
);
2832 case TGSI_OPCODE_TEX
:
2833 /* simple texture lookup */
2834 /* src[0] = texcoord */
2835 /* src[1] = sampler unit */
2836 exec_tex(mach
, inst
, TEX_MODIFIER_NONE
);
2839 case TGSI_OPCODE_TXB
:
2840 /* Texture lookup with lod bias */
2841 /* src[0] = texcoord (src[0].w = LOD bias) */
2842 /* src[1] = sampler unit */
2843 exec_tex(mach
, inst
, TEX_MODIFIER_LOD_BIAS
);
2846 case TGSI_OPCODE_TXD
:
2847 /* Texture lookup with explict partial derivatives */
2848 /* src[0] = texcoord */
2849 /* src[1] = d[strq]/dx */
2850 /* src[2] = d[strq]/dy */
2851 /* src[3] = sampler unit */
2852 exec_txd(mach
, inst
);
2855 case TGSI_OPCODE_TXL
:
2856 /* Texture lookup with explit LOD */
2857 /* src[0] = texcoord (src[0].w = LOD) */
2858 /* src[1] = sampler unit */
2859 exec_tex(mach
, inst
, TEX_MODIFIER_EXPLICIT_LOD
);
2862 case TGSI_OPCODE_TXP
:
2863 /* Texture lookup with projection */
2864 /* src[0] = texcoord (src[0].w = projection) */
2865 /* src[1] = sampler unit */
2866 exec_tex(mach
, inst
, TEX_MODIFIER_PROJECTED
);
2869 case TGSI_OPCODE_UP2H
:
2873 case TGSI_OPCODE_UP2US
:
2877 case TGSI_OPCODE_UP4B
:
2881 case TGSI_OPCODE_UP4UB
:
2885 case TGSI_OPCODE_X2D
:
2886 FETCH(&r
[0], 1, CHAN_X
);
2887 FETCH(&r
[1], 1, CHAN_Y
);
2888 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2889 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2890 FETCH(&r
[2], 2, CHAN_X
);
2891 micro_mul(&r
[2], &r
[2], &r
[0]);
2892 FETCH(&r
[3], 2, CHAN_Y
);
2893 micro_mul(&r
[3], &r
[3], &r
[1]);
2894 micro_add(&r
[2], &r
[2], &r
[3]);
2895 FETCH(&r
[3], 0, CHAN_X
);
2896 micro_add(&d
[CHAN_X
], &r
[2], &r
[3]);
2899 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2900 IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2901 FETCH(&r
[2], 2, CHAN_Z
);
2902 micro_mul(&r
[2], &r
[2], &r
[0]);
2903 FETCH(&r
[3], 2, CHAN_W
);
2904 micro_mul(&r
[3], &r
[3], &r
[1]);
2905 micro_add(&r
[2], &r
[2], &r
[3]);
2906 FETCH(&r
[3], 0, CHAN_Y
);
2907 micro_add(&d
[CHAN_Y
], &r
[2], &r
[3]);
2910 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2911 STORE(&d
[CHAN_X
], 0, CHAN_X
);
2913 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2914 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2916 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2917 STORE(&d
[CHAN_X
], 0, CHAN_Z
);
2919 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2920 STORE(&d
[CHAN_Y
], 0, CHAN_W
);
2924 case TGSI_OPCODE_ARA
:
2928 case TGSI_OPCODE_ARR
:
2929 exec_vector_unary(mach
, inst
, micro_arr
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
2932 case TGSI_OPCODE_BRA
:
2936 case TGSI_OPCODE_CAL
:
2937 /* skip the call if no execution channels are enabled */
2938 if (mach
->ExecMask
) {
2941 /* First, record the depths of the execution stacks.
2942 * This is important for deeply nested/looped return statements.
2943 * We have to unwind the stacks by the correct amount. For a
2944 * real code generator, we could determine the number of entries
2945 * to pop off each stack with simple static analysis and avoid
2946 * implementing this data structure at run time.
2948 mach
->CallStack
[mach
->CallStackTop
].CondStackTop
= mach
->CondStackTop
;
2949 mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
= mach
->LoopStackTop
;
2950 mach
->CallStack
[mach
->CallStackTop
].ContStackTop
= mach
->ContStackTop
;
2951 mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
= mach
->SwitchStackTop
;
2952 mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
= mach
->BreakStackTop
;
2953 /* note that PC was already incremented above */
2954 mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
= *pc
;
2956 mach
->CallStackTop
++;
2958 /* Second, push the Cond, Loop, Cont, Func stacks */
2959 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2960 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2961 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2962 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
2963 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
2964 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
2966 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2967 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2968 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2969 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
2970 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
2971 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
2973 /* Finally, jump to the subroutine */
2974 *pc
= inst
->Label
.Label
;
2978 case TGSI_OPCODE_RET
:
2979 mach
->FuncMask
&= ~mach
->ExecMask
;
2980 UPDATE_EXEC_MASK(mach
);
2982 if (mach
->FuncMask
== 0x0) {
2983 /* really return now (otherwise, keep executing */
2985 if (mach
->CallStackTop
== 0) {
2986 /* returning from main() */
2991 assert(mach
->CallStackTop
> 0);
2992 mach
->CallStackTop
--;
2994 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
2995 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
2997 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
2998 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
3000 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
3001 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
3003 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
3004 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
3006 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
3007 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
3009 assert(mach
->FuncStackTop
> 0);
3010 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
3012 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
3014 UPDATE_EXEC_MASK(mach
);
3018 case TGSI_OPCODE_SSG
:
3019 exec_vector_unary(mach
, inst
, micro_sgn
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
3022 case TGSI_OPCODE_CMP
:
3023 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3024 FETCH(&r
[0], 0, chan_index
);
3025 FETCH(&r
[1], 1, chan_index
);
3026 FETCH(&r
[2], 2, chan_index
);
3027 micro_lt(&d
[chan_index
], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[1], &r
[2]);
3029 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
3030 STORE(&d
[chan_index
], 0, chan_index
);
3034 case TGSI_OPCODE_SCS
:
3035 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
3036 FETCH( &r
[0], 0, CHAN_X
);
3037 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
3038 micro_cos(&r
[1], &r
[0]);
3039 STORE(&r
[1], 0, CHAN_X
);
3041 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
3042 micro_sin(&r
[1], &r
[0]);
3043 STORE(&r
[1], 0, CHAN_Y
);
3046 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Z
) ) {
3047 STORE( &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, CHAN_Z
);
3049 if( IS_CHANNEL_ENABLED( *inst
, CHAN_W
) ) {
3050 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
3054 case TGSI_OPCODE_NRM
:
3055 /* 3-component vector normalize */
3056 if(IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
3057 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
3058 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
3059 /* r3 = sqrt(dp3(src0, src0)) */
3060 FETCH(&r
[0], 0, CHAN_X
);
3061 micro_mul(&r
[3], &r
[0], &r
[0]);
3062 FETCH(&r
[1], 0, CHAN_Y
);
3063 micro_mul(&r
[4], &r
[1], &r
[1]);
3064 micro_add(&r
[3], &r
[3], &r
[4]);
3065 FETCH(&r
[2], 0, CHAN_Z
);
3066 micro_mul(&r
[4], &r
[2], &r
[2]);
3067 micro_add(&r
[3], &r
[3], &r
[4]);
3068 micro_sqrt(&r
[3], &r
[3]);
3070 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
3071 micro_div(&r
[0], &r
[0], &r
[3]);
3072 STORE(&r
[0], 0, CHAN_X
);
3074 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
3075 micro_div(&r
[1], &r
[1], &r
[3]);
3076 STORE(&r
[1], 0, CHAN_Y
);
3078 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
3079 micro_div(&r
[2], &r
[2], &r
[3]);
3080 STORE(&r
[2], 0, CHAN_Z
);
3083 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
3084 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
3088 case TGSI_OPCODE_NRM4
:
3089 /* 4-component vector normalize */
3091 union tgsi_exec_channel tmp
, dot
;
3093 /* tmp = dp4(src0, src0): */
3094 FETCH( &r
[0], 0, CHAN_X
);
3095 micro_mul( &tmp
, &r
[0], &r
[0] );
3097 FETCH( &r
[1], 0, CHAN_Y
);
3098 micro_mul( &dot
, &r
[1], &r
[1] );
3099 micro_add( &tmp
, &tmp
, &dot
);
3101 FETCH( &r
[2], 0, CHAN_Z
);
3102 micro_mul( &dot
, &r
[2], &r
[2] );
3103 micro_add( &tmp
, &tmp
, &dot
);
3105 FETCH( &r
[3], 0, CHAN_W
);
3106 micro_mul( &dot
, &r
[3], &r
[3] );
3107 micro_add( &tmp
, &tmp
, &dot
);
3109 /* tmp = 1 / sqrt(tmp) */
3110 micro_sqrt( &tmp
, &tmp
);
3111 micro_div( &tmp
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &tmp
);
3113 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3114 /* chan = chan * tmp */
3115 micro_mul( &r
[chan_index
], &tmp
, &r
[chan_index
] );
3116 STORE( &r
[chan_index
], 0, chan_index
);
3121 case TGSI_OPCODE_DIV
:
3125 case TGSI_OPCODE_DP2
:
3126 exec_dp2(mach
, inst
);
3129 case TGSI_OPCODE_IF
:
3131 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
3132 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
3133 FETCH( &r
[0], 0, CHAN_X
);
3134 /* update CondMask */
3136 mach
->CondMask
&= ~0x1;
3139 mach
->CondMask
&= ~0x2;
3142 mach
->CondMask
&= ~0x4;
3145 mach
->CondMask
&= ~0x8;
3147 UPDATE_EXEC_MASK(mach
);
3148 /* Todo: If CondMask==0, jump to ELSE */
3151 case TGSI_OPCODE_ELSE
:
3152 /* invert CondMask wrt previous mask */
3155 assert(mach
->CondStackTop
> 0);
3156 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
3157 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
3158 UPDATE_EXEC_MASK(mach
);
3159 /* Todo: If CondMask==0, jump to ENDIF */
3163 case TGSI_OPCODE_ENDIF
:
3165 assert(mach
->CondStackTop
> 0);
3166 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
3167 UPDATE_EXEC_MASK(mach
);
3170 case TGSI_OPCODE_END
:
3171 /* halt execution */
3175 case TGSI_OPCODE_REP
:
3179 case TGSI_OPCODE_ENDREP
:
3183 case TGSI_OPCODE_PUSHA
:
3187 case TGSI_OPCODE_POPA
:
3191 case TGSI_OPCODE_CEIL
:
3192 exec_vector_unary(mach
, inst
, micro_ceil
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
3195 case TGSI_OPCODE_I2F
:
3196 exec_vector_unary(mach
, inst
, micro_i2f
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_INT
);
3199 case TGSI_OPCODE_NOT
:
3200 exec_vector_unary(mach
, inst
, micro_not
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3203 case TGSI_OPCODE_TRUNC
:
3204 exec_vector_unary(mach
, inst
, micro_trunc
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
3207 case TGSI_OPCODE_SHL
:
3208 exec_vector_binary(mach
, inst
, micro_shl
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3211 case TGSI_OPCODE_AND
:
3212 exec_vector_binary(mach
, inst
, micro_and
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3215 case TGSI_OPCODE_OR
:
3216 exec_vector_binary(mach
, inst
, micro_or
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3219 case TGSI_OPCODE_MOD
:
3223 case TGSI_OPCODE_XOR
:
3224 exec_vector_binary(mach
, inst
, micro_xor
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3227 case TGSI_OPCODE_SAD
:
3231 case TGSI_OPCODE_TXF
:
3235 case TGSI_OPCODE_TXQ
:
3239 case TGSI_OPCODE_EMIT
:
3243 case TGSI_OPCODE_ENDPRIM
:
3244 emit_primitive(mach
);
3247 case TGSI_OPCODE_BGNFOR
:
3248 assert(mach
->LoopCounterStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3249 for (chan_index
= 0; chan_index
< 3; chan_index
++) {
3250 FETCH( &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
].xyzw
[chan_index
], 0, chan_index
);
3252 ++mach
->LoopCounterStackTop
;
3253 STORE(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
], 0, CHAN_X
);
3254 /* update LoopMask */
3255 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[0] <= 0.0f
) {
3256 mach
->LoopMask
&= ~0x1;
3258 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[1] <= 0.0f
) {
3259 mach
->LoopMask
&= ~0x2;
3261 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[2] <= 0.0f
) {
3262 mach
->LoopMask
&= ~0x4;
3264 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[3] <= 0.0f
) {
3265 mach
->LoopMask
&= ~0x8;
3267 /* TODO: if mach->LoopMask == 0, jump to end of loop */
3268 UPDATE_EXEC_MASK(mach
);
3269 /* fall-through (for now) */
3270 case TGSI_OPCODE_BGNLOOP
:
3271 /* push LoopMask and ContMasks */
3272 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3273 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3274 assert(mach
->LoopLabelStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3275 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
3277 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
3278 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
3279 mach
->LoopLabelStack
[mach
->LoopLabelStackTop
++] = *pc
- 1;
3280 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
3281 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_LOOP
;
3284 case TGSI_OPCODE_ENDFOR
:
3285 assert(mach
->LoopCounterStackTop
> 0);
3286 micro_sub(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
],
3287 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
],
3288 &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
]);
3289 /* update LoopMask */
3290 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[0] <= 0.0f
) {
3291 mach
->LoopMask
&= ~0x1;
3293 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[1] <= 0.0f
) {
3294 mach
->LoopMask
&= ~0x2;
3296 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[2] <= 0.0f
) {
3297 mach
->LoopMask
&= ~0x4;
3299 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[3] <= 0.0f
) {
3300 mach
->LoopMask
&= ~0x8;
3302 micro_add(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
],
3303 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
],
3304 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Z
]);
3305 assert(mach
->LoopLabelStackTop
> 0);
3306 inst
= mach
->Instructions
+ mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1];
3307 STORE(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
].xyzw
[CHAN_X
], 0, CHAN_X
);
3308 /* Restore ContMask, but don't pop */
3309 assert(mach
->ContStackTop
> 0);
3310 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3311 UPDATE_EXEC_MASK(mach
);
3312 if (mach
->ExecMask
) {
3313 /* repeat loop: jump to instruction just past BGNLOOP */
3314 assert(mach
->LoopLabelStackTop
> 0);
3315 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
3318 /* exit loop: pop LoopMask */
3319 assert(mach
->LoopStackTop
> 0);
3320 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3322 assert(mach
->ContStackTop
> 0);
3323 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3324 assert(mach
->LoopLabelStackTop
> 0);
3325 --mach
->LoopLabelStackTop
;
3326 assert(mach
->LoopCounterStackTop
> 0);
3327 --mach
->LoopCounterStackTop
;
3329 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3331 UPDATE_EXEC_MASK(mach
);
3334 case TGSI_OPCODE_ENDLOOP
:
3335 /* Restore ContMask, but don't pop */
3336 assert(mach
->ContStackTop
> 0);
3337 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3338 UPDATE_EXEC_MASK(mach
);
3339 if (mach
->ExecMask
) {
3340 /* repeat loop: jump to instruction just past BGNLOOP */
3341 assert(mach
->LoopLabelStackTop
> 0);
3342 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
3345 /* exit loop: pop LoopMask */
3346 assert(mach
->LoopStackTop
> 0);
3347 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3349 assert(mach
->ContStackTop
> 0);
3350 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3351 assert(mach
->LoopLabelStackTop
> 0);
3352 --mach
->LoopLabelStackTop
;
3354 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3356 UPDATE_EXEC_MASK(mach
);
3359 case TGSI_OPCODE_BRK
:
3363 case TGSI_OPCODE_CONT
:
3364 /* turn off cont channels for each enabled exec channel */
3365 mach
->ContMask
&= ~mach
->ExecMask
;
3366 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3367 UPDATE_EXEC_MASK(mach
);
3370 case TGSI_OPCODE_BGNSUB
:
3374 case TGSI_OPCODE_ENDSUB
:
3376 * XXX: This really should be a no-op. We should never reach this opcode.
3379 assert(mach
->CallStackTop
> 0);
3380 mach
->CallStackTop
--;
3382 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
3383 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
3385 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
3386 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
3388 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
3389 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
3391 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
3392 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
3394 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
3395 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
3397 assert(mach
->FuncStackTop
> 0);
3398 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
3400 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
3402 UPDATE_EXEC_MASK(mach
);
3405 case TGSI_OPCODE_NOP
:
3408 case TGSI_OPCODE_BREAKC
:
3409 FETCH(&r
[0], 0, CHAN_X
);
3410 /* update CondMask */
3411 if (r
[0].u
[0] && (mach
->ExecMask
& 0x1)) {
3412 mach
->LoopMask
&= ~0x1;
3414 if (r
[0].u
[1] && (mach
->ExecMask
& 0x2)) {
3415 mach
->LoopMask
&= ~0x2;
3417 if (r
[0].u
[2] && (mach
->ExecMask
& 0x4)) {
3418 mach
->LoopMask
&= ~0x4;
3420 if (r
[0].u
[3] && (mach
->ExecMask
& 0x8)) {
3421 mach
->LoopMask
&= ~0x8;
3423 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3424 UPDATE_EXEC_MASK(mach
);
3427 case TGSI_OPCODE_F2I
:
3428 exec_vector_unary(mach
, inst
, micro_f2i
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
3431 case TGSI_OPCODE_IDIV
:
3432 exec_vector_binary(mach
, inst
, micro_idiv
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3435 case TGSI_OPCODE_IMAX
:
3436 exec_vector_binary(mach
, inst
, micro_imax
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3439 case TGSI_OPCODE_IMIN
:
3440 exec_vector_binary(mach
, inst
, micro_imin
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3443 case TGSI_OPCODE_INEG
:
3444 exec_vector_unary(mach
, inst
, micro_ineg
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3447 case TGSI_OPCODE_ISGE
:
3448 exec_vector_binary(mach
, inst
, micro_isge
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3451 case TGSI_OPCODE_ISHR
:
3452 exec_vector_binary(mach
, inst
, micro_ishr
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3455 case TGSI_OPCODE_ISLT
:
3456 exec_vector_binary(mach
, inst
, micro_islt
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
3459 case TGSI_OPCODE_F2U
:
3460 exec_vector_unary(mach
, inst
, micro_f2u
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
3463 case TGSI_OPCODE_U2F
:
3464 exec_vector_unary(mach
, inst
, micro_u2f
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_UINT
);
3467 case TGSI_OPCODE_UADD
:
3468 exec_vector_binary(mach
, inst
, micro_uadd
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3471 case TGSI_OPCODE_UDIV
:
3472 exec_vector_binary(mach
, inst
, micro_udiv
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3475 case TGSI_OPCODE_UMAD
:
3476 exec_vector_trinary(mach
, inst
, micro_umad
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3479 case TGSI_OPCODE_UMAX
:
3480 exec_vector_binary(mach
, inst
, micro_umax
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3483 case TGSI_OPCODE_UMIN
:
3484 exec_vector_binary(mach
, inst
, micro_umin
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3487 case TGSI_OPCODE_UMOD
:
3488 exec_vector_binary(mach
, inst
, micro_umod
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3491 case TGSI_OPCODE_UMUL
:
3492 exec_vector_binary(mach
, inst
, micro_umul
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3495 case TGSI_OPCODE_USEQ
:
3496 exec_vector_binary(mach
, inst
, micro_useq
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3499 case TGSI_OPCODE_USGE
:
3500 exec_vector_binary(mach
, inst
, micro_usge
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3503 case TGSI_OPCODE_USHR
:
3504 exec_vector_binary(mach
, inst
, micro_ushr
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3507 case TGSI_OPCODE_USLT
:
3508 exec_vector_binary(mach
, inst
, micro_uslt
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3511 case TGSI_OPCODE_USNE
:
3512 exec_vector_binary(mach
, inst
, micro_usne
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
3515 case TGSI_OPCODE_SWITCH
:
3516 exec_switch(mach
, inst
);
3519 case TGSI_OPCODE_CASE
:
3520 exec_case(mach
, inst
);
3523 case TGSI_OPCODE_DEFAULT
:
3527 case TGSI_OPCODE_ENDSWITCH
:
3528 exec_endswitch(mach
);
3537 #define DEBUG_EXECUTION 0
3541 * Run TGSI interpreter.
3542 * \return bitmask of "alive" quad components
3545 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
3550 mach
->CondMask
= 0xf;
3551 mach
->LoopMask
= 0xf;
3552 mach
->ContMask
= 0xf;
3553 mach
->FuncMask
= 0xf;
3554 mach
->ExecMask
= 0xf;
3556 mach
->Switch
.mask
= 0xf;
3558 assert(mach
->CondStackTop
== 0);
3559 assert(mach
->LoopStackTop
== 0);
3560 assert(mach
->ContStackTop
== 0);
3561 assert(mach
->SwitchStackTop
== 0);
3562 assert(mach
->BreakStackTop
== 0);
3563 assert(mach
->CallStackTop
== 0);
3565 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
3566 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
3568 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
3569 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
3570 mach
->Primitives
[0] = 0;
3573 for (i
= 0; i
< QUAD_SIZE
; i
++) {
3574 mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
].u
[i
] =
3575 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_X_SHIFT
) |
3576 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Y_SHIFT
) |
3577 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Z_SHIFT
) |
3578 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_W_SHIFT
);
3581 /* execute declarations (interpolants) */
3582 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
3583 exec_declaration( mach
, mach
->Declarations
+i
);
3588 struct tgsi_exec_vector temps
[TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
];
3589 struct tgsi_exec_vector outputs
[PIPE_MAX_ATTRIBS
];
3592 memcpy(temps
, mach
->Temps
, sizeof(temps
));
3593 memcpy(outputs
, mach
->Outputs
, sizeof(outputs
));
3596 /* execute instructions, until pc is set to -1 */
3602 tgsi_dump_instruction(&mach
->Instructions
[pc
], inst
++);
3605 assert(pc
< (int) mach
->NumInstructions
);
3606 exec_instruction(mach
, mach
->Instructions
+ pc
, &pc
);
3609 for (i
= 0; i
< TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
; i
++) {
3610 if (memcmp(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]))) {
3613 memcpy(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]));
3614 debug_printf("TEMP[%2u] = ", i
);
3615 for (j
= 0; j
< 4; j
++) {
3619 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3620 temps
[i
].xyzw
[0].f
[j
], temps
[i
].xyzw
[0].u
[j
],
3621 temps
[i
].xyzw
[1].f
[j
], temps
[i
].xyzw
[1].u
[j
],
3622 temps
[i
].xyzw
[2].f
[j
], temps
[i
].xyzw
[2].u
[j
],
3623 temps
[i
].xyzw
[3].f
[j
], temps
[i
].xyzw
[3].u
[j
]);
3627 for (i
= 0; i
< PIPE_MAX_ATTRIBS
; i
++) {
3628 if (memcmp(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]))) {
3631 memcpy(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]));
3632 debug_printf("OUT[%2u] = ", i
);
3633 for (j
= 0; j
< 4; j
++) {
3637 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3638 outputs
[i
].xyzw
[0].f
[j
], outputs
[i
].xyzw
[0].u
[j
],
3639 outputs
[i
].xyzw
[1].f
[j
], outputs
[i
].xyzw
[1].u
[j
],
3640 outputs
[i
].xyzw
[2].f
[j
], outputs
[i
].xyzw
[2].u
[j
],
3641 outputs
[i
].xyzw
[3].f
[j
], outputs
[i
].xyzw
[3].u
[j
]);
3650 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3651 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
3653 * Scale back depth component.
3655 for (i
= 0; i
< 4; i
++)
3656 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
3660 assert(mach
->CondStackTop
== 0);
3661 assert(mach
->LoopStackTop
== 0);
3662 assert(mach
->ContStackTop
== 0);
3663 assert(mach
->SwitchStackTop
== 0);
3664 assert(mach
->BreakStackTop
== 0);
3665 assert(mach
->CallStackTop
== 0);
3667 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];