1 /**************************************************************************
3 * Copyright 2007-2008 VMware, Inc.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
30 * TGSI interpreter/executor.
32 * Flow control information:
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_half.h"
62 #include "util/u_memory.h"
63 #include "util/u_math.h"
66 #define DEBUG_EXECUTION 0
71 #define TILE_TOP_LEFT 0
72 #define TILE_TOP_RIGHT 1
73 #define TILE_BOTTOM_LEFT 2
74 #define TILE_BOTTOM_RIGHT 3
76 union tgsi_double_channel
{
77 double d
[TGSI_QUAD_SIZE
];
78 unsigned u
[TGSI_QUAD_SIZE
][2];
81 struct tgsi_double_vector
{
82 union tgsi_double_channel xy
;
83 union tgsi_double_channel zw
;
87 micro_abs(union tgsi_exec_channel
*dst
,
88 const union tgsi_exec_channel
*src
)
90 dst
->f
[0] = fabsf(src
->f
[0]);
91 dst
->f
[1] = fabsf(src
->f
[1]);
92 dst
->f
[2] = fabsf(src
->f
[2]);
93 dst
->f
[3] = fabsf(src
->f
[3]);
97 micro_arl(union tgsi_exec_channel
*dst
,
98 const union tgsi_exec_channel
*src
)
100 dst
->i
[0] = (int)floorf(src
->f
[0]);
101 dst
->i
[1] = (int)floorf(src
->f
[1]);
102 dst
->i
[2] = (int)floorf(src
->f
[2]);
103 dst
->i
[3] = (int)floorf(src
->f
[3]);
107 micro_arr(union tgsi_exec_channel
*dst
,
108 const union tgsi_exec_channel
*src
)
110 dst
->i
[0] = (int)floorf(src
->f
[0] + 0.5f
);
111 dst
->i
[1] = (int)floorf(src
->f
[1] + 0.5f
);
112 dst
->i
[2] = (int)floorf(src
->f
[2] + 0.5f
);
113 dst
->i
[3] = (int)floorf(src
->f
[3] + 0.5f
);
117 micro_ceil(union tgsi_exec_channel
*dst
,
118 const union tgsi_exec_channel
*src
)
120 dst
->f
[0] = ceilf(src
->f
[0]);
121 dst
->f
[1] = ceilf(src
->f
[1]);
122 dst
->f
[2] = ceilf(src
->f
[2]);
123 dst
->f
[3] = ceilf(src
->f
[3]);
127 micro_clamp(union tgsi_exec_channel
*dst
,
128 const union tgsi_exec_channel
*src0
,
129 const union tgsi_exec_channel
*src1
,
130 const union tgsi_exec_channel
*src2
)
132 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src1
->f
[0] : src0
->f
[0] > src2
->f
[0] ? src2
->f
[0] : src0
->f
[0];
133 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src1
->f
[1] : src0
->f
[1] > src2
->f
[1] ? src2
->f
[1] : src0
->f
[1];
134 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src1
->f
[2] : src0
->f
[2] > src2
->f
[2] ? src2
->f
[2] : src0
->f
[2];
135 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src1
->f
[3] : src0
->f
[3] > src2
->f
[3] ? src2
->f
[3] : src0
->f
[3];
139 micro_cmp(union tgsi_exec_channel
*dst
,
140 const union tgsi_exec_channel
*src0
,
141 const union tgsi_exec_channel
*src1
,
142 const union tgsi_exec_channel
*src2
)
144 dst
->f
[0] = src0
->f
[0] < 0.0f
? src1
->f
[0] : src2
->f
[0];
145 dst
->f
[1] = src0
->f
[1] < 0.0f
? src1
->f
[1] : src2
->f
[1];
146 dst
->f
[2] = src0
->f
[2] < 0.0f
? src1
->f
[2] : src2
->f
[2];
147 dst
->f
[3] = src0
->f
[3] < 0.0f
? src1
->f
[3] : src2
->f
[3];
151 micro_cos(union tgsi_exec_channel
*dst
,
152 const union tgsi_exec_channel
*src
)
154 dst
->f
[0] = cosf(src
->f
[0]);
155 dst
->f
[1] = cosf(src
->f
[1]);
156 dst
->f
[2] = cosf(src
->f
[2]);
157 dst
->f
[3] = cosf(src
->f
[3]);
161 micro_d2f(union tgsi_exec_channel
*dst
,
162 const union tgsi_double_channel
*src
)
164 dst
->f
[0] = (float)src
->d
[0];
165 dst
->f
[1] = (float)src
->d
[1];
166 dst
->f
[2] = (float)src
->d
[2];
167 dst
->f
[3] = (float)src
->d
[3];
171 micro_d2i(union tgsi_exec_channel
*dst
,
172 const union tgsi_double_channel
*src
)
174 dst
->i
[0] = (int)src
->d
[0];
175 dst
->i
[1] = (int)src
->d
[1];
176 dst
->i
[2] = (int)src
->d
[2];
177 dst
->i
[3] = (int)src
->d
[3];
181 micro_d2u(union tgsi_exec_channel
*dst
,
182 const union tgsi_double_channel
*src
)
184 dst
->u
[0] = (unsigned)src
->d
[0];
185 dst
->u
[1] = (unsigned)src
->d
[1];
186 dst
->u
[2] = (unsigned)src
->d
[2];
187 dst
->u
[3] = (unsigned)src
->d
[3];
190 micro_dabs(union tgsi_double_channel
*dst
,
191 const union tgsi_double_channel
*src
)
193 dst
->d
[0] = src
->d
[0] >= 0.0 ? src
->d
[0] : -src
->d
[0];
194 dst
->d
[1] = src
->d
[1] >= 0.0 ? src
->d
[1] : -src
->d
[1];
195 dst
->d
[2] = src
->d
[2] >= 0.0 ? src
->d
[2] : -src
->d
[2];
196 dst
->d
[3] = src
->d
[3] >= 0.0 ? src
->d
[3] : -src
->d
[3];
200 micro_dadd(union tgsi_double_channel
*dst
,
201 const union tgsi_double_channel
*src
)
203 dst
->d
[0] = src
[0].d
[0] + src
[1].d
[0];
204 dst
->d
[1] = src
[0].d
[1] + src
[1].d
[1];
205 dst
->d
[2] = src
[0].d
[2] + src
[1].d
[2];
206 dst
->d
[3] = src
[0].d
[3] + src
[1].d
[3];
210 micro_ddx(union tgsi_exec_channel
*dst
,
211 const union tgsi_exec_channel
*src
)
216 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
220 micro_ddy(union tgsi_exec_channel
*dst
,
221 const union tgsi_exec_channel
*src
)
226 dst
->f
[3] = src
->f
[TILE_BOTTOM_LEFT
] - src
->f
[TILE_TOP_LEFT
];
230 micro_dmul(union tgsi_double_channel
*dst
,
231 const union tgsi_double_channel
*src
)
233 dst
->d
[0] = src
[0].d
[0] * src
[1].d
[0];
234 dst
->d
[1] = src
[0].d
[1] * src
[1].d
[1];
235 dst
->d
[2] = src
[0].d
[2] * src
[1].d
[2];
236 dst
->d
[3] = src
[0].d
[3] * src
[1].d
[3];
240 micro_dmax(union tgsi_double_channel
*dst
,
241 const union tgsi_double_channel
*src
)
243 dst
->d
[0] = src
[0].d
[0] > src
[1].d
[0] ? src
[0].d
[0] : src
[1].d
[0];
244 dst
->d
[1] = src
[0].d
[1] > src
[1].d
[1] ? src
[0].d
[1] : src
[1].d
[1];
245 dst
->d
[2] = src
[0].d
[2] > src
[1].d
[2] ? src
[0].d
[2] : src
[1].d
[2];
246 dst
->d
[3] = src
[0].d
[3] > src
[1].d
[3] ? src
[0].d
[3] : src
[1].d
[3];
250 micro_dmin(union tgsi_double_channel
*dst
,
251 const union tgsi_double_channel
*src
)
253 dst
->d
[0] = src
[0].d
[0] < src
[1].d
[0] ? src
[0].d
[0] : src
[1].d
[0];
254 dst
->d
[1] = src
[0].d
[1] < src
[1].d
[1] ? src
[0].d
[1] : src
[1].d
[1];
255 dst
->d
[2] = src
[0].d
[2] < src
[1].d
[2] ? src
[0].d
[2] : src
[1].d
[2];
256 dst
->d
[3] = src
[0].d
[3] < src
[1].d
[3] ? src
[0].d
[3] : src
[1].d
[3];
260 micro_dneg(union tgsi_double_channel
*dst
,
261 const union tgsi_double_channel
*src
)
263 dst
->d
[0] = -src
->d
[0];
264 dst
->d
[1] = -src
->d
[1];
265 dst
->d
[2] = -src
->d
[2];
266 dst
->d
[3] = -src
->d
[3];
270 micro_dslt(union tgsi_double_channel
*dst
,
271 const union tgsi_double_channel
*src
)
273 dst
->u
[0][0] = src
[0].d
[0] < src
[1].d
[0] ? ~0U : 0U;
274 dst
->u
[1][0] = src
[0].d
[1] < src
[1].d
[1] ? ~0U : 0U;
275 dst
->u
[2][0] = src
[0].d
[2] < src
[1].d
[2] ? ~0U : 0U;
276 dst
->u
[3][0] = src
[0].d
[3] < src
[1].d
[3] ? ~0U : 0U;
280 micro_dsne(union tgsi_double_channel
*dst
,
281 const union tgsi_double_channel
*src
)
283 dst
->u
[0][0] = src
[0].d
[0] != src
[1].d
[0] ? ~0U : 0U;
284 dst
->u
[1][0] = src
[0].d
[1] != src
[1].d
[1] ? ~0U : 0U;
285 dst
->u
[2][0] = src
[0].d
[2] != src
[1].d
[2] ? ~0U : 0U;
286 dst
->u
[3][0] = src
[0].d
[3] != src
[1].d
[3] ? ~0U : 0U;
290 micro_dsge(union tgsi_double_channel
*dst
,
291 const union tgsi_double_channel
*src
)
293 dst
->u
[0][0] = src
[0].d
[0] >= src
[1].d
[0] ? ~0U : 0U;
294 dst
->u
[1][0] = src
[0].d
[1] >= src
[1].d
[1] ? ~0U : 0U;
295 dst
->u
[2][0] = src
[0].d
[2] >= src
[1].d
[2] ? ~0U : 0U;
296 dst
->u
[3][0] = src
[0].d
[3] >= src
[1].d
[3] ? ~0U : 0U;
300 micro_dseq(union tgsi_double_channel
*dst
,
301 const union tgsi_double_channel
*src
)
303 dst
->u
[0][0] = src
[0].d
[0] == src
[1].d
[0] ? ~0U : 0U;
304 dst
->u
[1][0] = src
[0].d
[1] == src
[1].d
[1] ? ~0U : 0U;
305 dst
->u
[2][0] = src
[0].d
[2] == src
[1].d
[2] ? ~0U : 0U;
306 dst
->u
[3][0] = src
[0].d
[3] == src
[1].d
[3] ? ~0U : 0U;
310 micro_drcp(union tgsi_double_channel
*dst
,
311 const union tgsi_double_channel
*src
)
313 dst
->d
[0] = 1.0 / src
->d
[0];
314 dst
->d
[1] = 1.0 / src
->d
[1];
315 dst
->d
[2] = 1.0 / src
->d
[2];
316 dst
->d
[3] = 1.0 / src
->d
[3];
320 micro_dsqrt(union tgsi_double_channel
*dst
,
321 const union tgsi_double_channel
*src
)
323 dst
->d
[0] = sqrt(src
->d
[0]);
324 dst
->d
[1] = sqrt(src
->d
[1]);
325 dst
->d
[2] = sqrt(src
->d
[2]);
326 dst
->d
[3] = sqrt(src
->d
[3]);
330 micro_drsq(union tgsi_double_channel
*dst
,
331 const union tgsi_double_channel
*src
)
333 dst
->d
[0] = 1.0 / sqrt(src
->d
[0]);
334 dst
->d
[1] = 1.0 / sqrt(src
->d
[1]);
335 dst
->d
[2] = 1.0 / sqrt(src
->d
[2]);
336 dst
->d
[3] = 1.0 / sqrt(src
->d
[3]);
340 micro_dmad(union tgsi_double_channel
*dst
,
341 const union tgsi_double_channel
*src
)
343 dst
->d
[0] = src
[0].d
[0] * src
[1].d
[0] + src
[2].d
[0];
344 dst
->d
[1] = src
[0].d
[1] * src
[1].d
[1] + src
[2].d
[1];
345 dst
->d
[2] = src
[0].d
[2] * src
[1].d
[2] + src
[2].d
[2];
346 dst
->d
[3] = src
[0].d
[3] * src
[1].d
[3] + src
[2].d
[3];
350 micro_dfrac(union tgsi_double_channel
*dst
,
351 const union tgsi_double_channel
*src
)
353 dst
->d
[0] = src
->d
[0] - floor(src
->d
[0]);
354 dst
->d
[1] = src
->d
[1] - floor(src
->d
[1]);
355 dst
->d
[2] = src
->d
[2] - floor(src
->d
[2]);
356 dst
->d
[3] = src
->d
[3] - floor(src
->d
[3]);
360 micro_dldexp(union tgsi_double_channel
*dst
,
361 const union tgsi_double_channel
*src0
,
362 union tgsi_exec_channel
*src1
)
364 dst
->d
[0] = ldexp(src0
->d
[0], src1
->i
[0]);
365 dst
->d
[1] = ldexp(src0
->d
[1], src1
->i
[1]);
366 dst
->d
[2] = ldexp(src0
->d
[2], src1
->i
[2]);
367 dst
->d
[3] = ldexp(src0
->d
[3], src1
->i
[3]);
371 micro_dfracexp(union tgsi_double_channel
*dst
,
372 union tgsi_exec_channel
*dst_exp
,
373 const union tgsi_double_channel
*src
)
375 dst
->d
[0] = frexp(src
->d
[0], &dst_exp
->i
[0]);
376 dst
->d
[1] = frexp(src
->d
[1], &dst_exp
->i
[1]);
377 dst
->d
[2] = frexp(src
->d
[2], &dst_exp
->i
[2]);
378 dst
->d
[3] = frexp(src
->d
[3], &dst_exp
->i
[3]);
382 micro_exp2(union tgsi_exec_channel
*dst
,
383 const union tgsi_exec_channel
*src
)
386 dst
->f
[0] = util_fast_exp2(src
->f
[0]);
387 dst
->f
[1] = util_fast_exp2(src
->f
[1]);
388 dst
->f
[2] = util_fast_exp2(src
->f
[2]);
389 dst
->f
[3] = util_fast_exp2(src
->f
[3]);
392 /* Inf is okay for this instruction, so clamp it to silence assertions. */
394 union tgsi_exec_channel clamped
;
396 for (i
= 0; i
< 4; i
++) {
397 if (src
->f
[i
] > 127.99999f
) {
398 clamped
.f
[i
] = 127.99999f
;
399 } else if (src
->f
[i
] < -126.99999f
) {
400 clamped
.f
[i
] = -126.99999f
;
402 clamped
.f
[i
] = src
->f
[i
];
408 dst
->f
[0] = powf(2.0f
, src
->f
[0]);
409 dst
->f
[1] = powf(2.0f
, src
->f
[1]);
410 dst
->f
[2] = powf(2.0f
, src
->f
[2]);
411 dst
->f
[3] = powf(2.0f
, src
->f
[3]);
412 #endif /* FAST_MATH */
416 micro_f2d(union tgsi_double_channel
*dst
,
417 const union tgsi_exec_channel
*src
)
419 dst
->d
[0] = (double)src
->f
[0];
420 dst
->d
[1] = (double)src
->f
[1];
421 dst
->d
[2] = (double)src
->f
[2];
422 dst
->d
[3] = (double)src
->f
[3];
426 micro_flr(union tgsi_exec_channel
*dst
,
427 const union tgsi_exec_channel
*src
)
429 dst
->f
[0] = floorf(src
->f
[0]);
430 dst
->f
[1] = floorf(src
->f
[1]);
431 dst
->f
[2] = floorf(src
->f
[2]);
432 dst
->f
[3] = floorf(src
->f
[3]);
436 micro_frc(union tgsi_exec_channel
*dst
,
437 const union tgsi_exec_channel
*src
)
439 dst
->f
[0] = src
->f
[0] - floorf(src
->f
[0]);
440 dst
->f
[1] = src
->f
[1] - floorf(src
->f
[1]);
441 dst
->f
[2] = src
->f
[2] - floorf(src
->f
[2]);
442 dst
->f
[3] = src
->f
[3] - floorf(src
->f
[3]);
446 micro_i2d(union tgsi_double_channel
*dst
,
447 const union tgsi_exec_channel
*src
)
449 dst
->d
[0] = (double)src
->i
[0];
450 dst
->d
[1] = (double)src
->i
[1];
451 dst
->d
[2] = (double)src
->i
[2];
452 dst
->d
[3] = (double)src
->i
[3];
456 micro_iabs(union tgsi_exec_channel
*dst
,
457 const union tgsi_exec_channel
*src
)
459 dst
->i
[0] = src
->i
[0] >= 0 ? src
->i
[0] : -src
->i
[0];
460 dst
->i
[1] = src
->i
[1] >= 0 ? src
->i
[1] : -src
->i
[1];
461 dst
->i
[2] = src
->i
[2] >= 0 ? src
->i
[2] : -src
->i
[2];
462 dst
->i
[3] = src
->i
[3] >= 0 ? src
->i
[3] : -src
->i
[3];
466 micro_ineg(union tgsi_exec_channel
*dst
,
467 const union tgsi_exec_channel
*src
)
469 dst
->i
[0] = -src
->i
[0];
470 dst
->i
[1] = -src
->i
[1];
471 dst
->i
[2] = -src
->i
[2];
472 dst
->i
[3] = -src
->i
[3];
476 micro_lg2(union tgsi_exec_channel
*dst
,
477 const union tgsi_exec_channel
*src
)
480 dst
->f
[0] = util_fast_log2(src
->f
[0]);
481 dst
->f
[1] = util_fast_log2(src
->f
[1]);
482 dst
->f
[2] = util_fast_log2(src
->f
[2]);
483 dst
->f
[3] = util_fast_log2(src
->f
[3]);
485 dst
->f
[0] = logf(src
->f
[0]) * 1.442695f
;
486 dst
->f
[1] = logf(src
->f
[1]) * 1.442695f
;
487 dst
->f
[2] = logf(src
->f
[2]) * 1.442695f
;
488 dst
->f
[3] = logf(src
->f
[3]) * 1.442695f
;
493 micro_lrp(union tgsi_exec_channel
*dst
,
494 const union tgsi_exec_channel
*src0
,
495 const union tgsi_exec_channel
*src1
,
496 const union tgsi_exec_channel
*src2
)
498 dst
->f
[0] = src0
->f
[0] * (src1
->f
[0] - src2
->f
[0]) + src2
->f
[0];
499 dst
->f
[1] = src0
->f
[1] * (src1
->f
[1] - src2
->f
[1]) + src2
->f
[1];
500 dst
->f
[2] = src0
->f
[2] * (src1
->f
[2] - src2
->f
[2]) + src2
->f
[2];
501 dst
->f
[3] = src0
->f
[3] * (src1
->f
[3] - src2
->f
[3]) + src2
->f
[3];
505 micro_mad(union tgsi_exec_channel
*dst
,
506 const union tgsi_exec_channel
*src0
,
507 const union tgsi_exec_channel
*src1
,
508 const union tgsi_exec_channel
*src2
)
510 dst
->f
[0] = src0
->f
[0] * src1
->f
[0] + src2
->f
[0];
511 dst
->f
[1] = src0
->f
[1] * src1
->f
[1] + src2
->f
[1];
512 dst
->f
[2] = src0
->f
[2] * src1
->f
[2] + src2
->f
[2];
513 dst
->f
[3] = src0
->f
[3] * src1
->f
[3] + src2
->f
[3];
517 micro_mov(union tgsi_exec_channel
*dst
,
518 const union tgsi_exec_channel
*src
)
520 dst
->u
[0] = src
->u
[0];
521 dst
->u
[1] = src
->u
[1];
522 dst
->u
[2] = src
->u
[2];
523 dst
->u
[3] = src
->u
[3];
527 micro_rcp(union tgsi_exec_channel
*dst
,
528 const union tgsi_exec_channel
*src
)
530 #if 0 /* for debugging */
531 assert(src
->f
[0] != 0.0f
);
532 assert(src
->f
[1] != 0.0f
);
533 assert(src
->f
[2] != 0.0f
);
534 assert(src
->f
[3] != 0.0f
);
536 dst
->f
[0] = 1.0f
/ src
->f
[0];
537 dst
->f
[1] = 1.0f
/ src
->f
[1];
538 dst
->f
[2] = 1.0f
/ src
->f
[2];
539 dst
->f
[3] = 1.0f
/ src
->f
[3];
543 micro_rnd(union tgsi_exec_channel
*dst
,
544 const union tgsi_exec_channel
*src
)
546 dst
->f
[0] = floorf(src
->f
[0] + 0.5f
);
547 dst
->f
[1] = floorf(src
->f
[1] + 0.5f
);
548 dst
->f
[2] = floorf(src
->f
[2] + 0.5f
);
549 dst
->f
[3] = floorf(src
->f
[3] + 0.5f
);
553 micro_rsq(union tgsi_exec_channel
*dst
,
554 const union tgsi_exec_channel
*src
)
556 #if 0 /* for debugging */
557 assert(src
->f
[0] != 0.0f
);
558 assert(src
->f
[1] != 0.0f
);
559 assert(src
->f
[2] != 0.0f
);
560 assert(src
->f
[3] != 0.0f
);
562 dst
->f
[0] = 1.0f
/ sqrtf(src
->f
[0]);
563 dst
->f
[1] = 1.0f
/ sqrtf(src
->f
[1]);
564 dst
->f
[2] = 1.0f
/ sqrtf(src
->f
[2]);
565 dst
->f
[3] = 1.0f
/ sqrtf(src
->f
[3]);
569 micro_sqrt(union tgsi_exec_channel
*dst
,
570 const union tgsi_exec_channel
*src
)
572 dst
->f
[0] = sqrtf(src
->f
[0]);
573 dst
->f
[1] = sqrtf(src
->f
[1]);
574 dst
->f
[2] = sqrtf(src
->f
[2]);
575 dst
->f
[3] = sqrtf(src
->f
[3]);
579 micro_seq(union tgsi_exec_channel
*dst
,
580 const union tgsi_exec_channel
*src0
,
581 const union tgsi_exec_channel
*src1
)
583 dst
->f
[0] = src0
->f
[0] == src1
->f
[0] ? 1.0f
: 0.0f
;
584 dst
->f
[1] = src0
->f
[1] == src1
->f
[1] ? 1.0f
: 0.0f
;
585 dst
->f
[2] = src0
->f
[2] == src1
->f
[2] ? 1.0f
: 0.0f
;
586 dst
->f
[3] = src0
->f
[3] == src1
->f
[3] ? 1.0f
: 0.0f
;
590 micro_sge(union tgsi_exec_channel
*dst
,
591 const union tgsi_exec_channel
*src0
,
592 const union tgsi_exec_channel
*src1
)
594 dst
->f
[0] = src0
->f
[0] >= src1
->f
[0] ? 1.0f
: 0.0f
;
595 dst
->f
[1] = src0
->f
[1] >= src1
->f
[1] ? 1.0f
: 0.0f
;
596 dst
->f
[2] = src0
->f
[2] >= src1
->f
[2] ? 1.0f
: 0.0f
;
597 dst
->f
[3] = src0
->f
[3] >= src1
->f
[3] ? 1.0f
: 0.0f
;
601 micro_sgn(union tgsi_exec_channel
*dst
,
602 const union tgsi_exec_channel
*src
)
604 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
605 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
606 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
607 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
611 micro_isgn(union tgsi_exec_channel
*dst
,
612 const union tgsi_exec_channel
*src
)
614 dst
->i
[0] = src
->i
[0] < 0 ? -1 : src
->i
[0] > 0 ? 1 : 0;
615 dst
->i
[1] = src
->i
[1] < 0 ? -1 : src
->i
[1] > 0 ? 1 : 0;
616 dst
->i
[2] = src
->i
[2] < 0 ? -1 : src
->i
[2] > 0 ? 1 : 0;
617 dst
->i
[3] = src
->i
[3] < 0 ? -1 : src
->i
[3] > 0 ? 1 : 0;
621 micro_sgt(union tgsi_exec_channel
*dst
,
622 const union tgsi_exec_channel
*src0
,
623 const union tgsi_exec_channel
*src1
)
625 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? 1.0f
: 0.0f
;
626 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? 1.0f
: 0.0f
;
627 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? 1.0f
: 0.0f
;
628 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? 1.0f
: 0.0f
;
632 micro_sin(union tgsi_exec_channel
*dst
,
633 const union tgsi_exec_channel
*src
)
635 dst
->f
[0] = sinf(src
->f
[0]);
636 dst
->f
[1] = sinf(src
->f
[1]);
637 dst
->f
[2] = sinf(src
->f
[2]);
638 dst
->f
[3] = sinf(src
->f
[3]);
642 micro_sle(union tgsi_exec_channel
*dst
,
643 const union tgsi_exec_channel
*src0
,
644 const union tgsi_exec_channel
*src1
)
646 dst
->f
[0] = src0
->f
[0] <= src1
->f
[0] ? 1.0f
: 0.0f
;
647 dst
->f
[1] = src0
->f
[1] <= src1
->f
[1] ? 1.0f
: 0.0f
;
648 dst
->f
[2] = src0
->f
[2] <= src1
->f
[2] ? 1.0f
: 0.0f
;
649 dst
->f
[3] = src0
->f
[3] <= src1
->f
[3] ? 1.0f
: 0.0f
;
653 micro_slt(union tgsi_exec_channel
*dst
,
654 const union tgsi_exec_channel
*src0
,
655 const union tgsi_exec_channel
*src1
)
657 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? 1.0f
: 0.0f
;
658 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? 1.0f
: 0.0f
;
659 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? 1.0f
: 0.0f
;
660 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? 1.0f
: 0.0f
;
664 micro_sne(union tgsi_exec_channel
*dst
,
665 const union tgsi_exec_channel
*src0
,
666 const union tgsi_exec_channel
*src1
)
668 dst
->f
[0] = src0
->f
[0] != src1
->f
[0] ? 1.0f
: 0.0f
;
669 dst
->f
[1] = src0
->f
[1] != src1
->f
[1] ? 1.0f
: 0.0f
;
670 dst
->f
[2] = src0
->f
[2] != src1
->f
[2] ? 1.0f
: 0.0f
;
671 dst
->f
[3] = src0
->f
[3] != src1
->f
[3] ? 1.0f
: 0.0f
;
675 micro_trunc(union tgsi_exec_channel
*dst
,
676 const union tgsi_exec_channel
*src
)
678 dst
->f
[0] = (float)(int)src
->f
[0];
679 dst
->f
[1] = (float)(int)src
->f
[1];
680 dst
->f
[2] = (float)(int)src
->f
[2];
681 dst
->f
[3] = (float)(int)src
->f
[3];
685 micro_u2d(union tgsi_double_channel
*dst
,
686 const union tgsi_exec_channel
*src
)
688 dst
->d
[0] = (double)src
->u
[0];
689 dst
->d
[1] = (double)src
->u
[1];
690 dst
->d
[2] = (double)src
->u
[2];
691 dst
->d
[3] = (double)src
->u
[3];
694 enum tgsi_exec_datatype
{
695 TGSI_EXEC_DATA_FLOAT
,
698 TGSI_EXEC_DATA_DOUBLE
702 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
704 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
705 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
706 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
707 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
708 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
709 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
712 /** The execution mask depends on the conditional mask and the loop mask */
713 #define UPDATE_EXEC_MASK(MACH) \
714 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
717 static const union tgsi_exec_channel ZeroVec
=
718 { { 0.0, 0.0, 0.0, 0.0 } };
720 static const union tgsi_exec_channel OneVec
= {
721 {1.0f
, 1.0f
, 1.0f
, 1.0f
}
724 static const union tgsi_exec_channel P128Vec
= {
725 {128.0f
, 128.0f
, 128.0f
, 128.0f
}
728 static const union tgsi_exec_channel M128Vec
= {
729 {-128.0f
, -128.0f
, -128.0f
, -128.0f
}
734 * Assert that none of the float values in 'chan' are infinite or NaN.
735 * NaN and Inf may occur normally during program execution and should
736 * not lead to crashes, etc. But when debugging, it's helpful to catch
740 check_inf_or_nan(const union tgsi_exec_channel
*chan
)
742 assert(!util_is_inf_or_nan((chan
)->f
[0]));
743 assert(!util_is_inf_or_nan((chan
)->f
[1]));
744 assert(!util_is_inf_or_nan((chan
)->f
[2]));
745 assert(!util_is_inf_or_nan((chan
)->f
[3]));
751 print_chan(const char *msg
, const union tgsi_exec_channel
*chan
)
753 debug_printf("%s = {%f, %f, %f, %f}\n",
754 msg
, chan
->f
[0], chan
->f
[1], chan
->f
[2], chan
->f
[3]);
761 print_temp(const struct tgsi_exec_machine
*mach
, uint index
)
763 const struct tgsi_exec_vector
*tmp
= &mach
->Temps
[index
];
765 debug_printf("Temp[%u] =\n", index
);
766 for (i
= 0; i
< 4; i
++) {
767 debug_printf(" %c: { %f, %f, %f, %f }\n",
779 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine
*mach
,
782 const unsigned *buf_sizes
)
786 for (i
= 0; i
< num_bufs
; i
++) {
787 mach
->Consts
[i
] = bufs
[i
];
788 mach
->ConstsSize
[i
] = buf_sizes
[i
];
794 * Check if there's a potential src/dst register data dependency when
795 * using SOA execution.
798 * This would expand into:
803 * The second instruction will have the wrong value for t0 if executed as-is.
806 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
)
810 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
811 if (writemask
== TGSI_WRITEMASK_X
||
812 writemask
== TGSI_WRITEMASK_Y
||
813 writemask
== TGSI_WRITEMASK_Z
||
814 writemask
== TGSI_WRITEMASK_W
||
815 writemask
== TGSI_WRITEMASK_NONE
) {
816 /* no chance of data dependency */
820 /* loop over src regs */
821 for (i
= 0; i
< inst
->Instruction
.NumSrcRegs
; i
++) {
822 if ((inst
->Src
[i
].Register
.File
==
823 inst
->Dst
[0].Register
.File
) &&
824 ((inst
->Src
[i
].Register
.Index
==
825 inst
->Dst
[0].Register
.Index
) ||
826 inst
->Src
[i
].Register
.Indirect
||
827 inst
->Dst
[0].Register
.Indirect
)) {
828 /* loop over dest channels */
829 uint channelsWritten
= 0x0;
830 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
831 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
832 /* check if we're reading a channel that's been written */
833 uint swizzle
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[i
], chan
);
834 if (channelsWritten
& (1 << swizzle
)) {
838 channelsWritten
|= (1 << chan
);
848 * Initialize machine state by expanding tokens to full instructions,
849 * allocating temporary storage, setting up constants, etc.
850 * After this, we can call tgsi_exec_machine_run() many times.
853 tgsi_exec_machine_bind_shader(
854 struct tgsi_exec_machine
*mach
,
855 const struct tgsi_token
*tokens
,
856 struct tgsi_sampler
*sampler
)
859 struct tgsi_parse_context parse
;
860 struct tgsi_full_instruction
*instructions
;
861 struct tgsi_full_declaration
*declarations
;
862 uint maxInstructions
= 10, numInstructions
= 0;
863 uint maxDeclarations
= 10, numDeclarations
= 0;
866 tgsi_dump(tokens
, 0);
872 mach
->Tokens
= tokens
;
873 mach
->Sampler
= sampler
;
876 /* unbind and free all */
877 FREE(mach
->Declarations
);
878 mach
->Declarations
= NULL
;
879 mach
->NumDeclarations
= 0;
881 FREE(mach
->Instructions
);
882 mach
->Instructions
= NULL
;
883 mach
->NumInstructions
= 0;
888 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
889 if (k
!= TGSI_PARSE_OK
) {
890 debug_printf( "Problem parsing!\n" );
894 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
896 mach
->NumOutputs
= 0;
898 if (mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
&&
899 !mach
->UsedGeometryShader
) {
900 struct tgsi_exec_vector
*inputs
;
901 struct tgsi_exec_vector
*outputs
;
903 inputs
= align_malloc(sizeof(struct tgsi_exec_vector
) *
904 TGSI_MAX_PRIM_VERTICES
* PIPE_MAX_SHADER_INPUTS
,
910 outputs
= align_malloc(sizeof(struct tgsi_exec_vector
) *
911 TGSI_MAX_TOTAL_VERTICES
, 16);
918 align_free(mach
->Inputs
);
919 align_free(mach
->Outputs
);
921 mach
->Inputs
= inputs
;
922 mach
->Outputs
= outputs
;
923 mach
->UsedGeometryShader
= TRUE
;
926 declarations
= (struct tgsi_full_declaration
*)
927 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
933 instructions
= (struct tgsi_full_instruction
*)
934 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
937 FREE( declarations
);
941 while( !tgsi_parse_end_of_tokens( &parse
) ) {
944 tgsi_parse_token( &parse
);
945 switch( parse
.FullToken
.Token
.Type
) {
946 case TGSI_TOKEN_TYPE_DECLARATION
:
947 /* save expanded declaration */
948 if (numDeclarations
== maxDeclarations
) {
949 declarations
= REALLOC(declarations
,
951 * sizeof(struct tgsi_full_declaration
),
952 (maxDeclarations
+ 10)
953 * sizeof(struct tgsi_full_declaration
));
954 maxDeclarations
+= 10;
956 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
== TGSI_FILE_OUTPUT
) {
958 for (reg
= parse
.FullToken
.FullDeclaration
.Range
.First
;
959 reg
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
964 memcpy(declarations
+ numDeclarations
,
965 &parse
.FullToken
.FullDeclaration
,
966 sizeof(declarations
[0]));
970 case TGSI_TOKEN_TYPE_IMMEDIATE
:
972 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
974 assert( mach
->ImmLimit
+ 1 <= TGSI_EXEC_NUM_IMMEDIATES
);
976 for( i
= 0; i
< size
; i
++ ) {
977 mach
->Imms
[mach
->ImmLimit
][i
] =
978 parse
.FullToken
.FullImmediate
.u
[i
].Float
;
984 case TGSI_TOKEN_TYPE_INSTRUCTION
:
986 /* save expanded instruction */
987 if (numInstructions
== maxInstructions
) {
988 instructions
= REALLOC(instructions
,
990 * sizeof(struct tgsi_full_instruction
),
991 (maxInstructions
+ 10)
992 * sizeof(struct tgsi_full_instruction
));
993 maxInstructions
+= 10;
996 memcpy(instructions
+ numInstructions
,
997 &parse
.FullToken
.FullInstruction
,
998 sizeof(instructions
[0]));
1003 case TGSI_TOKEN_TYPE_PROPERTY
:
1004 if (mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
1005 if (parse
.FullToken
.FullProperty
.Property
.PropertyName
== TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES
) {
1006 mach
->MaxOutputVertices
= parse
.FullToken
.FullProperty
.u
[0].Data
;
1015 tgsi_parse_free (&parse
);
1017 FREE(mach
->Declarations
);
1018 mach
->Declarations
= declarations
;
1019 mach
->NumDeclarations
= numDeclarations
;
1021 FREE(mach
->Instructions
);
1022 mach
->Instructions
= instructions
;
1023 mach
->NumInstructions
= numInstructions
;
1027 struct tgsi_exec_machine
*
1028 tgsi_exec_machine_create( void )
1030 struct tgsi_exec_machine
*mach
;
1033 mach
= align_malloc( sizeof *mach
, 16 );
1037 memset(mach
, 0, sizeof(*mach
));
1039 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
1040 mach
->MaxGeometryShaderOutputs
= TGSI_MAX_TOTAL_VERTICES
;
1041 mach
->Predicates
= &mach
->Temps
[TGSI_EXEC_TEMP_P0
];
1043 mach
->Inputs
= align_malloc(sizeof(struct tgsi_exec_vector
) * PIPE_MAX_SHADER_INPUTS
, 16);
1044 mach
->Outputs
= align_malloc(sizeof(struct tgsi_exec_vector
) * PIPE_MAX_SHADER_OUTPUTS
, 16);
1045 if (!mach
->Inputs
|| !mach
->Outputs
)
1048 /* Setup constants needed by the SSE2 executor. */
1049 for( i
= 0; i
< 4; i
++ ) {
1050 mach
->Temps
[TGSI_EXEC_TEMP_00000000_I
].xyzw
[TGSI_EXEC_TEMP_00000000_C
].u
[i
] = 0x00000000;
1051 mach
->Temps
[TGSI_EXEC_TEMP_7FFFFFFF_I
].xyzw
[TGSI_EXEC_TEMP_7FFFFFFF_C
].u
[i
] = 0x7FFFFFFF;
1052 mach
->Temps
[TGSI_EXEC_TEMP_80000000_I
].xyzw
[TGSI_EXEC_TEMP_80000000_C
].u
[i
] = 0x80000000;
1053 mach
->Temps
[TGSI_EXEC_TEMP_FFFFFFFF_I
].xyzw
[TGSI_EXEC_TEMP_FFFFFFFF_C
].u
[i
] = 0xFFFFFFFF; /* not used */
1054 mach
->Temps
[TGSI_EXEC_TEMP_ONE_I
].xyzw
[TGSI_EXEC_TEMP_ONE_C
].f
[i
] = 1.0f
;
1055 mach
->Temps
[TGSI_EXEC_TEMP_TWO_I
].xyzw
[TGSI_EXEC_TEMP_TWO_C
].f
[i
] = 2.0f
; /* not used */
1056 mach
->Temps
[TGSI_EXEC_TEMP_128_I
].xyzw
[TGSI_EXEC_TEMP_128_C
].f
[i
] = 128.0f
;
1057 mach
->Temps
[TGSI_EXEC_TEMP_MINUS_128_I
].xyzw
[TGSI_EXEC_TEMP_MINUS_128_C
].f
[i
] = -128.0f
;
1058 mach
->Temps
[TGSI_EXEC_TEMP_THREE_I
].xyzw
[TGSI_EXEC_TEMP_THREE_C
].f
[i
] = 3.0f
;
1059 mach
->Temps
[TGSI_EXEC_TEMP_HALF_I
].xyzw
[TGSI_EXEC_TEMP_HALF_C
].f
[i
] = 0.5f
;
1063 /* silence warnings */
1072 align_free(mach
->Inputs
);
1073 align_free(mach
->Outputs
);
1081 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
)
1084 FREE(mach
->Instructions
);
1085 FREE(mach
->Declarations
);
1087 align_free(mach
->Inputs
);
1088 align_free(mach
->Outputs
);
1095 micro_add(union tgsi_exec_channel
*dst
,
1096 const union tgsi_exec_channel
*src0
,
1097 const union tgsi_exec_channel
*src1
)
1099 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
1100 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
1101 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
1102 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
1107 union tgsi_exec_channel
*dst
,
1108 const union tgsi_exec_channel
*src0
,
1109 const union tgsi_exec_channel
*src1
)
1111 if (src1
->f
[0] != 0) {
1112 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
1114 if (src1
->f
[1] != 0) {
1115 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
1117 if (src1
->f
[2] != 0) {
1118 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
1120 if (src1
->f
[3] != 0) {
1121 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
1127 union tgsi_exec_channel
*dst
,
1128 const union tgsi_exec_channel
*src0
,
1129 const union tgsi_exec_channel
*src1
,
1130 const union tgsi_exec_channel
*src2
,
1131 const union tgsi_exec_channel
*src3
)
1133 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
1134 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
1135 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
1136 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
1140 micro_max(union tgsi_exec_channel
*dst
,
1141 const union tgsi_exec_channel
*src0
,
1142 const union tgsi_exec_channel
*src1
)
1144 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
1145 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
1146 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
1147 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
1151 micro_min(union tgsi_exec_channel
*dst
,
1152 const union tgsi_exec_channel
*src0
,
1153 const union tgsi_exec_channel
*src1
)
1155 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
1156 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
1157 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
1158 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
1162 micro_mul(union tgsi_exec_channel
*dst
,
1163 const union tgsi_exec_channel
*src0
,
1164 const union tgsi_exec_channel
*src1
)
1166 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
1167 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
1168 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
1169 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
1174 union tgsi_exec_channel
*dst
,
1175 const union tgsi_exec_channel
*src
)
1177 dst
->f
[0] = -src
->f
[0];
1178 dst
->f
[1] = -src
->f
[1];
1179 dst
->f
[2] = -src
->f
[2];
1180 dst
->f
[3] = -src
->f
[3];
1185 union tgsi_exec_channel
*dst
,
1186 const union tgsi_exec_channel
*src0
,
1187 const union tgsi_exec_channel
*src1
)
1190 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
1191 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
1192 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
1193 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
1195 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
1196 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
1197 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
1198 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
1203 micro_sub(union tgsi_exec_channel
*dst
,
1204 const union tgsi_exec_channel
*src0
,
1205 const union tgsi_exec_channel
*src1
)
1207 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
1208 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
1209 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
1210 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
1214 fetch_src_file_channel(const struct tgsi_exec_machine
*mach
,
1215 const uint chan_index
,
1218 const union tgsi_exec_channel
*index
,
1219 const union tgsi_exec_channel
*index2D
,
1220 union tgsi_exec_channel
*chan
)
1224 assert(swizzle
< 4);
1227 case TGSI_FILE_CONSTANT
:
1228 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1229 assert(index2D
->i
[i
] >= 0 && index2D
->i
[i
] < PIPE_MAX_CONSTANT_BUFFERS
);
1230 assert(mach
->Consts
[index2D
->i
[i
]]);
1232 if (index
->i
[i
] < 0) {
1235 /* NOTE: copying the const value as a uint instead of float */
1236 const uint constbuf
= index2D
->i
[i
];
1237 const uint
*buf
= (const uint
*)mach
->Consts
[constbuf
];
1238 const int pos
= index
->i
[i
] * 4 + swizzle
;
1239 /* const buffer bounds check */
1240 if (pos
< 0 || pos
>= (int) mach
->ConstsSize
[constbuf
]) {
1242 /* Debug: print warning */
1243 static int count
= 0;
1245 debug_printf("TGSI Exec: const buffer index %d"
1246 " out of bounds\n", pos
);
1251 chan
->u
[i
] = buf
[pos
];
1256 case TGSI_FILE_INPUT
:
1257 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1259 if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
1260 debug_printf("Fetching Input[%d] (2d=%d, 1d=%d)\n",
1261 index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i],
1262 index2D->i[i], index->i[i]);
1264 int pos
= index2D
->i
[i
] * TGSI_EXEC_MAX_INPUT_ATTRIBS
+ index
->i
[i
];
1266 assert(pos
< TGSI_MAX_PRIM_VERTICES
* PIPE_MAX_ATTRIBS
);
1267 chan
->u
[i
] = mach
->Inputs
[pos
].xyzw
[swizzle
].u
[i
];
1271 case TGSI_FILE_SYSTEM_VALUE
:
1272 /* XXX no swizzling at this point. Will be needed if we put
1273 * gl_FragCoord, for example, in a sys value register.
1275 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1276 chan
->u
[i
] = mach
->SystemValue
[index
->i
[i
]].u
[i
];
1280 case TGSI_FILE_TEMPORARY
:
1281 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1282 assert(index
->i
[i
] < TGSI_EXEC_NUM_TEMPS
);
1283 assert(index2D
->i
[i
] == 0);
1285 chan
->u
[i
] = mach
->Temps
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1289 case TGSI_FILE_IMMEDIATE
:
1290 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1291 assert(index
->i
[i
] >= 0 && index
->i
[i
] < (int)mach
->ImmLimit
);
1292 assert(index2D
->i
[i
] == 0);
1294 chan
->f
[i
] = mach
->Imms
[index
->i
[i
]][swizzle
];
1298 case TGSI_FILE_ADDRESS
:
1299 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1300 assert(index
->i
[i
] >= 0);
1301 assert(index2D
->i
[i
] == 0);
1303 chan
->u
[i
] = mach
->Addrs
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1307 case TGSI_FILE_PREDICATE
:
1308 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1309 assert(index
->i
[i
] >= 0 && index
->i
[i
] < TGSI_EXEC_NUM_PREDS
);
1310 assert(index2D
->i
[i
] == 0);
1312 chan
->u
[i
] = mach
->Predicates
[0].xyzw
[swizzle
].u
[i
];
1316 case TGSI_FILE_OUTPUT
:
1317 /* vertex/fragment output vars can be read too */
1318 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1319 assert(index
->i
[i
] >= 0);
1320 assert(index2D
->i
[i
] == 0);
1322 chan
->u
[i
] = mach
->Outputs
[index
->i
[i
]].xyzw
[swizzle
].u
[i
];
1328 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1335 fetch_source_d(const struct tgsi_exec_machine
*mach
,
1336 union tgsi_exec_channel
*chan
,
1337 const struct tgsi_full_src_register
*reg
,
1338 const uint chan_index
,
1339 enum tgsi_exec_datatype src_datatype
)
1341 union tgsi_exec_channel index
;
1342 union tgsi_exec_channel index2D
;
1345 /* We start with a direct index into a register file.
1349 * file = Register.File
1350 * [1] = Register.Index
1355 index
.i
[3] = reg
->Register
.Index
;
1357 /* There is an extra source register that indirectly subscripts
1358 * a register file. The direct index now becomes an offset
1359 * that is being added to the indirect register.
1363 * ind = Indirect.File
1364 * [2] = Indirect.Index
1365 * .x = Indirect.SwizzleX
1367 if (reg
->Register
.Indirect
) {
1368 union tgsi_exec_channel index2
;
1369 union tgsi_exec_channel indir_index
;
1370 const uint execmask
= mach
->ExecMask
;
1373 /* which address register (always zero now) */
1377 index2
.i
[3] = reg
->Indirect
.Index
;
1378 /* get current value of address register[swizzle] */
1379 swizzle
= reg
->Indirect
.Swizzle
;
1380 fetch_src_file_channel(mach
,
1388 /* add value of address register to the offset */
1389 index
.i
[0] += indir_index
.i
[0];
1390 index
.i
[1] += indir_index
.i
[1];
1391 index
.i
[2] += indir_index
.i
[2];
1392 index
.i
[3] += indir_index
.i
[3];
1394 /* for disabled execution channels, zero-out the index to
1395 * avoid using a potential garbage value.
1397 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1398 if ((execmask
& (1 << i
)) == 0)
1403 /* There is an extra source register that is a second
1404 * subscript to a register file. Effectively it means that
1405 * the register file is actually a 2D array of registers.
1409 * [3] = Dimension.Index
1411 if (reg
->Register
.Dimension
) {
1415 index2D
.i
[3] = reg
->Dimension
.Index
;
1417 /* Again, the second subscript index can be addressed indirectly
1418 * identically to the first one.
1419 * Nothing stops us from indirectly addressing the indirect register,
1420 * but there is no need for that, so we won't exercise it.
1422 * file[ind[4].y+3][1],
1424 * ind = DimIndirect.File
1425 * [4] = DimIndirect.Index
1426 * .y = DimIndirect.SwizzleX
1428 if (reg
->Dimension
.Indirect
) {
1429 union tgsi_exec_channel index2
;
1430 union tgsi_exec_channel indir_index
;
1431 const uint execmask
= mach
->ExecMask
;
1437 index2
.i
[3] = reg
->DimIndirect
.Index
;
1439 swizzle
= reg
->DimIndirect
.Swizzle
;
1440 fetch_src_file_channel(mach
,
1442 reg
->DimIndirect
.File
,
1448 index2D
.i
[0] += indir_index
.i
[0];
1449 index2D
.i
[1] += indir_index
.i
[1];
1450 index2D
.i
[2] += indir_index
.i
[2];
1451 index2D
.i
[3] += indir_index
.i
[3];
1453 /* for disabled execution channels, zero-out the index to
1454 * avoid using a potential garbage value.
1456 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1457 if ((execmask
& (1 << i
)) == 0) {
1463 /* If by any chance there was a need for a 3D array of register
1464 * files, we would have to check whether Dimension is followed
1465 * by a dimension register and continue the saga.
1474 swizzle
= tgsi_util_get_full_src_register_swizzle( reg
, chan_index
);
1475 fetch_src_file_channel(mach
,
1485 fetch_source(const struct tgsi_exec_machine
*mach
,
1486 union tgsi_exec_channel
*chan
,
1487 const struct tgsi_full_src_register
*reg
,
1488 const uint chan_index
,
1489 enum tgsi_exec_datatype src_datatype
)
1491 fetch_source_d(mach
, chan
, reg
, chan_index
, src_datatype
);
1493 if (reg
->Register
.Absolute
) {
1494 if (src_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1495 micro_abs(chan
, chan
);
1497 micro_iabs(chan
, chan
);
1501 if (reg
->Register
.Negate
) {
1502 if (src_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1503 micro_neg(chan
, chan
);
1505 micro_ineg(chan
, chan
);
1510 static union tgsi_exec_channel
*
1511 store_dest_dstret(struct tgsi_exec_machine
*mach
,
1512 const union tgsi_exec_channel
*chan
,
1513 const struct tgsi_full_dst_register
*reg
,
1514 const struct tgsi_full_instruction
*inst
,
1516 enum tgsi_exec_datatype dst_datatype
)
1519 static union tgsi_exec_channel null
;
1520 union tgsi_exec_channel
*dst
;
1521 union tgsi_exec_channel index2D
;
1522 uint execmask
= mach
->ExecMask
;
1523 int offset
= 0; /* indirection offset */
1527 if (0 && dst_datatype
== TGSI_EXEC_DATA_FLOAT
) {
1528 check_inf_or_nan(chan
);
1531 /* There is an extra source register that indirectly subscripts
1532 * a register file. The direct index now becomes an offset
1533 * that is being added to the indirect register.
1537 * ind = Indirect.File
1538 * [2] = Indirect.Index
1539 * .x = Indirect.SwizzleX
1541 if (reg
->Register
.Indirect
) {
1542 union tgsi_exec_channel index
;
1543 union tgsi_exec_channel indir_index
;
1546 /* which address register (always zero for now) */
1550 index
.i
[3] = reg
->Indirect
.Index
;
1552 /* get current value of address register[swizzle] */
1553 swizzle
= reg
->Indirect
.Swizzle
;
1555 /* fetch values from the address/indirection register */
1556 fetch_src_file_channel(mach
,
1564 /* save indirection offset */
1565 offset
= indir_index
.i
[0];
1568 /* There is an extra source register that is a second
1569 * subscript to a register file. Effectively it means that
1570 * the register file is actually a 2D array of registers.
1574 * [3] = Dimension.Index
1576 if (reg
->Register
.Dimension
) {
1580 index2D
.i
[3] = reg
->Dimension
.Index
;
1582 /* Again, the second subscript index can be addressed indirectly
1583 * identically to the first one.
1584 * Nothing stops us from indirectly addressing the indirect register,
1585 * but there is no need for that, so we won't exercise it.
1587 * file[ind[4].y+3][1],
1589 * ind = DimIndirect.File
1590 * [4] = DimIndirect.Index
1591 * .y = DimIndirect.SwizzleX
1593 if (reg
->Dimension
.Indirect
) {
1594 union tgsi_exec_channel index2
;
1595 union tgsi_exec_channel indir_index
;
1596 const uint execmask
= mach
->ExecMask
;
1603 index2
.i
[3] = reg
->DimIndirect
.Index
;
1605 swizzle
= reg
->DimIndirect
.Swizzle
;
1606 fetch_src_file_channel(mach
,
1608 reg
->DimIndirect
.File
,
1614 index2D
.i
[0] += indir_index
.i
[0];
1615 index2D
.i
[1] += indir_index
.i
[1];
1616 index2D
.i
[2] += indir_index
.i
[2];
1617 index2D
.i
[3] += indir_index
.i
[3];
1619 /* for disabled execution channels, zero-out the index to
1620 * avoid using a potential garbage value.
1622 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1623 if ((execmask
& (1 << i
)) == 0) {
1629 /* If by any chance there was a need for a 3D array of register
1630 * files, we would have to check whether Dimension is followed
1631 * by a dimension register and continue the saga.
1640 switch (reg
->Register
.File
) {
1641 case TGSI_FILE_NULL
:
1645 case TGSI_FILE_OUTPUT
:
1646 index
= mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1647 + reg
->Register
.Index
;
1648 dst
= &mach
->Outputs
[offset
+ index
].xyzw
[chan_index
];
1650 debug_printf("NumOutputs = %d, TEMP_O_C/I = %d, redindex = %d\n",
1651 mach
->NumOutputs
, mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0],
1652 reg
->Register
.Index
);
1653 if (TGSI_PROCESSOR_GEOMETRY
== mach
->Processor
) {
1654 debug_printf("STORING OUT[%d] mask(%d), = (", offset
+ index
, execmask
);
1655 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++)
1656 if (execmask
& (1 << i
))
1657 debug_printf("%f, ", chan
->f
[i
]);
1658 debug_printf(")\n");
1663 case TGSI_FILE_TEMPORARY
:
1664 index
= reg
->Register
.Index
;
1665 assert( index
< TGSI_EXEC_NUM_TEMPS
);
1666 dst
= &mach
->Temps
[offset
+ index
].xyzw
[chan_index
];
1669 case TGSI_FILE_ADDRESS
:
1670 index
= reg
->Register
.Index
;
1671 dst
= &mach
->Addrs
[index
].xyzw
[chan_index
];
1674 case TGSI_FILE_PREDICATE
:
1675 index
= reg
->Register
.Index
;
1676 assert(index
< TGSI_EXEC_NUM_PREDS
);
1677 dst
= &mach
->Predicates
[index
].xyzw
[chan_index
];
1685 if (inst
->Instruction
.Predicate
) {
1687 union tgsi_exec_channel
*pred
;
1689 switch (chan_index
) {
1691 swizzle
= inst
->Predicate
.SwizzleX
;
1694 swizzle
= inst
->Predicate
.SwizzleY
;
1697 swizzle
= inst
->Predicate
.SwizzleZ
;
1700 swizzle
= inst
->Predicate
.SwizzleW
;
1707 assert(inst
->Predicate
.Index
== 0);
1709 pred
= &mach
->Predicates
[inst
->Predicate
.Index
].xyzw
[swizzle
];
1711 if (inst
->Predicate
.Negate
) {
1712 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1714 execmask
&= ~(1 << i
);
1718 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
1720 execmask
&= ~(1 << i
);
1730 store_dest_double(struct tgsi_exec_machine
*mach
,
1731 const union tgsi_exec_channel
*chan
,
1732 const struct tgsi_full_dst_register
*reg
,
1733 const struct tgsi_full_instruction
*inst
,
1735 enum tgsi_exec_datatype dst_datatype
)
1737 union tgsi_exec_channel
*dst
;
1738 const uint execmask
= mach
->ExecMask
;
1741 dst
= store_dest_dstret(mach
, chan
, reg
, inst
, chan_index
,
1747 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++)
1748 if (execmask
& (1 << i
))
1749 dst
->i
[i
] = chan
->i
[i
];
1753 store_dest(struct tgsi_exec_machine
*mach
,
1754 const union tgsi_exec_channel
*chan
,
1755 const struct tgsi_full_dst_register
*reg
,
1756 const struct tgsi_full_instruction
*inst
,
1758 enum tgsi_exec_datatype dst_datatype
)
1760 union tgsi_exec_channel
*dst
;
1761 const uint execmask
= mach
->ExecMask
;
1764 dst
= store_dest_dstret(mach
, chan
, reg
, inst
, chan_index
,
1769 if (!inst
->Instruction
.Saturate
) {
1770 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++)
1771 if (execmask
& (1 << i
))
1772 dst
->i
[i
] = chan
->i
[i
];
1775 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++)
1776 if (execmask
& (1 << i
)) {
1777 if (chan
->f
[i
] < 0.0f
)
1779 else if (chan
->f
[i
] > 1.0f
)
1782 dst
->i
[i
] = chan
->i
[i
];
1787 #define FETCH(VAL,INDEX,CHAN)\
1788 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1790 #define IFETCH(VAL,INDEX,CHAN)\
1791 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_INT)
1795 * Execute ARB-style KIL which is predicated by a src register.
1796 * Kill fragment if any of the four values is less than zero.
1799 exec_kill_if(struct tgsi_exec_machine
*mach
,
1800 const struct tgsi_full_instruction
*inst
)
1804 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1805 union tgsi_exec_channel r
[1];
1807 /* This mask stores component bits that were already tested. */
1810 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1815 /* unswizzle channel */
1816 swizzle
= tgsi_util_get_full_src_register_swizzle (
1820 /* check if the component has not been already tested */
1821 if (uniquemask
& (1 << swizzle
))
1823 uniquemask
|= 1 << swizzle
;
1825 FETCH(&r
[0], 0, chan_index
);
1826 for (i
= 0; i
< 4; i
++)
1827 if (r
[0].f
[i
] < 0.0f
)
1831 /* restrict to fragments currently executing */
1832 kilmask
&= mach
->ExecMask
;
1834 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1838 * Unconditional fragment kill/discard.
1841 exec_kill(struct tgsi_exec_machine
*mach
,
1842 const struct tgsi_full_instruction
*inst
)
1844 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1846 /* kill fragment for all fragments currently executing */
1847 kilmask
= mach
->ExecMask
;
1848 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1852 emit_vertex(struct tgsi_exec_machine
*mach
)
1854 /* FIXME: check for exec mask correctly
1856 for (i = 0; i < TGSI_QUAD_SIZE; ++i) {
1857 if ((mach->ExecMask & (1 << i)))
1859 if (mach
->ExecMask
) {
1860 if (mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]] >= mach
->MaxOutputVertices
)
1863 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += mach
->NumOutputs
;
1864 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
1869 emit_primitive(struct tgsi_exec_machine
*mach
)
1871 unsigned *prim_count
= &mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0];
1872 /* FIXME: check for exec mask correctly
1874 for (i = 0; i < TGSI_QUAD_SIZE; ++i) {
1875 if ((mach->ExecMask & (1 << i)))
1877 if (mach
->ExecMask
) {
1879 debug_assert((*prim_count
* mach
->NumOutputs
) < mach
->MaxGeometryShaderOutputs
);
1880 mach
->Primitives
[*prim_count
] = 0;
1885 conditional_emit_primitive(struct tgsi_exec_machine
*mach
)
1887 if (TGSI_PROCESSOR_GEOMETRY
== mach
->Processor
) {
1889 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]];
1890 if (emitted_verts
) {
1891 emit_primitive(mach
);
1898 * Fetch four texture samples using STR texture coordinates.
1901 fetch_texel( struct tgsi_sampler
*sampler
,
1902 const unsigned sview_idx
,
1903 const unsigned sampler_idx
,
1904 const union tgsi_exec_channel
*s
,
1905 const union tgsi_exec_channel
*t
,
1906 const union tgsi_exec_channel
*p
,
1907 const union tgsi_exec_channel
*c0
,
1908 const union tgsi_exec_channel
*c1
,
1909 float derivs
[3][2][TGSI_QUAD_SIZE
],
1910 const int8_t offset
[3],
1911 enum tgsi_sampler_control control
,
1912 union tgsi_exec_channel
*r
,
1913 union tgsi_exec_channel
*g
,
1914 union tgsi_exec_channel
*b
,
1915 union tgsi_exec_channel
*a
)
1918 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
];
1920 /* FIXME: handle explicit derivs, offsets */
1921 sampler
->get_samples(sampler
, sview_idx
, sampler_idx
,
1922 s
->f
, t
->f
, p
->f
, c0
->f
, c1
->f
, derivs
, offset
, control
, rgba
);
1924 for (j
= 0; j
< 4; j
++) {
1925 r
->f
[j
] = rgba
[0][j
];
1926 g
->f
[j
] = rgba
[1][j
];
1927 b
->f
[j
] = rgba
[2][j
];
1928 a
->f
[j
] = rgba
[3][j
];
1933 #define TEX_MODIFIER_NONE 0
1934 #define TEX_MODIFIER_PROJECTED 1
1935 #define TEX_MODIFIER_LOD_BIAS 2
1936 #define TEX_MODIFIER_EXPLICIT_LOD 3
1937 #define TEX_MODIFIER_LEVEL_ZERO 4
1938 #define TEX_MODIFIER_GATHER 5
1941 * Fetch all 3 (for s,t,r coords) texel offsets, put them into int array.
1944 fetch_texel_offsets(struct tgsi_exec_machine
*mach
,
1945 const struct tgsi_full_instruction
*inst
,
1948 if (inst
->Texture
.NumOffsets
== 1) {
1949 union tgsi_exec_channel index
;
1950 union tgsi_exec_channel offset
[3];
1951 index
.i
[0] = index
.i
[1] = index
.i
[2] = index
.i
[3] = inst
->TexOffsets
[0].Index
;
1952 fetch_src_file_channel(mach
, 0, inst
->TexOffsets
[0].File
,
1953 inst
->TexOffsets
[0].SwizzleX
, &index
, &ZeroVec
, &offset
[0]);
1954 fetch_src_file_channel(mach
, 0, inst
->TexOffsets
[0].File
,
1955 inst
->TexOffsets
[0].SwizzleY
, &index
, &ZeroVec
, &offset
[1]);
1956 fetch_src_file_channel(mach
, 0, inst
->TexOffsets
[0].File
,
1957 inst
->TexOffsets
[0].SwizzleZ
, &index
, &ZeroVec
, &offset
[2]);
1958 offsets
[0] = offset
[0].i
[0];
1959 offsets
[1] = offset
[1].i
[0];
1960 offsets
[2] = offset
[2].i
[0];
1962 assert(inst
->Texture
.NumOffsets
== 0);
1963 offsets
[0] = offsets
[1] = offsets
[2] = 0;
1969 * Fetch dx and dy values for one channel (s, t or r).
1970 * Put dx values into one float array, dy values into another.
1973 fetch_assign_deriv_channel(struct tgsi_exec_machine
*mach
,
1974 const struct tgsi_full_instruction
*inst
,
1977 float derivs
[2][TGSI_QUAD_SIZE
])
1979 union tgsi_exec_channel d
;
1980 FETCH(&d
, regdsrcx
, chan
);
1981 derivs
[0][0] = d
.f
[0];
1982 derivs
[0][1] = d
.f
[1];
1983 derivs
[0][2] = d
.f
[2];
1984 derivs
[0][3] = d
.f
[3];
1985 FETCH(&d
, regdsrcx
+ 1, chan
);
1986 derivs
[1][0] = d
.f
[0];
1987 derivs
[1][1] = d
.f
[1];
1988 derivs
[1][2] = d
.f
[2];
1989 derivs
[1][3] = d
.f
[3];
1993 fetch_sampler_unit(struct tgsi_exec_machine
*mach
,
1994 const struct tgsi_full_instruction
*inst
,
1999 if (inst
->Src
[sampler
].Register
.Indirect
) {
2000 const struct tgsi_full_src_register
*reg
= &inst
->Src
[sampler
];
2001 union tgsi_exec_channel indir_index
, index2
;
2006 index2
.i
[3] = reg
->Indirect
.Index
;
2008 fetch_src_file_channel(mach
,
2011 reg
->Indirect
.Swizzle
,
2015 unit
= inst
->Src
[sampler
].Register
.Index
+ indir_index
.i
[0];
2017 unit
= inst
->Src
[sampler
].Register
.Index
;
2023 * execute a texture instruction.
2025 * modifier is used to control the channel routing for the
2026 * instruction variants like proj, lod, and texture with lod bias.
2027 * sampler indicates which src register the sampler is contained in.
2030 exec_tex(struct tgsi_exec_machine
*mach
,
2031 const struct tgsi_full_instruction
*inst
,
2032 uint modifier
, uint sampler
)
2034 const union tgsi_exec_channel
*args
[5], *proj
= NULL
;
2035 union tgsi_exec_channel r
[5];
2036 enum tgsi_sampler_control control
= TGSI_SAMPLER_LOD_NONE
;
2040 int dim
, shadow_ref
, i
;
2042 unit
= fetch_sampler_unit(mach
, inst
, sampler
);
2043 /* always fetch all 3 offsets, overkill but keeps code simple */
2044 fetch_texel_offsets(mach
, inst
, offsets
);
2046 assert(modifier
!= TEX_MODIFIER_LEVEL_ZERO
);
2047 assert(inst
->Texture
.Texture
!= TGSI_TEXTURE_BUFFER
);
2049 dim
= tgsi_util_get_texture_coord_dim(inst
->Texture
.Texture
, &shadow_ref
);
2052 if (shadow_ref
>= 0)
2053 assert(shadow_ref
>= dim
&& shadow_ref
< Elements(args
));
2055 /* fetch modifier to the last argument */
2056 if (modifier
!= TEX_MODIFIER_NONE
) {
2057 const int last
= Elements(args
) - 1;
2059 /* fetch modifier from src0.w or src1.x */
2061 assert(dim
<= TGSI_CHAN_W
&& shadow_ref
!= TGSI_CHAN_W
);
2062 FETCH(&r
[last
], 0, TGSI_CHAN_W
);
2065 assert(shadow_ref
!= 4);
2066 FETCH(&r
[last
], 1, TGSI_CHAN_X
);
2069 if (modifier
!= TEX_MODIFIER_PROJECTED
) {
2070 args
[last
] = &r
[last
];
2074 args
[last
] = &ZeroVec
;
2077 /* point unused arguments to zero vector */
2078 for (i
= dim
; i
< last
; i
++)
2081 if (modifier
== TEX_MODIFIER_EXPLICIT_LOD
)
2082 control
= TGSI_SAMPLER_LOD_EXPLICIT
;
2083 else if (modifier
== TEX_MODIFIER_LOD_BIAS
)
2084 control
= TGSI_SAMPLER_LOD_BIAS
;
2085 else if (modifier
== TEX_MODIFIER_GATHER
)
2086 control
= TGSI_SAMPLER_GATHER
;
2089 for (i
= dim
; i
< Elements(args
); i
++)
2093 /* fetch coordinates */
2094 for (i
= 0; i
< dim
; i
++) {
2095 FETCH(&r
[i
], 0, TGSI_CHAN_X
+ i
);
2098 micro_div(&r
[i
], &r
[i
], proj
);
2103 /* fetch reference value */
2104 if (shadow_ref
>= 0) {
2105 FETCH(&r
[shadow_ref
], shadow_ref
/ 4, TGSI_CHAN_X
+ (shadow_ref
% 4));
2108 micro_div(&r
[shadow_ref
], &r
[shadow_ref
], proj
);
2110 args
[shadow_ref
] = &r
[shadow_ref
];
2113 fetch_texel(mach
->Sampler
, unit
, unit
,
2114 args
[0], args
[1], args
[2], args
[3], args
[4],
2115 NULL
, offsets
, control
,
2116 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2119 debug_printf("fetch r: %g %g %g %g\n",
2120 r
[0].f
[0], r
[0].f
[1], r
[0].f
[2], r
[0].f
[3]);
2121 debug_printf("fetch g: %g %g %g %g\n",
2122 r
[1].f
[0], r
[1].f
[1], r
[1].f
[2], r
[1].f
[3]);
2123 debug_printf("fetch b: %g %g %g %g\n",
2124 r
[2].f
[0], r
[2].f
[1], r
[2].f
[2], r
[2].f
[3]);
2125 debug_printf("fetch a: %g %g %g %g\n",
2126 r
[3].f
[0], r
[3].f
[1], r
[3].f
[2], r
[3].f
[3]);
2129 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2130 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2131 store_dest(mach
, &r
[chan
], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2137 exec_lodq(struct tgsi_exec_machine
*mach
,
2138 const struct tgsi_full_instruction
*inst
)
2143 union tgsi_exec_channel coords
[4];
2144 const union tgsi_exec_channel
*args
[Elements(coords
)];
2145 union tgsi_exec_channel r
[2];
2147 unit
= fetch_sampler_unit(mach
, inst
, 1);
2148 dim
= tgsi_util_get_texture_coord_dim(inst
->Texture
.Texture
, NULL
);
2149 assert(dim
<= Elements(coords
));
2150 /* fetch coordinates */
2151 for (i
= 0; i
< dim
; i
++) {
2152 FETCH(&coords
[i
], 0, TGSI_CHAN_X
+ i
);
2153 args
[i
] = &coords
[i
];
2155 for (i
= dim
; i
< Elements(coords
); i
++) {
2158 mach
->Sampler
->query_lod(mach
->Sampler
, unit
, unit
,
2163 TGSI_SAMPLER_LOD_NONE
,
2167 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
2168 store_dest(mach
, &r
[0], &inst
->Dst
[0], inst
, TGSI_CHAN_X
,
2169 TGSI_EXEC_DATA_FLOAT
);
2171 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
2172 store_dest(mach
, &r
[1], &inst
->Dst
[0], inst
, TGSI_CHAN_Y
,
2173 TGSI_EXEC_DATA_FLOAT
);
2178 exec_txd(struct tgsi_exec_machine
*mach
,
2179 const struct tgsi_full_instruction
*inst
)
2181 union tgsi_exec_channel r
[4];
2182 float derivs
[3][2][TGSI_QUAD_SIZE
];
2187 unit
= fetch_sampler_unit(mach
, inst
, 3);
2188 /* always fetch all 3 offsets, overkill but keeps code simple */
2189 fetch_texel_offsets(mach
, inst
, offsets
);
2191 switch (inst
->Texture
.Texture
) {
2192 case TGSI_TEXTURE_1D
:
2193 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2195 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_X
, derivs
[0]);
2197 fetch_texel(mach
->Sampler
, unit
, unit
,
2198 &r
[0], &ZeroVec
, &ZeroVec
, &ZeroVec
, &ZeroVec
, /* S, T, P, C, LOD */
2199 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2200 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2203 case TGSI_TEXTURE_SHADOW1D
:
2204 case TGSI_TEXTURE_1D_ARRAY
:
2205 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
2206 /* SHADOW1D/1D_ARRAY would not need Y/Z respectively, but don't bother */
2207 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2208 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2209 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2211 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_X
, derivs
[0]);
2213 fetch_texel(mach
->Sampler
, unit
, unit
,
2214 &r
[0], &r
[1], &r
[2], &ZeroVec
, &ZeroVec
, /* S, T, P, C, LOD */
2215 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2216 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2219 case TGSI_TEXTURE_2D
:
2220 case TGSI_TEXTURE_RECT
:
2221 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2222 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2224 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_X
, derivs
[0]);
2225 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_Y
, derivs
[1]);
2227 fetch_texel(mach
->Sampler
, unit
, unit
,
2228 &r
[0], &r
[1], &ZeroVec
, &ZeroVec
, &ZeroVec
, /* S, T, P, C, LOD */
2229 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2230 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2234 case TGSI_TEXTURE_SHADOW2D
:
2235 case TGSI_TEXTURE_SHADOWRECT
:
2236 case TGSI_TEXTURE_2D_ARRAY
:
2237 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
2238 /* only SHADOW2D_ARRAY actually needs W */
2239 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2240 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2241 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2242 FETCH(&r
[3], 0, TGSI_CHAN_W
);
2244 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_X
, derivs
[0]);
2245 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_Y
, derivs
[1]);
2247 fetch_texel(mach
->Sampler
, unit
, unit
,
2248 &r
[0], &r
[1], &r
[2], &r
[3], &ZeroVec
, /* inputs */
2249 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2250 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
2253 case TGSI_TEXTURE_3D
:
2254 case TGSI_TEXTURE_CUBE
:
2255 case TGSI_TEXTURE_CUBE_ARRAY
:
2256 case TGSI_TEXTURE_SHADOWCUBE
:
2257 /* only TEXTURE_CUBE_ARRAY and TEXTURE_SHADOWCUBE actually need W */
2258 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2259 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2260 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2261 FETCH(&r
[3], 0, TGSI_CHAN_W
);
2263 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_X
, derivs
[0]);
2264 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_Y
, derivs
[1]);
2265 fetch_assign_deriv_channel(mach
, inst
, 1, TGSI_CHAN_Z
, derivs
[2]);
2267 fetch_texel(mach
->Sampler
, unit
, unit
,
2268 &r
[0], &r
[1], &r
[2], &r
[3], &ZeroVec
, /* inputs */
2269 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2270 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
2277 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2278 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2279 store_dest(mach
, &r
[chan
], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2286 exec_txf(struct tgsi_exec_machine
*mach
,
2287 const struct tgsi_full_instruction
*inst
)
2289 union tgsi_exec_channel r
[4];
2292 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
];
2297 unit
= fetch_sampler_unit(mach
, inst
, 1);
2298 /* always fetch all 3 offsets, overkill but keeps code simple */
2299 fetch_texel_offsets(mach
, inst
, offsets
);
2301 IFETCH(&r
[3], 0, TGSI_CHAN_W
);
2303 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_SAMPLE_I
) {
2304 target
= mach
->SamplerViews
[unit
].Resource
;
2307 target
= inst
->Texture
.Texture
;
2310 case TGSI_TEXTURE_3D
:
2311 case TGSI_TEXTURE_2D_ARRAY
:
2312 case TGSI_TEXTURE_SHADOW2D_ARRAY
:
2313 case TGSI_TEXTURE_2D_ARRAY_MSAA
:
2314 IFETCH(&r
[2], 0, TGSI_CHAN_Z
);
2316 case TGSI_TEXTURE_2D
:
2317 case TGSI_TEXTURE_RECT
:
2318 case TGSI_TEXTURE_SHADOW1D_ARRAY
:
2319 case TGSI_TEXTURE_SHADOW2D
:
2320 case TGSI_TEXTURE_SHADOWRECT
:
2321 case TGSI_TEXTURE_1D_ARRAY
:
2322 case TGSI_TEXTURE_2D_MSAA
:
2323 IFETCH(&r
[1], 0, TGSI_CHAN_Y
);
2325 case TGSI_TEXTURE_BUFFER
:
2326 case TGSI_TEXTURE_1D
:
2327 case TGSI_TEXTURE_SHADOW1D
:
2328 IFETCH(&r
[0], 0, TGSI_CHAN_X
);
2335 mach
->Sampler
->get_texel(mach
->Sampler
, unit
, r
[0].i
, r
[1].i
, r
[2].i
, r
[3].i
,
2338 for (j
= 0; j
< TGSI_QUAD_SIZE
; j
++) {
2339 r
[0].f
[j
] = rgba
[0][j
];
2340 r
[1].f
[j
] = rgba
[1][j
];
2341 r
[2].f
[j
] = rgba
[2][j
];
2342 r
[3].f
[j
] = rgba
[3][j
];
2345 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_SAMPLE_I
) {
2346 unsigned char swizzles
[4];
2347 swizzles
[0] = inst
->Src
[1].Register
.SwizzleX
;
2348 swizzles
[1] = inst
->Src
[1].Register
.SwizzleY
;
2349 swizzles
[2] = inst
->Src
[1].Register
.SwizzleZ
;
2350 swizzles
[3] = inst
->Src
[1].Register
.SwizzleW
;
2352 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2353 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2354 store_dest(mach
, &r
[swizzles
[chan
]],
2355 &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2360 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2361 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2362 store_dest(mach
, &r
[chan
], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2369 exec_txq(struct tgsi_exec_machine
*mach
,
2370 const struct tgsi_full_instruction
*inst
)
2373 union tgsi_exec_channel r
[4], src
;
2378 unit
= fetch_sampler_unit(mach
, inst
, 1);
2380 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_INT
);
2382 /* XXX: This interface can't return per-pixel values */
2383 mach
->Sampler
->get_dims(mach
->Sampler
, unit
, src
.i
[0], result
);
2385 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
2386 for (j
= 0; j
< 4; j
++) {
2387 r
[j
].i
[i
] = result
[j
];
2391 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2392 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2393 store_dest(mach
, &r
[chan
], &inst
->Dst
[0], inst
, chan
,
2394 TGSI_EXEC_DATA_INT
);
2400 exec_sample(struct tgsi_exec_machine
*mach
,
2401 const struct tgsi_full_instruction
*inst
,
2402 uint modifier
, boolean compare
)
2404 const uint resource_unit
= inst
->Src
[1].Register
.Index
;
2405 const uint sampler_unit
= inst
->Src
[2].Register
.Index
;
2406 union tgsi_exec_channel r
[5], c1
;
2407 const union tgsi_exec_channel
*lod
= &ZeroVec
;
2408 enum tgsi_sampler_control control
= TGSI_SAMPLER_LOD_NONE
;
2410 unsigned char swizzles
[4];
2413 /* always fetch all 3 offsets, overkill but keeps code simple */
2414 fetch_texel_offsets(mach
, inst
, offsets
);
2416 assert(modifier
!= TEX_MODIFIER_PROJECTED
);
2418 if (modifier
!= TEX_MODIFIER_NONE
) {
2419 if (modifier
== TEX_MODIFIER_LOD_BIAS
) {
2420 FETCH(&c1
, 3, TGSI_CHAN_X
);
2422 control
= TGSI_SAMPLER_LOD_BIAS
;
2424 else if (modifier
== TEX_MODIFIER_EXPLICIT_LOD
) {
2425 FETCH(&c1
, 3, TGSI_CHAN_X
);
2427 control
= TGSI_SAMPLER_LOD_EXPLICIT
;
2430 assert(modifier
== TEX_MODIFIER_LEVEL_ZERO
);
2431 control
= TGSI_SAMPLER_LOD_ZERO
;
2435 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2437 switch (mach
->SamplerViews
[resource_unit
].Resource
) {
2438 case TGSI_TEXTURE_1D
:
2440 FETCH(&r
[2], 3, TGSI_CHAN_X
);
2441 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2442 &r
[0], &ZeroVec
, &r
[2], &ZeroVec
, lod
, /* S, T, P, C, LOD */
2443 NULL
, offsets
, control
,
2444 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2447 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2448 &r
[0], &ZeroVec
, &ZeroVec
, &ZeroVec
, lod
, /* S, T, P, C, LOD */
2449 NULL
, offsets
, control
,
2450 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2454 case TGSI_TEXTURE_1D_ARRAY
:
2455 case TGSI_TEXTURE_2D
:
2456 case TGSI_TEXTURE_RECT
:
2457 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2459 FETCH(&r
[2], 3, TGSI_CHAN_X
);
2460 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2461 &r
[0], &r
[1], &r
[2], &ZeroVec
, lod
, /* S, T, P, C, LOD */
2462 NULL
, offsets
, control
,
2463 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
2466 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2467 &r
[0], &r
[1], &ZeroVec
, &ZeroVec
, lod
, /* S, T, P, C, LOD */
2468 NULL
, offsets
, control
,
2469 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
2473 case TGSI_TEXTURE_2D_ARRAY
:
2474 case TGSI_TEXTURE_3D
:
2475 case TGSI_TEXTURE_CUBE
:
2476 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2477 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2479 FETCH(&r
[3], 3, TGSI_CHAN_X
);
2480 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2481 &r
[0], &r
[1], &r
[2], &r
[3], lod
,
2482 NULL
, offsets
, control
,
2483 &r
[0], &r
[1], &r
[2], &r
[3]);
2486 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2487 &r
[0], &r
[1], &r
[2], &ZeroVec
, lod
,
2488 NULL
, offsets
, control
,
2489 &r
[0], &r
[1], &r
[2], &r
[3]);
2493 case TGSI_TEXTURE_CUBE_ARRAY
:
2494 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2495 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2496 FETCH(&r
[3], 0, TGSI_CHAN_W
);
2498 FETCH(&r
[4], 3, TGSI_CHAN_X
);
2499 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2500 &r
[0], &r
[1], &r
[2], &r
[3], &r
[4],
2501 NULL
, offsets
, control
,
2502 &r
[0], &r
[1], &r
[2], &r
[3]);
2505 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2506 &r
[0], &r
[1], &r
[2], &r
[3], lod
,
2507 NULL
, offsets
, control
,
2508 &r
[0], &r
[1], &r
[2], &r
[3]);
2517 swizzles
[0] = inst
->Src
[1].Register
.SwizzleX
;
2518 swizzles
[1] = inst
->Src
[1].Register
.SwizzleY
;
2519 swizzles
[2] = inst
->Src
[1].Register
.SwizzleZ
;
2520 swizzles
[3] = inst
->Src
[1].Register
.SwizzleW
;
2522 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2523 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2524 store_dest(mach
, &r
[swizzles
[chan
]],
2525 &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2531 exec_sample_d(struct tgsi_exec_machine
*mach
,
2532 const struct tgsi_full_instruction
*inst
)
2534 const uint resource_unit
= inst
->Src
[1].Register
.Index
;
2535 const uint sampler_unit
= inst
->Src
[2].Register
.Index
;
2536 union tgsi_exec_channel r
[4];
2537 float derivs
[3][2][TGSI_QUAD_SIZE
];
2539 unsigned char swizzles
[4];
2542 /* always fetch all 3 offsets, overkill but keeps code simple */
2543 fetch_texel_offsets(mach
, inst
, offsets
);
2545 FETCH(&r
[0], 0, TGSI_CHAN_X
);
2547 switch (mach
->SamplerViews
[resource_unit
].Resource
) {
2548 case TGSI_TEXTURE_1D
:
2549 case TGSI_TEXTURE_1D_ARRAY
:
2550 /* only 1D array actually needs Y */
2551 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2553 fetch_assign_deriv_channel(mach
, inst
, 3, TGSI_CHAN_X
, derivs
[0]);
2555 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2556 &r
[0], &r
[1], &ZeroVec
, &ZeroVec
, &ZeroVec
, /* S, T, P, C, LOD */
2557 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2558 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
2561 case TGSI_TEXTURE_2D
:
2562 case TGSI_TEXTURE_RECT
:
2563 case TGSI_TEXTURE_2D_ARRAY
:
2564 /* only 2D array actually needs Z */
2565 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2566 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2568 fetch_assign_deriv_channel(mach
, inst
, 3, TGSI_CHAN_X
, derivs
[0]);
2569 fetch_assign_deriv_channel(mach
, inst
, 3, TGSI_CHAN_Y
, derivs
[1]);
2571 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2572 &r
[0], &r
[1], &r
[2], &ZeroVec
, &ZeroVec
, /* inputs */
2573 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2574 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
2577 case TGSI_TEXTURE_3D
:
2578 case TGSI_TEXTURE_CUBE
:
2579 case TGSI_TEXTURE_CUBE_ARRAY
:
2580 /* only cube array actually needs W */
2581 FETCH(&r
[1], 0, TGSI_CHAN_Y
);
2582 FETCH(&r
[2], 0, TGSI_CHAN_Z
);
2583 FETCH(&r
[3], 0, TGSI_CHAN_W
);
2585 fetch_assign_deriv_channel(mach
, inst
, 3, TGSI_CHAN_X
, derivs
[0]);
2586 fetch_assign_deriv_channel(mach
, inst
, 3, TGSI_CHAN_Y
, derivs
[1]);
2587 fetch_assign_deriv_channel(mach
, inst
, 3, TGSI_CHAN_Z
, derivs
[2]);
2589 fetch_texel(mach
->Sampler
, resource_unit
, sampler_unit
,
2590 &r
[0], &r
[1], &r
[2], &r
[3], &ZeroVec
,
2591 derivs
, offsets
, TGSI_SAMPLER_DERIVS_EXPLICIT
,
2592 &r
[0], &r
[1], &r
[2], &r
[3]);
2599 swizzles
[0] = inst
->Src
[1].Register
.SwizzleX
;
2600 swizzles
[1] = inst
->Src
[1].Register
.SwizzleY
;
2601 swizzles
[2] = inst
->Src
[1].Register
.SwizzleZ
;
2602 swizzles
[3] = inst
->Src
[1].Register
.SwizzleW
;
2604 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2605 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2606 store_dest(mach
, &r
[swizzles
[chan
]],
2607 &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2614 * Evaluate a constant-valued coefficient at the position of the
2619 struct tgsi_exec_machine
*mach
,
2625 for( i
= 0; i
< TGSI_QUAD_SIZE
; i
++ ) {
2626 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
2631 * Evaluate a linear-valued coefficient at the position of the
2636 struct tgsi_exec_machine
*mach
,
2640 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
2641 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
2642 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
2643 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
2644 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
2645 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
2646 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
2647 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
2648 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
2652 * Evaluate a perspective-valued coefficient at the position of the
2656 eval_perspective_coef(
2657 struct tgsi_exec_machine
*mach
,
2661 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
2662 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
2663 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
2664 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
2665 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
2666 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
2667 /* divide by W here */
2668 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
2669 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
2670 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
2671 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
2675 typedef void (* eval_coef_func
)(
2676 struct tgsi_exec_machine
*mach
,
2681 exec_declaration(struct tgsi_exec_machine
*mach
,
2682 const struct tgsi_full_declaration
*decl
)
2684 if (decl
->Declaration
.File
== TGSI_FILE_SAMPLER_VIEW
) {
2685 mach
->SamplerViews
[decl
->Range
.First
] = decl
->SamplerView
;
2689 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
2690 if (decl
->Declaration
.File
== TGSI_FILE_INPUT
) {
2691 uint first
, last
, mask
;
2693 first
= decl
->Range
.First
;
2694 last
= decl
->Range
.Last
;
2695 mask
= decl
->Declaration
.UsageMask
;
2697 /* XXX we could remove this special-case code since
2698 * mach->InterpCoefs[first].a0 should already have the
2699 * front/back-face value. But we should first update the
2700 * ureg code to emit the right UsageMask value (WRITEMASK_X).
2701 * Then, we could remove the tgsi_exec_machine::Face field.
2703 /* XXX make FACE a system value */
2704 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_FACE
) {
2707 assert(decl
->Semantic
.Index
== 0);
2708 assert(first
== last
);
2710 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
2711 mach
->Inputs
[first
].xyzw
[0].f
[i
] = mach
->Face
;
2714 eval_coef_func eval
;
2717 switch (decl
->Interp
.Interpolate
) {
2718 case TGSI_INTERPOLATE_CONSTANT
:
2719 eval
= eval_constant_coef
;
2722 case TGSI_INTERPOLATE_LINEAR
:
2723 eval
= eval_linear_coef
;
2726 case TGSI_INTERPOLATE_PERSPECTIVE
:
2727 eval
= eval_perspective_coef
;
2730 case TGSI_INTERPOLATE_COLOR
:
2731 eval
= mach
->flatshade_color
? eval_constant_coef
: eval_perspective_coef
;
2739 for (j
= 0; j
< TGSI_NUM_CHANNELS
; j
++) {
2740 if (mask
& (1 << j
)) {
2741 for (i
= first
; i
<= last
; i
++) {
2748 if (DEBUG_EXECUTION
) {
2750 for (i
= first
; i
<= last
; ++i
) {
2751 debug_printf("IN[%2u] = ", i
);
2752 for (j
= 0; j
< TGSI_NUM_CHANNELS
; j
++) {
2756 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
2757 mach
->Inputs
[i
].xyzw
[0].f
[j
], mach
->Inputs
[i
].xyzw
[0].u
[j
],
2758 mach
->Inputs
[i
].xyzw
[1].f
[j
], mach
->Inputs
[i
].xyzw
[1].u
[j
],
2759 mach
->Inputs
[i
].xyzw
[2].f
[j
], mach
->Inputs
[i
].xyzw
[2].u
[j
],
2760 mach
->Inputs
[i
].xyzw
[3].f
[j
], mach
->Inputs
[i
].xyzw
[3].u
[j
]);
2767 if (decl
->Declaration
.File
== TGSI_FILE_SYSTEM_VALUE
) {
2768 mach
->SysSemanticToIndex
[decl
->Declaration
.Semantic
] = decl
->Range
.First
;
2772 typedef void (* micro_unary_op
)(union tgsi_exec_channel
*dst
,
2773 const union tgsi_exec_channel
*src
);
2776 exec_scalar_unary(struct tgsi_exec_machine
*mach
,
2777 const struct tgsi_full_instruction
*inst
,
2779 enum tgsi_exec_datatype dst_datatype
,
2780 enum tgsi_exec_datatype src_datatype
)
2783 union tgsi_exec_channel src
;
2784 union tgsi_exec_channel dst
;
2786 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, src_datatype
);
2788 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2789 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2790 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, chan
, dst_datatype
);
2796 exec_vector_unary(struct tgsi_exec_machine
*mach
,
2797 const struct tgsi_full_instruction
*inst
,
2799 enum tgsi_exec_datatype dst_datatype
,
2800 enum tgsi_exec_datatype src_datatype
)
2803 struct tgsi_exec_vector dst
;
2805 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2806 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2807 union tgsi_exec_channel src
;
2809 fetch_source(mach
, &src
, &inst
->Src
[0], chan
, src_datatype
);
2810 op(&dst
.xyzw
[chan
], &src
);
2813 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2814 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2815 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
2820 typedef void (* micro_binary_op
)(union tgsi_exec_channel
*dst
,
2821 const union tgsi_exec_channel
*src0
,
2822 const union tgsi_exec_channel
*src1
);
2825 exec_scalar_binary(struct tgsi_exec_machine
*mach
,
2826 const struct tgsi_full_instruction
*inst
,
2828 enum tgsi_exec_datatype dst_datatype
,
2829 enum tgsi_exec_datatype src_datatype
)
2832 union tgsi_exec_channel src
[2];
2833 union tgsi_exec_channel dst
;
2835 fetch_source(mach
, &src
[0], &inst
->Src
[0], TGSI_CHAN_X
, src_datatype
);
2836 fetch_source(mach
, &src
[1], &inst
->Src
[1], TGSI_CHAN_X
, src_datatype
);
2837 op(&dst
, &src
[0], &src
[1]);
2838 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2839 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2840 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, chan
, dst_datatype
);
2846 exec_vector_binary(struct tgsi_exec_machine
*mach
,
2847 const struct tgsi_full_instruction
*inst
,
2849 enum tgsi_exec_datatype dst_datatype
,
2850 enum tgsi_exec_datatype src_datatype
)
2853 struct tgsi_exec_vector dst
;
2855 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2856 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2857 union tgsi_exec_channel src
[2];
2859 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
2860 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
2861 op(&dst
.xyzw
[chan
], &src
[0], &src
[1]);
2864 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2865 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2866 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
2871 typedef void (* micro_trinary_op
)(union tgsi_exec_channel
*dst
,
2872 const union tgsi_exec_channel
*src0
,
2873 const union tgsi_exec_channel
*src1
,
2874 const union tgsi_exec_channel
*src2
);
2877 exec_vector_trinary(struct tgsi_exec_machine
*mach
,
2878 const struct tgsi_full_instruction
*inst
,
2879 micro_trinary_op op
,
2880 enum tgsi_exec_datatype dst_datatype
,
2881 enum tgsi_exec_datatype src_datatype
)
2884 struct tgsi_exec_vector dst
;
2886 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2887 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2888 union tgsi_exec_channel src
[3];
2890 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
2891 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
2892 fetch_source(mach
, &src
[2], &inst
->Src
[2], chan
, src_datatype
);
2893 op(&dst
.xyzw
[chan
], &src
[0], &src
[1], &src
[2]);
2896 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2897 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2898 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
2903 typedef void (* micro_quaternary_op
)(union tgsi_exec_channel
*dst
,
2904 const union tgsi_exec_channel
*src0
,
2905 const union tgsi_exec_channel
*src1
,
2906 const union tgsi_exec_channel
*src2
,
2907 const union tgsi_exec_channel
*src3
);
2910 exec_vector_quaternary(struct tgsi_exec_machine
*mach
,
2911 const struct tgsi_full_instruction
*inst
,
2912 micro_quaternary_op op
,
2913 enum tgsi_exec_datatype dst_datatype
,
2914 enum tgsi_exec_datatype src_datatype
)
2917 struct tgsi_exec_vector dst
;
2919 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2920 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2921 union tgsi_exec_channel src
[4];
2923 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
, src_datatype
);
2924 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
, src_datatype
);
2925 fetch_source(mach
, &src
[2], &inst
->Src
[2], chan
, src_datatype
);
2926 fetch_source(mach
, &src
[3], &inst
->Src
[3], chan
, src_datatype
);
2927 op(&dst
.xyzw
[chan
], &src
[0], &src
[1], &src
[2], &src
[3]);
2930 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2931 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2932 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
, dst_datatype
);
2938 exec_dp3(struct tgsi_exec_machine
*mach
,
2939 const struct tgsi_full_instruction
*inst
)
2942 union tgsi_exec_channel arg
[3];
2944 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2945 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2946 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
2948 for (chan
= TGSI_CHAN_Y
; chan
<= TGSI_CHAN_Z
; chan
++) {
2949 fetch_source(mach
, &arg
[0], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
2950 fetch_source(mach
, &arg
[1], &inst
->Src
[1], chan
, TGSI_EXEC_DATA_FLOAT
);
2951 micro_mad(&arg
[2], &arg
[0], &arg
[1], &arg
[2]);
2954 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2955 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2956 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2962 exec_dp4(struct tgsi_exec_machine
*mach
,
2963 const struct tgsi_full_instruction
*inst
)
2966 union tgsi_exec_channel arg
[3];
2968 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2969 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2970 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
2972 for (chan
= TGSI_CHAN_Y
; chan
<= TGSI_CHAN_W
; chan
++) {
2973 fetch_source(mach
, &arg
[0], &inst
->Src
[0], chan
, TGSI_EXEC_DATA_FLOAT
);
2974 fetch_source(mach
, &arg
[1], &inst
->Src
[1], chan
, TGSI_EXEC_DATA_FLOAT
);
2975 micro_mad(&arg
[2], &arg
[0], &arg
[1], &arg
[2]);
2978 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
2979 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
2980 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
2986 exec_dp2a(struct tgsi_exec_machine
*mach
,
2987 const struct tgsi_full_instruction
*inst
)
2990 union tgsi_exec_channel arg
[3];
2992 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2993 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
2994 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
2996 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
2997 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
2998 micro_mad(&arg
[0], &arg
[0], &arg
[1], &arg
[2]);
3000 fetch_source(mach
, &arg
[1], &inst
->Src
[2], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3001 micro_add(&arg
[0], &arg
[0], &arg
[1]);
3003 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
3004 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
3005 store_dest(mach
, &arg
[0], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
3011 exec_dph(struct tgsi_exec_machine
*mach
,
3012 const struct tgsi_full_instruction
*inst
)
3015 union tgsi_exec_channel arg
[3];
3017 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3018 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3019 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
3021 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3022 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3023 micro_mad(&arg
[2], &arg
[0], &arg
[1], &arg
[2]);
3025 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3026 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3027 micro_mad(&arg
[0], &arg
[0], &arg
[1], &arg
[2]);
3029 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3030 micro_add(&arg
[0], &arg
[0], &arg
[1]);
3032 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
3033 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
3034 store_dest(mach
, &arg
[0], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
3040 exec_dp2(struct tgsi_exec_machine
*mach
,
3041 const struct tgsi_full_instruction
*inst
)
3044 union tgsi_exec_channel arg
[3];
3046 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3047 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3048 micro_mul(&arg
[2], &arg
[0], &arg
[1]);
3050 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3051 fetch_source(mach
, &arg
[1], &inst
->Src
[1], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3052 micro_mad(&arg
[2], &arg
[0], &arg
[1], &arg
[2]);
3054 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
3055 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
3056 store_dest(mach
, &arg
[2], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
3062 exec_pk2h(struct tgsi_exec_machine
*mach
,
3063 const struct tgsi_full_instruction
*inst
)
3066 union tgsi_exec_channel arg
[2], dst
;
3068 fetch_source(mach
, &arg
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3069 fetch_source(mach
, &arg
[1], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3070 for (chan
= 0; chan
< TGSI_QUAD_SIZE
; chan
++) {
3071 dst
.u
[chan
] = util_float_to_half(arg
[0].f
[chan
]) |
3072 (util_float_to_half(arg
[1].f
[chan
]) << 16);
3074 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
3075 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
3076 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_UINT
);
3082 exec_up2h(struct tgsi_exec_machine
*mach
,
3083 const struct tgsi_full_instruction
*inst
)
3086 union tgsi_exec_channel arg
, dst
[2];
3088 fetch_source(mach
, &arg
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_UINT
);
3089 for (chan
= 0; chan
< TGSI_QUAD_SIZE
; chan
++) {
3090 dst
[0].f
[chan
] = util_half_to_float(arg
.u
[chan
] & 0xffff);
3091 dst
[1].f
[chan
] = util_half_to_float(arg
.u
[chan
] >> 16);
3093 for (chan
= 0; chan
< TGSI_NUM_CHANNELS
; chan
++) {
3094 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
3095 store_dest(mach
, &dst
[chan
& 1], &inst
->Dst
[0], inst
, chan
, TGSI_EXEC_DATA_FLOAT
);
3101 exec_scs(struct tgsi_exec_machine
*mach
,
3102 const struct tgsi_full_instruction
*inst
)
3104 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) {
3105 union tgsi_exec_channel arg
;
3106 union tgsi_exec_channel result
;
3108 fetch_source(mach
, &arg
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3110 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
3111 micro_cos(&result
, &arg
);
3112 store_dest(mach
, &result
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3114 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3115 micro_sin(&result
, &arg
);
3116 store_dest(mach
, &result
, &inst
->Dst
[0], inst
, TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3119 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3120 store_dest(mach
, &ZeroVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3122 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3123 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3128 exec_xpd(struct tgsi_exec_machine
*mach
,
3129 const struct tgsi_full_instruction
*inst
)
3131 union tgsi_exec_channel r
[6];
3132 union tgsi_exec_channel d
[3];
3134 fetch_source(mach
, &r
[0], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3135 fetch_source(mach
, &r
[1], &inst
->Src
[1], TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3137 micro_mul(&r
[2], &r
[0], &r
[1]);
3139 fetch_source(mach
, &r
[3], &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3140 fetch_source(mach
, &r
[4], &inst
->Src
[1], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3142 micro_mul(&r
[5], &r
[3], &r
[4] );
3143 micro_sub(&d
[TGSI_CHAN_X
], &r
[2], &r
[5]);
3145 fetch_source(mach
, &r
[2], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3147 micro_mul(&r
[3], &r
[3], &r
[2]);
3149 fetch_source(mach
, &r
[5], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3151 micro_mul(&r
[1], &r
[1], &r
[5]);
3152 micro_sub(&d
[TGSI_CHAN_Y
], &r
[3], &r
[1]);
3154 micro_mul(&r
[5], &r
[5], &r
[4]);
3155 micro_mul(&r
[0], &r
[0], &r
[2]);
3156 micro_sub(&d
[TGSI_CHAN_Z
], &r
[5], &r
[0]);
3158 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
3159 store_dest(mach
, &d
[TGSI_CHAN_X
], &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3161 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3162 store_dest(mach
, &d
[TGSI_CHAN_Y
], &inst
->Dst
[0], inst
, TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3164 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3165 store_dest(mach
, &d
[TGSI_CHAN_Z
], &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3167 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3168 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3173 exec_dst(struct tgsi_exec_machine
*mach
,
3174 const struct tgsi_full_instruction
*inst
)
3176 union tgsi_exec_channel r
[2];
3177 union tgsi_exec_channel d
[4];
3179 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3180 fetch_source(mach
, &r
[0], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3181 fetch_source(mach
, &r
[1], &inst
->Src
[1], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3182 micro_mul(&d
[TGSI_CHAN_Y
], &r
[0], &r
[1]);
3184 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3185 fetch_source(mach
, &d
[TGSI_CHAN_Z
], &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3187 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3188 fetch_source(mach
, &d
[TGSI_CHAN_W
], &inst
->Src
[1], TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3191 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
3192 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3194 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3195 store_dest(mach
, &d
[TGSI_CHAN_Y
], &inst
->Dst
[0], inst
, TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3197 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3198 store_dest(mach
, &d
[TGSI_CHAN_Z
], &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3200 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3201 store_dest(mach
, &d
[TGSI_CHAN_W
], &inst
->Dst
[0], inst
, TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3206 exec_log(struct tgsi_exec_machine
*mach
,
3207 const struct tgsi_full_instruction
*inst
)
3209 union tgsi_exec_channel r
[3];
3211 fetch_source(mach
, &r
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3212 micro_abs(&r
[2], &r
[0]); /* r2 = abs(r0) */
3213 micro_lg2(&r
[1], &r
[2]); /* r1 = lg2(r2) */
3214 micro_flr(&r
[0], &r
[1]); /* r0 = floor(r1) */
3215 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
3216 store_dest(mach
, &r
[0], &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3218 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3219 micro_exp2(&r
[0], &r
[0]); /* r0 = 2 ^ r0 */
3220 micro_div(&r
[0], &r
[2], &r
[0]); /* r0 = r2 / r0 */
3221 store_dest(mach
, &r
[0], &inst
->Dst
[0], inst
, TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3223 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3224 store_dest(mach
, &r
[1], &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3226 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3227 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3232 exec_exp(struct tgsi_exec_machine
*mach
,
3233 const struct tgsi_full_instruction
*inst
)
3235 union tgsi_exec_channel r
[3];
3237 fetch_source(mach
, &r
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3238 micro_flr(&r
[1], &r
[0]); /* r1 = floor(r0) */
3239 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
3240 micro_exp2(&r
[2], &r
[1]); /* r2 = 2 ^ r1 */
3241 store_dest(mach
, &r
[2], &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3243 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3244 micro_sub(&r
[2], &r
[0], &r
[1]); /* r2 = r0 - r1 */
3245 store_dest(mach
, &r
[2], &inst
->Dst
[0], inst
, TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3247 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3248 micro_exp2(&r
[2], &r
[0]); /* r2 = 2 ^ r0 */
3249 store_dest(mach
, &r
[2], &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3251 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3252 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3257 exec_lit(struct tgsi_exec_machine
*mach
,
3258 const struct tgsi_full_instruction
*inst
)
3260 union tgsi_exec_channel r
[3];
3261 union tgsi_exec_channel d
[3];
3263 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_YZ
) {
3264 fetch_source(mach
, &r
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3265 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Z
) {
3266 fetch_source(mach
, &r
[1], &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3267 micro_max(&r
[1], &r
[1], &ZeroVec
);
3269 fetch_source(mach
, &r
[2], &inst
->Src
[0], TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3270 micro_min(&r
[2], &r
[2], &P128Vec
);
3271 micro_max(&r
[2], &r
[2], &M128Vec
);
3272 micro_pow(&r
[1], &r
[1], &r
[2]);
3273 micro_lt(&d
[TGSI_CHAN_Z
], &ZeroVec
, &r
[0], &r
[1], &ZeroVec
);
3274 store_dest(mach
, &d
[TGSI_CHAN_Z
], &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_EXEC_DATA_FLOAT
);
3276 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_Y
) {
3277 micro_max(&d
[TGSI_CHAN_Y
], &r
[0], &ZeroVec
);
3278 store_dest(mach
, &d
[TGSI_CHAN_Y
], &inst
->Dst
[0], inst
, TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3281 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_X
) {
3282 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3285 if (inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_W
) {
3286 store_dest(mach
, &OneVec
, &inst
->Dst
[0], inst
, TGSI_CHAN_W
, TGSI_EXEC_DATA_FLOAT
);
3291 exec_break(struct tgsi_exec_machine
*mach
)
3293 if (mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_LOOP
) {
3294 /* turn off loop channels for each enabled exec channel */
3295 mach
->LoopMask
&= ~mach
->ExecMask
;
3296 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3297 UPDATE_EXEC_MASK(mach
);
3299 assert(mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_SWITCH
);
3301 mach
->Switch
.mask
= 0x0;
3303 UPDATE_EXEC_MASK(mach
);
3308 exec_switch(struct tgsi_exec_machine
*mach
,
3309 const struct tgsi_full_instruction
*inst
)
3311 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
3312 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
3314 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
3315 fetch_source(mach
, &mach
->Switch
.selector
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_UINT
);
3316 mach
->Switch
.mask
= 0x0;
3317 mach
->Switch
.defaultMask
= 0x0;
3319 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
3320 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_SWITCH
;
3322 UPDATE_EXEC_MASK(mach
);
3326 exec_case(struct tgsi_exec_machine
*mach
,
3327 const struct tgsi_full_instruction
*inst
)
3329 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
3330 union tgsi_exec_channel src
;
3333 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_UINT
);
3335 if (mach
->Switch
.selector
.u
[0] == src
.u
[0]) {
3338 if (mach
->Switch
.selector
.u
[1] == src
.u
[1]) {
3341 if (mach
->Switch
.selector
.u
[2] == src
.u
[2]) {
3344 if (mach
->Switch
.selector
.u
[3] == src
.u
[3]) {
3348 mach
->Switch
.defaultMask
|= mask
;
3350 mach
->Switch
.mask
|= mask
& prevMask
;
3352 UPDATE_EXEC_MASK(mach
);
3355 /* FIXME: this will only work if default is last */
3357 exec_default(struct tgsi_exec_machine
*mach
)
3359 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
3361 mach
->Switch
.mask
|= ~mach
->Switch
.defaultMask
& prevMask
;
3363 UPDATE_EXEC_MASK(mach
);
3367 exec_endswitch(struct tgsi_exec_machine
*mach
)
3369 mach
->Switch
= mach
->SwitchStack
[--mach
->SwitchStackTop
];
3370 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3372 UPDATE_EXEC_MASK(mach
);
3375 typedef void (* micro_dop
)(union tgsi_double_channel
*dst
,
3376 const union tgsi_double_channel
*src
);
3379 fetch_double_channel(struct tgsi_exec_machine
*mach
,
3380 union tgsi_double_channel
*chan
,
3381 const struct tgsi_full_src_register
*reg
,
3385 union tgsi_exec_channel src
[2];
3388 fetch_source_d(mach
, &src
[0], reg
, chan_0
, TGSI_EXEC_DATA_UINT
);
3389 fetch_source_d(mach
, &src
[1], reg
, chan_1
, TGSI_EXEC_DATA_UINT
);
3391 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++) {
3392 chan
->u
[i
][0] = src
[0].u
[i
];
3393 chan
->u
[i
][1] = src
[1].u
[i
];
3395 if (reg
->Register
.Absolute
) {
3396 micro_dabs(chan
, chan
);
3398 if (reg
->Register
.Negate
) {
3399 micro_dneg(chan
, chan
);
3404 store_double_channel(struct tgsi_exec_machine
*mach
,
3405 const union tgsi_double_channel
*chan
,
3406 const struct tgsi_full_dst_register
*reg
,
3407 const struct tgsi_full_instruction
*inst
,
3411 union tgsi_exec_channel dst
[2];
3413 union tgsi_double_channel temp
;
3414 const uint execmask
= mach
->ExecMask
;
3416 if (!inst
->Instruction
.Saturate
) {
3417 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++)
3418 if (execmask
& (1 << i
)) {
3419 dst
[0].u
[i
] = chan
->u
[i
][0];
3420 dst
[1].u
[i
] = chan
->u
[i
][1];
3424 for (i
= 0; i
< TGSI_QUAD_SIZE
; i
++)
3425 if (execmask
& (1 << i
)) {
3426 if (chan
->d
[i
] < 0.0)
3428 else if (chan
->d
[i
] > 1.0)
3431 temp
.d
[i
] = chan
->d
[i
];
3433 dst
[0].u
[i
] = temp
.u
[i
][0];
3434 dst
[1].u
[i
] = temp
.u
[i
][1];
3438 store_dest_double(mach
, &dst
[0], reg
, inst
, chan_0
, TGSI_EXEC_DATA_UINT
);
3440 store_dest_double(mach
, &dst
[1], reg
, inst
, chan_1
, TGSI_EXEC_DATA_UINT
);
3444 exec_double_unary(struct tgsi_exec_machine
*mach
,
3445 const struct tgsi_full_instruction
*inst
,
3448 union tgsi_double_channel src
;
3449 union tgsi_double_channel dst
;
3451 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) == TGSI_WRITEMASK_XY
) {
3452 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3454 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3456 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_ZW
) == TGSI_WRITEMASK_ZW
) {
3457 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3459 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3464 exec_double_binary(struct tgsi_exec_machine
*mach
,
3465 const struct tgsi_full_instruction
*inst
,
3467 enum tgsi_exec_datatype dst_datatype
)
3469 union tgsi_double_channel src
[2];
3470 union tgsi_double_channel dst
;
3471 int first_dest_chan
, second_dest_chan
;
3474 wmask
= inst
->Dst
[0].Register
.WriteMask
;
3475 /* these are & because of the way DSLT etc store their destinations */
3476 if (wmask
& TGSI_WRITEMASK_XY
) {
3477 first_dest_chan
= TGSI_CHAN_X
;
3478 second_dest_chan
= TGSI_CHAN_Y
;
3479 if (dst_datatype
== TGSI_EXEC_DATA_UINT
) {
3480 first_dest_chan
= (wmask
& TGSI_WRITEMASK_X
) ? TGSI_CHAN_X
: TGSI_CHAN_Y
;
3481 second_dest_chan
= -1;
3484 fetch_double_channel(mach
, &src
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3485 fetch_double_channel(mach
, &src
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3487 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, first_dest_chan
, second_dest_chan
);
3490 if (wmask
& TGSI_WRITEMASK_ZW
) {
3491 first_dest_chan
= TGSI_CHAN_Z
;
3492 second_dest_chan
= TGSI_CHAN_W
;
3493 if (dst_datatype
== TGSI_EXEC_DATA_UINT
) {
3494 first_dest_chan
= (wmask
& TGSI_WRITEMASK_Z
) ? TGSI_CHAN_Z
: TGSI_CHAN_W
;
3495 second_dest_chan
= -1;
3498 fetch_double_channel(mach
, &src
[0], &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3499 fetch_double_channel(mach
, &src
[1], &inst
->Src
[1], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3501 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, first_dest_chan
, second_dest_chan
);
3506 exec_double_trinary(struct tgsi_exec_machine
*mach
,
3507 const struct tgsi_full_instruction
*inst
,
3510 union tgsi_double_channel src
[3];
3511 union tgsi_double_channel dst
;
3513 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) == TGSI_WRITEMASK_XY
) {
3514 fetch_double_channel(mach
, &src
[0], &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3515 fetch_double_channel(mach
, &src
[1], &inst
->Src
[1], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3516 fetch_double_channel(mach
, &src
[2], &inst
->Src
[2], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3518 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3520 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_ZW
) == TGSI_WRITEMASK_ZW
) {
3521 fetch_double_channel(mach
, &src
[0], &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3522 fetch_double_channel(mach
, &src
[1], &inst
->Src
[1], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3523 fetch_double_channel(mach
, &src
[2], &inst
->Src
[2], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3525 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3530 exec_f2d(struct tgsi_exec_machine
*mach
,
3531 const struct tgsi_full_instruction
*inst
)
3533 union tgsi_exec_channel src
;
3534 union tgsi_double_channel dst
;
3536 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) == TGSI_WRITEMASK_XY
) {
3537 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_FLOAT
);
3538 micro_f2d(&dst
, &src
);
3539 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3541 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_ZW
) == TGSI_WRITEMASK_ZW
) {
3542 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_FLOAT
);
3543 micro_f2d(&dst
, &src
);
3544 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3549 exec_d2f(struct tgsi_exec_machine
*mach
,
3550 const struct tgsi_full_instruction
*inst
)
3552 union tgsi_double_channel src
;
3553 union tgsi_exec_channel dst
;
3554 int wm
= inst
->Dst
[0].Register
.WriteMask
;
3557 for (i
= 0; i
< 2; i
++) {
3560 wm
&= ~(1 << (bit
- 1));
3562 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3564 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3565 micro_d2f(&dst
, &src
);
3566 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, bit
- 1, TGSI_EXEC_DATA_FLOAT
);
3572 exec_i2d(struct tgsi_exec_machine
*mach
,
3573 const struct tgsi_full_instruction
*inst
)
3575 union tgsi_exec_channel src
;
3576 union tgsi_double_channel dst
;
3578 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) == TGSI_WRITEMASK_XY
) {
3579 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_INT
);
3580 micro_i2d(&dst
, &src
);
3581 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3583 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_ZW
) == TGSI_WRITEMASK_ZW
) {
3584 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_INT
);
3585 micro_i2d(&dst
, &src
);
3586 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3591 exec_d2i(struct tgsi_exec_machine
*mach
,
3592 const struct tgsi_full_instruction
*inst
)
3594 union tgsi_double_channel src
;
3595 union tgsi_exec_channel dst
;
3596 int wm
= inst
->Dst
[0].Register
.WriteMask
;
3599 for (i
= 0; i
< 2; i
++) {
3602 wm
&= ~(1 << (bit
- 1));
3604 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3606 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3607 micro_d2i(&dst
, &src
);
3608 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, bit
- 1, TGSI_EXEC_DATA_INT
);
3613 exec_u2d(struct tgsi_exec_machine
*mach
,
3614 const struct tgsi_full_instruction
*inst
)
3616 union tgsi_exec_channel src
;
3617 union tgsi_double_channel dst
;
3619 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) == TGSI_WRITEMASK_XY
) {
3620 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_EXEC_DATA_UINT
);
3621 micro_u2d(&dst
, &src
);
3622 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3624 if ((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_ZW
) == TGSI_WRITEMASK_ZW
) {
3625 fetch_source(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Y
, TGSI_EXEC_DATA_UINT
);
3626 micro_u2d(&dst
, &src
);
3627 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3632 exec_d2u(struct tgsi_exec_machine
*mach
,
3633 const struct tgsi_full_instruction
*inst
)
3635 union tgsi_double_channel src
;
3636 union tgsi_exec_channel dst
;
3637 int wm
= inst
->Dst
[0].Register
.WriteMask
;
3640 for (i
= 0; i
< 2; i
++) {
3643 wm
&= ~(1 << (bit
- 1));
3645 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3647 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3648 micro_d2u(&dst
, &src
);
3649 store_dest(mach
, &dst
, &inst
->Dst
[0], inst
, bit
- 1, TGSI_EXEC_DATA_UINT
);
3655 exec_dldexp(struct tgsi_exec_machine
*mach
,
3656 const struct tgsi_full_instruction
*inst
)
3658 union tgsi_double_channel src0
;
3659 union tgsi_exec_channel src1
;
3660 union tgsi_double_channel dst
;
3663 wmask
= inst
->Dst
[0].Register
.WriteMask
;
3664 if (wmask
& TGSI_WRITEMASK_XY
) {
3665 fetch_double_channel(mach
, &src0
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3666 fetch_source(mach
, &src1
, &inst
->Src
[1], TGSI_CHAN_X
, TGSI_EXEC_DATA_INT
);
3667 micro_dldexp(&dst
, &src0
, &src1
);
3668 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3671 if (wmask
& TGSI_WRITEMASK_ZW
) {
3672 fetch_double_channel(mach
, &src0
, &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3673 fetch_source(mach
, &src1
, &inst
->Src
[1], TGSI_CHAN_Z
, TGSI_EXEC_DATA_INT
);
3674 micro_dldexp(&dst
, &src0
, &src1
);
3675 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3680 exec_dfracexp(struct tgsi_exec_machine
*mach
,
3681 const struct tgsi_full_instruction
*inst
)
3683 union tgsi_double_channel src
;
3684 union tgsi_double_channel dst
;
3685 union tgsi_exec_channel dst_exp
;
3687 if (((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_XY
) == TGSI_WRITEMASK_XY
)) {
3688 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_X
, TGSI_CHAN_Y
);
3689 micro_dfracexp(&dst
, &dst_exp
, &src
);
3690 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_X
, TGSI_CHAN_Y
);
3691 store_dest(mach
, &dst_exp
, &inst
->Dst
[1], inst
, ffs(inst
->Dst
[1].Register
.WriteMask
) - 1, TGSI_EXEC_DATA_INT
);
3693 if (((inst
->Dst
[0].Register
.WriteMask
& TGSI_WRITEMASK_ZW
) == TGSI_WRITEMASK_ZW
)) {
3694 fetch_double_channel(mach
, &src
, &inst
->Src
[0], TGSI_CHAN_Z
, TGSI_CHAN_W
);
3695 micro_dfracexp(&dst
, &dst_exp
, &src
);
3696 store_double_channel(mach
, &dst
, &inst
->Dst
[0], inst
, TGSI_CHAN_Z
, TGSI_CHAN_W
);
3697 store_dest(mach
, &dst_exp
, &inst
->Dst
[1], inst
, ffs(inst
->Dst
[1].Register
.WriteMask
) - 1, TGSI_EXEC_DATA_INT
);
3703 micro_i2f(union tgsi_exec_channel
*dst
,
3704 const union tgsi_exec_channel
*src
)
3706 dst
->f
[0] = (float)src
->i
[0];
3707 dst
->f
[1] = (float)src
->i
[1];
3708 dst
->f
[2] = (float)src
->i
[2];
3709 dst
->f
[3] = (float)src
->i
[3];
3713 micro_not(union tgsi_exec_channel
*dst
,
3714 const union tgsi_exec_channel
*src
)
3716 dst
->u
[0] = ~src
->u
[0];
3717 dst
->u
[1] = ~src
->u
[1];
3718 dst
->u
[2] = ~src
->u
[2];
3719 dst
->u
[3] = ~src
->u
[3];
3723 micro_shl(union tgsi_exec_channel
*dst
,
3724 const union tgsi_exec_channel
*src0
,
3725 const union tgsi_exec_channel
*src1
)
3727 unsigned masked_count
;
3728 masked_count
= src1
->u
[0] & 0x1f;
3729 dst
->u
[0] = src0
->u
[0] << masked_count
;
3730 masked_count
= src1
->u
[1] & 0x1f;
3731 dst
->u
[1] = src0
->u
[1] << masked_count
;
3732 masked_count
= src1
->u
[2] & 0x1f;
3733 dst
->u
[2] = src0
->u
[2] << masked_count
;
3734 masked_count
= src1
->u
[3] & 0x1f;
3735 dst
->u
[3] = src0
->u
[3] << masked_count
;
3739 micro_and(union tgsi_exec_channel
*dst
,
3740 const union tgsi_exec_channel
*src0
,
3741 const union tgsi_exec_channel
*src1
)
3743 dst
->u
[0] = src0
->u
[0] & src1
->u
[0];
3744 dst
->u
[1] = src0
->u
[1] & src1
->u
[1];
3745 dst
->u
[2] = src0
->u
[2] & src1
->u
[2];
3746 dst
->u
[3] = src0
->u
[3] & src1
->u
[3];
3750 micro_or(union tgsi_exec_channel
*dst
,
3751 const union tgsi_exec_channel
*src0
,
3752 const union tgsi_exec_channel
*src1
)
3754 dst
->u
[0] = src0
->u
[0] | src1
->u
[0];
3755 dst
->u
[1] = src0
->u
[1] | src1
->u
[1];
3756 dst
->u
[2] = src0
->u
[2] | src1
->u
[2];
3757 dst
->u
[3] = src0
->u
[3] | src1
->u
[3];
3761 micro_xor(union tgsi_exec_channel
*dst
,
3762 const union tgsi_exec_channel
*src0
,
3763 const union tgsi_exec_channel
*src1
)
3765 dst
->u
[0] = src0
->u
[0] ^ src1
->u
[0];
3766 dst
->u
[1] = src0
->u
[1] ^ src1
->u
[1];
3767 dst
->u
[2] = src0
->u
[2] ^ src1
->u
[2];
3768 dst
->u
[3] = src0
->u
[3] ^ src1
->u
[3];
3772 micro_mod(union tgsi_exec_channel
*dst
,
3773 const union tgsi_exec_channel
*src0
,
3774 const union tgsi_exec_channel
*src1
)
3776 dst
->i
[0] = src0
->i
[0] % src1
->i
[0];
3777 dst
->i
[1] = src0
->i
[1] % src1
->i
[1];
3778 dst
->i
[2] = src0
->i
[2] % src1
->i
[2];
3779 dst
->i
[3] = src0
->i
[3] % src1
->i
[3];
3783 micro_f2i(union tgsi_exec_channel
*dst
,
3784 const union tgsi_exec_channel
*src
)
3786 dst
->i
[0] = (int)src
->f
[0];
3787 dst
->i
[1] = (int)src
->f
[1];
3788 dst
->i
[2] = (int)src
->f
[2];
3789 dst
->i
[3] = (int)src
->f
[3];
3793 micro_fseq(union tgsi_exec_channel
*dst
,
3794 const union tgsi_exec_channel
*src0
,
3795 const union tgsi_exec_channel
*src1
)
3797 dst
->u
[0] = src0
->f
[0] == src1
->f
[0] ? ~0 : 0;
3798 dst
->u
[1] = src0
->f
[1] == src1
->f
[1] ? ~0 : 0;
3799 dst
->u
[2] = src0
->f
[2] == src1
->f
[2] ? ~0 : 0;
3800 dst
->u
[3] = src0
->f
[3] == src1
->f
[3] ? ~0 : 0;
3804 micro_fsge(union tgsi_exec_channel
*dst
,
3805 const union tgsi_exec_channel
*src0
,
3806 const union tgsi_exec_channel
*src1
)
3808 dst
->u
[0] = src0
->f
[0] >= src1
->f
[0] ? ~0 : 0;
3809 dst
->u
[1] = src0
->f
[1] >= src1
->f
[1] ? ~0 : 0;
3810 dst
->u
[2] = src0
->f
[2] >= src1
->f
[2] ? ~0 : 0;
3811 dst
->u
[3] = src0
->f
[3] >= src1
->f
[3] ? ~0 : 0;
3815 micro_fslt(union tgsi_exec_channel
*dst
,
3816 const union tgsi_exec_channel
*src0
,
3817 const union tgsi_exec_channel
*src1
)
3819 dst
->u
[0] = src0
->f
[0] < src1
->f
[0] ? ~0 : 0;
3820 dst
->u
[1] = src0
->f
[1] < src1
->f
[1] ? ~0 : 0;
3821 dst
->u
[2] = src0
->f
[2] < src1
->f
[2] ? ~0 : 0;
3822 dst
->u
[3] = src0
->f
[3] < src1
->f
[3] ? ~0 : 0;
3826 micro_fsne(union tgsi_exec_channel
*dst
,
3827 const union tgsi_exec_channel
*src0
,
3828 const union tgsi_exec_channel
*src1
)
3830 dst
->u
[0] = src0
->f
[0] != src1
->f
[0] ? ~0 : 0;
3831 dst
->u
[1] = src0
->f
[1] != src1
->f
[1] ? ~0 : 0;
3832 dst
->u
[2] = src0
->f
[2] != src1
->f
[2] ? ~0 : 0;
3833 dst
->u
[3] = src0
->f
[3] != src1
->f
[3] ? ~0 : 0;
3837 micro_idiv(union tgsi_exec_channel
*dst
,
3838 const union tgsi_exec_channel
*src0
,
3839 const union tgsi_exec_channel
*src1
)
3841 dst
->i
[0] = src1
->i
[0] ? src0
->i
[0] / src1
->i
[0] : 0;
3842 dst
->i
[1] = src1
->i
[1] ? src0
->i
[1] / src1
->i
[1] : 0;
3843 dst
->i
[2] = src1
->i
[2] ? src0
->i
[2] / src1
->i
[2] : 0;
3844 dst
->i
[3] = src1
->i
[3] ? src0
->i
[3] / src1
->i
[3] : 0;
3848 micro_imax(union tgsi_exec_channel
*dst
,
3849 const union tgsi_exec_channel
*src0
,
3850 const union tgsi_exec_channel
*src1
)
3852 dst
->i
[0] = src0
->i
[0] > src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
3853 dst
->i
[1] = src0
->i
[1] > src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
3854 dst
->i
[2] = src0
->i
[2] > src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
3855 dst
->i
[3] = src0
->i
[3] > src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
3859 micro_imin(union tgsi_exec_channel
*dst
,
3860 const union tgsi_exec_channel
*src0
,
3861 const union tgsi_exec_channel
*src1
)
3863 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
3864 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
3865 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
3866 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
3870 micro_isge(union tgsi_exec_channel
*dst
,
3871 const union tgsi_exec_channel
*src0
,
3872 const union tgsi_exec_channel
*src1
)
3874 dst
->i
[0] = src0
->i
[0] >= src1
->i
[0] ? -1 : 0;
3875 dst
->i
[1] = src0
->i
[1] >= src1
->i
[1] ? -1 : 0;
3876 dst
->i
[2] = src0
->i
[2] >= src1
->i
[2] ? -1 : 0;
3877 dst
->i
[3] = src0
->i
[3] >= src1
->i
[3] ? -1 : 0;
3881 micro_ishr(union tgsi_exec_channel
*dst
,
3882 const union tgsi_exec_channel
*src0
,
3883 const union tgsi_exec_channel
*src1
)
3885 unsigned masked_count
;
3886 masked_count
= src1
->i
[0] & 0x1f;
3887 dst
->i
[0] = src0
->i
[0] >> masked_count
;
3888 masked_count
= src1
->i
[1] & 0x1f;
3889 dst
->i
[1] = src0
->i
[1] >> masked_count
;
3890 masked_count
= src1
->i
[2] & 0x1f;
3891 dst
->i
[2] = src0
->i
[2] >> masked_count
;
3892 masked_count
= src1
->i
[3] & 0x1f;
3893 dst
->i
[3] = src0
->i
[3] >> masked_count
;
3897 micro_islt(union tgsi_exec_channel
*dst
,
3898 const union tgsi_exec_channel
*src0
,
3899 const union tgsi_exec_channel
*src1
)
3901 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? -1 : 0;
3902 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? -1 : 0;
3903 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? -1 : 0;
3904 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? -1 : 0;
3908 micro_f2u(union tgsi_exec_channel
*dst
,
3909 const union tgsi_exec_channel
*src
)
3911 dst
->u
[0] = (uint
)src
->f
[0];
3912 dst
->u
[1] = (uint
)src
->f
[1];
3913 dst
->u
[2] = (uint
)src
->f
[2];
3914 dst
->u
[3] = (uint
)src
->f
[3];
3918 micro_u2f(union tgsi_exec_channel
*dst
,
3919 const union tgsi_exec_channel
*src
)
3921 dst
->f
[0] = (float)src
->u
[0];
3922 dst
->f
[1] = (float)src
->u
[1];
3923 dst
->f
[2] = (float)src
->u
[2];
3924 dst
->f
[3] = (float)src
->u
[3];
3928 micro_uadd(union tgsi_exec_channel
*dst
,
3929 const union tgsi_exec_channel
*src0
,
3930 const union tgsi_exec_channel
*src1
)
3932 dst
->u
[0] = src0
->u
[0] + src1
->u
[0];
3933 dst
->u
[1] = src0
->u
[1] + src1
->u
[1];
3934 dst
->u
[2] = src0
->u
[2] + src1
->u
[2];
3935 dst
->u
[3] = src0
->u
[3] + src1
->u
[3];
3939 micro_udiv(union tgsi_exec_channel
*dst
,
3940 const union tgsi_exec_channel
*src0
,
3941 const union tgsi_exec_channel
*src1
)
3943 dst
->u
[0] = src1
->u
[0] ? src0
->u
[0] / src1
->u
[0] : ~0u;
3944 dst
->u
[1] = src1
->u
[1] ? src0
->u
[1] / src1
->u
[1] : ~0u;
3945 dst
->u
[2] = src1
->u
[2] ? src0
->u
[2] / src1
->u
[2] : ~0u;
3946 dst
->u
[3] = src1
->u
[3] ? src0
->u
[3] / src1
->u
[3] : ~0u;
3950 micro_umad(union tgsi_exec_channel
*dst
,
3951 const union tgsi_exec_channel
*src0
,
3952 const union tgsi_exec_channel
*src1
,
3953 const union tgsi_exec_channel
*src2
)
3955 dst
->u
[0] = src0
->u
[0] * src1
->u
[0] + src2
->u
[0];
3956 dst
->u
[1] = src0
->u
[1] * src1
->u
[1] + src2
->u
[1];
3957 dst
->u
[2] = src0
->u
[2] * src1
->u
[2] + src2
->u
[2];
3958 dst
->u
[3] = src0
->u
[3] * src1
->u
[3] + src2
->u
[3];
3962 micro_umax(union tgsi_exec_channel
*dst
,
3963 const union tgsi_exec_channel
*src0
,
3964 const union tgsi_exec_channel
*src1
)
3966 dst
->u
[0] = src0
->u
[0] > src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
3967 dst
->u
[1] = src0
->u
[1] > src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
3968 dst
->u
[2] = src0
->u
[2] > src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
3969 dst
->u
[3] = src0
->u
[3] > src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
3973 micro_umin(union tgsi_exec_channel
*dst
,
3974 const union tgsi_exec_channel
*src0
,
3975 const union tgsi_exec_channel
*src1
)
3977 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
3978 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
3979 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
3980 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
3984 micro_umod(union tgsi_exec_channel
*dst
,
3985 const union tgsi_exec_channel
*src0
,
3986 const union tgsi_exec_channel
*src1
)
3988 dst
->u
[0] = src1
->u
[0] ? src0
->u
[0] % src1
->u
[0] : ~0u;
3989 dst
->u
[1] = src1
->u
[1] ? src0
->u
[1] % src1
->u
[1] : ~0u;
3990 dst
->u
[2] = src1
->u
[2] ? src0
->u
[2] % src1
->u
[2] : ~0u;
3991 dst
->u
[3] = src1
->u
[3] ? src0
->u
[3] % src1
->u
[3] : ~0u;
3995 micro_umul(union tgsi_exec_channel
*dst
,
3996 const union tgsi_exec_channel
*src0
,
3997 const union tgsi_exec_channel
*src1
)
3999 dst
->u
[0] = src0
->u
[0] * src1
->u
[0];
4000 dst
->u
[1] = src0
->u
[1] * src1
->u
[1];
4001 dst
->u
[2] = src0
->u
[2] * src1
->u
[2];
4002 dst
->u
[3] = src0
->u
[3] * src1
->u
[3];
4006 micro_imul_hi(union tgsi_exec_channel
*dst
,
4007 const union tgsi_exec_channel
*src0
,
4008 const union tgsi_exec_channel
*src1
)
4010 #define I64M(x, y) ((((int64_t)x) * ((int64_t)y)) >> 32)
4011 dst
->i
[0] = I64M(src0
->i
[0], src1
->i
[0]);
4012 dst
->i
[1] = I64M(src0
->i
[1], src1
->i
[1]);
4013 dst
->i
[2] = I64M(src0
->i
[2], src1
->i
[2]);
4014 dst
->i
[3] = I64M(src0
->i
[3], src1
->i
[3]);
4019 micro_umul_hi(union tgsi_exec_channel
*dst
,
4020 const union tgsi_exec_channel
*src0
,
4021 const union tgsi_exec_channel
*src1
)
4023 #define U64M(x, y) ((((uint64_t)x) * ((uint64_t)y)) >> 32)
4024 dst
->u
[0] = U64M(src0
->u
[0], src1
->u
[0]);
4025 dst
->u
[1] = U64M(src0
->u
[1], src1
->u
[1]);
4026 dst
->u
[2] = U64M(src0
->u
[2], src1
->u
[2]);
4027 dst
->u
[3] = U64M(src0
->u
[3], src1
->u
[3]);
4032 micro_useq(union tgsi_exec_channel
*dst
,
4033 const union tgsi_exec_channel
*src0
,
4034 const union tgsi_exec_channel
*src1
)
4036 dst
->u
[0] = src0
->u
[0] == src1
->u
[0] ? ~0 : 0;
4037 dst
->u
[1] = src0
->u
[1] == src1
->u
[1] ? ~0 : 0;
4038 dst
->u
[2] = src0
->u
[2] == src1
->u
[2] ? ~0 : 0;
4039 dst
->u
[3] = src0
->u
[3] == src1
->u
[3] ? ~0 : 0;
4043 micro_usge(union tgsi_exec_channel
*dst
,
4044 const union tgsi_exec_channel
*src0
,
4045 const union tgsi_exec_channel
*src1
)
4047 dst
->u
[0] = src0
->u
[0] >= src1
->u
[0] ? ~0 : 0;
4048 dst
->u
[1] = src0
->u
[1] >= src1
->u
[1] ? ~0 : 0;
4049 dst
->u
[2] = src0
->u
[2] >= src1
->u
[2] ? ~0 : 0;
4050 dst
->u
[3] = src0
->u
[3] >= src1
->u
[3] ? ~0 : 0;
4054 micro_ushr(union tgsi_exec_channel
*dst
,
4055 const union tgsi_exec_channel
*src0
,
4056 const union tgsi_exec_channel
*src1
)
4058 unsigned masked_count
;
4059 masked_count
= src1
->u
[0] & 0x1f;
4060 dst
->u
[0] = src0
->u
[0] >> masked_count
;
4061 masked_count
= src1
->u
[1] & 0x1f;
4062 dst
->u
[1] = src0
->u
[1] >> masked_count
;
4063 masked_count
= src1
->u
[2] & 0x1f;
4064 dst
->u
[2] = src0
->u
[2] >> masked_count
;
4065 masked_count
= src1
->u
[3] & 0x1f;
4066 dst
->u
[3] = src0
->u
[3] >> masked_count
;
4070 micro_uslt(union tgsi_exec_channel
*dst
,
4071 const union tgsi_exec_channel
*src0
,
4072 const union tgsi_exec_channel
*src1
)
4074 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? ~0 : 0;
4075 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? ~0 : 0;
4076 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? ~0 : 0;
4077 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? ~0 : 0;
4081 micro_usne(union tgsi_exec_channel
*dst
,
4082 const union tgsi_exec_channel
*src0
,
4083 const union tgsi_exec_channel
*src1
)
4085 dst
->u
[0] = src0
->u
[0] != src1
->u
[0] ? ~0 : 0;
4086 dst
->u
[1] = src0
->u
[1] != src1
->u
[1] ? ~0 : 0;
4087 dst
->u
[2] = src0
->u
[2] != src1
->u
[2] ? ~0 : 0;
4088 dst
->u
[3] = src0
->u
[3] != src1
->u
[3] ? ~0 : 0;
4092 micro_uarl(union tgsi_exec_channel
*dst
,
4093 const union tgsi_exec_channel
*src
)
4095 dst
->i
[0] = src
->u
[0];
4096 dst
->i
[1] = src
->u
[1];
4097 dst
->i
[2] = src
->u
[2];
4098 dst
->i
[3] = src
->u
[3];
4102 micro_ucmp(union tgsi_exec_channel
*dst
,
4103 const union tgsi_exec_channel
*src0
,
4104 const union tgsi_exec_channel
*src1
,
4105 const union tgsi_exec_channel
*src2
)
4107 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
4108 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
4109 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
4110 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
4114 * Signed bitfield extract (i.e. sign-extend the extracted bits)
4117 micro_ibfe(union tgsi_exec_channel
*dst
,
4118 const union tgsi_exec_channel
*src0
,
4119 const union tgsi_exec_channel
*src1
,
4120 const union tgsi_exec_channel
*src2
)
4123 for (i
= 0; i
< 4; i
++) {
4124 int width
= src2
->i
[i
] & 0x1f;
4125 int offset
= src1
->i
[i
] & 0x1f;
4128 else if (width
+ offset
< 32)
4129 dst
->i
[i
] = (src0
->i
[i
] << (32 - width
- offset
)) >> (32 - width
);
4131 dst
->i
[i
] = src0
->i
[i
] >> offset
;
4136 * Unsigned bitfield extract
4139 micro_ubfe(union tgsi_exec_channel
*dst
,
4140 const union tgsi_exec_channel
*src0
,
4141 const union tgsi_exec_channel
*src1
,
4142 const union tgsi_exec_channel
*src2
)
4145 for (i
= 0; i
< 4; i
++) {
4146 int width
= src2
->u
[i
] & 0x1f;
4147 int offset
= src1
->u
[i
] & 0x1f;
4150 else if (width
+ offset
< 32)
4151 dst
->u
[i
] = (src0
->u
[i
] << (32 - width
- offset
)) >> (32 - width
);
4153 dst
->u
[i
] = src0
->u
[i
] >> offset
;
4158 * Bitfield insert: copy low bits from src1 into a region of src0.
4161 micro_bfi(union tgsi_exec_channel
*dst
,
4162 const union tgsi_exec_channel
*src0
,
4163 const union tgsi_exec_channel
*src1
,
4164 const union tgsi_exec_channel
*src2
,
4165 const union tgsi_exec_channel
*src3
)
4168 for (i
= 0; i
< 4; i
++) {
4169 int width
= src3
->u
[i
] & 0x1f;
4170 int offset
= src2
->u
[i
] & 0x1f;
4171 int bitmask
= ((1 << width
) - 1) << offset
;
4172 dst
->u
[i
] = ((src1
->u
[i
] << offset
) & bitmask
) | (src0
->u
[i
] & ~bitmask
);
4177 micro_brev(union tgsi_exec_channel
*dst
,
4178 const union tgsi_exec_channel
*src
)
4180 dst
->u
[0] = util_bitreverse(src
->u
[0]);
4181 dst
->u
[1] = util_bitreverse(src
->u
[1]);
4182 dst
->u
[2] = util_bitreverse(src
->u
[2]);
4183 dst
->u
[3] = util_bitreverse(src
->u
[3]);
4187 micro_popc(union tgsi_exec_channel
*dst
,
4188 const union tgsi_exec_channel
*src
)
4190 dst
->u
[0] = util_bitcount(src
->u
[0]);
4191 dst
->u
[1] = util_bitcount(src
->u
[1]);
4192 dst
->u
[2] = util_bitcount(src
->u
[2]);
4193 dst
->u
[3] = util_bitcount(src
->u
[3]);
4197 micro_lsb(union tgsi_exec_channel
*dst
,
4198 const union tgsi_exec_channel
*src
)
4200 dst
->i
[0] = ffs(src
->u
[0]) - 1;
4201 dst
->i
[1] = ffs(src
->u
[1]) - 1;
4202 dst
->i
[2] = ffs(src
->u
[2]) - 1;
4203 dst
->i
[3] = ffs(src
->u
[3]) - 1;
4207 micro_imsb(union tgsi_exec_channel
*dst
,
4208 const union tgsi_exec_channel
*src
)
4210 dst
->i
[0] = util_last_bit_signed(src
->i
[0]) - 1;
4211 dst
->i
[1] = util_last_bit_signed(src
->i
[1]) - 1;
4212 dst
->i
[2] = util_last_bit_signed(src
->i
[2]) - 1;
4213 dst
->i
[3] = util_last_bit_signed(src
->i
[3]) - 1;
4217 micro_umsb(union tgsi_exec_channel
*dst
,
4218 const union tgsi_exec_channel
*src
)
4220 dst
->i
[0] = util_last_bit(src
->u
[0]) - 1;
4221 dst
->i
[1] = util_last_bit(src
->u
[1]) - 1;
4222 dst
->i
[2] = util_last_bit(src
->u
[2]) - 1;
4223 dst
->i
[3] = util_last_bit(src
->u
[3]) - 1;
4228 struct tgsi_exec_machine
*mach
,
4229 const struct tgsi_full_instruction
*inst
,
4232 union tgsi_exec_channel r
[10];
4236 switch (inst
->Instruction
.Opcode
) {
4237 case TGSI_OPCODE_ARL
:
4238 exec_vector_unary(mach
, inst
, micro_arl
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
4241 case TGSI_OPCODE_MOV
:
4242 exec_vector_unary(mach
, inst
, micro_mov
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
4245 case TGSI_OPCODE_LIT
:
4246 exec_lit(mach
, inst
);
4249 case TGSI_OPCODE_RCP
:
4250 exec_scalar_unary(mach
, inst
, micro_rcp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4253 case TGSI_OPCODE_RSQ
:
4254 exec_scalar_unary(mach
, inst
, micro_rsq
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4257 case TGSI_OPCODE_EXP
:
4258 exec_exp(mach
, inst
);
4261 case TGSI_OPCODE_LOG
:
4262 exec_log(mach
, inst
);
4265 case TGSI_OPCODE_MUL
:
4266 exec_vector_binary(mach
, inst
, micro_mul
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4269 case TGSI_OPCODE_ADD
:
4270 exec_vector_binary(mach
, inst
, micro_add
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4273 case TGSI_OPCODE_DP3
:
4274 exec_dp3(mach
, inst
);
4277 case TGSI_OPCODE_DP4
:
4278 exec_dp4(mach
, inst
);
4281 case TGSI_OPCODE_DST
:
4282 exec_dst(mach
, inst
);
4285 case TGSI_OPCODE_MIN
:
4286 exec_vector_binary(mach
, inst
, micro_min
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4289 case TGSI_OPCODE_MAX
:
4290 exec_vector_binary(mach
, inst
, micro_max
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4293 case TGSI_OPCODE_SLT
:
4294 exec_vector_binary(mach
, inst
, micro_slt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4297 case TGSI_OPCODE_SGE
:
4298 exec_vector_binary(mach
, inst
, micro_sge
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4301 case TGSI_OPCODE_MAD
:
4302 exec_vector_trinary(mach
, inst
, micro_mad
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4305 case TGSI_OPCODE_SUB
:
4306 exec_vector_binary(mach
, inst
, micro_sub
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4309 case TGSI_OPCODE_LRP
:
4310 exec_vector_trinary(mach
, inst
, micro_lrp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4313 case TGSI_OPCODE_SQRT
:
4314 exec_scalar_unary(mach
, inst
, micro_sqrt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4317 case TGSI_OPCODE_DP2A
:
4318 exec_dp2a(mach
, inst
);
4321 case TGSI_OPCODE_FRC
:
4322 exec_vector_unary(mach
, inst
, micro_frc
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4325 case TGSI_OPCODE_CLAMP
:
4326 exec_vector_trinary(mach
, inst
, micro_clamp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4329 case TGSI_OPCODE_FLR
:
4330 exec_vector_unary(mach
, inst
, micro_flr
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4333 case TGSI_OPCODE_ROUND
:
4334 exec_vector_unary(mach
, inst
, micro_rnd
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4337 case TGSI_OPCODE_EX2
:
4338 exec_scalar_unary(mach
, inst
, micro_exp2
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4341 case TGSI_OPCODE_LG2
:
4342 exec_scalar_unary(mach
, inst
, micro_lg2
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4345 case TGSI_OPCODE_POW
:
4346 exec_scalar_binary(mach
, inst
, micro_pow
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4349 case TGSI_OPCODE_XPD
:
4350 exec_xpd(mach
, inst
);
4353 case TGSI_OPCODE_ABS
:
4354 exec_vector_unary(mach
, inst
, micro_abs
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4357 case TGSI_OPCODE_DPH
:
4358 exec_dph(mach
, inst
);
4361 case TGSI_OPCODE_COS
:
4362 exec_scalar_unary(mach
, inst
, micro_cos
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4365 case TGSI_OPCODE_DDX
:
4366 exec_vector_unary(mach
, inst
, micro_ddx
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4369 case TGSI_OPCODE_DDY
:
4370 exec_vector_unary(mach
, inst
, micro_ddy
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4373 case TGSI_OPCODE_KILL
:
4374 exec_kill (mach
, inst
);
4377 case TGSI_OPCODE_KILL_IF
:
4378 exec_kill_if (mach
, inst
);
4381 case TGSI_OPCODE_PK2H
:
4382 exec_pk2h(mach
, inst
);
4385 case TGSI_OPCODE_PK2US
:
4389 case TGSI_OPCODE_PK4B
:
4393 case TGSI_OPCODE_PK4UB
:
4397 case TGSI_OPCODE_SEQ
:
4398 exec_vector_binary(mach
, inst
, micro_seq
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4401 case TGSI_OPCODE_SGT
:
4402 exec_vector_binary(mach
, inst
, micro_sgt
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4405 case TGSI_OPCODE_SIN
:
4406 exec_scalar_unary(mach
, inst
, micro_sin
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4409 case TGSI_OPCODE_SLE
:
4410 exec_vector_binary(mach
, inst
, micro_sle
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4413 case TGSI_OPCODE_SNE
:
4414 exec_vector_binary(mach
, inst
, micro_sne
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4417 case TGSI_OPCODE_TEX
:
4418 /* simple texture lookup */
4419 /* src[0] = texcoord */
4420 /* src[1] = sampler unit */
4421 exec_tex(mach
, inst
, TEX_MODIFIER_NONE
, 1);
4424 case TGSI_OPCODE_TXB
:
4425 /* Texture lookup with lod bias */
4426 /* src[0] = texcoord (src[0].w = LOD bias) */
4427 /* src[1] = sampler unit */
4428 exec_tex(mach
, inst
, TEX_MODIFIER_LOD_BIAS
, 1);
4431 case TGSI_OPCODE_TXD
:
4432 /* Texture lookup with explict partial derivatives */
4433 /* src[0] = texcoord */
4434 /* src[1] = d[strq]/dx */
4435 /* src[2] = d[strq]/dy */
4436 /* src[3] = sampler unit */
4437 exec_txd(mach
, inst
);
4440 case TGSI_OPCODE_TXL
:
4441 /* Texture lookup with explit LOD */
4442 /* src[0] = texcoord (src[0].w = LOD) */
4443 /* src[1] = sampler unit */
4444 exec_tex(mach
, inst
, TEX_MODIFIER_EXPLICIT_LOD
, 1);
4447 case TGSI_OPCODE_TXP
:
4448 /* Texture lookup with projection */
4449 /* src[0] = texcoord (src[0].w = projection) */
4450 /* src[1] = sampler unit */
4451 exec_tex(mach
, inst
, TEX_MODIFIER_PROJECTED
, 1);
4454 case TGSI_OPCODE_TG4
:
4455 /* src[0] = texcoord */
4456 /* src[1] = component */
4457 /* src[2] = sampler unit */
4458 exec_tex(mach
, inst
, TEX_MODIFIER_GATHER
, 2);
4461 case TGSI_OPCODE_LODQ
:
4462 /* src[0] = texcoord */
4463 /* src[1] = sampler unit */
4464 exec_lodq(mach
, inst
);
4467 case TGSI_OPCODE_UP2H
:
4468 exec_up2h(mach
, inst
);
4471 case TGSI_OPCODE_UP2US
:
4475 case TGSI_OPCODE_UP4B
:
4479 case TGSI_OPCODE_UP4UB
:
4483 case TGSI_OPCODE_ARR
:
4484 exec_vector_unary(mach
, inst
, micro_arr
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
4487 case TGSI_OPCODE_CAL
:
4488 /* skip the call if no execution channels are enabled */
4489 if (mach
->ExecMask
) {
4492 /* First, record the depths of the execution stacks.
4493 * This is important for deeply nested/looped return statements.
4494 * We have to unwind the stacks by the correct amount. For a
4495 * real code generator, we could determine the number of entries
4496 * to pop off each stack with simple static analysis and avoid
4497 * implementing this data structure at run time.
4499 mach
->CallStack
[mach
->CallStackTop
].CondStackTop
= mach
->CondStackTop
;
4500 mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
= mach
->LoopStackTop
;
4501 mach
->CallStack
[mach
->CallStackTop
].ContStackTop
= mach
->ContStackTop
;
4502 mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
= mach
->SwitchStackTop
;
4503 mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
= mach
->BreakStackTop
;
4504 /* note that PC was already incremented above */
4505 mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
= *pc
;
4507 mach
->CallStackTop
++;
4509 /* Second, push the Cond, Loop, Cont, Func stacks */
4510 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
4511 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
4512 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
4513 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
4514 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
4515 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
4517 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
4518 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
4519 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
4520 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
4521 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
4522 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
4524 /* Finally, jump to the subroutine. The label is a pointer
4525 * (an instruction number) to the BGNSUB instruction.
4527 *pc
= inst
->Label
.Label
;
4528 assert(mach
->Instructions
[*pc
].Instruction
.Opcode
4529 == TGSI_OPCODE_BGNSUB
);
4533 case TGSI_OPCODE_RET
:
4534 mach
->FuncMask
&= ~mach
->ExecMask
;
4535 UPDATE_EXEC_MASK(mach
);
4537 if (mach
->FuncMask
== 0x0) {
4538 /* really return now (otherwise, keep executing */
4540 if (mach
->CallStackTop
== 0) {
4541 /* returning from main() */
4542 mach
->CondStackTop
= 0;
4543 mach
->LoopStackTop
= 0;
4548 assert(mach
->CallStackTop
> 0);
4549 mach
->CallStackTop
--;
4551 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
4552 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
4554 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
4555 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
4557 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
4558 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
4560 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
4561 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
4563 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
4564 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
4566 assert(mach
->FuncStackTop
> 0);
4567 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
4569 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
4571 UPDATE_EXEC_MASK(mach
);
4575 case TGSI_OPCODE_SSG
:
4576 exec_vector_unary(mach
, inst
, micro_sgn
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4579 case TGSI_OPCODE_CMP
:
4580 exec_vector_trinary(mach
, inst
, micro_cmp
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4583 case TGSI_OPCODE_SCS
:
4584 exec_scs(mach
, inst
);
4587 case TGSI_OPCODE_DIV
:
4588 exec_vector_binary(mach
, inst
, micro_div
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4591 case TGSI_OPCODE_DP2
:
4592 exec_dp2(mach
, inst
);
4595 case TGSI_OPCODE_IF
:
4597 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
4598 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
4599 FETCH( &r
[0], 0, TGSI_CHAN_X
);
4600 /* update CondMask */
4602 mach
->CondMask
&= ~0x1;
4605 mach
->CondMask
&= ~0x2;
4608 mach
->CondMask
&= ~0x4;
4611 mach
->CondMask
&= ~0x8;
4613 UPDATE_EXEC_MASK(mach
);
4614 /* Todo: If CondMask==0, jump to ELSE */
4617 case TGSI_OPCODE_UIF
:
4619 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
4620 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
4621 IFETCH( &r
[0], 0, TGSI_CHAN_X
);
4622 /* update CondMask */
4624 mach
->CondMask
&= ~0x1;
4627 mach
->CondMask
&= ~0x2;
4630 mach
->CondMask
&= ~0x4;
4633 mach
->CondMask
&= ~0x8;
4635 UPDATE_EXEC_MASK(mach
);
4636 /* Todo: If CondMask==0, jump to ELSE */
4639 case TGSI_OPCODE_ELSE
:
4640 /* invert CondMask wrt previous mask */
4643 assert(mach
->CondStackTop
> 0);
4644 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
4645 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
4646 UPDATE_EXEC_MASK(mach
);
4647 /* Todo: If CondMask==0, jump to ENDIF */
4651 case TGSI_OPCODE_ENDIF
:
4653 assert(mach
->CondStackTop
> 0);
4654 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
4655 UPDATE_EXEC_MASK(mach
);
4658 case TGSI_OPCODE_END
:
4659 /* make sure we end primitives which haven't
4660 * been explicitly emitted */
4661 conditional_emit_primitive(mach
);
4662 /* halt execution */
4666 case TGSI_OPCODE_PUSHA
:
4670 case TGSI_OPCODE_POPA
:
4674 case TGSI_OPCODE_CEIL
:
4675 exec_vector_unary(mach
, inst
, micro_ceil
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4678 case TGSI_OPCODE_I2F
:
4679 exec_vector_unary(mach
, inst
, micro_i2f
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_INT
);
4682 case TGSI_OPCODE_NOT
:
4683 exec_vector_unary(mach
, inst
, micro_not
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4686 case TGSI_OPCODE_TRUNC
:
4687 exec_vector_unary(mach
, inst
, micro_trunc
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_FLOAT
);
4690 case TGSI_OPCODE_SHL
:
4691 exec_vector_binary(mach
, inst
, micro_shl
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4694 case TGSI_OPCODE_AND
:
4695 exec_vector_binary(mach
, inst
, micro_and
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4698 case TGSI_OPCODE_OR
:
4699 exec_vector_binary(mach
, inst
, micro_or
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4702 case TGSI_OPCODE_MOD
:
4703 exec_vector_binary(mach
, inst
, micro_mod
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4706 case TGSI_OPCODE_XOR
:
4707 exec_vector_binary(mach
, inst
, micro_xor
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4710 case TGSI_OPCODE_SAD
:
4714 case TGSI_OPCODE_TXF
:
4715 exec_txf(mach
, inst
);
4718 case TGSI_OPCODE_TXQ
:
4719 exec_txq(mach
, inst
);
4722 case TGSI_OPCODE_EMIT
:
4726 case TGSI_OPCODE_ENDPRIM
:
4727 emit_primitive(mach
);
4730 case TGSI_OPCODE_BGNLOOP
:
4731 /* push LoopMask and ContMasks */
4732 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
4733 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
4734 assert(mach
->LoopLabelStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
4735 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
4737 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
4738 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
4739 mach
->LoopLabelStack
[mach
->LoopLabelStackTop
++] = *pc
- 1;
4740 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
4741 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_LOOP
;
4744 case TGSI_OPCODE_ENDLOOP
:
4745 /* Restore ContMask, but don't pop */
4746 assert(mach
->ContStackTop
> 0);
4747 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
4748 UPDATE_EXEC_MASK(mach
);
4749 if (mach
->ExecMask
) {
4750 /* repeat loop: jump to instruction just past BGNLOOP */
4751 assert(mach
->LoopLabelStackTop
> 0);
4752 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
4755 /* exit loop: pop LoopMask */
4756 assert(mach
->LoopStackTop
> 0);
4757 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
4759 assert(mach
->ContStackTop
> 0);
4760 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
4761 assert(mach
->LoopLabelStackTop
> 0);
4762 --mach
->LoopLabelStackTop
;
4764 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
4766 UPDATE_EXEC_MASK(mach
);
4769 case TGSI_OPCODE_BRK
:
4773 case TGSI_OPCODE_CONT
:
4774 /* turn off cont channels for each enabled exec channel */
4775 mach
->ContMask
&= ~mach
->ExecMask
;
4776 /* Todo: if mach->LoopMask == 0, jump to end of loop */
4777 UPDATE_EXEC_MASK(mach
);
4780 case TGSI_OPCODE_BGNSUB
:
4784 case TGSI_OPCODE_ENDSUB
:
4786 * XXX: This really should be a no-op. We should never reach this opcode.
4789 assert(mach
->CallStackTop
> 0);
4790 mach
->CallStackTop
--;
4792 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
4793 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
4795 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
4796 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
4798 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
4799 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
4801 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
4802 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
4804 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
4805 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
4807 assert(mach
->FuncStackTop
> 0);
4808 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
4810 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
4812 UPDATE_EXEC_MASK(mach
);
4815 case TGSI_OPCODE_NOP
:
4818 case TGSI_OPCODE_BREAKC
:
4819 IFETCH(&r
[0], 0, TGSI_CHAN_X
);
4820 /* update CondMask */
4821 if (r
[0].u
[0] && (mach
->ExecMask
& 0x1)) {
4822 mach
->LoopMask
&= ~0x1;
4824 if (r
[0].u
[1] && (mach
->ExecMask
& 0x2)) {
4825 mach
->LoopMask
&= ~0x2;
4827 if (r
[0].u
[2] && (mach
->ExecMask
& 0x4)) {
4828 mach
->LoopMask
&= ~0x4;
4830 if (r
[0].u
[3] && (mach
->ExecMask
& 0x8)) {
4831 mach
->LoopMask
&= ~0x8;
4833 /* Todo: if mach->LoopMask == 0, jump to end of loop */
4834 UPDATE_EXEC_MASK(mach
);
4837 case TGSI_OPCODE_F2I
:
4838 exec_vector_unary(mach
, inst
, micro_f2i
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_FLOAT
);
4841 case TGSI_OPCODE_FSEQ
:
4842 exec_vector_binary(mach
, inst
, micro_fseq
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
4845 case TGSI_OPCODE_FSGE
:
4846 exec_vector_binary(mach
, inst
, micro_fsge
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
4849 case TGSI_OPCODE_FSLT
:
4850 exec_vector_binary(mach
, inst
, micro_fslt
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
4853 case TGSI_OPCODE_FSNE
:
4854 exec_vector_binary(mach
, inst
, micro_fsne
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
4857 case TGSI_OPCODE_IDIV
:
4858 exec_vector_binary(mach
, inst
, micro_idiv
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4861 case TGSI_OPCODE_IMAX
:
4862 exec_vector_binary(mach
, inst
, micro_imax
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4865 case TGSI_OPCODE_IMIN
:
4866 exec_vector_binary(mach
, inst
, micro_imin
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4869 case TGSI_OPCODE_INEG
:
4870 exec_vector_unary(mach
, inst
, micro_ineg
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4873 case TGSI_OPCODE_ISGE
:
4874 exec_vector_binary(mach
, inst
, micro_isge
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4877 case TGSI_OPCODE_ISHR
:
4878 exec_vector_binary(mach
, inst
, micro_ishr
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4881 case TGSI_OPCODE_ISLT
:
4882 exec_vector_binary(mach
, inst
, micro_islt
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4885 case TGSI_OPCODE_F2U
:
4886 exec_vector_unary(mach
, inst
, micro_f2u
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_FLOAT
);
4889 case TGSI_OPCODE_U2F
:
4890 exec_vector_unary(mach
, inst
, micro_u2f
, TGSI_EXEC_DATA_FLOAT
, TGSI_EXEC_DATA_UINT
);
4893 case TGSI_OPCODE_UADD
:
4894 exec_vector_binary(mach
, inst
, micro_uadd
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4897 case TGSI_OPCODE_UDIV
:
4898 exec_vector_binary(mach
, inst
, micro_udiv
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4901 case TGSI_OPCODE_UMAD
:
4902 exec_vector_trinary(mach
, inst
, micro_umad
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4905 case TGSI_OPCODE_UMAX
:
4906 exec_vector_binary(mach
, inst
, micro_umax
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4909 case TGSI_OPCODE_UMIN
:
4910 exec_vector_binary(mach
, inst
, micro_umin
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4913 case TGSI_OPCODE_UMOD
:
4914 exec_vector_binary(mach
, inst
, micro_umod
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4917 case TGSI_OPCODE_UMUL
:
4918 exec_vector_binary(mach
, inst
, micro_umul
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4921 case TGSI_OPCODE_IMUL_HI
:
4922 exec_vector_binary(mach
, inst
, micro_imul_hi
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
4925 case TGSI_OPCODE_UMUL_HI
:
4926 exec_vector_binary(mach
, inst
, micro_umul_hi
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4929 case TGSI_OPCODE_USEQ
:
4930 exec_vector_binary(mach
, inst
, micro_useq
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4933 case TGSI_OPCODE_USGE
:
4934 exec_vector_binary(mach
, inst
, micro_usge
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4937 case TGSI_OPCODE_USHR
:
4938 exec_vector_binary(mach
, inst
, micro_ushr
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4941 case TGSI_OPCODE_USLT
:
4942 exec_vector_binary(mach
, inst
, micro_uslt
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4945 case TGSI_OPCODE_USNE
:
4946 exec_vector_binary(mach
, inst
, micro_usne
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
4949 case TGSI_OPCODE_SWITCH
:
4950 exec_switch(mach
, inst
);
4953 case TGSI_OPCODE_CASE
:
4954 exec_case(mach
, inst
);
4957 case TGSI_OPCODE_DEFAULT
:
4961 case TGSI_OPCODE_ENDSWITCH
:
4962 exec_endswitch(mach
);
4965 case TGSI_OPCODE_SAMPLE_I
:
4966 exec_txf(mach
, inst
);
4969 case TGSI_OPCODE_SAMPLE_I_MS
:
4973 case TGSI_OPCODE_SAMPLE
:
4974 exec_sample(mach
, inst
, TEX_MODIFIER_NONE
, FALSE
);
4977 case TGSI_OPCODE_SAMPLE_B
:
4978 exec_sample(mach
, inst
, TEX_MODIFIER_LOD_BIAS
, FALSE
);
4981 case TGSI_OPCODE_SAMPLE_C
:
4982 exec_sample(mach
, inst
, TEX_MODIFIER_NONE
, TRUE
);
4985 case TGSI_OPCODE_SAMPLE_C_LZ
:
4986 exec_sample(mach
, inst
, TEX_MODIFIER_LEVEL_ZERO
, TRUE
);
4989 case TGSI_OPCODE_SAMPLE_D
:
4990 exec_sample_d(mach
, inst
);
4993 case TGSI_OPCODE_SAMPLE_L
:
4994 exec_sample(mach
, inst
, TEX_MODIFIER_EXPLICIT_LOD
, FALSE
);
4997 case TGSI_OPCODE_GATHER4
:
5001 case TGSI_OPCODE_SVIEWINFO
:
5002 exec_txq(mach
, inst
);
5005 case TGSI_OPCODE_SAMPLE_POS
:
5009 case TGSI_OPCODE_SAMPLE_INFO
:
5013 case TGSI_OPCODE_UARL
:
5014 exec_vector_unary(mach
, inst
, micro_uarl
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_UINT
);
5017 case TGSI_OPCODE_UCMP
:
5018 exec_vector_trinary(mach
, inst
, micro_ucmp
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
5021 case TGSI_OPCODE_IABS
:
5022 exec_vector_unary(mach
, inst
, micro_iabs
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
5025 case TGSI_OPCODE_ISSG
:
5026 exec_vector_unary(mach
, inst
, micro_isgn
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
5029 case TGSI_OPCODE_TEX2
:
5030 /* simple texture lookup */
5031 /* src[0] = texcoord */
5032 /* src[1] = compare */
5033 /* src[2] = sampler unit */
5034 exec_tex(mach
, inst
, TEX_MODIFIER_NONE
, 2);
5036 case TGSI_OPCODE_TXB2
:
5037 /* simple texture lookup */
5038 /* src[0] = texcoord */
5040 /* src[2] = sampler unit */
5041 exec_tex(mach
, inst
, TEX_MODIFIER_LOD_BIAS
, 2);
5043 case TGSI_OPCODE_TXL2
:
5044 /* simple texture lookup */
5045 /* src[0] = texcoord */
5047 /* src[2] = sampler unit */
5048 exec_tex(mach
, inst
, TEX_MODIFIER_EXPLICIT_LOD
, 2);
5051 case TGSI_OPCODE_IBFE
:
5052 exec_vector_trinary(mach
, inst
, micro_ibfe
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
5054 case TGSI_OPCODE_UBFE
:
5055 exec_vector_trinary(mach
, inst
, micro_ubfe
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
5057 case TGSI_OPCODE_BFI
:
5058 exec_vector_quaternary(mach
, inst
, micro_bfi
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
5060 case TGSI_OPCODE_BREV
:
5061 exec_vector_unary(mach
, inst
, micro_brev
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
5063 case TGSI_OPCODE_POPC
:
5064 exec_vector_unary(mach
, inst
, micro_popc
, TGSI_EXEC_DATA_UINT
, TGSI_EXEC_DATA_UINT
);
5066 case TGSI_OPCODE_LSB
:
5067 exec_vector_unary(mach
, inst
, micro_lsb
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_UINT
);
5069 case TGSI_OPCODE_IMSB
:
5070 exec_vector_unary(mach
, inst
, micro_imsb
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_INT
);
5072 case TGSI_OPCODE_UMSB
:
5073 exec_vector_unary(mach
, inst
, micro_umsb
, TGSI_EXEC_DATA_INT
, TGSI_EXEC_DATA_UINT
);
5076 case TGSI_OPCODE_F2D
:
5077 exec_f2d(mach
, inst
);
5080 case TGSI_OPCODE_D2F
:
5081 exec_d2f(mach
, inst
);
5084 case TGSI_OPCODE_DABS
:
5085 exec_double_unary(mach
, inst
, micro_dabs
);
5088 case TGSI_OPCODE_DNEG
:
5089 exec_double_unary(mach
, inst
, micro_dneg
);
5092 case TGSI_OPCODE_DADD
:
5093 exec_double_binary(mach
, inst
, micro_dadd
, TGSI_EXEC_DATA_DOUBLE
);
5096 case TGSI_OPCODE_DMUL
:
5097 exec_double_binary(mach
, inst
, micro_dmul
, TGSI_EXEC_DATA_DOUBLE
);
5100 case TGSI_OPCODE_DMAX
:
5101 exec_double_binary(mach
, inst
, micro_dmax
, TGSI_EXEC_DATA_DOUBLE
);
5104 case TGSI_OPCODE_DMIN
:
5105 exec_double_binary(mach
, inst
, micro_dmin
, TGSI_EXEC_DATA_DOUBLE
);
5108 case TGSI_OPCODE_DSLT
:
5109 exec_double_binary(mach
, inst
, micro_dslt
, TGSI_EXEC_DATA_UINT
);
5112 case TGSI_OPCODE_DSGE
:
5113 exec_double_binary(mach
, inst
, micro_dsge
, TGSI_EXEC_DATA_UINT
);
5116 case TGSI_OPCODE_DSEQ
:
5117 exec_double_binary(mach
, inst
, micro_dseq
, TGSI_EXEC_DATA_UINT
);
5120 case TGSI_OPCODE_DSNE
:
5121 exec_double_binary(mach
, inst
, micro_dsne
, TGSI_EXEC_DATA_UINT
);
5124 case TGSI_OPCODE_DRCP
:
5125 exec_double_unary(mach
, inst
, micro_drcp
);
5128 case TGSI_OPCODE_DSQRT
:
5129 exec_double_unary(mach
, inst
, micro_dsqrt
);
5132 case TGSI_OPCODE_DRSQ
:
5133 exec_double_unary(mach
, inst
, micro_drsq
);
5136 case TGSI_OPCODE_DMAD
:
5137 exec_double_trinary(mach
, inst
, micro_dmad
);
5140 case TGSI_OPCODE_DFRAC
:
5141 exec_double_unary(mach
, inst
, micro_dfrac
);
5144 case TGSI_OPCODE_DLDEXP
:
5145 exec_dldexp(mach
, inst
);
5148 case TGSI_OPCODE_DFRACEXP
:
5149 exec_dfracexp(mach
, inst
);
5152 case TGSI_OPCODE_I2D
:
5153 exec_i2d(mach
, inst
);
5156 case TGSI_OPCODE_D2I
:
5157 exec_d2i(mach
, inst
);
5160 case TGSI_OPCODE_U2D
:
5161 exec_u2d(mach
, inst
);
5164 case TGSI_OPCODE_D2U
:
5165 exec_d2u(mach
, inst
);
5174 * Run TGSI interpreter.
5175 * \return bitmask of "alive" quad components
5178 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
5182 uint default_mask
= 0xf;
5184 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
5185 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
5187 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
5188 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
5189 mach
->Primitives
[0] = 0;
5190 /* GS runs on a single primitive for now */
5194 mach
->CondMask
= default_mask
;
5195 mach
->LoopMask
= default_mask
;
5196 mach
->ContMask
= default_mask
;
5197 mach
->FuncMask
= default_mask
;
5198 mach
->ExecMask
= default_mask
;
5200 mach
->Switch
.mask
= default_mask
;
5202 assert(mach
->CondStackTop
== 0);
5203 assert(mach
->LoopStackTop
== 0);
5204 assert(mach
->ContStackTop
== 0);
5205 assert(mach
->SwitchStackTop
== 0);
5206 assert(mach
->BreakStackTop
== 0);
5207 assert(mach
->CallStackTop
== 0);
5210 /* execute declarations (interpolants) */
5211 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
5212 exec_declaration( mach
, mach
->Declarations
+i
);
5217 struct tgsi_exec_vector temps
[TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
];
5218 struct tgsi_exec_vector outputs
[PIPE_MAX_ATTRIBS
];
5221 memset(mach
->Temps
, 0, sizeof(temps
));
5222 memset(mach
->Outputs
, 0, sizeof(outputs
));
5223 memset(temps
, 0, sizeof(temps
));
5224 memset(outputs
, 0, sizeof(outputs
));
5227 /* execute instructions, until pc is set to -1 */
5233 tgsi_dump_instruction(&mach
->Instructions
[pc
], inst
++);
5236 assert(pc
< (int) mach
->NumInstructions
);
5237 exec_instruction(mach
, mach
->Instructions
+ pc
, &pc
);
5240 for (i
= 0; i
< TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
; i
++) {
5241 if (memcmp(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]))) {
5244 memcpy(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]));
5245 debug_printf("TEMP[%2u] = ", i
);
5246 for (j
= 0; j
< 4; j
++) {
5250 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
5251 temps
[i
].xyzw
[0].f
[j
], temps
[i
].xyzw
[0].u
[j
],
5252 temps
[i
].xyzw
[1].f
[j
], temps
[i
].xyzw
[1].u
[j
],
5253 temps
[i
].xyzw
[2].f
[j
], temps
[i
].xyzw
[2].u
[j
],
5254 temps
[i
].xyzw
[3].f
[j
], temps
[i
].xyzw
[3].u
[j
]);
5258 for (i
= 0; i
< PIPE_MAX_ATTRIBS
; i
++) {
5259 if (memcmp(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]))) {
5262 memcpy(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]));
5263 debug_printf("OUT[%2u] = ", i
);
5264 for (j
= 0; j
< 4; j
++) {
5268 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
5269 outputs
[i
].xyzw
[0].f
[j
], outputs
[i
].xyzw
[0].u
[j
],
5270 outputs
[i
].xyzw
[1].f
[j
], outputs
[i
].xyzw
[1].u
[j
],
5271 outputs
[i
].xyzw
[2].f
[j
], outputs
[i
].xyzw
[2].u
[j
],
5272 outputs
[i
].xyzw
[3].f
[j
], outputs
[i
].xyzw
[3].u
[j
]);
5281 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
5282 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
5284 * Scale back depth component.
5286 for (i
= 0; i
< 4; i
++)
5287 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
5291 /* Strictly speaking, these assertions aren't really needed but they
5292 * can potentially catch some bugs in the control flow code.
5294 assert(mach
->CondStackTop
== 0);
5295 assert(mach
->LoopStackTop
== 0);
5296 assert(mach
->ContStackTop
== 0);
5297 assert(mach
->SwitchStackTop
== 0);
5298 assert(mach
->BreakStackTop
== 0);
5299 assert(mach
->CallStackTop
== 0);
5301 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];