1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * TGSI interpreter/executor.
31 * Flow control information:
33 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
34 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
35 * care since a condition may be true for some quad components but false
36 * for other components.
38 * We basically execute all statements (even if they're in the part of
39 * an IF/ELSE clause that's "not taken") and use a special mask to
40 * control writing to destination registers. This is the ExecMask.
43 * The ExecMask is computed from three other masks (CondMask, LoopMask and
44 * ContMask) which are controlled by the flow control instructions (namely:
45 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
53 #include "pipe/p_compiler.h"
54 #include "pipe/p_state.h"
55 #include "pipe/p_shader_tokens.h"
56 #include "tgsi/tgsi_parse.h"
57 #include "tgsi/tgsi_util.h"
58 #include "tgsi_exec.h"
59 #include "util/u_memory.h"
60 #include "util/u_math.h"
64 #define TILE_TOP_LEFT 0
65 #define TILE_TOP_RIGHT 1
66 #define TILE_BOTTOM_LEFT 2
67 #define TILE_BOTTOM_RIGHT 3
75 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
77 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
78 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
79 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
80 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
81 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
82 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
83 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
84 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
85 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
86 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
87 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
88 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
89 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
90 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
91 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
92 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
93 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
94 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
95 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
96 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
97 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
98 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
99 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
100 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
101 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
102 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
103 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
104 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
105 #define TEMP_R0 TGSI_EXEC_TEMP_R0
107 #define IS_CHANNEL_ENABLED(INST, CHAN)\
108 ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
110 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
111 ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
113 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
114 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
115 if (IS_CHANNEL_ENABLED( INST, CHAN ))
117 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
118 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
119 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
122 /** The execution mask depends on the conditional mask and the loop mask */
123 #define UPDATE_EXEC_MASK(MACH) \
124 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->FuncMask
127 * Initialize machine state by expanding tokens to full instructions,
128 * allocating temporary storage, setting up constants, etc.
129 * After this, we can call tgsi_exec_machine_run() many times.
132 tgsi_exec_machine_bind_shader(
133 struct tgsi_exec_machine
*mach
,
134 const struct tgsi_token
*tokens
,
136 struct tgsi_sampler
**samplers
)
139 struct tgsi_parse_context parse
;
140 struct tgsi_exec_labels
*labels
= &mach
->Labels
;
141 struct tgsi_full_instruction
*instructions
;
142 struct tgsi_full_declaration
*declarations
;
143 uint maxInstructions
= 10, numInstructions
= 0;
144 uint maxDeclarations
= 10, numDeclarations
= 0;
148 tgsi_dump(tokens
, 0);
153 mach
->Tokens
= tokens
;
154 mach
->Samplers
= samplers
;
156 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
157 if (k
!= TGSI_PARSE_OK
) {
158 debug_printf( "Problem parsing!\n" );
162 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
166 declarations
= (struct tgsi_full_declaration
*)
167 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
173 instructions
= (struct tgsi_full_instruction
*)
174 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
177 FREE( declarations
);
181 while( !tgsi_parse_end_of_tokens( &parse
) ) {
182 uint pointer
= parse
.Position
;
185 tgsi_parse_token( &parse
);
186 switch( parse
.FullToken
.Token
.Type
) {
187 case TGSI_TOKEN_TYPE_DECLARATION
:
188 /* save expanded declaration */
189 if (numDeclarations
== maxDeclarations
) {
190 declarations
= REALLOC(declarations
,
192 * sizeof(struct tgsi_full_declaration
),
193 (maxDeclarations
+ 10)
194 * sizeof(struct tgsi_full_declaration
));
195 maxDeclarations
+= 10;
197 memcpy(declarations
+ numDeclarations
,
198 &parse
.FullToken
.FullDeclaration
,
199 sizeof(declarations
[0]));
203 case TGSI_TOKEN_TYPE_IMMEDIATE
:
205 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.Size
- 1;
206 assert( size
% 4 == 0 );
207 assert( mach
->ImmLimit
+ size
/ 4 <= TGSI_EXEC_NUM_IMMEDIATES
);
209 for( i
= 0; i
< size
; i
++ ) {
210 mach
->Imms
[mach
->ImmLimit
+ i
/ 4][i
% 4] =
211 parse
.FullToken
.FullImmediate
.u
.ImmediateFloat32
[i
].Float
;
213 mach
->ImmLimit
+= size
/ 4;
217 case TGSI_TOKEN_TYPE_INSTRUCTION
:
218 assert( labels
->count
< MAX_LABELS
);
220 labels
->labels
[labels
->count
][0] = instno
;
221 labels
->labels
[labels
->count
][1] = pointer
;
224 /* save expanded instruction */
225 if (numInstructions
== maxInstructions
) {
226 instructions
= REALLOC(instructions
,
228 * sizeof(struct tgsi_full_instruction
),
229 (maxInstructions
+ 10)
230 * sizeof(struct tgsi_full_instruction
));
231 maxInstructions
+= 10;
233 memcpy(instructions
+ numInstructions
,
234 &parse
.FullToken
.FullInstruction
,
235 sizeof(instructions
[0]));
243 tgsi_parse_free (&parse
);
245 if (mach
->Declarations
) {
246 FREE( mach
->Declarations
);
248 mach
->Declarations
= declarations
;
249 mach
->NumDeclarations
= numDeclarations
;
251 if (mach
->Instructions
) {
252 FREE( mach
->Instructions
);
254 mach
->Instructions
= instructions
;
255 mach
->NumInstructions
= numInstructions
;
260 tgsi_exec_machine_init(
261 struct tgsi_exec_machine
*mach
)
265 mach
->Temps
= (struct tgsi_exec_vector
*) tgsi_align_128bit( mach
->_Temps
);
266 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
268 /* Setup constants. */
269 for( i
= 0; i
< 4; i
++ ) {
270 mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
].u
[i
] = 0x00000000;
271 mach
->Temps
[TEMP_7F_I
].xyzw
[TEMP_7F_C
].u
[i
] = 0x7FFFFFFF;
272 mach
->Temps
[TEMP_80_I
].xyzw
[TEMP_80_C
].u
[i
] = 0x80000000;
273 mach
->Temps
[TEMP_FF_I
].xyzw
[TEMP_FF_C
].u
[i
] = 0xFFFFFFFF;
274 mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
].f
[i
] = 1.0f
;
275 mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
].f
[i
] = 2.0f
;
276 mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
].f
[i
] = 128.0f
;
277 mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
].f
[i
] = -128.0f
;
278 mach
->Temps
[TEMP_3_I
].xyzw
[TEMP_3_C
].f
[i
] = 3.0f
;
279 mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
].f
[i
] = 0.5f
;
285 tgsi_exec_machine_free_data(struct tgsi_exec_machine
*mach
)
287 if (mach
->Instructions
) {
288 FREE(mach
->Instructions
);
289 mach
->Instructions
= NULL
;
290 mach
->NumInstructions
= 0;
292 if (mach
->Declarations
) {
293 FREE(mach
->Declarations
);
294 mach
->Declarations
= NULL
;
295 mach
->NumDeclarations
= 0;
302 union tgsi_exec_channel
*dst
,
303 const union tgsi_exec_channel
*src
)
305 dst
->f
[0] = fabsf( src
->f
[0] );
306 dst
->f
[1] = fabsf( src
->f
[1] );
307 dst
->f
[2] = fabsf( src
->f
[2] );
308 dst
->f
[3] = fabsf( src
->f
[3] );
313 union tgsi_exec_channel
*dst
,
314 const union tgsi_exec_channel
*src0
,
315 const union tgsi_exec_channel
*src1
)
317 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
318 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
319 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
320 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
325 union tgsi_exec_channel
*dst
,
326 const union tgsi_exec_channel
*src0
,
327 const union tgsi_exec_channel
*src1
)
329 dst
->i
[0] = src0
->i
[0] + src1
->i
[0];
330 dst
->i
[1] = src0
->i
[1] + src1
->i
[1];
331 dst
->i
[2] = src0
->i
[2] + src1
->i
[2];
332 dst
->i
[3] = src0
->i
[3] + src1
->i
[3];
337 union tgsi_exec_channel
*dst
,
338 const union tgsi_exec_channel
*src0
,
339 const union tgsi_exec_channel
*src1
)
341 dst
->u
[0] = src0
->u
[0] & src1
->u
[0];
342 dst
->u
[1] = src0
->u
[1] & src1
->u
[1];
343 dst
->u
[2] = src0
->u
[2] & src1
->u
[2];
344 dst
->u
[3] = src0
->u
[3] & src1
->u
[3];
349 union tgsi_exec_channel
*dst
,
350 const union tgsi_exec_channel
*src
)
352 dst
->f
[0] = ceilf( src
->f
[0] );
353 dst
->f
[1] = ceilf( src
->f
[1] );
354 dst
->f
[2] = ceilf( src
->f
[2] );
355 dst
->f
[3] = ceilf( src
->f
[3] );
360 union tgsi_exec_channel
*dst
,
361 const union tgsi_exec_channel
*src
)
363 dst
->f
[0] = cosf( src
->f
[0] );
364 dst
->f
[1] = cosf( src
->f
[1] );
365 dst
->f
[2] = cosf( src
->f
[2] );
366 dst
->f
[3] = cosf( src
->f
[3] );
371 union tgsi_exec_channel
*dst
,
372 const union tgsi_exec_channel
*src
)
377 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
382 union tgsi_exec_channel
*dst
,
383 const union tgsi_exec_channel
*src
)
388 dst
->f
[3] = src
->f
[TILE_TOP_LEFT
] - src
->f
[TILE_BOTTOM_LEFT
];
393 union tgsi_exec_channel
*dst
,
394 const union tgsi_exec_channel
*src0
,
395 const union tgsi_exec_channel
*src1
)
397 if (src1
->f
[0] != 0) {
398 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
400 if (src1
->f
[1] != 0) {
401 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
403 if (src1
->f
[2] != 0) {
404 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
406 if (src1
->f
[3] != 0) {
407 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
413 union tgsi_exec_channel
*dst
,
414 const union tgsi_exec_channel
*src0
,
415 const union tgsi_exec_channel
*src1
)
417 dst
->u
[0] = src0
->u
[0] / src1
->u
[0];
418 dst
->u
[1] = src0
->u
[1] / src1
->u
[1];
419 dst
->u
[2] = src0
->u
[2] / src1
->u
[2];
420 dst
->u
[3] = src0
->u
[3] / src1
->u
[3];
425 union tgsi_exec_channel
*dst
,
426 const union tgsi_exec_channel
*src0
,
427 const union tgsi_exec_channel
*src1
,
428 const union tgsi_exec_channel
*src2
,
429 const union tgsi_exec_channel
*src3
)
431 dst
->f
[0] = src0
->f
[0] == src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
432 dst
->f
[1] = src0
->f
[1] == src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
433 dst
->f
[2] = src0
->f
[2] == src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
434 dst
->f
[3] = src0
->f
[3] == src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
439 union tgsi_exec_channel
*dst
,
440 const union tgsi_exec_channel
*src0
,
441 const union tgsi_exec_channel
*src1
,
442 const union tgsi_exec_channel
*src2
,
443 const union tgsi_exec_channel
*src3
)
445 dst
->i
[0] = src0
->i
[0] == src1
->i
[0] ? src2
->i
[0] : src3
->i
[0];
446 dst
->i
[1] = src0
->i
[1] == src1
->i
[1] ? src2
->i
[1] : src3
->i
[1];
447 dst
->i
[2] = src0
->i
[2] == src1
->i
[2] ? src2
->i
[2] : src3
->i
[2];
448 dst
->i
[3] = src0
->i
[3] == src1
->i
[3] ? src2
->i
[3] : src3
->i
[3];
453 union tgsi_exec_channel
*dst
,
454 const union tgsi_exec_channel
*src
)
457 dst
->f
[0] = util_fast_exp2( src
->f
[0] );
458 dst
->f
[1] = util_fast_exp2( src
->f
[1] );
459 dst
->f
[2] = util_fast_exp2( src
->f
[2] );
460 dst
->f
[3] = util_fast_exp2( src
->f
[3] );
462 dst
->f
[0] = powf( 2.0f
, src
->f
[0] );
463 dst
->f
[1] = powf( 2.0f
, src
->f
[1] );
464 dst
->f
[2] = powf( 2.0f
, src
->f
[2] );
465 dst
->f
[3] = powf( 2.0f
, src
->f
[3] );
471 union tgsi_exec_channel
*dst
,
472 const union tgsi_exec_channel
*src
)
474 dst
->u
[0] = (uint
) src
->f
[0];
475 dst
->u
[1] = (uint
) src
->f
[1];
476 dst
->u
[2] = (uint
) src
->f
[2];
477 dst
->u
[3] = (uint
) src
->f
[3];
482 union tgsi_exec_channel
*dst
,
483 const union tgsi_exec_channel
*src
)
485 dst
->f
[0] = floorf( src
->f
[0] );
486 dst
->f
[1] = floorf( src
->f
[1] );
487 dst
->f
[2] = floorf( src
->f
[2] );
488 dst
->f
[3] = floorf( src
->f
[3] );
493 union tgsi_exec_channel
*dst
,
494 const union tgsi_exec_channel
*src
)
496 dst
->f
[0] = src
->f
[0] - floorf( src
->f
[0] );
497 dst
->f
[1] = src
->f
[1] - floorf( src
->f
[1] );
498 dst
->f
[2] = src
->f
[2] - floorf( src
->f
[2] );
499 dst
->f
[3] = src
->f
[3] - floorf( src
->f
[3] );
504 union tgsi_exec_channel
*dst
,
505 const union tgsi_exec_channel
*src0
,
506 const union tgsi_exec_channel
*src1
,
507 const union tgsi_exec_channel
*src2
,
508 const union tgsi_exec_channel
*src3
)
510 dst
->f
[0] = src0
->f
[0] >= src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
511 dst
->f
[1] = src0
->f
[1] >= src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
512 dst
->f
[2] = src0
->f
[2] >= src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
513 dst
->f
[3] = src0
->f
[3] >= src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
518 union tgsi_exec_channel
*dst
,
519 const union tgsi_exec_channel
*src
)
521 dst
->f
[0] = (float) src
->i
[0];
522 dst
->f
[1] = (float) src
->i
[1];
523 dst
->f
[2] = (float) src
->i
[2];
524 dst
->f
[3] = (float) src
->i
[3];
529 union tgsi_exec_channel
*dst
,
530 const union tgsi_exec_channel
*src
)
533 dst
->f
[0] = util_fast_log2( src
->f
[0] );
534 dst
->f
[1] = util_fast_log2( src
->f
[1] );
535 dst
->f
[2] = util_fast_log2( src
->f
[2] );
536 dst
->f
[3] = util_fast_log2( src
->f
[3] );
538 dst
->f
[0] = logf( src
->f
[0] ) * 1.442695f
;
539 dst
->f
[1] = logf( src
->f
[1] ) * 1.442695f
;
540 dst
->f
[2] = logf( src
->f
[2] ) * 1.442695f
;
541 dst
->f
[3] = logf( src
->f
[3] ) * 1.442695f
;
547 union tgsi_exec_channel
*dst
,
548 const union tgsi_exec_channel
*src0
,
549 const union tgsi_exec_channel
*src1
,
550 const union tgsi_exec_channel
*src2
,
551 const union tgsi_exec_channel
*src3
)
553 dst
->f
[0] = src0
->f
[0] <= src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
554 dst
->f
[1] = src0
->f
[1] <= src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
555 dst
->f
[2] = src0
->f
[2] <= src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
556 dst
->f
[3] = src0
->f
[3] <= src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
561 union tgsi_exec_channel
*dst
,
562 const union tgsi_exec_channel
*src0
,
563 const union tgsi_exec_channel
*src1
,
564 const union tgsi_exec_channel
*src2
,
565 const union tgsi_exec_channel
*src3
)
567 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
568 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
569 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
570 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
575 union tgsi_exec_channel
*dst
,
576 const union tgsi_exec_channel
*src0
,
577 const union tgsi_exec_channel
*src1
,
578 const union tgsi_exec_channel
*src2
,
579 const union tgsi_exec_channel
*src3
)
581 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src2
->i
[0] : src3
->i
[0];
582 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src2
->i
[1] : src3
->i
[1];
583 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src2
->i
[2] : src3
->i
[2];
584 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src2
->i
[3] : src3
->i
[3];
589 union tgsi_exec_channel
*dst
,
590 const union tgsi_exec_channel
*src0
,
591 const union tgsi_exec_channel
*src1
,
592 const union tgsi_exec_channel
*src2
,
593 const union tgsi_exec_channel
*src3
)
595 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src2
->u
[0] : src3
->u
[0];
596 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src2
->u
[1] : src3
->u
[1];
597 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src2
->u
[2] : src3
->u
[2];
598 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src2
->u
[3] : src3
->u
[3];
603 union tgsi_exec_channel
*dst
,
604 const union tgsi_exec_channel
*src0
,
605 const union tgsi_exec_channel
*src1
)
607 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
608 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
609 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
610 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
615 union tgsi_exec_channel
*dst
,
616 const union tgsi_exec_channel
*src0
,
617 const union tgsi_exec_channel
*src1
)
619 dst
->i
[0] = src0
->i
[0] > src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
620 dst
->i
[1] = src0
->i
[1] > src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
621 dst
->i
[2] = src0
->i
[2] > src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
622 dst
->i
[3] = src0
->i
[3] > src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
627 union tgsi_exec_channel
*dst
,
628 const union tgsi_exec_channel
*src0
,
629 const union tgsi_exec_channel
*src1
)
631 dst
->u
[0] = src0
->u
[0] > src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
632 dst
->u
[1] = src0
->u
[1] > src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
633 dst
->u
[2] = src0
->u
[2] > src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
634 dst
->u
[3] = src0
->u
[3] > src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
639 union tgsi_exec_channel
*dst
,
640 const union tgsi_exec_channel
*src0
,
641 const union tgsi_exec_channel
*src1
)
643 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
644 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
645 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
646 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
651 union tgsi_exec_channel
*dst
,
652 const union tgsi_exec_channel
*src0
,
653 const union tgsi_exec_channel
*src1
)
655 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
656 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
657 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
658 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
663 union tgsi_exec_channel
*dst
,
664 const union tgsi_exec_channel
*src0
,
665 const union tgsi_exec_channel
*src1
)
667 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
668 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
669 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
670 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
675 union tgsi_exec_channel
*dst
,
676 const union tgsi_exec_channel
*src0
,
677 const union tgsi_exec_channel
*src1
)
679 dst
->u
[0] = src0
->u
[0] % src1
->u
[0];
680 dst
->u
[1] = src0
->u
[1] % src1
->u
[1];
681 dst
->u
[2] = src0
->u
[2] % src1
->u
[2];
682 dst
->u
[3] = src0
->u
[3] % src1
->u
[3];
687 union tgsi_exec_channel
*dst
,
688 const union tgsi_exec_channel
*src0
,
689 const union tgsi_exec_channel
*src1
)
691 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
692 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
693 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
694 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
699 union tgsi_exec_channel
*dst
,
700 const union tgsi_exec_channel
*src0
,
701 const union tgsi_exec_channel
*src1
)
703 dst
->i
[0] = src0
->i
[0] * src1
->i
[0];
704 dst
->i
[1] = src0
->i
[1] * src1
->i
[1];
705 dst
->i
[2] = src0
->i
[2] * src1
->i
[2];
706 dst
->i
[3] = src0
->i
[3] * src1
->i
[3];
711 union tgsi_exec_channel
*dst0
,
712 union tgsi_exec_channel
*dst1
,
713 const union tgsi_exec_channel
*src0
,
714 const union tgsi_exec_channel
*src1
)
716 dst1
->i
[0] = src0
->i
[0] * src1
->i
[0];
717 dst1
->i
[1] = src0
->i
[1] * src1
->i
[1];
718 dst1
->i
[2] = src0
->i
[2] * src1
->i
[2];
719 dst1
->i
[3] = src0
->i
[3] * src1
->i
[3];
728 union tgsi_exec_channel
*dst0
,
729 union tgsi_exec_channel
*dst1
,
730 const union tgsi_exec_channel
*src0
,
731 const union tgsi_exec_channel
*src1
)
733 dst1
->u
[0] = src0
->u
[0] * src1
->u
[0];
734 dst1
->u
[1] = src0
->u
[1] * src1
->u
[1];
735 dst1
->u
[2] = src0
->u
[2] * src1
->u
[2];
736 dst1
->u
[3] = src0
->u
[3] * src1
->u
[3];
745 union tgsi_exec_channel
*dst
,
746 const union tgsi_exec_channel
*src0
,
747 const union tgsi_exec_channel
*src1
,
748 const union tgsi_exec_channel
*src2
)
750 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
751 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
752 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
753 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
758 union tgsi_exec_channel
*dst
,
759 const union tgsi_exec_channel
*src
)
761 dst
->f
[0] = -src
->f
[0];
762 dst
->f
[1] = -src
->f
[1];
763 dst
->f
[2] = -src
->f
[2];
764 dst
->f
[3] = -src
->f
[3];
769 union tgsi_exec_channel
*dst
,
770 const union tgsi_exec_channel
*src
)
772 dst
->i
[0] = -src
->i
[0];
773 dst
->i
[1] = -src
->i
[1];
774 dst
->i
[2] = -src
->i
[2];
775 dst
->i
[3] = -src
->i
[3];
780 union tgsi_exec_channel
*dst
,
781 const union tgsi_exec_channel
*src
)
783 dst
->u
[0] = ~src
->u
[0];
784 dst
->u
[1] = ~src
->u
[1];
785 dst
->u
[2] = ~src
->u
[2];
786 dst
->u
[3] = ~src
->u
[3];
791 union tgsi_exec_channel
*dst
,
792 const union tgsi_exec_channel
*src0
,
793 const union tgsi_exec_channel
*src1
)
795 dst
->u
[0] = src0
->u
[0] | src1
->u
[0];
796 dst
->u
[1] = src0
->u
[1] | src1
->u
[1];
797 dst
->u
[2] = src0
->u
[2] | src1
->u
[2];
798 dst
->u
[3] = src0
->u
[3] | src1
->u
[3];
803 union tgsi_exec_channel
*dst
,
804 const union tgsi_exec_channel
*src0
,
805 const union tgsi_exec_channel
*src1
)
808 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
809 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
810 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
811 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
813 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
814 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
815 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
816 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
822 union tgsi_exec_channel
*dst
,
823 const union tgsi_exec_channel
*src
)
825 dst
->f
[0] = floorf( src
->f
[0] + 0.5f
);
826 dst
->f
[1] = floorf( src
->f
[1] + 0.5f
);
827 dst
->f
[2] = floorf( src
->f
[2] + 0.5f
);
828 dst
->f
[3] = floorf( src
->f
[3] + 0.5f
);
833 union tgsi_exec_channel
*dst
,
834 const union tgsi_exec_channel
*src
)
836 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
837 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
838 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
839 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
844 union tgsi_exec_channel
*dst
,
845 const union tgsi_exec_channel
*src0
,
846 const union tgsi_exec_channel
*src1
)
848 dst
->i
[0] = src0
->i
[0] << src1
->i
[0];
849 dst
->i
[1] = src0
->i
[1] << src1
->i
[1];
850 dst
->i
[2] = src0
->i
[2] << src1
->i
[2];
851 dst
->i
[3] = src0
->i
[3] << src1
->i
[3];
856 union tgsi_exec_channel
*dst
,
857 const union tgsi_exec_channel
*src0
,
858 const union tgsi_exec_channel
*src1
)
860 dst
->i
[0] = src0
->i
[0] >> src1
->i
[0];
861 dst
->i
[1] = src0
->i
[1] >> src1
->i
[1];
862 dst
->i
[2] = src0
->i
[2] >> src1
->i
[2];
863 dst
->i
[3] = src0
->i
[3] >> src1
->i
[3];
868 union tgsi_exec_channel
*dst
,
869 const union tgsi_exec_channel
*src0
)
871 dst
->f
[0] = (float) (int) src0
->f
[0];
872 dst
->f
[1] = (float) (int) src0
->f
[1];
873 dst
->f
[2] = (float) (int) src0
->f
[2];
874 dst
->f
[3] = (float) (int) src0
->f
[3];
879 union tgsi_exec_channel
*dst
,
880 const union tgsi_exec_channel
*src0
,
881 const union tgsi_exec_channel
*src1
)
883 dst
->u
[0] = src0
->u
[0] >> src1
->u
[0];
884 dst
->u
[1] = src0
->u
[1] >> src1
->u
[1];
885 dst
->u
[2] = src0
->u
[2] >> src1
->u
[2];
886 dst
->u
[3] = src0
->u
[3] >> src1
->u
[3];
891 union tgsi_exec_channel
*dst
,
892 const union tgsi_exec_channel
*src
)
894 dst
->f
[0] = sinf( src
->f
[0] );
895 dst
->f
[1] = sinf( src
->f
[1] );
896 dst
->f
[2] = sinf( src
->f
[2] );
897 dst
->f
[3] = sinf( src
->f
[3] );
901 micro_sqrt( union tgsi_exec_channel
*dst
,
902 const union tgsi_exec_channel
*src
)
904 dst
->f
[0] = sqrtf( src
->f
[0] );
905 dst
->f
[1] = sqrtf( src
->f
[1] );
906 dst
->f
[2] = sqrtf( src
->f
[2] );
907 dst
->f
[3] = sqrtf( src
->f
[3] );
912 union tgsi_exec_channel
*dst
,
913 const union tgsi_exec_channel
*src0
,
914 const union tgsi_exec_channel
*src1
)
916 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
917 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
918 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
919 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
924 union tgsi_exec_channel
*dst
,
925 const union tgsi_exec_channel
*src
)
927 dst
->f
[0] = (float) src
->u
[0];
928 dst
->f
[1] = (float) src
->u
[1];
929 dst
->f
[2] = (float) src
->u
[2];
930 dst
->f
[3] = (float) src
->u
[3];
935 union tgsi_exec_channel
*dst
,
936 const union tgsi_exec_channel
*src0
,
937 const union tgsi_exec_channel
*src1
)
939 dst
->u
[0] = src0
->u
[0] ^ src1
->u
[0];
940 dst
->u
[1] = src0
->u
[1] ^ src1
->u
[1];
941 dst
->u
[2] = src0
->u
[2] ^ src1
->u
[2];
942 dst
->u
[3] = src0
->u
[3] ^ src1
->u
[3];
946 fetch_src_file_channel(
947 const struct tgsi_exec_machine
*mach
,
950 const union tgsi_exec_channel
*index
,
951 union tgsi_exec_channel
*chan
)
954 case TGSI_EXTSWIZZLE_X
:
955 case TGSI_EXTSWIZZLE_Y
:
956 case TGSI_EXTSWIZZLE_Z
:
957 case TGSI_EXTSWIZZLE_W
:
959 case TGSI_FILE_CONSTANT
:
960 assert(mach
->Consts
);
964 chan
->f
[0] = mach
->Consts
[index
->i
[0]][swizzle
];
968 chan
->f
[1] = mach
->Consts
[index
->i
[1]][swizzle
];
972 chan
->f
[2] = mach
->Consts
[index
->i
[2]][swizzle
];
976 chan
->f
[3] = mach
->Consts
[index
->i
[3]][swizzle
];
979 case TGSI_FILE_INPUT
:
980 chan
->u
[0] = mach
->Inputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
981 chan
->u
[1] = mach
->Inputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
982 chan
->u
[2] = mach
->Inputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
983 chan
->u
[3] = mach
->Inputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
986 case TGSI_FILE_TEMPORARY
:
987 assert(index
->i
[0] < TGSI_EXEC_NUM_TEMPS
);
988 chan
->u
[0] = mach
->Temps
[index
->i
[0]].xyzw
[swizzle
].u
[0];
989 chan
->u
[1] = mach
->Temps
[index
->i
[1]].xyzw
[swizzle
].u
[1];
990 chan
->u
[2] = mach
->Temps
[index
->i
[2]].xyzw
[swizzle
].u
[2];
991 chan
->u
[3] = mach
->Temps
[index
->i
[3]].xyzw
[swizzle
].u
[3];
994 case TGSI_FILE_IMMEDIATE
:
995 assert( index
->i
[0] < (int) mach
->ImmLimit
);
996 chan
->f
[0] = mach
->Imms
[index
->i
[0]][swizzle
];
997 assert( index
->i
[1] < (int) mach
->ImmLimit
);
998 chan
->f
[1] = mach
->Imms
[index
->i
[1]][swizzle
];
999 assert( index
->i
[2] < (int) mach
->ImmLimit
);
1000 chan
->f
[2] = mach
->Imms
[index
->i
[2]][swizzle
];
1001 assert( index
->i
[3] < (int) mach
->ImmLimit
);
1002 chan
->f
[3] = mach
->Imms
[index
->i
[3]][swizzle
];
1005 case TGSI_FILE_ADDRESS
:
1006 chan
->u
[0] = mach
->Addrs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1007 chan
->u
[1] = mach
->Addrs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1008 chan
->u
[2] = mach
->Addrs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1009 chan
->u
[3] = mach
->Addrs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1012 case TGSI_FILE_OUTPUT
:
1013 /* vertex/fragment output vars can be read too */
1014 chan
->u
[0] = mach
->Outputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1015 chan
->u
[1] = mach
->Outputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1016 chan
->u
[2] = mach
->Outputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1017 chan
->u
[3] = mach
->Outputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1025 case TGSI_EXTSWIZZLE_ZERO
:
1026 *chan
= mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
];
1029 case TGSI_EXTSWIZZLE_ONE
:
1030 *chan
= mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
];
1040 const struct tgsi_exec_machine
*mach
,
1041 union tgsi_exec_channel
*chan
,
1042 const struct tgsi_full_src_register
*reg
,
1043 const uint chan_index
)
1045 union tgsi_exec_channel index
;
1048 /* We start with a direct index into a register file.
1052 * file = SrcRegister.File
1053 * [1] = SrcRegister.Index
1058 index
.i
[3] = reg
->SrcRegister
.Index
;
1060 /* There is an extra source register that indirectly subscripts
1061 * a register file. The direct index now becomes an offset
1062 * that is being added to the indirect register.
1066 * ind = SrcRegisterInd.File
1067 * [2] = SrcRegisterInd.Index
1068 * .x = SrcRegisterInd.SwizzleX
1070 if (reg
->SrcRegister
.Indirect
) {
1071 union tgsi_exec_channel index2
;
1072 union tgsi_exec_channel indir_index
;
1073 const uint execmask
= mach
->ExecMask
;
1076 /* which address register (always zero now) */
1080 index2
.i
[3] = reg
->SrcRegisterInd
.Index
;
1082 /* get current value of address register[swizzle] */
1083 swizzle
= tgsi_util_get_src_register_swizzle( ®
->SrcRegisterInd
, CHAN_X
);
1084 fetch_src_file_channel(
1086 reg
->SrcRegisterInd
.File
,
1091 /* add value of address register to the offset */
1092 index
.i
[0] += (int) indir_index
.f
[0];
1093 index
.i
[1] += (int) indir_index
.f
[1];
1094 index
.i
[2] += (int) indir_index
.f
[2];
1095 index
.i
[3] += (int) indir_index
.f
[3];
1097 /* for disabled execution channels, zero-out the index to
1098 * avoid using a potential garbage value.
1100 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1101 if ((execmask
& (1 << i
)) == 0)
1106 /* There is an extra source register that is a second
1107 * subscript to a register file. Effectively it means that
1108 * the register file is actually a 2D array of registers.
1110 * file[1][3] == file[1*sizeof(file[1])+3],
1112 * [3] = SrcRegisterDim.Index
1114 if (reg
->SrcRegister
.Dimension
) {
1115 /* The size of the first-order array depends on the register file type.
1116 * We need to multiply the index to the first array to get an effective,
1117 * "flat" index that points to the beginning of the second-order array.
1119 switch (reg
->SrcRegister
.File
) {
1120 case TGSI_FILE_INPUT
:
1121 index
.i
[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1122 index
.i
[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1123 index
.i
[2] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1124 index
.i
[3] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1126 case TGSI_FILE_CONSTANT
:
1127 index
.i
[0] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1128 index
.i
[1] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1129 index
.i
[2] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1130 index
.i
[3] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1136 index
.i
[0] += reg
->SrcRegisterDim
.Index
;
1137 index
.i
[1] += reg
->SrcRegisterDim
.Index
;
1138 index
.i
[2] += reg
->SrcRegisterDim
.Index
;
1139 index
.i
[3] += reg
->SrcRegisterDim
.Index
;
1141 /* Again, the second subscript index can be addressed indirectly
1142 * identically to the first one.
1143 * Nothing stops us from indirectly addressing the indirect register,
1144 * but there is no need for that, so we won't exercise it.
1146 * file[1][ind[4].y+3],
1148 * ind = SrcRegisterDimInd.File
1149 * [4] = SrcRegisterDimInd.Index
1150 * .y = SrcRegisterDimInd.SwizzleX
1152 if (reg
->SrcRegisterDim
.Indirect
) {
1153 union tgsi_exec_channel index2
;
1154 union tgsi_exec_channel indir_index
;
1155 const uint execmask
= mach
->ExecMask
;
1161 index2
.i
[3] = reg
->SrcRegisterDimInd
.Index
;
1163 swizzle
= tgsi_util_get_src_register_swizzle( ®
->SrcRegisterDimInd
, CHAN_X
);
1164 fetch_src_file_channel(
1166 reg
->SrcRegisterDimInd
.File
,
1171 index
.i
[0] += (int) indir_index
.f
[0];
1172 index
.i
[1] += (int) indir_index
.f
[1];
1173 index
.i
[2] += (int) indir_index
.f
[2];
1174 index
.i
[3] += (int) indir_index
.f
[3];
1176 /* for disabled execution channels, zero-out the index to
1177 * avoid using a potential garbage value.
1179 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1180 if ((execmask
& (1 << i
)) == 0)
1185 /* If by any chance there was a need for a 3D array of register
1186 * files, we would have to check whether SrcRegisterDim is followed
1187 * by a dimension register and continue the saga.
1191 swizzle
= tgsi_util_get_full_src_register_extswizzle( reg
, chan_index
);
1192 fetch_src_file_channel(
1194 reg
->SrcRegister
.File
,
1199 switch (tgsi_util_get_full_src_register_sign_mode( reg
, chan_index
)) {
1200 case TGSI_UTIL_SIGN_CLEAR
:
1201 micro_abs( chan
, chan
);
1204 case TGSI_UTIL_SIGN_SET
:
1205 micro_abs( chan
, chan
);
1206 micro_neg( chan
, chan
);
1209 case TGSI_UTIL_SIGN_TOGGLE
:
1210 micro_neg( chan
, chan
);
1213 case TGSI_UTIL_SIGN_KEEP
:
1217 if (reg
->SrcRegisterExtMod
.Complement
) {
1218 micro_sub( chan
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], chan
);
1224 struct tgsi_exec_machine
*mach
,
1225 const union tgsi_exec_channel
*chan
,
1226 const struct tgsi_full_dst_register
*reg
,
1227 const struct tgsi_full_instruction
*inst
,
1231 union tgsi_exec_channel null
;
1232 union tgsi_exec_channel
*dst
;
1233 uint execmask
= mach
->ExecMask
;
1235 switch (reg
->DstRegister
.File
) {
1236 case TGSI_FILE_NULL
:
1240 case TGSI_FILE_OUTPUT
:
1241 dst
= &mach
->Outputs
[mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1242 + reg
->DstRegister
.Index
].xyzw
[chan_index
];
1245 case TGSI_FILE_TEMPORARY
:
1246 assert( reg
->DstRegister
.Index
< TGSI_EXEC_NUM_TEMPS
);
1247 dst
= &mach
->Temps
[reg
->DstRegister
.Index
].xyzw
[chan_index
];
1250 case TGSI_FILE_ADDRESS
:
1251 dst
= &mach
->Addrs
[reg
->DstRegister
.Index
].xyzw
[chan_index
];
1259 if (inst
->InstructionExtNv
.CondFlowEnable
) {
1260 union tgsi_exec_channel
*cc
= &mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
];
1266 /* Only CC0 supported.
1268 assert( inst
->InstructionExtNv
.CondFlowIndex
< 1 );
1270 switch (chan_index
) {
1272 swizzle
= inst
->InstructionExtNv
.CondSwizzleX
;
1275 swizzle
= inst
->InstructionExtNv
.CondSwizzleY
;
1278 swizzle
= inst
->InstructionExtNv
.CondSwizzleZ
;
1281 swizzle
= inst
->InstructionExtNv
.CondSwizzleW
;
1289 case TGSI_SWIZZLE_X
:
1290 shift
= TGSI_EXEC_CC_X_SHIFT
;
1291 mask
= TGSI_EXEC_CC_X_MASK
;
1293 case TGSI_SWIZZLE_Y
:
1294 shift
= TGSI_EXEC_CC_Y_SHIFT
;
1295 mask
= TGSI_EXEC_CC_Y_MASK
;
1297 case TGSI_SWIZZLE_Z
:
1298 shift
= TGSI_EXEC_CC_Z_SHIFT
;
1299 mask
= TGSI_EXEC_CC_Z_MASK
;
1301 case TGSI_SWIZZLE_W
:
1302 shift
= TGSI_EXEC_CC_W_SHIFT
;
1303 mask
= TGSI_EXEC_CC_W_MASK
;
1310 switch (inst
->InstructionExtNv
.CondMask
) {
1312 test
= ~(TGSI_EXEC_CC_GT
<< shift
) & mask
;
1313 for (i
= 0; i
< QUAD_SIZE
; i
++)
1314 if (cc
->u
[i
] & test
)
1315 execmask
&= ~(1 << i
);
1319 test
= ~(TGSI_EXEC_CC_EQ
<< shift
) & mask
;
1320 for (i
= 0; i
< QUAD_SIZE
; i
++)
1321 if (cc
->u
[i
] & test
)
1322 execmask
&= ~(1 << i
);
1326 test
= ~(TGSI_EXEC_CC_LT
<< shift
) & mask
;
1327 for (i
= 0; i
< QUAD_SIZE
; i
++)
1328 if (cc
->u
[i
] & test
)
1329 execmask
&= ~(1 << i
);
1333 test
= ~((TGSI_EXEC_CC_GT
| TGSI_EXEC_CC_EQ
) << shift
) & mask
;
1334 for (i
= 0; i
< QUAD_SIZE
; i
++)
1335 if (cc
->u
[i
] & test
)
1336 execmask
&= ~(1 << i
);
1340 test
= ~((TGSI_EXEC_CC_LT
| TGSI_EXEC_CC_EQ
) << shift
) & mask
;
1341 for (i
= 0; i
< QUAD_SIZE
; i
++)
1342 if (cc
->u
[i
] & test
)
1343 execmask
&= ~(1 << i
);
1347 test
= ~((TGSI_EXEC_CC_GT
| TGSI_EXEC_CC_LT
| TGSI_EXEC_CC_UN
) << shift
) & mask
;
1348 for (i
= 0; i
< QUAD_SIZE
; i
++)
1349 if (cc
->u
[i
] & test
)
1350 execmask
&= ~(1 << i
);
1357 for (i
= 0; i
< QUAD_SIZE
; i
++)
1358 execmask
&= ~(1 << i
);
1367 switch (inst
->Instruction
.Saturate
) {
1369 for (i
= 0; i
< QUAD_SIZE
; i
++)
1370 if (execmask
& (1 << i
))
1371 dst
->i
[i
] = chan
->i
[i
];
1374 case TGSI_SAT_ZERO_ONE
:
1375 for (i
= 0; i
< QUAD_SIZE
; i
++)
1376 if (execmask
& (1 << i
)) {
1377 if (chan
->f
[i
] < 0.0f
)
1379 else if (chan
->f
[i
] > 1.0f
)
1382 dst
->i
[i
] = chan
->i
[i
];
1386 case TGSI_SAT_MINUS_PLUS_ONE
:
1387 for (i
= 0; i
< QUAD_SIZE
; i
++)
1388 if (execmask
& (1 << i
)) {
1389 if (chan
->f
[i
] < -1.0f
)
1391 else if (chan
->f
[i
] > 1.0f
)
1394 dst
->i
[i
] = chan
->i
[i
];
1402 if (inst
->InstructionExtNv
.CondDstUpdate
) {
1403 union tgsi_exec_channel
*cc
= &mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
];
1407 /* Only CC0 supported.
1409 assert( inst
->InstructionExtNv
.CondDstIndex
< 1 );
1411 switch (chan_index
) {
1413 shift
= TGSI_EXEC_CC_X_SHIFT
;
1414 mask
= ~TGSI_EXEC_CC_X_MASK
;
1417 shift
= TGSI_EXEC_CC_Y_SHIFT
;
1418 mask
= ~TGSI_EXEC_CC_Y_MASK
;
1421 shift
= TGSI_EXEC_CC_Z_SHIFT
;
1422 mask
= ~TGSI_EXEC_CC_Z_MASK
;
1425 shift
= TGSI_EXEC_CC_W_SHIFT
;
1426 mask
= ~TGSI_EXEC_CC_W_MASK
;
1433 for (i
= 0; i
< QUAD_SIZE
; i
++)
1434 if (execmask
& (1 << i
)) {
1436 if (dst
->f
[i
] < 0.0f
)
1437 cc
->u
[i
] |= TGSI_EXEC_CC_LT
<< shift
;
1438 else if (dst
->f
[i
] > 0.0f
)
1439 cc
->u
[i
] |= TGSI_EXEC_CC_GT
<< shift
;
1440 else if (dst
->f
[i
] == 0.0f
)
1441 cc
->u
[i
] |= TGSI_EXEC_CC_EQ
<< shift
;
1443 cc
->u
[i
] |= TGSI_EXEC_CC_UN
<< shift
;
1448 #define FETCH(VAL,INDEX,CHAN)\
1449 fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
1451 #define STORE(VAL,INDEX,CHAN)\
1452 store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
1456 * Execute ARB-style KIL which is predicated by a src register.
1457 * Kill fragment if any of the four values is less than zero.
1460 exec_kil(struct tgsi_exec_machine
*mach
,
1461 const struct tgsi_full_instruction
*inst
)
1465 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1466 union tgsi_exec_channel r
[1];
1468 /* This mask stores component bits that were already tested. Note that
1469 * we test if the value is less than zero, so 1.0 and 0.0 need not to be
1471 uniquemask
= (1 << TGSI_EXTSWIZZLE_ZERO
) | (1 << TGSI_EXTSWIZZLE_ONE
);
1473 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1478 /* unswizzle channel */
1479 swizzle
= tgsi_util_get_full_src_register_extswizzle (
1480 &inst
->FullSrcRegisters
[0],
1483 /* check if the component has not been already tested */
1484 if (uniquemask
& (1 << swizzle
))
1486 uniquemask
|= 1 << swizzle
;
1488 FETCH(&r
[0], 0, chan_index
);
1489 for (i
= 0; i
< 4; i
++)
1490 if (r
[0].f
[i
] < 0.0f
)
1494 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1498 * Execute NVIDIA-style KIL which is predicated by a condition code.
1499 * Kill fragment if the condition code is TRUE.
1502 exec_kilp(struct tgsi_exec_machine
*mach
,
1503 const struct tgsi_full_instruction
*inst
)
1505 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1507 if (inst
->InstructionExtNv
.CondFlowEnable
) {
1513 swizzle
[0] = inst
->InstructionExtNv
.CondSwizzleX
;
1514 swizzle
[1] = inst
->InstructionExtNv
.CondSwizzleY
;
1515 swizzle
[2] = inst
->InstructionExtNv
.CondSwizzleZ
;
1516 swizzle
[3] = inst
->InstructionExtNv
.CondSwizzleW
;
1518 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1522 for (i
= 0; i
< 4; i
++) {
1523 /* TODO: evaluate the condition code */
1530 /* "unconditional" kil */
1531 kilmask
= mach
->ExecMask
;
1533 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1538 * Fetch a four texture samples using STR texture coordinates.
1541 fetch_texel( struct tgsi_sampler
*sampler
,
1542 const union tgsi_exec_channel
*s
,
1543 const union tgsi_exec_channel
*t
,
1544 const union tgsi_exec_channel
*p
,
1545 float lodbias
, /* XXX should be float[4] */
1546 union tgsi_exec_channel
*r
,
1547 union tgsi_exec_channel
*g
,
1548 union tgsi_exec_channel
*b
,
1549 union tgsi_exec_channel
*a
)
1552 float rgba
[NUM_CHANNELS
][QUAD_SIZE
];
1554 sampler
->get_samples(sampler
, s
->f
, t
->f
, p
->f
, lodbias
, rgba
);
1556 for (j
= 0; j
< 4; j
++) {
1557 r
->f
[j
] = rgba
[0][j
];
1558 g
->f
[j
] = rgba
[1][j
];
1559 b
->f
[j
] = rgba
[2][j
];
1560 a
->f
[j
] = rgba
[3][j
];
1566 exec_tex(struct tgsi_exec_machine
*mach
,
1567 const struct tgsi_full_instruction
*inst
,
1571 const uint unit
= inst
->FullSrcRegisters
[1].SrcRegister
.Index
;
1572 union tgsi_exec_channel r
[4];
1576 /* debug_printf("Sampler %u unit %u\n", sampler, unit); */
1578 switch (inst
->InstructionExtTexture
.Texture
) {
1579 case TGSI_TEXTURE_1D
:
1581 FETCH(&r
[0], 0, CHAN_X
);
1584 FETCH(&r
[1], 0, CHAN_W
);
1585 micro_div( &r
[0], &r
[0], &r
[1] );
1589 FETCH(&r
[1], 0, CHAN_W
);
1590 lodBias
= r
[2].f
[0];
1595 fetch_texel(mach
->Samplers
[unit
],
1596 &r
[0], NULL
, NULL
, lodBias
, /* S, T, P, BIAS */
1597 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1600 case TGSI_TEXTURE_2D
:
1601 case TGSI_TEXTURE_RECT
:
1603 FETCH(&r
[0], 0, CHAN_X
);
1604 FETCH(&r
[1], 0, CHAN_Y
);
1605 FETCH(&r
[2], 0, CHAN_Z
);
1608 FETCH(&r
[3], 0, CHAN_W
);
1609 micro_div( &r
[0], &r
[0], &r
[3] );
1610 micro_div( &r
[1], &r
[1], &r
[3] );
1611 micro_div( &r
[2], &r
[2], &r
[3] );
1615 FETCH(&r
[3], 0, CHAN_W
);
1616 lodBias
= r
[3].f
[0];
1621 fetch_texel(mach
->Samplers
[unit
],
1622 &r
[0], &r
[1], &r
[2], lodBias
, /* inputs */
1623 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1626 case TGSI_TEXTURE_3D
:
1627 case TGSI_TEXTURE_CUBE
:
1629 FETCH(&r
[0], 0, CHAN_X
);
1630 FETCH(&r
[1], 0, CHAN_Y
);
1631 FETCH(&r
[2], 0, CHAN_Z
);
1634 FETCH(&r
[3], 0, CHAN_W
);
1635 micro_div( &r
[0], &r
[0], &r
[3] );
1636 micro_div( &r
[1], &r
[1], &r
[3] );
1637 micro_div( &r
[2], &r
[2], &r
[3] );
1641 FETCH(&r
[3], 0, CHAN_W
);
1642 lodBias
= r
[3].f
[0];
1647 fetch_texel(mach
->Samplers
[unit
],
1648 &r
[0], &r
[1], &r
[2], lodBias
,
1649 &r
[0], &r
[1], &r
[2], &r
[3]);
1656 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1657 STORE( &r
[chan_index
], 0, chan_index
);
1663 * Evaluate a constant-valued coefficient at the position of the
1668 struct tgsi_exec_machine
*mach
,
1674 for( i
= 0; i
< QUAD_SIZE
; i
++ ) {
1675 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
1680 * Evaluate a linear-valued coefficient at the position of the
1685 struct tgsi_exec_machine
*mach
,
1689 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1690 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1691 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1692 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1693 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1694 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
1695 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
1696 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
1697 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
1701 * Evaluate a perspective-valued coefficient at the position of the
1705 eval_perspective_coef(
1706 struct tgsi_exec_machine
*mach
,
1710 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1711 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1712 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1713 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1714 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1715 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
1716 /* divide by W here */
1717 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
1718 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
1719 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
1720 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
1724 typedef void (* eval_coef_func
)(
1725 struct tgsi_exec_machine
*mach
,
1731 struct tgsi_exec_machine
*mach
,
1732 const struct tgsi_full_declaration
*decl
)
1734 if( mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
1735 if( decl
->Declaration
.File
== TGSI_FILE_INPUT
) {
1736 unsigned first
, last
, mask
;
1737 eval_coef_func eval
;
1739 first
= decl
->DeclarationRange
.First
;
1740 last
= decl
->DeclarationRange
.Last
;
1741 mask
= decl
->Declaration
.UsageMask
;
1743 switch( decl
->Declaration
.Interpolate
) {
1744 case TGSI_INTERPOLATE_CONSTANT
:
1745 eval
= eval_constant_coef
;
1748 case TGSI_INTERPOLATE_LINEAR
:
1749 eval
= eval_linear_coef
;
1752 case TGSI_INTERPOLATE_PERSPECTIVE
:
1753 eval
= eval_perspective_coef
;
1761 if( mask
== TGSI_WRITEMASK_XYZW
) {
1764 for( i
= first
; i
<= last
; i
++ ) {
1765 for( j
= 0; j
< NUM_CHANNELS
; j
++ ) {
1773 for( j
= 0; j
< NUM_CHANNELS
; j
++ ) {
1774 if( mask
& (1 << j
) ) {
1775 for( i
= first
; i
<= last
; i
++ ) {
1787 struct tgsi_exec_machine
*mach
,
1788 const struct tgsi_full_instruction
*inst
,
1792 union tgsi_exec_channel r
[8];
1796 switch (inst
->Instruction
.Opcode
) {
1797 case TGSI_OPCODE_ARL
:
1798 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1799 FETCH( &r
[0], 0, chan_index
);
1800 micro_flr( &r
[0], &r
[0] );
1801 STORE( &r
[0], 0, chan_index
);
1805 case TGSI_OPCODE_MOV
:
1806 case TGSI_OPCODE_SWZ
:
1807 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1808 FETCH( &r
[0], 0, chan_index
);
1809 STORE( &r
[0], 0, chan_index
);
1813 case TGSI_OPCODE_LIT
:
1814 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1815 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
1818 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1819 FETCH( &r
[0], 0, CHAN_X
);
1820 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1821 micro_max( &r
[0], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
1822 STORE( &r
[0], 0, CHAN_Y
);
1825 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1826 FETCH( &r
[1], 0, CHAN_Y
);
1827 micro_max( &r
[1], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
1829 FETCH( &r
[2], 0, CHAN_W
);
1830 micro_min( &r
[2], &r
[2], &mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
] );
1831 micro_max( &r
[2], &r
[2], &mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
] );
1832 micro_pow( &r
[1], &r
[1], &r
[2] );
1833 micro_lt( &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
1834 STORE( &r
[0], 0, CHAN_Z
);
1838 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1839 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
1843 case TGSI_OPCODE_RCP
:
1844 /* TGSI_OPCODE_RECIP */
1845 FETCH( &r
[0], 0, CHAN_X
);
1846 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
1847 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1848 STORE( &r
[0], 0, chan_index
);
1852 case TGSI_OPCODE_RSQ
:
1853 /* TGSI_OPCODE_RECIPSQRT */
1854 FETCH( &r
[0], 0, CHAN_X
);
1855 micro_sqrt( &r
[0], &r
[0] );
1856 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
1857 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1858 STORE( &r
[0], 0, chan_index
);
1862 case TGSI_OPCODE_EXP
:
1863 FETCH( &r
[0], 0, CHAN_X
);
1864 micro_flr( &r
[1], &r
[0] ); /* r1 = floor(r0) */
1865 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1866 micro_exp2( &r
[2], &r
[1] ); /* r2 = 2 ^ r1 */
1867 STORE( &r
[2], 0, CHAN_X
); /* store r2 */
1869 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1870 micro_sub( &r
[2], &r
[0], &r
[1] ); /* r2 = r0 - r1 */
1871 STORE( &r
[2], 0, CHAN_Y
); /* store r2 */
1873 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1874 micro_exp2( &r
[2], &r
[0] ); /* r2 = 2 ^ r0 */
1875 STORE( &r
[2], 0, CHAN_Z
); /* store r2 */
1877 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1878 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
1882 case TGSI_OPCODE_LOG
:
1883 FETCH( &r
[0], 0, CHAN_X
);
1884 micro_abs( &r
[2], &r
[0] ); /* r2 = abs(r0) */
1885 micro_lg2( &r
[1], &r
[2] ); /* r1 = lg2(r2) */
1886 micro_flr( &r
[0], &r
[1] ); /* r0 = floor(r1) */
1887 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1888 STORE( &r
[0], 0, CHAN_X
);
1890 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1891 micro_exp2( &r
[0], &r
[0] ); /* r0 = 2 ^ r0 */
1892 micro_div( &r
[0], &r
[2], &r
[0] ); /* r0 = r2 / r0 */
1893 STORE( &r
[0], 0, CHAN_Y
);
1895 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1896 STORE( &r
[1], 0, CHAN_Z
);
1898 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1899 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
1903 case TGSI_OPCODE_MUL
:
1904 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
)
1906 FETCH(&r
[0], 0, chan_index
);
1907 FETCH(&r
[1], 1, chan_index
);
1909 micro_mul( &r
[0], &r
[0], &r
[1] );
1911 STORE(&r
[0], 0, chan_index
);
1915 case TGSI_OPCODE_ADD
:
1916 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1917 FETCH( &r
[0], 0, chan_index
);
1918 FETCH( &r
[1], 1, chan_index
);
1919 micro_add( &r
[0], &r
[0], &r
[1] );
1920 STORE( &r
[0], 0, chan_index
);
1924 case TGSI_OPCODE_DP3
:
1925 /* TGSI_OPCODE_DOT3 */
1926 FETCH( &r
[0], 0, CHAN_X
);
1927 FETCH( &r
[1], 1, CHAN_X
);
1928 micro_mul( &r
[0], &r
[0], &r
[1] );
1930 FETCH( &r
[1], 0, CHAN_Y
);
1931 FETCH( &r
[2], 1, CHAN_Y
);
1932 micro_mul( &r
[1], &r
[1], &r
[2] );
1933 micro_add( &r
[0], &r
[0], &r
[1] );
1935 FETCH( &r
[1], 0, CHAN_Z
);
1936 FETCH( &r
[2], 1, CHAN_Z
);
1937 micro_mul( &r
[1], &r
[1], &r
[2] );
1938 micro_add( &r
[0], &r
[0], &r
[1] );
1940 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1941 STORE( &r
[0], 0, chan_index
);
1945 case TGSI_OPCODE_DP4
:
1946 /* TGSI_OPCODE_DOT4 */
1947 FETCH(&r
[0], 0, CHAN_X
);
1948 FETCH(&r
[1], 1, CHAN_X
);
1950 micro_mul( &r
[0], &r
[0], &r
[1] );
1952 FETCH(&r
[1], 0, CHAN_Y
);
1953 FETCH(&r
[2], 1, CHAN_Y
);
1955 micro_mul( &r
[1], &r
[1], &r
[2] );
1956 micro_add( &r
[0], &r
[0], &r
[1] );
1958 FETCH(&r
[1], 0, CHAN_Z
);
1959 FETCH(&r
[2], 1, CHAN_Z
);
1961 micro_mul( &r
[1], &r
[1], &r
[2] );
1962 micro_add( &r
[0], &r
[0], &r
[1] );
1964 FETCH(&r
[1], 0, CHAN_W
);
1965 FETCH(&r
[2], 1, CHAN_W
);
1967 micro_mul( &r
[1], &r
[1], &r
[2] );
1968 micro_add( &r
[0], &r
[0], &r
[1] );
1970 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1971 STORE( &r
[0], 0, chan_index
);
1975 case TGSI_OPCODE_DST
:
1976 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1977 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
1980 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1981 FETCH( &r
[0], 0, CHAN_Y
);
1982 FETCH( &r
[1], 1, CHAN_Y
);
1983 micro_mul( &r
[0], &r
[0], &r
[1] );
1984 STORE( &r
[0], 0, CHAN_Y
);
1987 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1988 FETCH( &r
[0], 0, CHAN_Z
);
1989 STORE( &r
[0], 0, CHAN_Z
);
1992 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1993 FETCH( &r
[0], 1, CHAN_W
);
1994 STORE( &r
[0], 0, CHAN_W
);
1998 case TGSI_OPCODE_MIN
:
1999 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2000 FETCH(&r
[0], 0, chan_index
);
2001 FETCH(&r
[1], 1, chan_index
);
2003 /* XXX use micro_min()?? */
2004 micro_lt( &r
[0], &r
[0], &r
[1], &r
[0], &r
[1] );
2006 STORE(&r
[0], 0, chan_index
);
2010 case TGSI_OPCODE_MAX
:
2011 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2012 FETCH(&r
[0], 0, chan_index
);
2013 FETCH(&r
[1], 1, chan_index
);
2015 /* XXX use micro_max()?? */
2016 micro_lt( &r
[0], &r
[0], &r
[1], &r
[1], &r
[0] );
2018 STORE(&r
[0], 0, chan_index
);
2022 case TGSI_OPCODE_SLT
:
2023 /* TGSI_OPCODE_SETLT */
2024 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2025 FETCH( &r
[0], 0, chan_index
);
2026 FETCH( &r
[1], 1, chan_index
);
2027 micro_lt( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2028 STORE( &r
[0], 0, chan_index
);
2032 case TGSI_OPCODE_SGE
:
2033 /* TGSI_OPCODE_SETGE */
2034 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2035 FETCH( &r
[0], 0, chan_index
);
2036 FETCH( &r
[1], 1, chan_index
);
2037 micro_ge( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2038 STORE( &r
[0], 0, chan_index
);
2042 case TGSI_OPCODE_MAD
:
2043 /* TGSI_OPCODE_MADD */
2044 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2045 FETCH( &r
[0], 0, chan_index
);
2046 FETCH( &r
[1], 1, chan_index
);
2047 micro_mul( &r
[0], &r
[0], &r
[1] );
2048 FETCH( &r
[1], 2, chan_index
);
2049 micro_add( &r
[0], &r
[0], &r
[1] );
2050 STORE( &r
[0], 0, chan_index
);
2054 case TGSI_OPCODE_SUB
:
2055 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2056 FETCH(&r
[0], 0, chan_index
);
2057 FETCH(&r
[1], 1, chan_index
);
2059 micro_sub( &r
[0], &r
[0], &r
[1] );
2061 STORE(&r
[0], 0, chan_index
);
2065 case TGSI_OPCODE_LERP
:
2066 /* TGSI_OPCODE_LRP */
2067 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2068 FETCH(&r
[0], 0, chan_index
);
2069 FETCH(&r
[1], 1, chan_index
);
2070 FETCH(&r
[2], 2, chan_index
);
2072 micro_sub( &r
[1], &r
[1], &r
[2] );
2073 micro_mul( &r
[0], &r
[0], &r
[1] );
2074 micro_add( &r
[0], &r
[0], &r
[2] );
2076 STORE(&r
[0], 0, chan_index
);
2080 case TGSI_OPCODE_CND
:
2084 case TGSI_OPCODE_CND0
:
2088 case TGSI_OPCODE_DOT2ADD
:
2089 /* TGSI_OPCODE_DP2A */
2090 FETCH( &r
[0], 0, CHAN_X
);
2091 FETCH( &r
[1], 1, CHAN_X
);
2092 micro_mul( &r
[0], &r
[0], &r
[1] );
2094 FETCH( &r
[1], 0, CHAN_Y
);
2095 FETCH( &r
[2], 1, CHAN_Y
);
2096 micro_mul( &r
[1], &r
[1], &r
[2] );
2097 micro_add( &r
[0], &r
[0], &r
[1] );
2099 FETCH( &r
[2], 2, CHAN_X
);
2100 micro_add( &r
[0], &r
[0], &r
[2] );
2102 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2103 STORE( &r
[0], 0, chan_index
);
2107 case TGSI_OPCODE_INDEX
:
2111 case TGSI_OPCODE_NEGATE
:
2115 case TGSI_OPCODE_FRAC
:
2116 /* TGSI_OPCODE_FRC */
2117 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2118 FETCH( &r
[0], 0, chan_index
);
2119 micro_frc( &r
[0], &r
[0] );
2120 STORE( &r
[0], 0, chan_index
);
2124 case TGSI_OPCODE_CLAMP
:
2128 case TGSI_OPCODE_FLOOR
:
2129 /* TGSI_OPCODE_FLR */
2130 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2131 FETCH( &r
[0], 0, chan_index
);
2132 micro_flr( &r
[0], &r
[0] );
2133 STORE( &r
[0], 0, chan_index
);
2137 case TGSI_OPCODE_ROUND
:
2138 case TGSI_OPCODE_ARR
:
2139 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2140 FETCH( &r
[0], 0, chan_index
);
2141 micro_rnd( &r
[0], &r
[0] );
2142 STORE( &r
[0], 0, chan_index
);
2146 case TGSI_OPCODE_EXPBASE2
:
2147 /* TGSI_OPCODE_EX2 */
2148 FETCH(&r
[0], 0, CHAN_X
);
2151 micro_exp2( &r
[0], &r
[0] );
2153 micro_pow( &r
[0], &mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
], &r
[0] );
2156 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2157 STORE( &r
[0], 0, chan_index
);
2161 case TGSI_OPCODE_LOGBASE2
:
2162 /* TGSI_OPCODE_LG2 */
2163 FETCH( &r
[0], 0, CHAN_X
);
2164 micro_lg2( &r
[0], &r
[0] );
2165 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2166 STORE( &r
[0], 0, chan_index
);
2170 case TGSI_OPCODE_POWER
:
2171 /* TGSI_OPCODE_POW */
2172 FETCH(&r
[0], 0, CHAN_X
);
2173 FETCH(&r
[1], 1, CHAN_X
);
2175 micro_pow( &r
[0], &r
[0], &r
[1] );
2177 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2178 STORE( &r
[0], 0, chan_index
);
2182 case TGSI_OPCODE_CROSSPRODUCT
:
2183 /* TGSI_OPCODE_XPD */
2184 FETCH(&r
[0], 0, CHAN_Y
);
2185 FETCH(&r
[1], 1, CHAN_Z
);
2187 micro_mul( &r
[2], &r
[0], &r
[1] );
2189 FETCH(&r
[3], 0, CHAN_Z
);
2190 FETCH(&r
[4], 1, CHAN_Y
);
2192 micro_mul( &r
[5], &r
[3], &r
[4] );
2193 micro_sub( &r
[2], &r
[2], &r
[5] );
2195 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2196 STORE( &r
[2], 0, CHAN_X
);
2199 FETCH(&r
[2], 1, CHAN_X
);
2201 micro_mul( &r
[3], &r
[3], &r
[2] );
2203 FETCH(&r
[5], 0, CHAN_X
);
2205 micro_mul( &r
[1], &r
[1], &r
[5] );
2206 micro_sub( &r
[3], &r
[3], &r
[1] );
2208 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2209 STORE( &r
[3], 0, CHAN_Y
);
2212 micro_mul( &r
[5], &r
[5], &r
[4] );
2213 micro_mul( &r
[0], &r
[0], &r
[2] );
2214 micro_sub( &r
[5], &r
[5], &r
[0] );
2216 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2217 STORE( &r
[5], 0, CHAN_Z
);
2220 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2221 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2225 case TGSI_OPCODE_MULTIPLYMATRIX
:
2229 case TGSI_OPCODE_ABS
:
2230 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2231 FETCH(&r
[0], 0, chan_index
);
2233 micro_abs( &r
[0], &r
[0] );
2235 STORE(&r
[0], 0, chan_index
);
2239 case TGSI_OPCODE_RCC
:
2243 case TGSI_OPCODE_DPH
:
2244 FETCH(&r
[0], 0, CHAN_X
);
2245 FETCH(&r
[1], 1, CHAN_X
);
2247 micro_mul( &r
[0], &r
[0], &r
[1] );
2249 FETCH(&r
[1], 0, CHAN_Y
);
2250 FETCH(&r
[2], 1, CHAN_Y
);
2252 micro_mul( &r
[1], &r
[1], &r
[2] );
2253 micro_add( &r
[0], &r
[0], &r
[1] );
2255 FETCH(&r
[1], 0, CHAN_Z
);
2256 FETCH(&r
[2], 1, CHAN_Z
);
2258 micro_mul( &r
[1], &r
[1], &r
[2] );
2259 micro_add( &r
[0], &r
[0], &r
[1] );
2261 FETCH(&r
[1], 1, CHAN_W
);
2263 micro_add( &r
[0], &r
[0], &r
[1] );
2265 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2266 STORE( &r
[0], 0, chan_index
);
2270 case TGSI_OPCODE_COS
:
2271 FETCH(&r
[0], 0, CHAN_X
);
2273 micro_cos( &r
[0], &r
[0] );
2275 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2276 STORE( &r
[0], 0, chan_index
);
2280 case TGSI_OPCODE_DDX
:
2281 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2282 FETCH( &r
[0], 0, chan_index
);
2283 micro_ddx( &r
[0], &r
[0] );
2284 STORE( &r
[0], 0, chan_index
);
2288 case TGSI_OPCODE_DDY
:
2289 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2290 FETCH( &r
[0], 0, chan_index
);
2291 micro_ddy( &r
[0], &r
[0] );
2292 STORE( &r
[0], 0, chan_index
);
2296 case TGSI_OPCODE_KILP
:
2297 exec_kilp (mach
, inst
);
2300 case TGSI_OPCODE_KIL
:
2301 exec_kil (mach
, inst
);
2304 case TGSI_OPCODE_PK2H
:
2308 case TGSI_OPCODE_PK2US
:
2312 case TGSI_OPCODE_PK4B
:
2316 case TGSI_OPCODE_PK4UB
:
2320 case TGSI_OPCODE_RFL
:
2324 case TGSI_OPCODE_SEQ
:
2325 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2326 FETCH( &r
[0], 0, chan_index
);
2327 FETCH( &r
[1], 1, chan_index
);
2328 micro_eq( &r
[0], &r
[0], &r
[1],
2329 &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
],
2330 &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2331 STORE( &r
[0], 0, chan_index
);
2335 case TGSI_OPCODE_SFL
:
2339 case TGSI_OPCODE_SGT
:
2340 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2341 FETCH( &r
[0], 0, chan_index
);
2342 FETCH( &r
[1], 1, chan_index
);
2343 micro_le( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
] );
2344 STORE( &r
[0], 0, chan_index
);
2348 case TGSI_OPCODE_SIN
:
2349 FETCH( &r
[0], 0, CHAN_X
);
2350 micro_sin( &r
[0], &r
[0] );
2351 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2352 STORE( &r
[0], 0, chan_index
);
2356 case TGSI_OPCODE_SLE
:
2357 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2358 FETCH( &r
[0], 0, chan_index
);
2359 FETCH( &r
[1], 1, chan_index
);
2360 micro_le( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2361 STORE( &r
[0], 0, chan_index
);
2365 case TGSI_OPCODE_SNE
:
2366 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2367 FETCH( &r
[0], 0, chan_index
);
2368 FETCH( &r
[1], 1, chan_index
);
2369 micro_eq( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
] );
2370 STORE( &r
[0], 0, chan_index
);
2374 case TGSI_OPCODE_STR
:
2378 case TGSI_OPCODE_TEX
:
2379 /* simple texture lookup */
2380 /* src[0] = texcoord */
2381 /* src[1] = sampler unit */
2382 exec_tex(mach
, inst
, FALSE
, FALSE
);
2385 case TGSI_OPCODE_TXB
:
2386 /* Texture lookup with lod bias */
2387 /* src[0] = texcoord (src[0].w = LOD bias) */
2388 /* src[1] = sampler unit */
2389 exec_tex(mach
, inst
, TRUE
, FALSE
);
2392 case TGSI_OPCODE_TXD
:
2393 /* Texture lookup with explict partial derivatives */
2394 /* src[0] = texcoord */
2395 /* src[1] = d[strq]/dx */
2396 /* src[2] = d[strq]/dy */
2397 /* src[3] = sampler unit */
2401 case TGSI_OPCODE_TXL
:
2402 /* Texture lookup with explit LOD */
2403 /* src[0] = texcoord (src[0].w = LOD) */
2404 /* src[1] = sampler unit */
2405 exec_tex(mach
, inst
, TRUE
, FALSE
);
2408 case TGSI_OPCODE_TXP
:
2409 /* Texture lookup with projection */
2410 /* src[0] = texcoord (src[0].w = projection) */
2411 /* src[1] = sampler unit */
2412 exec_tex(mach
, inst
, FALSE
, TRUE
);
2415 case TGSI_OPCODE_UP2H
:
2419 case TGSI_OPCODE_UP2US
:
2423 case TGSI_OPCODE_UP4B
:
2427 case TGSI_OPCODE_UP4UB
:
2431 case TGSI_OPCODE_X2D
:
2435 case TGSI_OPCODE_ARA
:
2439 case TGSI_OPCODE_BRA
:
2443 case TGSI_OPCODE_CAL
:
2444 /* skip the call if no execution channels are enabled */
2445 if (mach
->ExecMask
) {
2448 /* push the Cond, Loop, Cont stacks */
2449 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2450 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2451 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2452 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2453 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2454 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2456 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
2457 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
2459 /* note that PC was already incremented above */
2460 mach
->CallStack
[mach
->CallStackTop
++] = *pc
;
2461 *pc
= inst
->InstructionExtLabel
.Label
;
2465 case TGSI_OPCODE_RET
:
2466 mach
->FuncMask
&= ~mach
->ExecMask
;
2467 UPDATE_EXEC_MASK(mach
);
2469 if (mach
->FuncMask
== 0x0) {
2470 /* really return now (otherwise, keep executing */
2472 if (mach
->CallStackTop
== 0) {
2473 /* returning from main() */
2477 *pc
= mach
->CallStack
[--mach
->CallStackTop
];
2479 /* pop the Cond, Loop, Cont stacks */
2480 assert(mach
->CondStackTop
> 0);
2481 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
2482 assert(mach
->LoopStackTop
> 0);
2483 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
2484 assert(mach
->ContStackTop
> 0);
2485 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
2486 assert(mach
->FuncStackTop
> 0);
2487 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
2489 UPDATE_EXEC_MASK(mach
);
2493 case TGSI_OPCODE_SSG
:
2494 /* TGSI_OPCODE_SGN */
2495 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2496 FETCH( &r
[0], 0, chan_index
);
2497 micro_sgn( &r
[0], &r
[0] );
2498 STORE( &r
[0], 0, chan_index
);
2502 case TGSI_OPCODE_CMP
:
2503 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2504 FETCH(&r
[0], 0, chan_index
);
2505 FETCH(&r
[1], 1, chan_index
);
2506 FETCH(&r
[2], 2, chan_index
);
2508 micro_lt( &r
[0], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[1], &r
[2] );
2510 STORE(&r
[0], 0, chan_index
);
2514 case TGSI_OPCODE_SCS
:
2515 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
2516 FETCH( &r
[0], 0, CHAN_X
);
2518 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) ) {
2519 micro_cos( &r
[1], &r
[0] );
2520 STORE( &r
[1], 0, CHAN_X
);
2522 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
2523 micro_sin( &r
[1], &r
[0] );
2524 STORE( &r
[1], 0, CHAN_Y
);
2526 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Z
) ) {
2527 STORE( &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, CHAN_Z
);
2529 if( IS_CHANNEL_ENABLED( *inst
, CHAN_W
) ) {
2530 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2534 case TGSI_OPCODE_NRM
:
2535 /* 3-component vector normalize */
2537 union tgsi_exec_channel tmp
, dot
;
2539 /* tmp = dp3(src0, src0): */
2540 FETCH( &r
[0], 0, CHAN_X
);
2541 micro_mul( &tmp
, &r
[0], &r
[0] );
2543 FETCH( &r
[1], 0, CHAN_Y
);
2544 micro_mul( &dot
, &r
[1], &r
[1] );
2545 micro_add( &tmp
, &tmp
, &dot
);
2547 FETCH( &r
[2], 0, CHAN_Z
);
2548 micro_mul( &dot
, &r
[2], &r
[2] );
2549 micro_add( &tmp
, &tmp
, &dot
);
2551 /* tmp = 1 / sqrt(tmp) */
2552 micro_sqrt( &tmp
, &tmp
);
2553 micro_div( &tmp
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &tmp
);
2555 /* note: w channel is undefined */
2556 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2557 /* chan = chan * tmp */
2558 micro_mul( &r
[chan_index
], &tmp
, &r
[chan_index
] );
2559 STORE( &r
[chan_index
], 0, chan_index
);
2564 case TGSI_OPCODE_NRM4
:
2565 /* 4-component vector normalize */
2567 union tgsi_exec_channel tmp
, dot
;
2569 /* tmp = dp4(src0, src0): */
2570 FETCH( &r
[0], 0, CHAN_X
);
2571 micro_mul( &tmp
, &r
[0], &r
[0] );
2573 FETCH( &r
[1], 0, CHAN_Y
);
2574 micro_mul( &dot
, &r
[1], &r
[1] );
2575 micro_add( &tmp
, &tmp
, &dot
);
2577 FETCH( &r
[2], 0, CHAN_Z
);
2578 micro_mul( &dot
, &r
[2], &r
[2] );
2579 micro_add( &tmp
, &tmp
, &dot
);
2581 FETCH( &r
[3], 0, CHAN_W
);
2582 micro_mul( &dot
, &r
[3], &r
[3] );
2583 micro_add( &tmp
, &tmp
, &dot
);
2585 /* tmp = 1 / sqrt(tmp) */
2586 micro_sqrt( &tmp
, &tmp
);
2587 micro_div( &tmp
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &tmp
);
2589 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2590 /* chan = chan * tmp */
2591 micro_mul( &r
[chan_index
], &tmp
, &r
[chan_index
] );
2592 STORE( &r
[chan_index
], 0, chan_index
);
2597 case TGSI_OPCODE_DIV
:
2601 case TGSI_OPCODE_DP2
:
2602 FETCH( &r
[0], 0, CHAN_X
);
2603 FETCH( &r
[1], 1, CHAN_X
);
2604 micro_mul( &r
[0], &r
[0], &r
[1] );
2606 FETCH( &r
[1], 0, CHAN_Y
);
2607 FETCH( &r
[2], 1, CHAN_Y
);
2608 micro_mul( &r
[1], &r
[1], &r
[2] );
2609 micro_add( &r
[0], &r
[0], &r
[1] );
2611 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2612 STORE( &r
[0], 0, chan_index
);
2616 case TGSI_OPCODE_IF
:
2618 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2619 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2620 FETCH( &r
[0], 0, CHAN_X
);
2621 /* update CondMask */
2623 mach
->CondMask
&= ~0x1;
2626 mach
->CondMask
&= ~0x2;
2629 mach
->CondMask
&= ~0x4;
2632 mach
->CondMask
&= ~0x8;
2634 UPDATE_EXEC_MASK(mach
);
2635 /* Todo: If CondMask==0, jump to ELSE */
2638 case TGSI_OPCODE_ELSE
:
2639 /* invert CondMask wrt previous mask */
2642 assert(mach
->CondStackTop
> 0);
2643 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
2644 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
2645 UPDATE_EXEC_MASK(mach
);
2646 /* Todo: If CondMask==0, jump to ENDIF */
2650 case TGSI_OPCODE_ENDIF
:
2652 assert(mach
->CondStackTop
> 0);
2653 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
2654 UPDATE_EXEC_MASK(mach
);
2657 case TGSI_OPCODE_END
:
2658 /* halt execution */
2662 case TGSI_OPCODE_REP
:
2666 case TGSI_OPCODE_ENDREP
:
2670 case TGSI_OPCODE_PUSHA
:
2674 case TGSI_OPCODE_POPA
:
2678 case TGSI_OPCODE_CEIL
:
2679 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2680 FETCH( &r
[0], 0, chan_index
);
2681 micro_ceil( &r
[0], &r
[0] );
2682 STORE( &r
[0], 0, chan_index
);
2686 case TGSI_OPCODE_I2F
:
2687 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2688 FETCH( &r
[0], 0, chan_index
);
2689 micro_i2f( &r
[0], &r
[0] );
2690 STORE( &r
[0], 0, chan_index
);
2694 case TGSI_OPCODE_NOT
:
2695 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2696 FETCH( &r
[0], 0, chan_index
);
2697 micro_not( &r
[0], &r
[0] );
2698 STORE( &r
[0], 0, chan_index
);
2702 case TGSI_OPCODE_TRUNC
:
2703 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2704 FETCH( &r
[0], 0, chan_index
);
2705 micro_trunc( &r
[0], &r
[0] );
2706 STORE( &r
[0], 0, chan_index
);
2710 case TGSI_OPCODE_SHL
:
2711 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2712 FETCH( &r
[0], 0, chan_index
);
2713 FETCH( &r
[1], 1, chan_index
);
2714 micro_shl( &r
[0], &r
[0], &r
[1] );
2715 STORE( &r
[0], 0, chan_index
);
2719 case TGSI_OPCODE_SHR
:
2720 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2721 FETCH( &r
[0], 0, chan_index
);
2722 FETCH( &r
[1], 1, chan_index
);
2723 micro_ishr( &r
[0], &r
[0], &r
[1] );
2724 STORE( &r
[0], 0, chan_index
);
2728 case TGSI_OPCODE_AND
:
2729 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2730 FETCH( &r
[0], 0, chan_index
);
2731 FETCH( &r
[1], 1, chan_index
);
2732 micro_and( &r
[0], &r
[0], &r
[1] );
2733 STORE( &r
[0], 0, chan_index
);
2737 case TGSI_OPCODE_OR
:
2738 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2739 FETCH( &r
[0], 0, chan_index
);
2740 FETCH( &r
[1], 1, chan_index
);
2741 micro_or( &r
[0], &r
[0], &r
[1] );
2742 STORE( &r
[0], 0, chan_index
);
2746 case TGSI_OPCODE_MOD
:
2750 case TGSI_OPCODE_XOR
:
2751 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2752 FETCH( &r
[0], 0, chan_index
);
2753 FETCH( &r
[1], 1, chan_index
);
2754 micro_xor( &r
[0], &r
[0], &r
[1] );
2755 STORE( &r
[0], 0, chan_index
);
2759 case TGSI_OPCODE_SAD
:
2763 case TGSI_OPCODE_TXF
:
2767 case TGSI_OPCODE_TXQ
:
2771 case TGSI_OPCODE_EMIT
:
2772 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += 16;
2773 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
2776 case TGSI_OPCODE_ENDPRIM
:
2777 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]++;
2778 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]] = 0;
2781 case TGSI_OPCODE_LOOP
:
2782 /* fall-through (for now) */
2783 case TGSI_OPCODE_BGNLOOP2
:
2784 /* push LoopMask and ContMasks */
2785 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2786 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2787 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2788 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2791 case TGSI_OPCODE_ENDLOOP
:
2792 /* fall-through (for now at least) */
2793 case TGSI_OPCODE_ENDLOOP2
:
2794 /* Restore ContMask, but don't pop */
2795 assert(mach
->ContStackTop
> 0);
2796 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
2797 UPDATE_EXEC_MASK(mach
);
2798 if (mach
->ExecMask
) {
2799 /* repeat loop: jump to instruction just past BGNLOOP */
2800 *pc
= inst
->InstructionExtLabel
.Label
+ 1;
2803 /* exit loop: pop LoopMask */
2804 assert(mach
->LoopStackTop
> 0);
2805 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
2807 assert(mach
->ContStackTop
> 0);
2808 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
2810 UPDATE_EXEC_MASK(mach
);
2813 case TGSI_OPCODE_BRK
:
2814 /* turn off loop channels for each enabled exec channel */
2815 mach
->LoopMask
&= ~mach
->ExecMask
;
2816 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2817 UPDATE_EXEC_MASK(mach
);
2820 case TGSI_OPCODE_CONT
:
2821 /* turn off cont channels for each enabled exec channel */
2822 mach
->ContMask
&= ~mach
->ExecMask
;
2823 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2824 UPDATE_EXEC_MASK(mach
);
2827 case TGSI_OPCODE_BGNSUB
:
2831 case TGSI_OPCODE_ENDSUB
:
2835 case TGSI_OPCODE_NOISE1
:
2839 case TGSI_OPCODE_NOISE2
:
2843 case TGSI_OPCODE_NOISE3
:
2847 case TGSI_OPCODE_NOISE4
:
2851 case TGSI_OPCODE_NOP
:
2861 * Run TGSI interpreter.
2862 * \return bitmask of "alive" quad components
2865 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
2870 mach
->CondMask
= 0xf;
2871 mach
->LoopMask
= 0xf;
2872 mach
->ContMask
= 0xf;
2873 mach
->FuncMask
= 0xf;
2874 mach
->ExecMask
= 0xf;
2876 mach
->CondStackTop
= 0; /* temporarily subvert this assertion */
2877 assert(mach
->CondStackTop
== 0);
2878 assert(mach
->LoopStackTop
== 0);
2879 assert(mach
->ContStackTop
== 0);
2880 assert(mach
->CallStackTop
== 0);
2882 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
2883 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
2885 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
2886 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
2887 mach
->Primitives
[0] = 0;
2890 for (i
= 0; i
< QUAD_SIZE
; i
++) {
2891 mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
].u
[i
] =
2892 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_X_SHIFT
) |
2893 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Y_SHIFT
) |
2894 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Z_SHIFT
) |
2895 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_W_SHIFT
);
2898 /* execute declarations (interpolants) */
2899 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
2900 exec_declaration( mach
, mach
->Declarations
+i
);
2903 /* execute instructions, until pc is set to -1 */
2905 assert(pc
< (int) mach
->NumInstructions
);
2906 exec_instruction( mach
, mach
->Instructions
+ pc
, &pc
);
2910 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
2911 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
2913 * Scale back depth component.
2915 for (i
= 0; i
< 4; i
++)
2916 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
2920 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];