1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * TGSI interpreter/executor.
31 * Flow control information:
33 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
34 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
35 * care since a condition may be true for some quad components but false
36 * for other components.
38 * We basically execute all statements (even if they're in the part of
39 * an IF/ELSE clause that's "not taken") and use a special mask to
40 * control writing to destination registers. This is the ExecMask.
43 * The ExecMask is computed from three other masks (CondMask, LoopMask and
44 * ContMask) which are controlled by the flow control instructions (namely:
45 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
53 #include "pipe/p_compiler.h"
54 #include "pipe/p_state.h"
55 #include "pipe/p_shader_tokens.h"
56 #include "tgsi/tgsi_parse.h"
57 #include "tgsi/tgsi_util.h"
58 #include "tgsi_exec.h"
59 #include "util/u_memory.h"
60 #include "util/u_math.h"
64 #define TILE_TOP_LEFT 0
65 #define TILE_TOP_RIGHT 1
66 #define TILE_BOTTOM_LEFT 2
67 #define TILE_BOTTOM_RIGHT 3
75 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
77 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
78 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
79 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
80 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
81 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
82 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
83 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
84 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
85 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
86 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
87 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
88 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
89 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
90 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
91 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
92 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
93 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
94 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
95 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
96 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
97 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
98 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
99 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
100 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
101 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
102 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
103 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
104 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
105 #define TEMP_R0 TGSI_EXEC_TEMP_R0
107 #define IS_CHANNEL_ENABLED(INST, CHAN)\
108 ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
110 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
111 ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
113 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
114 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
115 if (IS_CHANNEL_ENABLED( INST, CHAN ))
117 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
118 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
119 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
122 /** The execution mask depends on the conditional mask and the loop mask */
123 #define UPDATE_EXEC_MASK(MACH) \
124 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->FuncMask
127 * Initialize machine state by expanding tokens to full instructions,
128 * allocating temporary storage, setting up constants, etc.
129 * After this, we can call tgsi_exec_machine_run() many times.
132 tgsi_exec_machine_bind_shader(
133 struct tgsi_exec_machine
*mach
,
134 const struct tgsi_token
*tokens
,
136 struct tgsi_sampler
**samplers
)
139 struct tgsi_parse_context parse
;
140 struct tgsi_exec_labels
*labels
= &mach
->Labels
;
141 struct tgsi_full_instruction
*instructions
;
142 struct tgsi_full_declaration
*declarations
;
143 uint maxInstructions
= 10, numInstructions
= 0;
144 uint maxDeclarations
= 10, numDeclarations
= 0;
148 tgsi_dump(tokens
, 0);
153 mach
->Tokens
= tokens
;
154 mach
->Samplers
= samplers
;
156 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
157 if (k
!= TGSI_PARSE_OK
) {
158 debug_printf( "Problem parsing!\n" );
162 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
166 declarations
= (struct tgsi_full_declaration
*)
167 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
173 instructions
= (struct tgsi_full_instruction
*)
174 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
177 FREE( declarations
);
181 while( !tgsi_parse_end_of_tokens( &parse
) ) {
182 uint pointer
= parse
.Position
;
185 tgsi_parse_token( &parse
);
186 switch( parse
.FullToken
.Token
.Type
) {
187 case TGSI_TOKEN_TYPE_DECLARATION
:
188 /* save expanded declaration */
189 if (numDeclarations
== maxDeclarations
) {
190 declarations
= REALLOC(declarations
,
192 * sizeof(struct tgsi_full_declaration
),
193 (maxDeclarations
+ 10)
194 * sizeof(struct tgsi_full_declaration
));
195 maxDeclarations
+= 10;
197 memcpy(declarations
+ numDeclarations
,
198 &parse
.FullToken
.FullDeclaration
,
199 sizeof(declarations
[0]));
203 case TGSI_TOKEN_TYPE_IMMEDIATE
:
205 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
206 assert( size
% 4 == 0 );
207 assert( mach
->ImmLimit
+ size
/ 4 <= TGSI_EXEC_NUM_IMMEDIATES
);
209 for( i
= 0; i
< size
; i
++ ) {
210 mach
->Imms
[mach
->ImmLimit
+ i
/ 4][i
% 4] =
211 parse
.FullToken
.FullImmediate
.u
.ImmediateFloat32
[i
].Float
;
213 mach
->ImmLimit
+= size
/ 4;
217 case TGSI_TOKEN_TYPE_INSTRUCTION
:
218 assert( labels
->count
< MAX_LABELS
);
220 labels
->labels
[labels
->count
][0] = instno
;
221 labels
->labels
[labels
->count
][1] = pointer
;
224 /* save expanded instruction */
225 if (numInstructions
== maxInstructions
) {
226 instructions
= REALLOC(instructions
,
228 * sizeof(struct tgsi_full_instruction
),
229 (maxInstructions
+ 10)
230 * sizeof(struct tgsi_full_instruction
));
231 maxInstructions
+= 10;
233 memcpy(instructions
+ numInstructions
,
234 &parse
.FullToken
.FullInstruction
,
235 sizeof(instructions
[0]));
243 tgsi_parse_free (&parse
);
245 if (mach
->Declarations
) {
246 FREE( mach
->Declarations
);
248 mach
->Declarations
= declarations
;
249 mach
->NumDeclarations
= numDeclarations
;
251 if (mach
->Instructions
) {
252 FREE( mach
->Instructions
);
254 mach
->Instructions
= instructions
;
255 mach
->NumInstructions
= numInstructions
;
260 tgsi_exec_machine_init(
261 struct tgsi_exec_machine
*mach
)
265 mach
->Temps
= (struct tgsi_exec_vector
*) tgsi_align_128bit( mach
->_Temps
);
266 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
268 /* Setup constants. */
269 for( i
= 0; i
< 4; i
++ ) {
270 mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
].u
[i
] = 0x00000000;
271 mach
->Temps
[TEMP_7F_I
].xyzw
[TEMP_7F_C
].u
[i
] = 0x7FFFFFFF;
272 mach
->Temps
[TEMP_80_I
].xyzw
[TEMP_80_C
].u
[i
] = 0x80000000;
273 mach
->Temps
[TEMP_FF_I
].xyzw
[TEMP_FF_C
].u
[i
] = 0xFFFFFFFF;
274 mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
].f
[i
] = 1.0f
;
275 mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
].f
[i
] = 2.0f
;
276 mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
].f
[i
] = 128.0f
;
277 mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
].f
[i
] = -128.0f
;
278 mach
->Temps
[TEMP_3_I
].xyzw
[TEMP_3_C
].f
[i
] = 3.0f
;
279 mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
].f
[i
] = 0.5f
;
285 tgsi_exec_machine_free_data(struct tgsi_exec_machine
*mach
)
287 if (mach
->Instructions
) {
288 FREE(mach
->Instructions
);
289 mach
->Instructions
= NULL
;
290 mach
->NumInstructions
= 0;
292 if (mach
->Declarations
) {
293 FREE(mach
->Declarations
);
294 mach
->Declarations
= NULL
;
295 mach
->NumDeclarations
= 0;
302 union tgsi_exec_channel
*dst
,
303 const union tgsi_exec_channel
*src
)
305 dst
->f
[0] = fabsf( src
->f
[0] );
306 dst
->f
[1] = fabsf( src
->f
[1] );
307 dst
->f
[2] = fabsf( src
->f
[2] );
308 dst
->f
[3] = fabsf( src
->f
[3] );
313 union tgsi_exec_channel
*dst
,
314 const union tgsi_exec_channel
*src0
,
315 const union tgsi_exec_channel
*src1
)
317 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
318 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
319 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
320 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
326 union tgsi_exec_channel
*dst
,
327 const union tgsi_exec_channel
*src0
,
328 const union tgsi_exec_channel
*src1
)
330 dst
->i
[0] = src0
->i
[0] + src1
->i
[0];
331 dst
->i
[1] = src0
->i
[1] + src1
->i
[1];
332 dst
->i
[2] = src0
->i
[2] + src1
->i
[2];
333 dst
->i
[3] = src0
->i
[3] + src1
->i
[3];
339 union tgsi_exec_channel
*dst
,
340 const union tgsi_exec_channel
*src0
,
341 const union tgsi_exec_channel
*src1
)
343 dst
->u
[0] = src0
->u
[0] & src1
->u
[0];
344 dst
->u
[1] = src0
->u
[1] & src1
->u
[1];
345 dst
->u
[2] = src0
->u
[2] & src1
->u
[2];
346 dst
->u
[3] = src0
->u
[3] & src1
->u
[3];
351 union tgsi_exec_channel
*dst
,
352 const union tgsi_exec_channel
*src
)
354 dst
->f
[0] = ceilf( src
->f
[0] );
355 dst
->f
[1] = ceilf( src
->f
[1] );
356 dst
->f
[2] = ceilf( src
->f
[2] );
357 dst
->f
[3] = ceilf( src
->f
[3] );
362 union tgsi_exec_channel
*dst
,
363 const union tgsi_exec_channel
*src
)
365 dst
->f
[0] = cosf( src
->f
[0] );
366 dst
->f
[1] = cosf( src
->f
[1] );
367 dst
->f
[2] = cosf( src
->f
[2] );
368 dst
->f
[3] = cosf( src
->f
[3] );
373 union tgsi_exec_channel
*dst
,
374 const union tgsi_exec_channel
*src
)
379 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
384 union tgsi_exec_channel
*dst
,
385 const union tgsi_exec_channel
*src
)
390 dst
->f
[3] = src
->f
[TILE_TOP_LEFT
] - src
->f
[TILE_BOTTOM_LEFT
];
395 union tgsi_exec_channel
*dst
,
396 const union tgsi_exec_channel
*src0
,
397 const union tgsi_exec_channel
*src1
)
399 if (src1
->f
[0] != 0) {
400 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
402 if (src1
->f
[1] != 0) {
403 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
405 if (src1
->f
[2] != 0) {
406 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
408 if (src1
->f
[3] != 0) {
409 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
416 union tgsi_exec_channel
*dst
,
417 const union tgsi_exec_channel
*src0
,
418 const union tgsi_exec_channel
*src1
)
420 dst
->u
[0] = src0
->u
[0] / src1
->u
[0];
421 dst
->u
[1] = src0
->u
[1] / src1
->u
[1];
422 dst
->u
[2] = src0
->u
[2] / src1
->u
[2];
423 dst
->u
[3] = src0
->u
[3] / src1
->u
[3];
429 union tgsi_exec_channel
*dst
,
430 const union tgsi_exec_channel
*src0
,
431 const union tgsi_exec_channel
*src1
,
432 const union tgsi_exec_channel
*src2
,
433 const union tgsi_exec_channel
*src3
)
435 dst
->f
[0] = src0
->f
[0] == src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
436 dst
->f
[1] = src0
->f
[1] == src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
437 dst
->f
[2] = src0
->f
[2] == src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
438 dst
->f
[3] = src0
->f
[3] == src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
444 union tgsi_exec_channel
*dst
,
445 const union tgsi_exec_channel
*src0
,
446 const union tgsi_exec_channel
*src1
,
447 const union tgsi_exec_channel
*src2
,
448 const union tgsi_exec_channel
*src3
)
450 dst
->i
[0] = src0
->i
[0] == src1
->i
[0] ? src2
->i
[0] : src3
->i
[0];
451 dst
->i
[1] = src0
->i
[1] == src1
->i
[1] ? src2
->i
[1] : src3
->i
[1];
452 dst
->i
[2] = src0
->i
[2] == src1
->i
[2] ? src2
->i
[2] : src3
->i
[2];
453 dst
->i
[3] = src0
->i
[3] == src1
->i
[3] ? src2
->i
[3] : src3
->i
[3];
459 union tgsi_exec_channel
*dst
,
460 const union tgsi_exec_channel
*src
)
463 dst
->f
[0] = util_fast_exp2( src
->f
[0] );
464 dst
->f
[1] = util_fast_exp2( src
->f
[1] );
465 dst
->f
[2] = util_fast_exp2( src
->f
[2] );
466 dst
->f
[3] = util_fast_exp2( src
->f
[3] );
468 dst
->f
[0] = powf( 2.0f
, src
->f
[0] );
469 dst
->f
[1] = powf( 2.0f
, src
->f
[1] );
470 dst
->f
[2] = powf( 2.0f
, src
->f
[2] );
471 dst
->f
[3] = powf( 2.0f
, src
->f
[3] );
478 union tgsi_exec_channel
*dst
,
479 const union tgsi_exec_channel
*src
)
481 dst
->u
[0] = (uint
) src
->f
[0];
482 dst
->u
[1] = (uint
) src
->f
[1];
483 dst
->u
[2] = (uint
) src
->f
[2];
484 dst
->u
[3] = (uint
) src
->f
[3];
489 micro_float_clamp(union tgsi_exec_channel
*dst
,
490 const union tgsi_exec_channel
*src
)
494 for (i
= 0; i
< 4; i
++) {
495 if (src
->f
[i
] > 0.0f
) {
496 if (src
->f
[i
] > 1.884467e+019f
)
497 dst
->f
[i
] = 1.884467e+019f
;
498 else if (src
->f
[i
] < 5.42101e-020f
)
499 dst
->f
[i
] = 5.42101e-020f
;
501 dst
->f
[i
] = src
->f
[i
];
504 if (src
->f
[i
] < -1.884467e+019f
)
505 dst
->f
[i
] = -1.884467e+019f
;
506 else if (src
->f
[i
] > -5.42101e-020f
)
507 dst
->f
[i
] = -5.42101e-020f
;
509 dst
->f
[i
] = src
->f
[i
];
516 union tgsi_exec_channel
*dst
,
517 const union tgsi_exec_channel
*src
)
519 dst
->f
[0] = floorf( src
->f
[0] );
520 dst
->f
[1] = floorf( src
->f
[1] );
521 dst
->f
[2] = floorf( src
->f
[2] );
522 dst
->f
[3] = floorf( src
->f
[3] );
527 union tgsi_exec_channel
*dst
,
528 const union tgsi_exec_channel
*src
)
530 dst
->f
[0] = src
->f
[0] - floorf( src
->f
[0] );
531 dst
->f
[1] = src
->f
[1] - floorf( src
->f
[1] );
532 dst
->f
[2] = src
->f
[2] - floorf( src
->f
[2] );
533 dst
->f
[3] = src
->f
[3] - floorf( src
->f
[3] );
538 union tgsi_exec_channel
*dst
,
539 const union tgsi_exec_channel
*src
)
541 dst
->f
[0] = (float) src
->i
[0];
542 dst
->f
[1] = (float) src
->i
[1];
543 dst
->f
[2] = (float) src
->i
[2];
544 dst
->f
[3] = (float) src
->i
[3];
549 union tgsi_exec_channel
*dst
,
550 const union tgsi_exec_channel
*src
)
553 dst
->f
[0] = util_fast_log2( src
->f
[0] );
554 dst
->f
[1] = util_fast_log2( src
->f
[1] );
555 dst
->f
[2] = util_fast_log2( src
->f
[2] );
556 dst
->f
[3] = util_fast_log2( src
->f
[3] );
558 dst
->f
[0] = logf( src
->f
[0] ) * 1.442695f
;
559 dst
->f
[1] = logf( src
->f
[1] ) * 1.442695f
;
560 dst
->f
[2] = logf( src
->f
[2] ) * 1.442695f
;
561 dst
->f
[3] = logf( src
->f
[3] ) * 1.442695f
;
567 union tgsi_exec_channel
*dst
,
568 const union tgsi_exec_channel
*src0
,
569 const union tgsi_exec_channel
*src1
,
570 const union tgsi_exec_channel
*src2
,
571 const union tgsi_exec_channel
*src3
)
573 dst
->f
[0] = src0
->f
[0] <= src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
574 dst
->f
[1] = src0
->f
[1] <= src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
575 dst
->f
[2] = src0
->f
[2] <= src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
576 dst
->f
[3] = src0
->f
[3] <= src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
581 union tgsi_exec_channel
*dst
,
582 const union tgsi_exec_channel
*src0
,
583 const union tgsi_exec_channel
*src1
,
584 const union tgsi_exec_channel
*src2
,
585 const union tgsi_exec_channel
*src3
)
587 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
588 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
589 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
590 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
596 union tgsi_exec_channel
*dst
,
597 const union tgsi_exec_channel
*src0
,
598 const union tgsi_exec_channel
*src1
,
599 const union tgsi_exec_channel
*src2
,
600 const union tgsi_exec_channel
*src3
)
602 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src2
->i
[0] : src3
->i
[0];
603 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src2
->i
[1] : src3
->i
[1];
604 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src2
->i
[2] : src3
->i
[2];
605 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src2
->i
[3] : src3
->i
[3];
612 union tgsi_exec_channel
*dst
,
613 const union tgsi_exec_channel
*src0
,
614 const union tgsi_exec_channel
*src1
,
615 const union tgsi_exec_channel
*src2
,
616 const union tgsi_exec_channel
*src3
)
618 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src2
->u
[0] : src3
->u
[0];
619 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src2
->u
[1] : src3
->u
[1];
620 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src2
->u
[2] : src3
->u
[2];
621 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src2
->u
[3] : src3
->u
[3];
627 union tgsi_exec_channel
*dst
,
628 const union tgsi_exec_channel
*src0
,
629 const union tgsi_exec_channel
*src1
)
631 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
632 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
633 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
634 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
640 union tgsi_exec_channel
*dst
,
641 const union tgsi_exec_channel
*src0
,
642 const union tgsi_exec_channel
*src1
)
644 dst
->i
[0] = src0
->i
[0] > src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
645 dst
->i
[1] = src0
->i
[1] > src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
646 dst
->i
[2] = src0
->i
[2] > src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
647 dst
->i
[3] = src0
->i
[3] > src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
654 union tgsi_exec_channel
*dst
,
655 const union tgsi_exec_channel
*src0
,
656 const union tgsi_exec_channel
*src1
)
658 dst
->u
[0] = src0
->u
[0] > src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
659 dst
->u
[1] = src0
->u
[1] > src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
660 dst
->u
[2] = src0
->u
[2] > src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
661 dst
->u
[3] = src0
->u
[3] > src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
667 union tgsi_exec_channel
*dst
,
668 const union tgsi_exec_channel
*src0
,
669 const union tgsi_exec_channel
*src1
)
671 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
672 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
673 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
674 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
680 union tgsi_exec_channel
*dst
,
681 const union tgsi_exec_channel
*src0
,
682 const union tgsi_exec_channel
*src1
)
684 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
685 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
686 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
687 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
694 union tgsi_exec_channel
*dst
,
695 const union tgsi_exec_channel
*src0
,
696 const union tgsi_exec_channel
*src1
)
698 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
699 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
700 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
701 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
708 union tgsi_exec_channel
*dst
,
709 const union tgsi_exec_channel
*src0
,
710 const union tgsi_exec_channel
*src1
)
712 dst
->u
[0] = src0
->u
[0] % src1
->u
[0];
713 dst
->u
[1] = src0
->u
[1] % src1
->u
[1];
714 dst
->u
[2] = src0
->u
[2] % src1
->u
[2];
715 dst
->u
[3] = src0
->u
[3] % src1
->u
[3];
721 union tgsi_exec_channel
*dst
,
722 const union tgsi_exec_channel
*src0
,
723 const union tgsi_exec_channel
*src1
)
725 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
726 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
727 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
728 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
734 union tgsi_exec_channel
*dst
,
735 const union tgsi_exec_channel
*src0
,
736 const union tgsi_exec_channel
*src1
)
738 dst
->i
[0] = src0
->i
[0] * src1
->i
[0];
739 dst
->i
[1] = src0
->i
[1] * src1
->i
[1];
740 dst
->i
[2] = src0
->i
[2] * src1
->i
[2];
741 dst
->i
[3] = src0
->i
[3] * src1
->i
[3];
748 union tgsi_exec_channel
*dst0
,
749 union tgsi_exec_channel
*dst1
,
750 const union tgsi_exec_channel
*src0
,
751 const union tgsi_exec_channel
*src1
)
753 dst1
->i
[0] = src0
->i
[0] * src1
->i
[0];
754 dst1
->i
[1] = src0
->i
[1] * src1
->i
[1];
755 dst1
->i
[2] = src0
->i
[2] * src1
->i
[2];
756 dst1
->i
[3] = src0
->i
[3] * src1
->i
[3];
767 union tgsi_exec_channel
*dst0
,
768 union tgsi_exec_channel
*dst1
,
769 const union tgsi_exec_channel
*src0
,
770 const union tgsi_exec_channel
*src1
)
772 dst1
->u
[0] = src0
->u
[0] * src1
->u
[0];
773 dst1
->u
[1] = src0
->u
[1] * src1
->u
[1];
774 dst1
->u
[2] = src0
->u
[2] * src1
->u
[2];
775 dst1
->u
[3] = src0
->u
[3] * src1
->u
[3];
787 union tgsi_exec_channel
*dst
,
788 const union tgsi_exec_channel
*src0
,
789 const union tgsi_exec_channel
*src1
,
790 const union tgsi_exec_channel
*src2
)
792 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
793 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
794 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
795 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
801 union tgsi_exec_channel
*dst
,
802 const union tgsi_exec_channel
*src
)
804 dst
->f
[0] = -src
->f
[0];
805 dst
->f
[1] = -src
->f
[1];
806 dst
->f
[2] = -src
->f
[2];
807 dst
->f
[3] = -src
->f
[3];
813 union tgsi_exec_channel
*dst
,
814 const union tgsi_exec_channel
*src
)
816 dst
->i
[0] = -src
->i
[0];
817 dst
->i
[1] = -src
->i
[1];
818 dst
->i
[2] = -src
->i
[2];
819 dst
->i
[3] = -src
->i
[3];
825 union tgsi_exec_channel
*dst
,
826 const union tgsi_exec_channel
*src
)
828 dst
->u
[0] = ~src
->u
[0];
829 dst
->u
[1] = ~src
->u
[1];
830 dst
->u
[2] = ~src
->u
[2];
831 dst
->u
[3] = ~src
->u
[3];
836 union tgsi_exec_channel
*dst
,
837 const union tgsi_exec_channel
*src0
,
838 const union tgsi_exec_channel
*src1
)
840 dst
->u
[0] = src0
->u
[0] | src1
->u
[0];
841 dst
->u
[1] = src0
->u
[1] | src1
->u
[1];
842 dst
->u
[2] = src0
->u
[2] | src1
->u
[2];
843 dst
->u
[3] = src0
->u
[3] | src1
->u
[3];
848 union tgsi_exec_channel
*dst
,
849 const union tgsi_exec_channel
*src0
,
850 const union tgsi_exec_channel
*src1
)
853 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
854 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
855 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
856 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
858 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
859 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
860 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
861 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
867 union tgsi_exec_channel
*dst
,
868 const union tgsi_exec_channel
*src
)
870 dst
->f
[0] = floorf( src
->f
[0] + 0.5f
);
871 dst
->f
[1] = floorf( src
->f
[1] + 0.5f
);
872 dst
->f
[2] = floorf( src
->f
[2] + 0.5f
);
873 dst
->f
[3] = floorf( src
->f
[3] + 0.5f
);
878 union tgsi_exec_channel
*dst
,
879 const union tgsi_exec_channel
*src
)
881 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
882 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
883 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
884 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
889 union tgsi_exec_channel
*dst
,
890 const union tgsi_exec_channel
*src0
,
891 const union tgsi_exec_channel
*src1
)
893 dst
->i
[0] = src0
->i
[0] << src1
->i
[0];
894 dst
->i
[1] = src0
->i
[1] << src1
->i
[1];
895 dst
->i
[2] = src0
->i
[2] << src1
->i
[2];
896 dst
->i
[3] = src0
->i
[3] << src1
->i
[3];
901 union tgsi_exec_channel
*dst
,
902 const union tgsi_exec_channel
*src0
,
903 const union tgsi_exec_channel
*src1
)
905 dst
->i
[0] = src0
->i
[0] >> src1
->i
[0];
906 dst
->i
[1] = src0
->i
[1] >> src1
->i
[1];
907 dst
->i
[2] = src0
->i
[2] >> src1
->i
[2];
908 dst
->i
[3] = src0
->i
[3] >> src1
->i
[3];
913 union tgsi_exec_channel
*dst
,
914 const union tgsi_exec_channel
*src0
)
916 dst
->f
[0] = (float) (int) src0
->f
[0];
917 dst
->f
[1] = (float) (int) src0
->f
[1];
918 dst
->f
[2] = (float) (int) src0
->f
[2];
919 dst
->f
[3] = (float) (int) src0
->f
[3];
925 union tgsi_exec_channel
*dst
,
926 const union tgsi_exec_channel
*src0
,
927 const union tgsi_exec_channel
*src1
)
929 dst
->u
[0] = src0
->u
[0] >> src1
->u
[0];
930 dst
->u
[1] = src0
->u
[1] >> src1
->u
[1];
931 dst
->u
[2] = src0
->u
[2] >> src1
->u
[2];
932 dst
->u
[3] = src0
->u
[3] >> src1
->u
[3];
938 union tgsi_exec_channel
*dst
,
939 const union tgsi_exec_channel
*src
)
941 dst
->f
[0] = sinf( src
->f
[0] );
942 dst
->f
[1] = sinf( src
->f
[1] );
943 dst
->f
[2] = sinf( src
->f
[2] );
944 dst
->f
[3] = sinf( src
->f
[3] );
948 micro_sqrt( union tgsi_exec_channel
*dst
,
949 const union tgsi_exec_channel
*src
)
951 dst
->f
[0] = sqrtf( src
->f
[0] );
952 dst
->f
[1] = sqrtf( src
->f
[1] );
953 dst
->f
[2] = sqrtf( src
->f
[2] );
954 dst
->f
[3] = sqrtf( src
->f
[3] );
959 union tgsi_exec_channel
*dst
,
960 const union tgsi_exec_channel
*src0
,
961 const union tgsi_exec_channel
*src1
)
963 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
964 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
965 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
966 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
972 union tgsi_exec_channel
*dst
,
973 const union tgsi_exec_channel
*src
)
975 dst
->f
[0] = (float) src
->u
[0];
976 dst
->f
[1] = (float) src
->u
[1];
977 dst
->f
[2] = (float) src
->u
[2];
978 dst
->f
[3] = (float) src
->u
[3];
984 union tgsi_exec_channel
*dst
,
985 const union tgsi_exec_channel
*src0
,
986 const union tgsi_exec_channel
*src1
)
988 dst
->u
[0] = src0
->u
[0] ^ src1
->u
[0];
989 dst
->u
[1] = src0
->u
[1] ^ src1
->u
[1];
990 dst
->u
[2] = src0
->u
[2] ^ src1
->u
[2];
991 dst
->u
[3] = src0
->u
[3] ^ src1
->u
[3];
995 fetch_src_file_channel(
996 const struct tgsi_exec_machine
*mach
,
999 const union tgsi_exec_channel
*index
,
1000 union tgsi_exec_channel
*chan
)
1003 case TGSI_EXTSWIZZLE_X
:
1004 case TGSI_EXTSWIZZLE_Y
:
1005 case TGSI_EXTSWIZZLE_Z
:
1006 case TGSI_EXTSWIZZLE_W
:
1008 case TGSI_FILE_CONSTANT
:
1009 assert(mach
->Consts
);
1010 if (index
->i
[0] < 0)
1013 chan
->f
[0] = mach
->Consts
[index
->i
[0]][swizzle
];
1014 if (index
->i
[1] < 0)
1017 chan
->f
[1] = mach
->Consts
[index
->i
[1]][swizzle
];
1018 if (index
->i
[2] < 0)
1021 chan
->f
[2] = mach
->Consts
[index
->i
[2]][swizzle
];
1022 if (index
->i
[3] < 0)
1025 chan
->f
[3] = mach
->Consts
[index
->i
[3]][swizzle
];
1028 case TGSI_FILE_INPUT
:
1029 chan
->u
[0] = mach
->Inputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1030 chan
->u
[1] = mach
->Inputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1031 chan
->u
[2] = mach
->Inputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1032 chan
->u
[3] = mach
->Inputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1035 case TGSI_FILE_TEMPORARY
:
1036 assert(index
->i
[0] < TGSI_EXEC_NUM_TEMPS
);
1037 chan
->u
[0] = mach
->Temps
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1038 chan
->u
[1] = mach
->Temps
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1039 chan
->u
[2] = mach
->Temps
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1040 chan
->u
[3] = mach
->Temps
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1043 case TGSI_FILE_IMMEDIATE
:
1044 assert( index
->i
[0] < (int) mach
->ImmLimit
);
1045 chan
->f
[0] = mach
->Imms
[index
->i
[0]][swizzle
];
1046 assert( index
->i
[1] < (int) mach
->ImmLimit
);
1047 chan
->f
[1] = mach
->Imms
[index
->i
[1]][swizzle
];
1048 assert( index
->i
[2] < (int) mach
->ImmLimit
);
1049 chan
->f
[2] = mach
->Imms
[index
->i
[2]][swizzle
];
1050 assert( index
->i
[3] < (int) mach
->ImmLimit
);
1051 chan
->f
[3] = mach
->Imms
[index
->i
[3]][swizzle
];
1054 case TGSI_FILE_ADDRESS
:
1055 chan
->u
[0] = mach
->Addrs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1056 chan
->u
[1] = mach
->Addrs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1057 chan
->u
[2] = mach
->Addrs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1058 chan
->u
[3] = mach
->Addrs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1061 case TGSI_FILE_OUTPUT
:
1062 /* vertex/fragment output vars can be read too */
1063 chan
->u
[0] = mach
->Outputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1064 chan
->u
[1] = mach
->Outputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1065 chan
->u
[2] = mach
->Outputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1066 chan
->u
[3] = mach
->Outputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1074 case TGSI_EXTSWIZZLE_ZERO
:
1075 *chan
= mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
];
1078 case TGSI_EXTSWIZZLE_ONE
:
1079 *chan
= mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
];
1089 const struct tgsi_exec_machine
*mach
,
1090 union tgsi_exec_channel
*chan
,
1091 const struct tgsi_full_src_register
*reg
,
1092 const uint chan_index
)
1094 union tgsi_exec_channel index
;
1097 /* We start with a direct index into a register file.
1101 * file = SrcRegister.File
1102 * [1] = SrcRegister.Index
1107 index
.i
[3] = reg
->SrcRegister
.Index
;
1109 /* There is an extra source register that indirectly subscripts
1110 * a register file. The direct index now becomes an offset
1111 * that is being added to the indirect register.
1115 * ind = SrcRegisterInd.File
1116 * [2] = SrcRegisterInd.Index
1117 * .x = SrcRegisterInd.SwizzleX
1119 if (reg
->SrcRegister
.Indirect
) {
1120 union tgsi_exec_channel index2
;
1121 union tgsi_exec_channel indir_index
;
1122 const uint execmask
= mach
->ExecMask
;
1125 /* which address register (always zero now) */
1129 index2
.i
[3] = reg
->SrcRegisterInd
.Index
;
1131 /* get current value of address register[swizzle] */
1132 swizzle
= tgsi_util_get_src_register_swizzle( ®
->SrcRegisterInd
, CHAN_X
);
1133 fetch_src_file_channel(
1135 reg
->SrcRegisterInd
.File
,
1140 /* add value of address register to the offset */
1141 index
.i
[0] += (int) indir_index
.f
[0];
1142 index
.i
[1] += (int) indir_index
.f
[1];
1143 index
.i
[2] += (int) indir_index
.f
[2];
1144 index
.i
[3] += (int) indir_index
.f
[3];
1146 /* for disabled execution channels, zero-out the index to
1147 * avoid using a potential garbage value.
1149 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1150 if ((execmask
& (1 << i
)) == 0)
1155 /* There is an extra source register that is a second
1156 * subscript to a register file. Effectively it means that
1157 * the register file is actually a 2D array of registers.
1159 * file[1][3] == file[1*sizeof(file[1])+3],
1161 * [3] = SrcRegisterDim.Index
1163 if (reg
->SrcRegister
.Dimension
) {
1164 /* The size of the first-order array depends on the register file type.
1165 * We need to multiply the index to the first array to get an effective,
1166 * "flat" index that points to the beginning of the second-order array.
1168 switch (reg
->SrcRegister
.File
) {
1169 case TGSI_FILE_INPUT
:
1170 index
.i
[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1171 index
.i
[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1172 index
.i
[2] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1173 index
.i
[3] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1175 case TGSI_FILE_CONSTANT
:
1176 index
.i
[0] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1177 index
.i
[1] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1178 index
.i
[2] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1179 index
.i
[3] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1185 index
.i
[0] += reg
->SrcRegisterDim
.Index
;
1186 index
.i
[1] += reg
->SrcRegisterDim
.Index
;
1187 index
.i
[2] += reg
->SrcRegisterDim
.Index
;
1188 index
.i
[3] += reg
->SrcRegisterDim
.Index
;
1190 /* Again, the second subscript index can be addressed indirectly
1191 * identically to the first one.
1192 * Nothing stops us from indirectly addressing the indirect register,
1193 * but there is no need for that, so we won't exercise it.
1195 * file[1][ind[4].y+3],
1197 * ind = SrcRegisterDimInd.File
1198 * [4] = SrcRegisterDimInd.Index
1199 * .y = SrcRegisterDimInd.SwizzleX
1201 if (reg
->SrcRegisterDim
.Indirect
) {
1202 union tgsi_exec_channel index2
;
1203 union tgsi_exec_channel indir_index
;
1204 const uint execmask
= mach
->ExecMask
;
1210 index2
.i
[3] = reg
->SrcRegisterDimInd
.Index
;
1212 swizzle
= tgsi_util_get_src_register_swizzle( ®
->SrcRegisterDimInd
, CHAN_X
);
1213 fetch_src_file_channel(
1215 reg
->SrcRegisterDimInd
.File
,
1220 index
.i
[0] += (int) indir_index
.f
[0];
1221 index
.i
[1] += (int) indir_index
.f
[1];
1222 index
.i
[2] += (int) indir_index
.f
[2];
1223 index
.i
[3] += (int) indir_index
.f
[3];
1225 /* for disabled execution channels, zero-out the index to
1226 * avoid using a potential garbage value.
1228 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1229 if ((execmask
& (1 << i
)) == 0)
1234 /* If by any chance there was a need for a 3D array of register
1235 * files, we would have to check whether SrcRegisterDim is followed
1236 * by a dimension register and continue the saga.
1240 swizzle
= tgsi_util_get_full_src_register_extswizzle( reg
, chan_index
);
1241 fetch_src_file_channel(
1243 reg
->SrcRegister
.File
,
1248 switch (tgsi_util_get_full_src_register_sign_mode( reg
, chan_index
)) {
1249 case TGSI_UTIL_SIGN_CLEAR
:
1250 micro_abs( chan
, chan
);
1253 case TGSI_UTIL_SIGN_SET
:
1254 micro_abs( chan
, chan
);
1255 micro_neg( chan
, chan
);
1258 case TGSI_UTIL_SIGN_TOGGLE
:
1259 micro_neg( chan
, chan
);
1262 case TGSI_UTIL_SIGN_KEEP
:
1266 if (reg
->SrcRegisterExtMod
.Complement
) {
1267 micro_sub( chan
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], chan
);
1273 struct tgsi_exec_machine
*mach
,
1274 const union tgsi_exec_channel
*chan
,
1275 const struct tgsi_full_dst_register
*reg
,
1276 const struct tgsi_full_instruction
*inst
,
1280 union tgsi_exec_channel null
;
1281 union tgsi_exec_channel
*dst
;
1282 uint execmask
= mach
->ExecMask
;
1284 switch (reg
->DstRegister
.File
) {
1285 case TGSI_FILE_NULL
:
1289 case TGSI_FILE_OUTPUT
:
1290 dst
= &mach
->Outputs
[mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1291 + reg
->DstRegister
.Index
].xyzw
[chan_index
];
1294 case TGSI_FILE_TEMPORARY
:
1295 assert( reg
->DstRegister
.Index
< TGSI_EXEC_NUM_TEMPS
);
1296 dst
= &mach
->Temps
[reg
->DstRegister
.Index
].xyzw
[chan_index
];
1299 case TGSI_FILE_ADDRESS
:
1300 dst
= &mach
->Addrs
[reg
->DstRegister
.Index
].xyzw
[chan_index
];
1308 if (inst
->InstructionExtNv
.CondFlowEnable
) {
1309 union tgsi_exec_channel
*cc
= &mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
];
1315 /* Only CC0 supported.
1317 assert( inst
->InstructionExtNv
.CondFlowIndex
< 1 );
1319 switch (chan_index
) {
1321 swizzle
= inst
->InstructionExtNv
.CondSwizzleX
;
1324 swizzle
= inst
->InstructionExtNv
.CondSwizzleY
;
1327 swizzle
= inst
->InstructionExtNv
.CondSwizzleZ
;
1330 swizzle
= inst
->InstructionExtNv
.CondSwizzleW
;
1338 case TGSI_SWIZZLE_X
:
1339 shift
= TGSI_EXEC_CC_X_SHIFT
;
1340 mask
= TGSI_EXEC_CC_X_MASK
;
1342 case TGSI_SWIZZLE_Y
:
1343 shift
= TGSI_EXEC_CC_Y_SHIFT
;
1344 mask
= TGSI_EXEC_CC_Y_MASK
;
1346 case TGSI_SWIZZLE_Z
:
1347 shift
= TGSI_EXEC_CC_Z_SHIFT
;
1348 mask
= TGSI_EXEC_CC_Z_MASK
;
1350 case TGSI_SWIZZLE_W
:
1351 shift
= TGSI_EXEC_CC_W_SHIFT
;
1352 mask
= TGSI_EXEC_CC_W_MASK
;
1359 switch (inst
->InstructionExtNv
.CondMask
) {
1361 test
= ~(TGSI_EXEC_CC_GT
<< shift
) & mask
;
1362 for (i
= 0; i
< QUAD_SIZE
; i
++)
1363 if (cc
->u
[i
] & test
)
1364 execmask
&= ~(1 << i
);
1368 test
= ~(TGSI_EXEC_CC_EQ
<< shift
) & mask
;
1369 for (i
= 0; i
< QUAD_SIZE
; i
++)
1370 if (cc
->u
[i
] & test
)
1371 execmask
&= ~(1 << i
);
1375 test
= ~(TGSI_EXEC_CC_LT
<< shift
) & mask
;
1376 for (i
= 0; i
< QUAD_SIZE
; i
++)
1377 if (cc
->u
[i
] & test
)
1378 execmask
&= ~(1 << i
);
1382 test
= ~((TGSI_EXEC_CC_GT
| TGSI_EXEC_CC_EQ
) << shift
) & mask
;
1383 for (i
= 0; i
< QUAD_SIZE
; i
++)
1384 if (cc
->u
[i
] & test
)
1385 execmask
&= ~(1 << i
);
1389 test
= ~((TGSI_EXEC_CC_LT
| TGSI_EXEC_CC_EQ
) << shift
) & mask
;
1390 for (i
= 0; i
< QUAD_SIZE
; i
++)
1391 if (cc
->u
[i
] & test
)
1392 execmask
&= ~(1 << i
);
1396 test
= ~((TGSI_EXEC_CC_GT
| TGSI_EXEC_CC_LT
| TGSI_EXEC_CC_UN
) << shift
) & mask
;
1397 for (i
= 0; i
< QUAD_SIZE
; i
++)
1398 if (cc
->u
[i
] & test
)
1399 execmask
&= ~(1 << i
);
1406 for (i
= 0; i
< QUAD_SIZE
; i
++)
1407 execmask
&= ~(1 << i
);
1416 switch (inst
->Instruction
.Saturate
) {
1418 for (i
= 0; i
< QUAD_SIZE
; i
++)
1419 if (execmask
& (1 << i
))
1420 dst
->i
[i
] = chan
->i
[i
];
1423 case TGSI_SAT_ZERO_ONE
:
1424 for (i
= 0; i
< QUAD_SIZE
; i
++)
1425 if (execmask
& (1 << i
)) {
1426 if (chan
->f
[i
] < 0.0f
)
1428 else if (chan
->f
[i
] > 1.0f
)
1431 dst
->i
[i
] = chan
->i
[i
];
1435 case TGSI_SAT_MINUS_PLUS_ONE
:
1436 for (i
= 0; i
< QUAD_SIZE
; i
++)
1437 if (execmask
& (1 << i
)) {
1438 if (chan
->f
[i
] < -1.0f
)
1440 else if (chan
->f
[i
] > 1.0f
)
1443 dst
->i
[i
] = chan
->i
[i
];
1451 if (inst
->InstructionExtNv
.CondDstUpdate
) {
1452 union tgsi_exec_channel
*cc
= &mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
];
1456 /* Only CC0 supported.
1458 assert( inst
->InstructionExtNv
.CondDstIndex
< 1 );
1460 switch (chan_index
) {
1462 shift
= TGSI_EXEC_CC_X_SHIFT
;
1463 mask
= ~TGSI_EXEC_CC_X_MASK
;
1466 shift
= TGSI_EXEC_CC_Y_SHIFT
;
1467 mask
= ~TGSI_EXEC_CC_Y_MASK
;
1470 shift
= TGSI_EXEC_CC_Z_SHIFT
;
1471 mask
= ~TGSI_EXEC_CC_Z_MASK
;
1474 shift
= TGSI_EXEC_CC_W_SHIFT
;
1475 mask
= ~TGSI_EXEC_CC_W_MASK
;
1482 for (i
= 0; i
< QUAD_SIZE
; i
++)
1483 if (execmask
& (1 << i
)) {
1485 if (dst
->f
[i
] < 0.0f
)
1486 cc
->u
[i
] |= TGSI_EXEC_CC_LT
<< shift
;
1487 else if (dst
->f
[i
] > 0.0f
)
1488 cc
->u
[i
] |= TGSI_EXEC_CC_GT
<< shift
;
1489 else if (dst
->f
[i
] == 0.0f
)
1490 cc
->u
[i
] |= TGSI_EXEC_CC_EQ
<< shift
;
1492 cc
->u
[i
] |= TGSI_EXEC_CC_UN
<< shift
;
1497 #define FETCH(VAL,INDEX,CHAN)\
1498 fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
1500 #define STORE(VAL,INDEX,CHAN)\
1501 store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
1505 * Execute ARB-style KIL which is predicated by a src register.
1506 * Kill fragment if any of the four values is less than zero.
1509 exec_kil(struct tgsi_exec_machine
*mach
,
1510 const struct tgsi_full_instruction
*inst
)
1514 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1515 union tgsi_exec_channel r
[1];
1517 /* This mask stores component bits that were already tested. Note that
1518 * we test if the value is less than zero, so 1.0 and 0.0 need not to be
1520 uniquemask
= (1 << TGSI_EXTSWIZZLE_ZERO
) | (1 << TGSI_EXTSWIZZLE_ONE
);
1522 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1527 /* unswizzle channel */
1528 swizzle
= tgsi_util_get_full_src_register_extswizzle (
1529 &inst
->FullSrcRegisters
[0],
1532 /* check if the component has not been already tested */
1533 if (uniquemask
& (1 << swizzle
))
1535 uniquemask
|= 1 << swizzle
;
1537 FETCH(&r
[0], 0, chan_index
);
1538 for (i
= 0; i
< 4; i
++)
1539 if (r
[0].f
[i
] < 0.0f
)
1543 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1547 * Execute NVIDIA-style KIL which is predicated by a condition code.
1548 * Kill fragment if the condition code is TRUE.
1551 exec_kilp(struct tgsi_exec_machine
*mach
,
1552 const struct tgsi_full_instruction
*inst
)
1554 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1556 if (inst
->InstructionExtNv
.CondFlowEnable
) {
1562 swizzle
[0] = inst
->InstructionExtNv
.CondSwizzleX
;
1563 swizzle
[1] = inst
->InstructionExtNv
.CondSwizzleY
;
1564 swizzle
[2] = inst
->InstructionExtNv
.CondSwizzleZ
;
1565 swizzle
[3] = inst
->InstructionExtNv
.CondSwizzleW
;
1567 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1571 for (i
= 0; i
< 4; i
++) {
1572 /* TODO: evaluate the condition code */
1579 /* "unconditional" kil */
1580 kilmask
= mach
->ExecMask
;
1582 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1587 * Fetch a four texture samples using STR texture coordinates.
1590 fetch_texel( struct tgsi_sampler
*sampler
,
1591 const union tgsi_exec_channel
*s
,
1592 const union tgsi_exec_channel
*t
,
1593 const union tgsi_exec_channel
*p
,
1594 float lodbias
, /* XXX should be float[4] */
1595 union tgsi_exec_channel
*r
,
1596 union tgsi_exec_channel
*g
,
1597 union tgsi_exec_channel
*b
,
1598 union tgsi_exec_channel
*a
)
1601 float rgba
[NUM_CHANNELS
][QUAD_SIZE
];
1603 sampler
->get_samples(sampler
, s
->f
, t
->f
, p
->f
, lodbias
, rgba
);
1605 for (j
= 0; j
< 4; j
++) {
1606 r
->f
[j
] = rgba
[0][j
];
1607 g
->f
[j
] = rgba
[1][j
];
1608 b
->f
[j
] = rgba
[2][j
];
1609 a
->f
[j
] = rgba
[3][j
];
1615 exec_tex(struct tgsi_exec_machine
*mach
,
1616 const struct tgsi_full_instruction
*inst
,
1620 const uint unit
= inst
->FullSrcRegisters
[1].SrcRegister
.Index
;
1621 union tgsi_exec_channel r
[4];
1625 /* debug_printf("Sampler %u unit %u\n", sampler, unit); */
1627 switch (inst
->InstructionExtTexture
.Texture
) {
1628 case TGSI_TEXTURE_1D
:
1629 case TGSI_TEXTURE_SHADOW1D
:
1631 FETCH(&r
[0], 0, CHAN_X
);
1634 FETCH(&r
[1], 0, CHAN_W
);
1635 micro_div( &r
[0], &r
[0], &r
[1] );
1639 FETCH(&r
[1], 0, CHAN_W
);
1640 lodBias
= r
[2].f
[0];
1645 fetch_texel(mach
->Samplers
[unit
],
1646 &r
[0], NULL
, NULL
, lodBias
, /* S, T, P, BIAS */
1647 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1650 case TGSI_TEXTURE_2D
:
1651 case TGSI_TEXTURE_RECT
:
1652 case TGSI_TEXTURE_SHADOW2D
:
1653 case TGSI_TEXTURE_SHADOWRECT
:
1655 FETCH(&r
[0], 0, CHAN_X
);
1656 FETCH(&r
[1], 0, CHAN_Y
);
1657 FETCH(&r
[2], 0, CHAN_Z
);
1660 FETCH(&r
[3], 0, CHAN_W
);
1661 micro_div( &r
[0], &r
[0], &r
[3] );
1662 micro_div( &r
[1], &r
[1], &r
[3] );
1663 micro_div( &r
[2], &r
[2], &r
[3] );
1667 FETCH(&r
[3], 0, CHAN_W
);
1668 lodBias
= r
[3].f
[0];
1673 fetch_texel(mach
->Samplers
[unit
],
1674 &r
[0], &r
[1], &r
[2], lodBias
, /* inputs */
1675 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1678 case TGSI_TEXTURE_3D
:
1679 case TGSI_TEXTURE_CUBE
:
1681 FETCH(&r
[0], 0, CHAN_X
);
1682 FETCH(&r
[1], 0, CHAN_Y
);
1683 FETCH(&r
[2], 0, CHAN_Z
);
1686 FETCH(&r
[3], 0, CHAN_W
);
1687 micro_div( &r
[0], &r
[0], &r
[3] );
1688 micro_div( &r
[1], &r
[1], &r
[3] );
1689 micro_div( &r
[2], &r
[2], &r
[3] );
1693 FETCH(&r
[3], 0, CHAN_W
);
1694 lodBias
= r
[3].f
[0];
1699 fetch_texel(mach
->Samplers
[unit
],
1700 &r
[0], &r
[1], &r
[2], lodBias
,
1701 &r
[0], &r
[1], &r
[2], &r
[3]);
1708 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1709 STORE( &r
[chan_index
], 0, chan_index
);
1715 * Evaluate a constant-valued coefficient at the position of the
1720 struct tgsi_exec_machine
*mach
,
1726 for( i
= 0; i
< QUAD_SIZE
; i
++ ) {
1727 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
1732 * Evaluate a linear-valued coefficient at the position of the
1737 struct tgsi_exec_machine
*mach
,
1741 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1742 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1743 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1744 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1745 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1746 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
1747 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
1748 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
1749 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
1753 * Evaluate a perspective-valued coefficient at the position of the
1757 eval_perspective_coef(
1758 struct tgsi_exec_machine
*mach
,
1762 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1763 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1764 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1765 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1766 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1767 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
1768 /* divide by W here */
1769 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
1770 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
1771 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
1772 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
1776 typedef void (* eval_coef_func
)(
1777 struct tgsi_exec_machine
*mach
,
1783 struct tgsi_exec_machine
*mach
,
1784 const struct tgsi_full_declaration
*decl
)
1786 if( mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
1787 if( decl
->Declaration
.File
== TGSI_FILE_INPUT
) {
1788 unsigned first
, last
, mask
;
1789 eval_coef_func eval
;
1791 first
= decl
->DeclarationRange
.First
;
1792 last
= decl
->DeclarationRange
.Last
;
1793 mask
= decl
->Declaration
.UsageMask
;
1795 switch( decl
->Declaration
.Interpolate
) {
1796 case TGSI_INTERPOLATE_CONSTANT
:
1797 eval
= eval_constant_coef
;
1800 case TGSI_INTERPOLATE_LINEAR
:
1801 eval
= eval_linear_coef
;
1804 case TGSI_INTERPOLATE_PERSPECTIVE
:
1805 eval
= eval_perspective_coef
;
1813 if( mask
== TGSI_WRITEMASK_XYZW
) {
1816 for( i
= first
; i
<= last
; i
++ ) {
1817 for( j
= 0; j
< NUM_CHANNELS
; j
++ ) {
1825 for( j
= 0; j
< NUM_CHANNELS
; j
++ ) {
1826 if( mask
& (1 << j
) ) {
1827 for( i
= first
; i
<= last
; i
++ ) {
1839 struct tgsi_exec_machine
*mach
,
1840 const struct tgsi_full_instruction
*inst
,
1844 union tgsi_exec_channel r
[10];
1848 switch (inst
->Instruction
.Opcode
) {
1849 case TGSI_OPCODE_ARL
:
1850 /* TGSI_OPCODE_FLOOR */
1851 /* TGSI_OPCODE_FLR */
1852 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1853 FETCH( &r
[0], 0, chan_index
);
1854 micro_flr( &r
[0], &r
[0] );
1855 STORE( &r
[0], 0, chan_index
);
1859 case TGSI_OPCODE_MOV
:
1860 case TGSI_OPCODE_SWZ
:
1861 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1862 FETCH( &r
[0], 0, chan_index
);
1863 STORE( &r
[0], 0, chan_index
);
1867 case TGSI_OPCODE_LIT
:
1868 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1869 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
1872 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1873 FETCH( &r
[0], 0, CHAN_X
);
1874 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1875 micro_max( &r
[0], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
1876 STORE( &r
[0], 0, CHAN_Y
);
1879 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1880 FETCH( &r
[1], 0, CHAN_Y
);
1881 micro_max( &r
[1], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
1883 FETCH( &r
[2], 0, CHAN_W
);
1884 micro_min( &r
[2], &r
[2], &mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
] );
1885 micro_max( &r
[2], &r
[2], &mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
] );
1886 micro_pow( &r
[1], &r
[1], &r
[2] );
1887 micro_lt( &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
1888 STORE( &r
[0], 0, CHAN_Z
);
1892 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1893 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
1897 case TGSI_OPCODE_RCP
:
1898 /* TGSI_OPCODE_RECIP */
1899 FETCH( &r
[0], 0, CHAN_X
);
1900 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
1901 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1902 STORE( &r
[0], 0, chan_index
);
1906 case TGSI_OPCODE_RSQ
:
1907 /* TGSI_OPCODE_RECIPSQRT */
1908 FETCH( &r
[0], 0, CHAN_X
);
1909 micro_abs( &r
[0], &r
[0] );
1910 micro_sqrt( &r
[0], &r
[0] );
1911 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
1912 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1913 STORE( &r
[0], 0, chan_index
);
1917 case TGSI_OPCODE_EXP
:
1918 FETCH( &r
[0], 0, CHAN_X
);
1919 micro_flr( &r
[1], &r
[0] ); /* r1 = floor(r0) */
1920 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1921 micro_exp2( &r
[2], &r
[1] ); /* r2 = 2 ^ r1 */
1922 STORE( &r
[2], 0, CHAN_X
); /* store r2 */
1924 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1925 micro_sub( &r
[2], &r
[0], &r
[1] ); /* r2 = r0 - r1 */
1926 STORE( &r
[2], 0, CHAN_Y
); /* store r2 */
1928 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1929 micro_exp2( &r
[2], &r
[0] ); /* r2 = 2 ^ r0 */
1930 STORE( &r
[2], 0, CHAN_Z
); /* store r2 */
1932 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1933 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
1937 case TGSI_OPCODE_LOG
:
1938 FETCH( &r
[0], 0, CHAN_X
);
1939 micro_abs( &r
[2], &r
[0] ); /* r2 = abs(r0) */
1940 micro_lg2( &r
[1], &r
[2] ); /* r1 = lg2(r2) */
1941 micro_flr( &r
[0], &r
[1] ); /* r0 = floor(r1) */
1942 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
1943 STORE( &r
[0], 0, CHAN_X
);
1945 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
1946 micro_exp2( &r
[0], &r
[0] ); /* r0 = 2 ^ r0 */
1947 micro_div( &r
[0], &r
[2], &r
[0] ); /* r0 = r2 / r0 */
1948 STORE( &r
[0], 0, CHAN_Y
);
1950 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
1951 STORE( &r
[1], 0, CHAN_Z
);
1953 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
1954 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
1958 case TGSI_OPCODE_MUL
:
1959 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
)
1961 FETCH(&r
[0], 0, chan_index
);
1962 FETCH(&r
[1], 1, chan_index
);
1964 micro_mul( &r
[0], &r
[0], &r
[1] );
1966 STORE(&r
[0], 0, chan_index
);
1970 case TGSI_OPCODE_ADD
:
1971 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1972 FETCH( &r
[0], 0, chan_index
);
1973 FETCH( &r
[1], 1, chan_index
);
1974 micro_add( &r
[0], &r
[0], &r
[1] );
1975 STORE( &r
[0], 0, chan_index
);
1979 case TGSI_OPCODE_DP3
:
1980 /* TGSI_OPCODE_DOT3 */
1981 FETCH( &r
[0], 0, CHAN_X
);
1982 FETCH( &r
[1], 1, CHAN_X
);
1983 micro_mul( &r
[0], &r
[0], &r
[1] );
1985 FETCH( &r
[1], 0, CHAN_Y
);
1986 FETCH( &r
[2], 1, CHAN_Y
);
1987 micro_mul( &r
[1], &r
[1], &r
[2] );
1988 micro_add( &r
[0], &r
[0], &r
[1] );
1990 FETCH( &r
[1], 0, CHAN_Z
);
1991 FETCH( &r
[2], 1, CHAN_Z
);
1992 micro_mul( &r
[1], &r
[1], &r
[2] );
1993 micro_add( &r
[0], &r
[0], &r
[1] );
1995 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1996 STORE( &r
[0], 0, chan_index
);
2000 case TGSI_OPCODE_DP4
:
2001 /* TGSI_OPCODE_DOT4 */
2002 FETCH(&r
[0], 0, CHAN_X
);
2003 FETCH(&r
[1], 1, CHAN_X
);
2005 micro_mul( &r
[0], &r
[0], &r
[1] );
2007 FETCH(&r
[1], 0, CHAN_Y
);
2008 FETCH(&r
[2], 1, CHAN_Y
);
2010 micro_mul( &r
[1], &r
[1], &r
[2] );
2011 micro_add( &r
[0], &r
[0], &r
[1] );
2013 FETCH(&r
[1], 0, CHAN_Z
);
2014 FETCH(&r
[2], 1, CHAN_Z
);
2016 micro_mul( &r
[1], &r
[1], &r
[2] );
2017 micro_add( &r
[0], &r
[0], &r
[1] );
2019 FETCH(&r
[1], 0, CHAN_W
);
2020 FETCH(&r
[2], 1, CHAN_W
);
2022 micro_mul( &r
[1], &r
[1], &r
[2] );
2023 micro_add( &r
[0], &r
[0], &r
[1] );
2025 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2026 STORE( &r
[0], 0, chan_index
);
2030 case TGSI_OPCODE_DST
:
2031 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2032 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2035 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2036 FETCH( &r
[0], 0, CHAN_Y
);
2037 FETCH( &r
[1], 1, CHAN_Y
);
2038 micro_mul( &r
[0], &r
[0], &r
[1] );
2039 STORE( &r
[0], 0, CHAN_Y
);
2042 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2043 FETCH( &r
[0], 0, CHAN_Z
);
2044 STORE( &r
[0], 0, CHAN_Z
);
2047 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2048 FETCH( &r
[0], 1, CHAN_W
);
2049 STORE( &r
[0], 0, CHAN_W
);
2053 case TGSI_OPCODE_MIN
:
2054 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2055 FETCH(&r
[0], 0, chan_index
);
2056 FETCH(&r
[1], 1, chan_index
);
2058 /* XXX use micro_min()?? */
2059 micro_lt( &r
[0], &r
[0], &r
[1], &r
[0], &r
[1] );
2061 STORE(&r
[0], 0, chan_index
);
2065 case TGSI_OPCODE_MAX
:
2066 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2067 FETCH(&r
[0], 0, chan_index
);
2068 FETCH(&r
[1], 1, chan_index
);
2070 /* XXX use micro_max()?? */
2071 micro_lt( &r
[0], &r
[0], &r
[1], &r
[1], &r
[0] );
2073 STORE(&r
[0], 0, chan_index
);
2077 case TGSI_OPCODE_SLT
:
2078 /* TGSI_OPCODE_SETLT */
2079 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2080 FETCH( &r
[0], 0, chan_index
);
2081 FETCH( &r
[1], 1, chan_index
);
2082 micro_lt( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2083 STORE( &r
[0], 0, chan_index
);
2087 case TGSI_OPCODE_SGE
:
2088 /* TGSI_OPCODE_SETGE */
2089 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2090 FETCH( &r
[0], 0, chan_index
);
2091 FETCH( &r
[1], 1, chan_index
);
2092 micro_le( &r
[0], &r
[1], &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2093 STORE( &r
[0], 0, chan_index
);
2097 case TGSI_OPCODE_MAD
:
2098 /* TGSI_OPCODE_MADD */
2099 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2100 FETCH( &r
[0], 0, chan_index
);
2101 FETCH( &r
[1], 1, chan_index
);
2102 micro_mul( &r
[0], &r
[0], &r
[1] );
2103 FETCH( &r
[1], 2, chan_index
);
2104 micro_add( &r
[0], &r
[0], &r
[1] );
2105 STORE( &r
[0], 0, chan_index
);
2109 case TGSI_OPCODE_SUB
:
2110 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2111 FETCH(&r
[0], 0, chan_index
);
2112 FETCH(&r
[1], 1, chan_index
);
2114 micro_sub( &r
[0], &r
[0], &r
[1] );
2116 STORE(&r
[0], 0, chan_index
);
2120 case TGSI_OPCODE_LERP
:
2121 /* TGSI_OPCODE_LRP */
2122 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2123 FETCH(&r
[0], 0, chan_index
);
2124 FETCH(&r
[1], 1, chan_index
);
2125 FETCH(&r
[2], 2, chan_index
);
2127 micro_sub( &r
[1], &r
[1], &r
[2] );
2128 micro_mul( &r
[0], &r
[0], &r
[1] );
2129 micro_add( &r
[0], &r
[0], &r
[2] );
2131 STORE(&r
[0], 0, chan_index
);
2135 case TGSI_OPCODE_CND
:
2136 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2137 FETCH(&r
[0], 0, chan_index
);
2138 FETCH(&r
[1], 1, chan_index
);
2139 FETCH(&r
[2], 2, chan_index
);
2140 micro_lt(&r
[0], &mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
], &r
[2], &r
[0], &r
[1]);
2141 STORE(&r
[0], 0, chan_index
);
2145 case TGSI_OPCODE_CND0
:
2146 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2147 FETCH(&r
[0], 0, chan_index
);
2148 FETCH(&r
[1], 1, chan_index
);
2149 FETCH(&r
[2], 2, chan_index
);
2150 micro_le(&r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[2], &r
[0], &r
[1]);
2151 STORE(&r
[0], 0, chan_index
);
2155 case TGSI_OPCODE_DOT2ADD
:
2156 /* TGSI_OPCODE_DP2A */
2157 FETCH( &r
[0], 0, CHAN_X
);
2158 FETCH( &r
[1], 1, CHAN_X
);
2159 micro_mul( &r
[0], &r
[0], &r
[1] );
2161 FETCH( &r
[1], 0, CHAN_Y
);
2162 FETCH( &r
[2], 1, CHAN_Y
);
2163 micro_mul( &r
[1], &r
[1], &r
[2] );
2164 micro_add( &r
[0], &r
[0], &r
[1] );
2166 FETCH( &r
[2], 2, CHAN_X
);
2167 micro_add( &r
[0], &r
[0], &r
[2] );
2169 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2170 STORE( &r
[0], 0, chan_index
);
2174 case TGSI_OPCODE_INDEX
:
2175 /* XXX: considered for removal */
2179 case TGSI_OPCODE_NEGATE
:
2180 /* XXX: considered for removal */
2184 case TGSI_OPCODE_FRAC
:
2185 /* TGSI_OPCODE_FRC */
2186 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2187 FETCH( &r
[0], 0, chan_index
);
2188 micro_frc( &r
[0], &r
[0] );
2189 STORE( &r
[0], 0, chan_index
);
2193 case TGSI_OPCODE_CLAMP
:
2194 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2195 FETCH(&r
[0], 0, chan_index
);
2196 FETCH(&r
[1], 1, chan_index
);
2197 micro_max(&r
[0], &r
[0], &r
[1]);
2198 FETCH(&r
[1], 2, chan_index
);
2199 micro_min(&r
[0], &r
[0], &r
[1]);
2200 STORE(&r
[0], 0, chan_index
);
2204 case TGSI_OPCODE_ROUND
:
2205 case TGSI_OPCODE_ARR
:
2206 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2207 FETCH( &r
[0], 0, chan_index
);
2208 micro_rnd( &r
[0], &r
[0] );
2209 STORE( &r
[0], 0, chan_index
);
2213 case TGSI_OPCODE_EXPBASE2
:
2214 /* TGSI_OPCODE_EX2 */
2215 FETCH(&r
[0], 0, CHAN_X
);
2218 micro_exp2( &r
[0], &r
[0] );
2220 micro_pow( &r
[0], &mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
], &r
[0] );
2223 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2224 STORE( &r
[0], 0, chan_index
);
2228 case TGSI_OPCODE_LOGBASE2
:
2229 /* TGSI_OPCODE_LG2 */
2230 FETCH( &r
[0], 0, CHAN_X
);
2231 micro_lg2( &r
[0], &r
[0] );
2232 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2233 STORE( &r
[0], 0, chan_index
);
2237 case TGSI_OPCODE_POWER
:
2238 /* TGSI_OPCODE_POW */
2239 FETCH(&r
[0], 0, CHAN_X
);
2240 FETCH(&r
[1], 1, CHAN_X
);
2242 micro_pow( &r
[0], &r
[0], &r
[1] );
2244 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2245 STORE( &r
[0], 0, chan_index
);
2249 case TGSI_OPCODE_CROSSPRODUCT
:
2250 /* TGSI_OPCODE_XPD */
2251 FETCH(&r
[0], 0, CHAN_Y
);
2252 FETCH(&r
[1], 1, CHAN_Z
);
2254 micro_mul( &r
[2], &r
[0], &r
[1] );
2256 FETCH(&r
[3], 0, CHAN_Z
);
2257 FETCH(&r
[4], 1, CHAN_Y
);
2259 micro_mul( &r
[5], &r
[3], &r
[4] );
2260 micro_sub( &r
[2], &r
[2], &r
[5] );
2262 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2263 STORE( &r
[2], 0, CHAN_X
);
2266 FETCH(&r
[2], 1, CHAN_X
);
2268 micro_mul( &r
[3], &r
[3], &r
[2] );
2270 FETCH(&r
[5], 0, CHAN_X
);
2272 micro_mul( &r
[1], &r
[1], &r
[5] );
2273 micro_sub( &r
[3], &r
[3], &r
[1] );
2275 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2276 STORE( &r
[3], 0, CHAN_Y
);
2279 micro_mul( &r
[5], &r
[5], &r
[4] );
2280 micro_mul( &r
[0], &r
[0], &r
[2] );
2281 micro_sub( &r
[5], &r
[5], &r
[0] );
2283 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2284 STORE( &r
[5], 0, CHAN_Z
);
2287 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2288 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2292 case TGSI_OPCODE_MULTIPLYMATRIX
:
2293 /* XXX: considered for removal */
2297 case TGSI_OPCODE_ABS
:
2298 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2299 FETCH(&r
[0], 0, chan_index
);
2301 micro_abs( &r
[0], &r
[0] );
2303 STORE(&r
[0], 0, chan_index
);
2307 case TGSI_OPCODE_RCC
:
2308 FETCH(&r
[0], 0, CHAN_X
);
2309 micro_div(&r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0]);
2310 micro_float_clamp(&r
[0], &r
[0]);
2311 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2312 STORE(&r
[0], 0, chan_index
);
2316 case TGSI_OPCODE_DPH
:
2317 FETCH(&r
[0], 0, CHAN_X
);
2318 FETCH(&r
[1], 1, CHAN_X
);
2320 micro_mul( &r
[0], &r
[0], &r
[1] );
2322 FETCH(&r
[1], 0, CHAN_Y
);
2323 FETCH(&r
[2], 1, CHAN_Y
);
2325 micro_mul( &r
[1], &r
[1], &r
[2] );
2326 micro_add( &r
[0], &r
[0], &r
[1] );
2328 FETCH(&r
[1], 0, CHAN_Z
);
2329 FETCH(&r
[2], 1, CHAN_Z
);
2331 micro_mul( &r
[1], &r
[1], &r
[2] );
2332 micro_add( &r
[0], &r
[0], &r
[1] );
2334 FETCH(&r
[1], 1, CHAN_W
);
2336 micro_add( &r
[0], &r
[0], &r
[1] );
2338 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2339 STORE( &r
[0], 0, chan_index
);
2343 case TGSI_OPCODE_COS
:
2344 FETCH(&r
[0], 0, CHAN_X
);
2346 micro_cos( &r
[0], &r
[0] );
2348 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2349 STORE( &r
[0], 0, chan_index
);
2353 case TGSI_OPCODE_DDX
:
2354 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2355 FETCH( &r
[0], 0, chan_index
);
2356 micro_ddx( &r
[0], &r
[0] );
2357 STORE( &r
[0], 0, chan_index
);
2361 case TGSI_OPCODE_DDY
:
2362 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2363 FETCH( &r
[0], 0, chan_index
);
2364 micro_ddy( &r
[0], &r
[0] );
2365 STORE( &r
[0], 0, chan_index
);
2369 case TGSI_OPCODE_KILP
:
2370 exec_kilp (mach
, inst
);
2373 case TGSI_OPCODE_KIL
:
2374 exec_kil (mach
, inst
);
2377 case TGSI_OPCODE_PK2H
:
2381 case TGSI_OPCODE_PK2US
:
2385 case TGSI_OPCODE_PK4B
:
2389 case TGSI_OPCODE_PK4UB
:
2393 case TGSI_OPCODE_RFL
:
2394 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2395 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2396 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2397 /* r0 = dp3(src0, src0) */
2398 FETCH(&r
[2], 0, CHAN_X
);
2399 micro_mul(&r
[0], &r
[2], &r
[2]);
2400 FETCH(&r
[4], 0, CHAN_Y
);
2401 micro_mul(&r
[8], &r
[4], &r
[4]);
2402 micro_add(&r
[0], &r
[0], &r
[8]);
2403 FETCH(&r
[6], 0, CHAN_Z
);
2404 micro_mul(&r
[8], &r
[6], &r
[6]);
2405 micro_add(&r
[0], &r
[0], &r
[8]);
2407 /* r1 = dp3(src0, src1) */
2408 FETCH(&r
[3], 1, CHAN_X
);
2409 micro_mul(&r
[1], &r
[2], &r
[3]);
2410 FETCH(&r
[5], 1, CHAN_Y
);
2411 micro_mul(&r
[8], &r
[4], &r
[5]);
2412 micro_add(&r
[1], &r
[1], &r
[8]);
2413 FETCH(&r
[7], 1, CHAN_Z
);
2414 micro_mul(&r
[8], &r
[6], &r
[7]);
2415 micro_add(&r
[1], &r
[1], &r
[8]);
2417 /* r1 = 2 * r1 / r0 */
2418 micro_add(&r
[1], &r
[1], &r
[1]);
2419 micro_div(&r
[1], &r
[1], &r
[0]);
2421 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2422 micro_mul(&r
[2], &r
[2], &r
[1]);
2423 micro_sub(&r
[2], &r
[2], &r
[3]);
2424 STORE(&r
[2], 0, CHAN_X
);
2426 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2427 micro_mul(&r
[4], &r
[4], &r
[1]);
2428 micro_sub(&r
[4], &r
[4], &r
[5]);
2429 STORE(&r
[4], 0, CHAN_Y
);
2431 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2432 micro_mul(&r
[6], &r
[6], &r
[1]);
2433 micro_sub(&r
[6], &r
[6], &r
[7]);
2434 STORE(&r
[6], 0, CHAN_Z
);
2437 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2438 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2442 case TGSI_OPCODE_SEQ
:
2443 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2444 FETCH( &r
[0], 0, chan_index
);
2445 FETCH( &r
[1], 1, chan_index
);
2446 micro_eq( &r
[0], &r
[0], &r
[1],
2447 &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
],
2448 &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2449 STORE( &r
[0], 0, chan_index
);
2453 case TGSI_OPCODE_SFL
:
2454 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2455 STORE(&mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, chan_index
);
2459 case TGSI_OPCODE_SGT
:
2460 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2461 FETCH( &r
[0], 0, chan_index
);
2462 FETCH( &r
[1], 1, chan_index
);
2463 micro_le( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
] );
2464 STORE( &r
[0], 0, chan_index
);
2468 case TGSI_OPCODE_SIN
:
2469 FETCH( &r
[0], 0, CHAN_X
);
2470 micro_sin( &r
[0], &r
[0] );
2471 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2472 STORE( &r
[0], 0, chan_index
);
2476 case TGSI_OPCODE_SLE
:
2477 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2478 FETCH( &r
[0], 0, chan_index
);
2479 FETCH( &r
[1], 1, chan_index
);
2480 micro_le( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2481 STORE( &r
[0], 0, chan_index
);
2485 case TGSI_OPCODE_SNE
:
2486 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2487 FETCH( &r
[0], 0, chan_index
);
2488 FETCH( &r
[1], 1, chan_index
);
2489 micro_eq( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
] );
2490 STORE( &r
[0], 0, chan_index
);
2494 case TGSI_OPCODE_STR
:
2495 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2496 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, chan_index
);
2500 case TGSI_OPCODE_TEX
:
2501 /* simple texture lookup */
2502 /* src[0] = texcoord */
2503 /* src[1] = sampler unit */
2504 exec_tex(mach
, inst
, FALSE
, FALSE
);
2507 case TGSI_OPCODE_TXB
:
2508 /* Texture lookup with lod bias */
2509 /* src[0] = texcoord (src[0].w = LOD bias) */
2510 /* src[1] = sampler unit */
2511 exec_tex(mach
, inst
, TRUE
, FALSE
);
2514 case TGSI_OPCODE_TXD
:
2515 /* Texture lookup with explict partial derivatives */
2516 /* src[0] = texcoord */
2517 /* src[1] = d[strq]/dx */
2518 /* src[2] = d[strq]/dy */
2519 /* src[3] = sampler unit */
2523 case TGSI_OPCODE_TXL
:
2524 /* Texture lookup with explit LOD */
2525 /* src[0] = texcoord (src[0].w = LOD) */
2526 /* src[1] = sampler unit */
2527 exec_tex(mach
, inst
, TRUE
, FALSE
);
2530 case TGSI_OPCODE_TXP
:
2531 /* Texture lookup with projection */
2532 /* src[0] = texcoord (src[0].w = projection) */
2533 /* src[1] = sampler unit */
2534 exec_tex(mach
, inst
, FALSE
, TRUE
);
2537 case TGSI_OPCODE_UP2H
:
2541 case TGSI_OPCODE_UP2US
:
2545 case TGSI_OPCODE_UP4B
:
2549 case TGSI_OPCODE_UP4UB
:
2553 case TGSI_OPCODE_X2D
:
2554 FETCH(&r
[0], 1, CHAN_X
);
2555 FETCH(&r
[1], 1, CHAN_Y
);
2556 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2557 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2558 FETCH(&r
[2], 2, CHAN_X
);
2559 micro_mul(&r
[2], &r
[2], &r
[0]);
2560 FETCH(&r
[3], 2, CHAN_Y
);
2561 micro_mul(&r
[3], &r
[3], &r
[1]);
2562 micro_add(&r
[2], &r
[2], &r
[3]);
2563 FETCH(&r
[3], 0, CHAN_X
);
2564 micro_add(&r
[2], &r
[2], &r
[3]);
2565 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2566 STORE(&r
[2], 0, CHAN_X
);
2568 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2569 STORE(&r
[2], 0, CHAN_Z
);
2572 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2573 IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2574 FETCH(&r
[2], 2, CHAN_Z
);
2575 micro_mul(&r
[2], &r
[2], &r
[0]);
2576 FETCH(&r
[3], 2, CHAN_W
);
2577 micro_mul(&r
[3], &r
[3], &r
[1]);
2578 micro_add(&r
[2], &r
[2], &r
[3]);
2579 FETCH(&r
[3], 0, CHAN_Y
);
2580 micro_add(&r
[2], &r
[2], &r
[3]);
2581 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2582 STORE(&r
[2], 0, CHAN_Y
);
2584 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2585 STORE(&r
[2], 0, CHAN_W
);
2590 case TGSI_OPCODE_ARA
:
2594 case TGSI_OPCODE_BRA
:
2598 case TGSI_OPCODE_CAL
:
2599 /* skip the call if no execution channels are enabled */
2600 if (mach
->ExecMask
) {
2603 /* push the Cond, Loop, Cont stacks */
2604 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2605 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2606 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2607 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2608 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2609 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2611 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
2612 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
2614 /* note that PC was already incremented above */
2615 mach
->CallStack
[mach
->CallStackTop
++] = *pc
;
2616 *pc
= inst
->InstructionExtLabel
.Label
;
2620 case TGSI_OPCODE_RET
:
2621 mach
->FuncMask
&= ~mach
->ExecMask
;
2622 UPDATE_EXEC_MASK(mach
);
2624 if (mach
->FuncMask
== 0x0) {
2625 /* really return now (otherwise, keep executing */
2627 if (mach
->CallStackTop
== 0) {
2628 /* returning from main() */
2632 *pc
= mach
->CallStack
[--mach
->CallStackTop
];
2634 /* pop the Cond, Loop, Cont stacks */
2635 assert(mach
->CondStackTop
> 0);
2636 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
2637 assert(mach
->LoopStackTop
> 0);
2638 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
2639 assert(mach
->ContStackTop
> 0);
2640 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
2641 assert(mach
->FuncStackTop
> 0);
2642 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
2644 UPDATE_EXEC_MASK(mach
);
2648 case TGSI_OPCODE_SSG
:
2649 /* TGSI_OPCODE_SGN */
2650 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2651 FETCH( &r
[0], 0, chan_index
);
2652 micro_sgn( &r
[0], &r
[0] );
2653 STORE( &r
[0], 0, chan_index
);
2657 case TGSI_OPCODE_CMP
:
2658 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2659 FETCH(&r
[0], 0, chan_index
);
2660 FETCH(&r
[1], 1, chan_index
);
2661 FETCH(&r
[2], 2, chan_index
);
2663 micro_lt( &r
[0], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[1], &r
[2] );
2665 STORE(&r
[0], 0, chan_index
);
2669 case TGSI_OPCODE_SCS
:
2670 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
2671 FETCH( &r
[0], 0, CHAN_X
);
2672 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2673 micro_cos(&r
[1], &r
[0]);
2674 STORE(&r
[1], 0, CHAN_X
);
2676 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2677 micro_sin(&r
[1], &r
[0]);
2678 STORE(&r
[1], 0, CHAN_Y
);
2681 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Z
) ) {
2682 STORE( &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, CHAN_Z
);
2684 if( IS_CHANNEL_ENABLED( *inst
, CHAN_W
) ) {
2685 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2689 case TGSI_OPCODE_NRM
:
2690 /* 3-component vector normalize */
2691 if(IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2692 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2693 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2694 /* r3 = sqrt(dp3(src0, src0)) */
2695 FETCH(&r
[0], 0, CHAN_X
);
2696 micro_mul(&r
[3], &r
[0], &r
[0]);
2697 FETCH(&r
[1], 0, CHAN_Y
);
2698 micro_mul(&r
[4], &r
[1], &r
[1]);
2699 micro_add(&r
[3], &r
[3], &r
[4]);
2700 FETCH(&r
[2], 0, CHAN_Z
);
2701 micro_mul(&r
[4], &r
[2], &r
[2]);
2702 micro_add(&r
[3], &r
[3], &r
[4]);
2703 micro_sqrt(&r
[3], &r
[3]);
2705 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2706 micro_div(&r
[0], &r
[0], &r
[3]);
2707 STORE(&r
[0], 0, CHAN_X
);
2709 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2710 micro_div(&r
[1], &r
[1], &r
[3]);
2711 STORE(&r
[1], 0, CHAN_Y
);
2713 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2714 micro_div(&r
[2], &r
[2], &r
[3]);
2715 STORE(&r
[2], 0, CHAN_Z
);
2718 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2719 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2723 case TGSI_OPCODE_NRM4
:
2724 /* 4-component vector normalize */
2726 union tgsi_exec_channel tmp
, dot
;
2728 /* tmp = dp4(src0, src0): */
2729 FETCH( &r
[0], 0, CHAN_X
);
2730 micro_mul( &tmp
, &r
[0], &r
[0] );
2732 FETCH( &r
[1], 0, CHAN_Y
);
2733 micro_mul( &dot
, &r
[1], &r
[1] );
2734 micro_add( &tmp
, &tmp
, &dot
);
2736 FETCH( &r
[2], 0, CHAN_Z
);
2737 micro_mul( &dot
, &r
[2], &r
[2] );
2738 micro_add( &tmp
, &tmp
, &dot
);
2740 FETCH( &r
[3], 0, CHAN_W
);
2741 micro_mul( &dot
, &r
[3], &r
[3] );
2742 micro_add( &tmp
, &tmp
, &dot
);
2744 /* tmp = 1 / sqrt(tmp) */
2745 micro_sqrt( &tmp
, &tmp
);
2746 micro_div( &tmp
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &tmp
);
2748 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2749 /* chan = chan * tmp */
2750 micro_mul( &r
[chan_index
], &tmp
, &r
[chan_index
] );
2751 STORE( &r
[chan_index
], 0, chan_index
);
2756 case TGSI_OPCODE_DIV
:
2760 case TGSI_OPCODE_DP2
:
2761 FETCH( &r
[0], 0, CHAN_X
);
2762 FETCH( &r
[1], 1, CHAN_X
);
2763 micro_mul( &r
[0], &r
[0], &r
[1] );
2765 FETCH( &r
[1], 0, CHAN_Y
);
2766 FETCH( &r
[2], 1, CHAN_Y
);
2767 micro_mul( &r
[1], &r
[1], &r
[2] );
2768 micro_add( &r
[0], &r
[0], &r
[1] );
2770 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2771 STORE( &r
[0], 0, chan_index
);
2775 case TGSI_OPCODE_IF
:
2777 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2778 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2779 FETCH( &r
[0], 0, CHAN_X
);
2780 /* update CondMask */
2782 mach
->CondMask
&= ~0x1;
2785 mach
->CondMask
&= ~0x2;
2788 mach
->CondMask
&= ~0x4;
2791 mach
->CondMask
&= ~0x8;
2793 UPDATE_EXEC_MASK(mach
);
2794 /* Todo: If CondMask==0, jump to ELSE */
2797 case TGSI_OPCODE_ELSE
:
2798 /* invert CondMask wrt previous mask */
2801 assert(mach
->CondStackTop
> 0);
2802 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
2803 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
2804 UPDATE_EXEC_MASK(mach
);
2805 /* Todo: If CondMask==0, jump to ENDIF */
2809 case TGSI_OPCODE_ENDIF
:
2811 assert(mach
->CondStackTop
> 0);
2812 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
2813 UPDATE_EXEC_MASK(mach
);
2816 case TGSI_OPCODE_END
:
2817 /* halt execution */
2821 case TGSI_OPCODE_REP
:
2825 case TGSI_OPCODE_ENDREP
:
2829 case TGSI_OPCODE_PUSHA
:
2833 case TGSI_OPCODE_POPA
:
2837 case TGSI_OPCODE_CEIL
:
2838 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2839 FETCH( &r
[0], 0, chan_index
);
2840 micro_ceil( &r
[0], &r
[0] );
2841 STORE( &r
[0], 0, chan_index
);
2845 case TGSI_OPCODE_I2F
:
2846 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2847 FETCH( &r
[0], 0, chan_index
);
2848 micro_i2f( &r
[0], &r
[0] );
2849 STORE( &r
[0], 0, chan_index
);
2853 case TGSI_OPCODE_NOT
:
2854 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2855 FETCH( &r
[0], 0, chan_index
);
2856 micro_not( &r
[0], &r
[0] );
2857 STORE( &r
[0], 0, chan_index
);
2861 case TGSI_OPCODE_TRUNC
:
2862 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2863 FETCH( &r
[0], 0, chan_index
);
2864 micro_trunc( &r
[0], &r
[0] );
2865 STORE( &r
[0], 0, chan_index
);
2869 case TGSI_OPCODE_SHL
:
2870 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2871 FETCH( &r
[0], 0, chan_index
);
2872 FETCH( &r
[1], 1, chan_index
);
2873 micro_shl( &r
[0], &r
[0], &r
[1] );
2874 STORE( &r
[0], 0, chan_index
);
2878 case TGSI_OPCODE_SHR
:
2879 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2880 FETCH( &r
[0], 0, chan_index
);
2881 FETCH( &r
[1], 1, chan_index
);
2882 micro_ishr( &r
[0], &r
[0], &r
[1] );
2883 STORE( &r
[0], 0, chan_index
);
2887 case TGSI_OPCODE_AND
:
2888 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2889 FETCH( &r
[0], 0, chan_index
);
2890 FETCH( &r
[1], 1, chan_index
);
2891 micro_and( &r
[0], &r
[0], &r
[1] );
2892 STORE( &r
[0], 0, chan_index
);
2896 case TGSI_OPCODE_OR
:
2897 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2898 FETCH( &r
[0], 0, chan_index
);
2899 FETCH( &r
[1], 1, chan_index
);
2900 micro_or( &r
[0], &r
[0], &r
[1] );
2901 STORE( &r
[0], 0, chan_index
);
2905 case TGSI_OPCODE_MOD
:
2909 case TGSI_OPCODE_XOR
:
2910 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2911 FETCH( &r
[0], 0, chan_index
);
2912 FETCH( &r
[1], 1, chan_index
);
2913 micro_xor( &r
[0], &r
[0], &r
[1] );
2914 STORE( &r
[0], 0, chan_index
);
2918 case TGSI_OPCODE_SAD
:
2922 case TGSI_OPCODE_TXF
:
2926 case TGSI_OPCODE_TXQ
:
2930 case TGSI_OPCODE_EMIT
:
2931 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += 16;
2932 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
2935 case TGSI_OPCODE_ENDPRIM
:
2936 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]++;
2937 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]] = 0;
2940 case TGSI_OPCODE_LOOP
:
2941 /* fall-through (for now) */
2942 case TGSI_OPCODE_BGNLOOP2
:
2943 /* push LoopMask and ContMasks */
2944 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2945 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2946 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2947 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2950 case TGSI_OPCODE_ENDLOOP
:
2951 /* fall-through (for now at least) */
2952 case TGSI_OPCODE_ENDLOOP2
:
2953 /* Restore ContMask, but don't pop */
2954 assert(mach
->ContStackTop
> 0);
2955 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
2956 UPDATE_EXEC_MASK(mach
);
2957 if (mach
->ExecMask
) {
2958 /* repeat loop: jump to instruction just past BGNLOOP */
2959 *pc
= inst
->InstructionExtLabel
.Label
+ 1;
2962 /* exit loop: pop LoopMask */
2963 assert(mach
->LoopStackTop
> 0);
2964 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
2966 assert(mach
->ContStackTop
> 0);
2967 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
2969 UPDATE_EXEC_MASK(mach
);
2972 case TGSI_OPCODE_BRK
:
2973 /* turn off loop channels for each enabled exec channel */
2974 mach
->LoopMask
&= ~mach
->ExecMask
;
2975 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2976 UPDATE_EXEC_MASK(mach
);
2979 case TGSI_OPCODE_CONT
:
2980 /* turn off cont channels for each enabled exec channel */
2981 mach
->ContMask
&= ~mach
->ExecMask
;
2982 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2983 UPDATE_EXEC_MASK(mach
);
2986 case TGSI_OPCODE_BGNSUB
:
2990 case TGSI_OPCODE_ENDSUB
:
2994 case TGSI_OPCODE_NOISE1
:
2998 case TGSI_OPCODE_NOISE2
:
3002 case TGSI_OPCODE_NOISE3
:
3006 case TGSI_OPCODE_NOISE4
:
3010 case TGSI_OPCODE_NOP
:
3020 * Run TGSI interpreter.
3021 * \return bitmask of "alive" quad components
3024 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
3029 mach
->CondMask
= 0xf;
3030 mach
->LoopMask
= 0xf;
3031 mach
->ContMask
= 0xf;
3032 mach
->FuncMask
= 0xf;
3033 mach
->ExecMask
= 0xf;
3035 mach
->CondStackTop
= 0; /* temporarily subvert this assertion */
3036 assert(mach
->CondStackTop
== 0);
3037 assert(mach
->LoopStackTop
== 0);
3038 assert(mach
->ContStackTop
== 0);
3039 assert(mach
->CallStackTop
== 0);
3041 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
3042 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
3044 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
3045 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
3046 mach
->Primitives
[0] = 0;
3049 for (i
= 0; i
< QUAD_SIZE
; i
++) {
3050 mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
].u
[i
] =
3051 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_X_SHIFT
) |
3052 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Y_SHIFT
) |
3053 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Z_SHIFT
) |
3054 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_W_SHIFT
);
3057 /* execute declarations (interpolants) */
3058 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
3059 exec_declaration( mach
, mach
->Declarations
+i
);
3062 /* execute instructions, until pc is set to -1 */
3064 assert(pc
< (int) mach
->NumInstructions
);
3065 exec_instruction( mach
, mach
->Instructions
+ pc
, &pc
);
3069 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3070 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
3072 * Scale back depth component.
3074 for (i
= 0; i
< 4; i
++)
3075 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
3079 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];