projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
tgsi: ifdef out unused function micro_sqrt.
[mesa.git] / src / gallium / auxiliary / tgsi / tgsi_exec.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 /**
30 * TGSI interpreter/executor.
31 *
32 * Flow control information:
33 *
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
38 *
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
42 * See store_dest().
43 *
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
47 *
48 *
49 * Authors:
50 * Michal Krol
51 * Brian Paul
52 */
53
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_memory.h"
62 #include "util/u_math.h"
63
64
65 #define FAST_MATH 1
66
67 #define TILE_TOP_LEFT 0
68 #define TILE_TOP_RIGHT 1
69 #define TILE_BOTTOM_LEFT 2
70 #define TILE_BOTTOM_RIGHT 3
71
72 static void
73 micro_abs(union tgsi_exec_channel *dst,
74 const union tgsi_exec_channel *src)
75 {
76 dst->f[0] = fabsf(src->f[0]);
77 dst->f[1] = fabsf(src->f[1]);
78 dst->f[2] = fabsf(src->f[2]);
79 dst->f[3] = fabsf(src->f[3]);
80 }
81
82 static void
83 micro_arl(union tgsi_exec_channel *dst,
84 const union tgsi_exec_channel *src)
85 {
86 dst->i[0] = (int)floorf(src->f[0]);
87 dst->i[1] = (int)floorf(src->f[1]);
88 dst->i[2] = (int)floorf(src->f[2]);
89 dst->i[3] = (int)floorf(src->f[3]);
90 }
91
92 static void
93 micro_arr(union tgsi_exec_channel *dst,
94 const union tgsi_exec_channel *src)
95 {
96 dst->i[0] = (int)floorf(src->f[0] + 0.5f);
97 dst->i[1] = (int)floorf(src->f[1] + 0.5f);
98 dst->i[2] = (int)floorf(src->f[2] + 0.5f);
99 dst->i[3] = (int)floorf(src->f[3] + 0.5f);
100 }
101
102 static void
103 micro_ceil(union tgsi_exec_channel *dst,
104 const union tgsi_exec_channel *src)
105 {
106 dst->f[0] = ceilf(src->f[0]);
107 dst->f[1] = ceilf(src->f[1]);
108 dst->f[2] = ceilf(src->f[2]);
109 dst->f[3] = ceilf(src->f[3]);
110 }
111
112 static void
113 micro_cos(union tgsi_exec_channel *dst,
114 const union tgsi_exec_channel *src)
115 {
116 dst->f[0] = cosf(src->f[0]);
117 dst->f[1] = cosf(src->f[1]);
118 dst->f[2] = cosf(src->f[2]);
119 dst->f[3] = cosf(src->f[3]);
120 }
121
122 static void
123 micro_ddx(union tgsi_exec_channel *dst,
124 const union tgsi_exec_channel *src)
125 {
126 dst->f[0] =
127 dst->f[1] =
128 dst->f[2] =
129 dst->f[3] = src->f[TILE_BOTTOM_RIGHT] - src->f[TILE_BOTTOM_LEFT];
130 }
131
132 static void
133 micro_ddy(union tgsi_exec_channel *dst,
134 const union tgsi_exec_channel *src)
135 {
136 dst->f[0] =
137 dst->f[1] =
138 dst->f[2] =
139 dst->f[3] = src->f[TILE_BOTTOM_LEFT] - src->f[TILE_TOP_LEFT];
140 }
141
142 static void
143 micro_exp2(union tgsi_exec_channel *dst,
144 const union tgsi_exec_channel *src)
145 {
146 #if FAST_MATH
147 dst->f[0] = util_fast_exp2(src->f[0]);
148 dst->f[1] = util_fast_exp2(src->f[1]);
149 dst->f[2] = util_fast_exp2(src->f[2]);
150 dst->f[3] = util_fast_exp2(src->f[3]);
151 #else
152 #if DEBUG
153 /* Inf is okay for this instruction, so clamp it to silence assertions. */
154 uint i;
155 union tgsi_exec_channel clamped;
156
157 for (i = 0; i < 4; i++) {
158 if (src->f[i] > 127.99999f) {
159 clamped.f[i] = 127.99999f;
160 } else if (src->f[i] < -126.99999f) {
161 clamped.f[i] = -126.99999f;
162 } else {
163 clamped.f[i] = src->f[i];
164 }
165 }
166 src = &clamped;
167 #endif /* DEBUG */
168
169 dst->f[0] = powf(2.0f, src->f[0]);
170 dst->f[1] = powf(2.0f, src->f[1]);
171 dst->f[2] = powf(2.0f, src->f[2]);
172 dst->f[3] = powf(2.0f, src->f[3]);
173 #endif /* FAST_MATH */
174 }
175
176 static void
177 micro_flr(union tgsi_exec_channel *dst,
178 const union tgsi_exec_channel *src)
179 {
180 dst->f[0] = floorf(src->f[0]);
181 dst->f[1] = floorf(src->f[1]);
182 dst->f[2] = floorf(src->f[2]);
183 dst->f[3] = floorf(src->f[3]);
184 }
185
186 static void
187 micro_frc(union tgsi_exec_channel *dst,
188 const union tgsi_exec_channel *src)
189 {
190 dst->f[0] = src->f[0] - floorf(src->f[0]);
191 dst->f[1] = src->f[1] - floorf(src->f[1]);
192 dst->f[2] = src->f[2] - floorf(src->f[2]);
193 dst->f[3] = src->f[3] - floorf(src->f[3]);
194 }
195
196 static void
197 micro_iabs(union tgsi_exec_channel *dst,
198 const union tgsi_exec_channel *src)
199 {
200 dst->i[0] = src->i[0] >= 0 ? src->i[0] : -src->i[0];
201 dst->i[1] = src->i[1] >= 0 ? src->i[1] : -src->i[1];
202 dst->i[2] = src->i[2] >= 0 ? src->i[2] : -src->i[2];
203 dst->i[3] = src->i[3] >= 0 ? src->i[3] : -src->i[3];
204 }
205
206 static void
207 micro_ineg(union tgsi_exec_channel *dst,
208 const union tgsi_exec_channel *src)
209 {
210 dst->i[0] = -src->i[0];
211 dst->i[1] = -src->i[1];
212 dst->i[2] = -src->i[2];
213 dst->i[3] = -src->i[3];
214 }
215
216 static void
217 micro_lg2(union tgsi_exec_channel *dst,
218 const union tgsi_exec_channel *src)
219 {
220 #if FAST_MATH
221 dst->f[0] = util_fast_log2(src->f[0]);
222 dst->f[1] = util_fast_log2(src->f[1]);
223 dst->f[2] = util_fast_log2(src->f[2]);
224 dst->f[3] = util_fast_log2(src->f[3]);
225 #else
226 dst->f[0] = logf(src->f[0]) * 1.442695f;
227 dst->f[1] = logf(src->f[1]) * 1.442695f;
228 dst->f[2] = logf(src->f[2]) * 1.442695f;
229 dst->f[3] = logf(src->f[3]) * 1.442695f;
230 #endif
231 }
232
233 static void
234 micro_lrp(union tgsi_exec_channel *dst,
235 const union tgsi_exec_channel *src0,
236 const union tgsi_exec_channel *src1,
237 const union tgsi_exec_channel *src2)
238 {
239 dst->f[0] = src0->f[0] * (src1->f[0] - src2->f[0]) + src2->f[0];
240 dst->f[1] = src0->f[1] * (src1->f[1] - src2->f[1]) + src2->f[1];
241 dst->f[2] = src0->f[2] * (src1->f[2] - src2->f[2]) + src2->f[2];
242 dst->f[3] = src0->f[3] * (src1->f[3] - src2->f[3]) + src2->f[3];
243 }
244
245 static void
246 micro_mad(union tgsi_exec_channel *dst,
247 const union tgsi_exec_channel *src0,
248 const union tgsi_exec_channel *src1,
249 const union tgsi_exec_channel *src2)
250 {
251 dst->f[0] = src0->f[0] * src1->f[0] + src2->f[0];
252 dst->f[1] = src0->f[1] * src1->f[1] + src2->f[1];
253 dst->f[2] = src0->f[2] * src1->f[2] + src2->f[2];
254 dst->f[3] = src0->f[3] * src1->f[3] + src2->f[3];
255 }
256
257 static void
258 micro_mov(union tgsi_exec_channel *dst,
259 const union tgsi_exec_channel *src)
260 {
261 dst->u[0] = src->u[0];
262 dst->u[1] = src->u[1];
263 dst->u[2] = src->u[2];
264 dst->u[3] = src->u[3];
265 }
266
267 static void
268 micro_rcp(union tgsi_exec_channel *dst,
269 const union tgsi_exec_channel *src)
270 {
271 #if 0 /* for debugging */
272 assert(src->f[0] != 0.0f);
273 assert(src->f[1] != 0.0f);
274 assert(src->f[2] != 0.0f);
275 assert(src->f[3] != 0.0f);
276 #endif
277 dst->f[0] = 1.0f / src->f[0];
278 dst->f[1] = 1.0f / src->f[1];
279 dst->f[2] = 1.0f / src->f[2];
280 dst->f[3] = 1.0f / src->f[3];
281 }
282
283 static void
284 micro_rnd(union tgsi_exec_channel *dst,
285 const union tgsi_exec_channel *src)
286 {
287 dst->f[0] = floorf(src->f[0] + 0.5f);
288 dst->f[1] = floorf(src->f[1] + 0.5f);
289 dst->f[2] = floorf(src->f[2] + 0.5f);
290 dst->f[3] = floorf(src->f[3] + 0.5f);
291 }
292
293 static void
294 micro_rsq(union tgsi_exec_channel *dst,
295 const union tgsi_exec_channel *src)
296 {
297 #if 0 /* for debugging */
298 assert(src->f[0] != 0.0f);
299 assert(src->f[1] != 0.0f);
300 assert(src->f[2] != 0.0f);
301 assert(src->f[3] != 0.0f);
302 #endif
303 dst->f[0] = 1.0f / sqrtf(fabsf(src->f[0]));
304 dst->f[1] = 1.0f / sqrtf(fabsf(src->f[1]));
305 dst->f[2] = 1.0f / sqrtf(fabsf(src->f[2]));
306 dst->f[3] = 1.0f / sqrtf(fabsf(src->f[3]));
307 }
308
309 static void
310 micro_seq(union tgsi_exec_channel *dst,
311 const union tgsi_exec_channel *src0,
312 const union tgsi_exec_channel *src1)
313 {
314 dst->f[0] = src0->f[0] == src1->f[0] ? 1.0f : 0.0f;
315 dst->f[1] = src0->f[1] == src1->f[1] ? 1.0f : 0.0f;
316 dst->f[2] = src0->f[2] == src1->f[2] ? 1.0f : 0.0f;
317 dst->f[3] = src0->f[3] == src1->f[3] ? 1.0f : 0.0f;
318 }
319
320 static void
321 micro_sge(union tgsi_exec_channel *dst,
322 const union tgsi_exec_channel *src0,
323 const union tgsi_exec_channel *src1)
324 {
325 dst->f[0] = src0->f[0] >= src1->f[0] ? 1.0f : 0.0f;
326 dst->f[1] = src0->f[1] >= src1->f[1] ? 1.0f : 0.0f;
327 dst->f[2] = src0->f[2] >= src1->f[2] ? 1.0f : 0.0f;
328 dst->f[3] = src0->f[3] >= src1->f[3] ? 1.0f : 0.0f;
329 }
330
331 static void
332 micro_sgn(union tgsi_exec_channel *dst,
333 const union tgsi_exec_channel *src)
334 {
335 dst->f[0] = src->f[0] < 0.0f ? -1.0f : src->f[0] > 0.0f ? 1.0f : 0.0f;
336 dst->f[1] = src->f[1] < 0.0f ? -1.0f : src->f[1] > 0.0f ? 1.0f : 0.0f;
337 dst->f[2] = src->f[2] < 0.0f ? -1.0f : src->f[2] > 0.0f ? 1.0f : 0.0f;
338 dst->f[3] = src->f[3] < 0.0f ? -1.0f : src->f[3] > 0.0f ? 1.0f : 0.0f;
339 }
340
341 static void
342 micro_sgt(union tgsi_exec_channel *dst,
343 const union tgsi_exec_channel *src0,
344 const union tgsi_exec_channel *src1)
345 {
346 dst->f[0] = src0->f[0] > src1->f[0] ? 1.0f : 0.0f;
347 dst->f[1] = src0->f[1] > src1->f[1] ? 1.0f : 0.0f;
348 dst->f[2] = src0->f[2] > src1->f[2] ? 1.0f : 0.0f;
349 dst->f[3] = src0->f[3] > src1->f[3] ? 1.0f : 0.0f;
350 }
351
352 static void
353 micro_sin(union tgsi_exec_channel *dst,
354 const union tgsi_exec_channel *src)
355 {
356 dst->f[0] = sinf(src->f[0]);
357 dst->f[1] = sinf(src->f[1]);
358 dst->f[2] = sinf(src->f[2]);
359 dst->f[3] = sinf(src->f[3]);
360 }
361
362 static void
363 micro_sle(union tgsi_exec_channel *dst,
364 const union tgsi_exec_channel *src0,
365 const union tgsi_exec_channel *src1)
366 {
367 dst->f[0] = src0->f[0] <= src1->f[0] ? 1.0f : 0.0f;
368 dst->f[1] = src0->f[1] <= src1->f[1] ? 1.0f : 0.0f;
369 dst->f[2] = src0->f[2] <= src1->f[2] ? 1.0f : 0.0f;
370 dst->f[3] = src0->f[3] <= src1->f[3] ? 1.0f : 0.0f;
371 }
372
373 static void
374 micro_slt(union tgsi_exec_channel *dst,
375 const union tgsi_exec_channel *src0,
376 const union tgsi_exec_channel *src1)
377 {
378 dst->f[0] = src0->f[0] < src1->f[0] ? 1.0f : 0.0f;
379 dst->f[1] = src0->f[1] < src1->f[1] ? 1.0f : 0.0f;
380 dst->f[2] = src0->f[2] < src1->f[2] ? 1.0f : 0.0f;
381 dst->f[3] = src0->f[3] < src1->f[3] ? 1.0f : 0.0f;
382 }
383
384 static void
385 micro_sne(union tgsi_exec_channel *dst,
386 const union tgsi_exec_channel *src0,
387 const union tgsi_exec_channel *src1)
388 {
389 dst->f[0] = src0->f[0] != src1->f[0] ? 1.0f : 0.0f;
390 dst->f[1] = src0->f[1] != src1->f[1] ? 1.0f : 0.0f;
391 dst->f[2] = src0->f[2] != src1->f[2] ? 1.0f : 0.0f;
392 dst->f[3] = src0->f[3] != src1->f[3] ? 1.0f : 0.0f;
393 }
394
395 static void
396 micro_trunc(union tgsi_exec_channel *dst,
397 const union tgsi_exec_channel *src)
398 {
399 dst->f[0] = (float)(int)src->f[0];
400 dst->f[1] = (float)(int)src->f[1];
401 dst->f[2] = (float)(int)src->f[2];
402 dst->f[3] = (float)(int)src->f[3];
403 }
404
405
406 #define CHAN_X 0
407 #define CHAN_Y 1
408 #define CHAN_Z 2
409 #define CHAN_W 3
410
411 enum tgsi_exec_datatype {
412 TGSI_EXEC_DATA_FLOAT,
413 TGSI_EXEC_DATA_INT,
414 TGSI_EXEC_DATA_UINT
415 };
416
417 /*
418 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
419 */
420 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
421 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
422 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
423 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
424 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
425 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
426 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
427 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
428 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
429 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
430 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
431 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
432 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
433 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
434 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
435 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
436 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
437 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
438 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
439 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
440 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
441 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
442 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
443 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
444 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
445 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
446 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
447 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
448 #define TEMP_R0 TGSI_EXEC_TEMP_R0
449 #define TEMP_P0 TGSI_EXEC_TEMP_P0
450
451 #define IS_CHANNEL_ENABLED(INST, CHAN)\
452 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
453
454 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
455 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
456
457 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
458 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
459 if (IS_CHANNEL_ENABLED( INST, CHAN ))
460
461 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
462 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
463 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
464
465
466 /** The execution mask depends on the conditional mask and the loop mask */
467 #define UPDATE_EXEC_MASK(MACH) \
468 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
469
470
471 static const union tgsi_exec_channel ZeroVec =
472 { { 0.0, 0.0, 0.0, 0.0 } };
473
474 static const union tgsi_exec_channel OneVec = {
475 {1.0f, 1.0f, 1.0f, 1.0f}
476 };
477
478
479 /**
480 * Assert that none of the float values in 'chan' are infinite or NaN.
481 * NaN and Inf may occur normally during program execution and should
482 * not lead to crashes, etc. But when debugging, it's helpful to catch
483 * them.
484 */
485 static INLINE void
486 check_inf_or_nan(const union tgsi_exec_channel *chan)
487 {
488 assert(!util_is_inf_or_nan((chan)->f[0]));
489 assert(!util_is_inf_or_nan((chan)->f[1]));
490 assert(!util_is_inf_or_nan((chan)->f[2]));
491 assert(!util_is_inf_or_nan((chan)->f[3]));
492 }
493
494
495 #ifdef DEBUG
496 static void
497 print_chan(const char *msg, const union tgsi_exec_channel *chan)
498 {
499 debug_printf("%s = {%f, %f, %f, %f}\n",
500 msg, chan->f[0], chan->f[1], chan->f[2], chan->f[3]);
501 }
502 #endif
503
504
505 #ifdef DEBUG
506 static void
507 print_temp(const struct tgsi_exec_machine *mach, uint index)
508 {
509 const struct tgsi_exec_vector *tmp = &mach->Temps[index];
510 int i;
511 debug_printf("Temp[%u] =\n", index);
512 for (i = 0; i < 4; i++) {
513 debug_printf(" %c: { %f, %f, %f, %f }\n",
514 "XYZW"[i],
515 tmp->xyzw[i].f[0],
516 tmp->xyzw[i].f[1],
517 tmp->xyzw[i].f[2],
518 tmp->xyzw[i].f[3]);
519 }
520 }
521 #endif
522
523
524 /**
525 * Check if there's a potential src/dst register data dependency when
526 * using SOA execution.
527 * Example:
528 * MOV T, T.yxwz;
529 * This would expand into:
530 * MOV t0, t1;
531 * MOV t1, t0;
532 * MOV t2, t3;
533 * MOV t3, t2;
534 * The second instruction will have the wrong value for t0 if executed as-is.
535 */
536 boolean
537 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
538 {
539 uint i, chan;
540
541 uint writemask = inst->Dst[0].Register.WriteMask;
542 if (writemask == TGSI_WRITEMASK_X ||
543 writemask == TGSI_WRITEMASK_Y ||
544 writemask == TGSI_WRITEMASK_Z ||
545 writemask == TGSI_WRITEMASK_W ||
546 writemask == TGSI_WRITEMASK_NONE) {
547 /* no chance of data dependency */
548 return FALSE;
549 }
550
551 /* loop over src regs */
552 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
553 if ((inst->Src[i].Register.File ==
554 inst->Dst[0].Register.File) &&
555 (inst->Src[i].Register.Index ==
556 inst->Dst[0].Register.Index)) {
557 /* loop over dest channels */
558 uint channelsWritten = 0x0;
559 FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
560 /* check if we're reading a channel that's been written */
561 uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
562 if (channelsWritten & (1 << swizzle)) {
563 return TRUE;
564 }
565
566 channelsWritten |= (1 << chan);
567 }
568 }
569 }
570 return FALSE;
571 }
572
573
574 /**
575 * Initialize machine state by expanding tokens to full instructions,
576 * allocating temporary storage, setting up constants, etc.
577 * After this, we can call tgsi_exec_machine_run() many times.
578 */
579 void
580 tgsi_exec_machine_bind_shader(
581 struct tgsi_exec_machine *mach,
582 const struct tgsi_token *tokens,
583 uint numSamplers,
584 struct tgsi_sampler **samplers)
585 {
586 uint k;
587 struct tgsi_parse_context parse;
588 struct tgsi_exec_labels *labels = &mach->Labels;
589 struct tgsi_full_instruction *instructions;
590 struct tgsi_full_declaration *declarations;
591 uint maxInstructions = 10, numInstructions = 0;
592 uint maxDeclarations = 10, numDeclarations = 0;
593 uint instno = 0;
594
595 #if 0
596 tgsi_dump(tokens, 0);
597 #endif
598
599 util_init_math();
600
601 mach->Tokens = tokens;
602 mach->Samplers = samplers;
603
604 k = tgsi_parse_init (&parse, mach->Tokens);
605 if (k != TGSI_PARSE_OK) {
606 debug_printf( "Problem parsing!\n" );
607 return;
608 }
609
610 mach->Processor = parse.FullHeader.Processor.Processor;
611 mach->ImmLimit = 0;
612 labels->count = 0;
613
614 declarations = (struct tgsi_full_declaration *)
615 MALLOC( maxDeclarations * sizeof(struct tgsi_full_declaration) );
616
617 if (!declarations) {
618 return;
619 }
620
621 instructions = (struct tgsi_full_instruction *)
622 MALLOC( maxInstructions * sizeof(struct tgsi_full_instruction) );
623
624 if (!instructions) {
625 FREE( declarations );
626 return;
627 }
628
629 while( !tgsi_parse_end_of_tokens( &parse ) ) {
630 uint pointer = parse.Position;
631 uint i;
632
633 tgsi_parse_token( &parse );
634 switch( parse.FullToken.Token.Type ) {
635 case TGSI_TOKEN_TYPE_DECLARATION:
636 /* save expanded declaration */
637 if (numDeclarations == maxDeclarations) {
638 declarations = REALLOC(declarations,
639 maxDeclarations
640 * sizeof(struct tgsi_full_declaration),
641 (maxDeclarations + 10)
642 * sizeof(struct tgsi_full_declaration));
643 maxDeclarations += 10;
644 }
645 if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_OUTPUT) {
646 unsigned reg;
647 for (reg = parse.FullToken.FullDeclaration.Range.First;
648 reg <= parse.FullToken.FullDeclaration.Range.Last;
649 ++reg) {
650 ++mach->NumOutputs;
651 }
652 }
653 memcpy(declarations + numDeclarations,
654 &parse.FullToken.FullDeclaration,
655 sizeof(declarations[0]));
656 numDeclarations++;
657 break;
658
659 case TGSI_TOKEN_TYPE_IMMEDIATE:
660 {
661 uint size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
662 assert( size <= 4 );
663 assert( mach->ImmLimit + 1 <= TGSI_EXEC_NUM_IMMEDIATES );
664
665 for( i = 0; i < size; i++ ) {
666 mach->Imms[mach->ImmLimit][i] =
667 parse.FullToken.FullImmediate.u[i].Float;
668 }
669 mach->ImmLimit += 1;
670 }
671 break;
672
673 case TGSI_TOKEN_TYPE_INSTRUCTION:
674 assert( labels->count < MAX_LABELS );
675
676 labels->labels[labels->count][0] = instno;
677 labels->labels[labels->count][1] = pointer;
678 labels->count++;
679
680 /* save expanded instruction */
681 if (numInstructions == maxInstructions) {
682 instructions = REALLOC(instructions,
683 maxInstructions
684 * sizeof(struct tgsi_full_instruction),
685 (maxInstructions + 10)
686 * sizeof(struct tgsi_full_instruction));
687 maxInstructions += 10;
688 }
689
690 memcpy(instructions + numInstructions,
691 &parse.FullToken.FullInstruction,
692 sizeof(instructions[0]));
693
694 numInstructions++;
695 break;
696
697 case TGSI_TOKEN_TYPE_PROPERTY:
698 break;
699
700 default:
701 assert( 0 );
702 }
703 }
704 tgsi_parse_free (&parse);
705
706 if (mach->Declarations) {
707 FREE( mach->Declarations );
708 }
709 mach->Declarations = declarations;
710 mach->NumDeclarations = numDeclarations;
711
712 if (mach->Instructions) {
713 FREE( mach->Instructions );
714 }
715 mach->Instructions = instructions;
716 mach->NumInstructions = numInstructions;
717 }
718
719
720 struct tgsi_exec_machine *
721 tgsi_exec_machine_create( void )
722 {
723 struct tgsi_exec_machine *mach;
724 uint i;
725
726 mach = align_malloc( sizeof *mach, 16 );
727 if (!mach)
728 goto fail;
729
730 memset(mach, 0, sizeof(*mach));
731
732 mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR];
733 mach->MaxGeometryShaderOutputs = TGSI_MAX_TOTAL_VERTICES;
734 mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
735
736 /* Setup constants. */
737 for( i = 0; i < 4; i++ ) {
738 mach->Temps[TEMP_0_I].xyzw[TEMP_0_C].u[i] = 0x00000000;
739 mach->Temps[TEMP_7F_I].xyzw[TEMP_7F_C].u[i] = 0x7FFFFFFF;
740 mach->Temps[TEMP_80_I].xyzw[TEMP_80_C].u[i] = 0x80000000;
741 mach->Temps[TEMP_FF_I].xyzw[TEMP_FF_C].u[i] = 0xFFFFFFFF;
742 mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].f[i] = 1.0f;
743 mach->Temps[TEMP_2_I].xyzw[TEMP_2_C].f[i] = 2.0f;
744 mach->Temps[TEMP_128_I].xyzw[TEMP_128_C].f[i] = 128.0f;
745 mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C].f[i] = -128.0f;
746 mach->Temps[TEMP_3_I].xyzw[TEMP_3_C].f[i] = 3.0f;
747 mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C].f[i] = 0.5f;
748 }
749
750 #ifdef DEBUG
751 /* silence warnings */
752 (void) print_chan;
753 (void) print_temp;
754 #endif
755
756 return mach;
757
758 fail:
759 align_free(mach);
760 return NULL;
761 }
762
763
764 void
765 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach)
766 {
767 if (mach) {
768 FREE(mach->Instructions);
769 FREE(mach->Declarations);
770 }
771
772 align_free(mach);
773 }
774
775 static void
776 micro_add(union tgsi_exec_channel *dst,
777 const union tgsi_exec_channel *src0,
778 const union tgsi_exec_channel *src1)
779 {
780 dst->f[0] = src0->f[0] + src1->f[0];
781 dst->f[1] = src0->f[1] + src1->f[1];
782 dst->f[2] = src0->f[2] + src1->f[2];
783 dst->f[3] = src0->f[3] + src1->f[3];
784 }
785
786 static void
787 micro_div(
788 union tgsi_exec_channel *dst,
789 const union tgsi_exec_channel *src0,
790 const union tgsi_exec_channel *src1 )
791 {
792 if (src1->f[0] != 0) {
793 dst->f[0] = src0->f[0] / src1->f[0];
794 }
795 if (src1->f[1] != 0) {
796 dst->f[1] = src0->f[1] / src1->f[1];
797 }
798 if (src1->f[2] != 0) {
799 dst->f[2] = src0->f[2] / src1->f[2];
800 }
801 if (src1->f[3] != 0) {
802 dst->f[3] = src0->f[3] / src1->f[3];
803 }
804 }
805
806 static void
807 micro_float_clamp(union tgsi_exec_channel *dst,
808 const union tgsi_exec_channel *src)
809 {
810 uint i;
811
812 for (i = 0; i < 4; i++) {
813 if (src->f[i] > 0.0f) {
814 if (src->f[i] > 1.884467e+019f)
815 dst->f[i] = 1.884467e+019f;
816 else if (src->f[i] < 5.42101e-020f)
817 dst->f[i] = 5.42101e-020f;
818 else
819 dst->f[i] = src->f[i];
820 }
821 else {
822 if (src->f[i] < -1.884467e+019f)
823 dst->f[i] = -1.884467e+019f;
824 else if (src->f[i] > -5.42101e-020f)
825 dst->f[i] = -5.42101e-020f;
826 else
827 dst->f[i] = src->f[i];
828 }
829 }
830 }
831
832 static void
833 micro_lt(
834 union tgsi_exec_channel *dst,
835 const union tgsi_exec_channel *src0,
836 const union tgsi_exec_channel *src1,
837 const union tgsi_exec_channel *src2,
838 const union tgsi_exec_channel *src3 )
839 {
840 dst->f[0] = src0->f[0] < src1->f[0] ? src2->f[0] : src3->f[0];
841 dst->f[1] = src0->f[1] < src1->f[1] ? src2->f[1] : src3->f[1];
842 dst->f[2] = src0->f[2] < src1->f[2] ? src2->f[2] : src3->f[2];
843 dst->f[3] = src0->f[3] < src1->f[3] ? src2->f[3] : src3->f[3];
844 }
845
846 static void
847 micro_max(union tgsi_exec_channel *dst,
848 const union tgsi_exec_channel *src0,
849 const union tgsi_exec_channel *src1)
850 {
851 dst->f[0] = src0->f[0] > src1->f[0] ? src0->f[0] : src1->f[0];
852 dst->f[1] = src0->f[1] > src1->f[1] ? src0->f[1] : src1->f[1];
853 dst->f[2] = src0->f[2] > src1->f[2] ? src0->f[2] : src1->f[2];
854 dst->f[3] = src0->f[3] > src1->f[3] ? src0->f[3] : src1->f[3];
855 }
856
857 static void
858 micro_min(union tgsi_exec_channel *dst,
859 const union tgsi_exec_channel *src0,
860 const union tgsi_exec_channel *src1)
861 {
862 dst->f[0] = src0->f[0] < src1->f[0] ? src0->f[0] : src1->f[0];
863 dst->f[1] = src0->f[1] < src1->f[1] ? src0->f[1] : src1->f[1];
864 dst->f[2] = src0->f[2] < src1->f[2] ? src0->f[2] : src1->f[2];
865 dst->f[3] = src0->f[3] < src1->f[3] ? src0->f[3] : src1->f[3];
866 }
867
868 static void
869 micro_mul(union tgsi_exec_channel *dst,
870 const union tgsi_exec_channel *src0,
871 const union tgsi_exec_channel *src1)
872 {
873 dst->f[0] = src0->f[0] * src1->f[0];
874 dst->f[1] = src0->f[1] * src1->f[1];
875 dst->f[2] = src0->f[2] * src1->f[2];
876 dst->f[3] = src0->f[3] * src1->f[3];
877 }
878
879 #if 0
880 static void
881 micro_imul64(
882 union tgsi_exec_channel *dst0,
883 union tgsi_exec_channel *dst1,
884 const union tgsi_exec_channel *src0,
885 const union tgsi_exec_channel *src1 )
886 {
887 dst1->i[0] = src0->i[0] * src1->i[0];
888 dst1->i[1] = src0->i[1] * src1->i[1];
889 dst1->i[2] = src0->i[2] * src1->i[2];
890 dst1->i[3] = src0->i[3] * src1->i[3];
891 dst0->i[0] = 0;
892 dst0->i[1] = 0;
893 dst0->i[2] = 0;
894 dst0->i[3] = 0;
895 }
896 #endif
897
898 #if 0
899 static void
900 micro_umul64(
901 union tgsi_exec_channel *dst0,
902 union tgsi_exec_channel *dst1,
903 const union tgsi_exec_channel *src0,
904 const union tgsi_exec_channel *src1 )
905 {
906 dst1->u[0] = src0->u[0] * src1->u[0];
907 dst1->u[1] = src0->u[1] * src1->u[1];
908 dst1->u[2] = src0->u[2] * src1->u[2];
909 dst1->u[3] = src0->u[3] * src1->u[3];
910 dst0->u[0] = 0;
911 dst0->u[1] = 0;
912 dst0->u[2] = 0;
913 dst0->u[3] = 0;
914 }
915 #endif
916
917
918 #if 0
919 static void
920 micro_movc(
921 union tgsi_exec_channel *dst,
922 const union tgsi_exec_channel *src0,
923 const union tgsi_exec_channel *src1,
924 const union tgsi_exec_channel *src2 )
925 {
926 dst->u[0] = src0->u[0] ? src1->u[0] : src2->u[0];
927 dst->u[1] = src0->u[1] ? src1->u[1] : src2->u[1];
928 dst->u[2] = src0->u[2] ? src1->u[2] : src2->u[2];
929 dst->u[3] = src0->u[3] ? src1->u[3] : src2->u[3];
930 }
931 #endif
932
933 static void
934 micro_neg(
935 union tgsi_exec_channel *dst,
936 const union tgsi_exec_channel *src )
937 {
938 dst->f[0] = -src->f[0];
939 dst->f[1] = -src->f[1];
940 dst->f[2] = -src->f[2];
941 dst->f[3] = -src->f[3];
942 }
943
944 static void
945 micro_pow(
946 union tgsi_exec_channel *dst,
947 const union tgsi_exec_channel *src0,
948 const union tgsi_exec_channel *src1 )
949 {
950 #if FAST_MATH
951 dst->f[0] = util_fast_pow( src0->f[0], src1->f[0] );
952 dst->f[1] = util_fast_pow( src0->f[1], src1->f[1] );
953 dst->f[2] = util_fast_pow( src0->f[2], src1->f[2] );
954 dst->f[3] = util_fast_pow( src0->f[3], src1->f[3] );
955 #else
956 dst->f[0] = powf( src0->f[0], src1->f[0] );
957 dst->f[1] = powf( src0->f[1], src1->f[1] );
958 dst->f[2] = powf( src0->f[2], src1->f[2] );
959 dst->f[3] = powf( src0->f[3], src1->f[3] );
960 #endif
961 }
962
963 #if 0
964 static void
965 micro_sqrt( union tgsi_exec_channel *dst,
966 const union tgsi_exec_channel *src )
967 {
968 dst->f[0] = sqrtf( src->f[0] );
969 dst->f[1] = sqrtf( src->f[1] );
970 dst->f[2] = sqrtf( src->f[2] );
971 dst->f[3] = sqrtf( src->f[3] );
972 }
973 #endif
974
975 static void
976 micro_sub(union tgsi_exec_channel *dst,
977 const union tgsi_exec_channel *src0,
978 const union tgsi_exec_channel *src1)
979 {
980 dst->f[0] = src0->f[0] - src1->f[0];
981 dst->f[1] = src0->f[1] - src1->f[1];
982 dst->f[2] = src0->f[2] - src1->f[2];
983 dst->f[3] = src0->f[3] - src1->f[3];
984 }
985
986 static void
987 fetch_src_file_channel(const struct tgsi_exec_machine *mach,
988 const uint file,
989 const uint swizzle,
990 const union tgsi_exec_channel *index,
991 const union tgsi_exec_channel *index2D,
992 union tgsi_exec_channel *chan)
993 {
994 uint i;
995
996 switch (file) {
997 case TGSI_FILE_CONSTANT:
998 for (i = 0; i < QUAD_SIZE; i++) {
999 assert(index2D->i[i] >= 0 && index2D->i[i] < PIPE_MAX_CONSTANT_BUFFERS);
1000 assert(mach->Consts[index2D->i[i]]);
1001
1002 if (index->i[i] < 0) {
1003 chan->u[i] = 0;
1004 } else {
1005 const uint *p = (const uint *)mach->Consts[index2D->i[i]];
1006
1007 chan->u[i] = p[index->i[i] * 4 + swizzle];
1008 }
1009 }
1010 break;
1011
1012 case TGSI_FILE_INPUT:
1013 case TGSI_FILE_SYSTEM_VALUE:
1014 for (i = 0; i < QUAD_SIZE; i++) {
1015 /* XXX: 2D indexing */
1016 chan->u[i] = mach->Inputs[index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i]].xyzw[swizzle].u[i];
1017 }
1018 break;
1019
1020 case TGSI_FILE_TEMPORARY:
1021 for (i = 0; i < QUAD_SIZE; i++) {
1022 assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
1023 assert(index2D->i[i] == 0);
1024
1025 chan->u[i] = mach->Temps[index->i[i]].xyzw[swizzle].u[i];
1026 }
1027 break;
1028
1029 case TGSI_FILE_IMMEDIATE:
1030 for (i = 0; i < QUAD_SIZE; i++) {
1031 assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
1032 assert(index2D->i[i] == 0);
1033
1034 chan->f[i] = mach->Imms[index->i[i]][swizzle];
1035 }
1036 break;
1037
1038 case TGSI_FILE_ADDRESS:
1039 for (i = 0; i < QUAD_SIZE; i++) {
1040 assert(index->i[i] >= 0);
1041 assert(index2D->i[i] == 0);
1042
1043 chan->u[i] = mach->Addrs[index->i[i]].xyzw[swizzle].u[i];
1044 }
1045 break;
1046
1047 case TGSI_FILE_PREDICATE:
1048 for (i = 0; i < QUAD_SIZE; i++) {
1049 assert(index->i[i] >= 0 && index->i[i] < TGSI_EXEC_NUM_PREDS);
1050 assert(index2D->i[i] == 0);
1051
1052 chan->u[i] = mach->Predicates[0].xyzw[swizzle].u[i];
1053 }
1054 break;
1055
1056 case TGSI_FILE_OUTPUT:
1057 /* vertex/fragment output vars can be read too */
1058 for (i = 0; i < QUAD_SIZE; i++) {
1059 assert(index->i[i] >= 0);
1060 assert(index2D->i[i] == 0);
1061
1062 chan->u[i] = mach->Outputs[index->i[i]].xyzw[swizzle].u[i];
1063 }
1064 break;
1065
1066 default:
1067 assert(0);
1068 for (i = 0; i < QUAD_SIZE; i++) {
1069 chan->u[i] = 0;
1070 }
1071 }
1072 }
1073
1074 static void
1075 fetch_source(const struct tgsi_exec_machine *mach,
1076 union tgsi_exec_channel *chan,
1077 const struct tgsi_full_src_register *reg,
1078 const uint chan_index,
1079 enum tgsi_exec_datatype src_datatype)
1080 {
1081 union tgsi_exec_channel index;
1082 union tgsi_exec_channel index2D;
1083 uint swizzle;
1084
1085 /* We start with a direct index into a register file.
1086 *
1087 * file[1],
1088 * where:
1089 * file = Register.File
1090 * [1] = Register.Index
1091 */
1092 index.i[0] =
1093 index.i[1] =
1094 index.i[2] =
1095 index.i[3] = reg->Register.Index;
1096
1097 /* There is an extra source register that indirectly subscripts
1098 * a register file. The direct index now becomes an offset
1099 * that is being added to the indirect register.
1100 *
1101 * file[ind[2].x+1],
1102 * where:
1103 * ind = Indirect.File
1104 * [2] = Indirect.Index
1105 * .x = Indirect.SwizzleX
1106 */
1107 if (reg->Register.Indirect) {
1108 union tgsi_exec_channel index2;
1109 union tgsi_exec_channel indir_index;
1110 const uint execmask = mach->ExecMask;
1111 uint i;
1112
1113 /* which address register (always zero now) */
1114 index2.i[0] =
1115 index2.i[1] =
1116 index2.i[2] =
1117 index2.i[3] = reg->Indirect.Index;
1118
1119 /* get current value of address register[swizzle] */
1120 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1121 fetch_src_file_channel(mach,
1122 reg->Indirect.File,
1123 swizzle,
1124 &index2,
1125 &ZeroVec,
1126 &indir_index);
1127
1128 /* add value of address register to the offset */
1129 index.i[0] += indir_index.i[0];
1130 index.i[1] += indir_index.i[1];
1131 index.i[2] += indir_index.i[2];
1132 index.i[3] += indir_index.i[3];
1133
1134 /* for disabled execution channels, zero-out the index to
1135 * avoid using a potential garbage value.
1136 */
1137 for (i = 0; i < QUAD_SIZE; i++) {
1138 if ((execmask & (1 << i)) == 0)
1139 index.i[i] = 0;
1140 }
1141 }
1142
1143 /* There is an extra source register that is a second
1144 * subscript to a register file. Effectively it means that
1145 * the register file is actually a 2D array of registers.
1146 *
1147 * file[3][1],
1148 * where:
1149 * [3] = Dimension.Index
1150 */
1151 if (reg->Register.Dimension) {
1152 index2D.i[0] =
1153 index2D.i[1] =
1154 index2D.i[2] =
1155 index2D.i[3] = reg->Dimension.Index;
1156
1157 /* Again, the second subscript index can be addressed indirectly
1158 * identically to the first one.
1159 * Nothing stops us from indirectly addressing the indirect register,
1160 * but there is no need for that, so we won't exercise it.
1161 *
1162 * file[ind[4].y+3][1],
1163 * where:
1164 * ind = DimIndirect.File
1165 * [4] = DimIndirect.Index
1166 * .y = DimIndirect.SwizzleX
1167 */
1168 if (reg->Dimension.Indirect) {
1169 union tgsi_exec_channel index2;
1170 union tgsi_exec_channel indir_index;
1171 const uint execmask = mach->ExecMask;
1172 uint i;
1173
1174 index2.i[0] =
1175 index2.i[1] =
1176 index2.i[2] =
1177 index2.i[3] = reg->DimIndirect.Index;
1178
1179 swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
1180 fetch_src_file_channel(mach,
1181 reg->DimIndirect.File,
1182 swizzle,
1183 &index2,
1184 &ZeroVec,
1185 &indir_index);
1186
1187 index2D.i[0] += indir_index.i[0];
1188 index2D.i[1] += indir_index.i[1];
1189 index2D.i[2] += indir_index.i[2];
1190 index2D.i[3] += indir_index.i[3];
1191
1192 /* for disabled execution channels, zero-out the index to
1193 * avoid using a potential garbage value.
1194 */
1195 for (i = 0; i < QUAD_SIZE; i++) {
1196 if ((execmask & (1 << i)) == 0) {
1197 index2D.i[i] = 0;
1198 }
1199 }
1200 }
1201
1202 /* If by any chance there was a need for a 3D array of register
1203 * files, we would have to check whether Dimension is followed
1204 * by a dimension register and continue the saga.
1205 */
1206 } else {
1207 index2D.i[0] =
1208 index2D.i[1] =
1209 index2D.i[2] =
1210 index2D.i[3] = 0;
1211 }
1212
1213 swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
1214 fetch_src_file_channel(mach,
1215 reg->Register.File,
1216 swizzle,
1217 &index,
1218 &index2D,
1219 chan);
1220
1221 if (reg->Register.Absolute) {
1222 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1223 micro_abs(chan, chan);
1224 } else {
1225 micro_iabs(chan, chan);
1226 }
1227 }
1228
1229 if (reg->Register.Negate) {
1230 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1231 micro_neg(chan, chan);
1232 } else {
1233 micro_ineg(chan, chan);
1234 }
1235 }
1236 }
1237
1238 static void
1239 store_dest(struct tgsi_exec_machine *mach,
1240 const union tgsi_exec_channel *chan,
1241 const struct tgsi_full_dst_register *reg,
1242 const struct tgsi_full_instruction *inst,
1243 uint chan_index,
1244 enum tgsi_exec_datatype dst_datatype)
1245 {
1246 uint i;
1247 union tgsi_exec_channel null;
1248 union tgsi_exec_channel *dst;
1249 uint execmask = mach->ExecMask;
1250 int offset = 0; /* indirection offset */
1251 int index;
1252
1253 /* for debugging */
1254 if (0 && dst_datatype == TGSI_EXEC_DATA_FLOAT) {
1255 check_inf_or_nan(chan);
1256 }
1257
1258 /* There is an extra source register that indirectly subscripts
1259 * a register file. The direct index now becomes an offset
1260 * that is being added to the indirect register.
1261 *
1262 * file[ind[2].x+1],
1263 * where:
1264 * ind = Indirect.File
1265 * [2] = Indirect.Index
1266 * .x = Indirect.SwizzleX
1267 */
1268 if (reg->Register.Indirect) {
1269 union tgsi_exec_channel index;
1270 union tgsi_exec_channel indir_index;
1271 uint swizzle;
1272
1273 /* which address register (always zero for now) */
1274 index.i[0] =
1275 index.i[1] =
1276 index.i[2] =
1277 index.i[3] = reg->Indirect.Index;
1278
1279 /* get current value of address register[swizzle] */
1280 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1281
1282 /* fetch values from the address/indirection register */
1283 fetch_src_file_channel(mach,
1284 reg->Indirect.File,
1285 swizzle,
1286 &index,
1287 &ZeroVec,
1288 &indir_index);
1289
1290 /* save indirection offset */
1291 offset = indir_index.i[0];
1292 }
1293
1294 switch (reg->Register.File) {
1295 case TGSI_FILE_NULL:
1296 dst = &null;
1297 break;
1298
1299 case TGSI_FILE_OUTPUT:
1300 index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
1301 + reg->Register.Index;
1302 dst = &mach->Outputs[offset + index].xyzw[chan_index];
1303 #if 0
1304 if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
1305 fprintf(stderr, "STORING OUT[%d] mask(%d), = (", offset + index, execmask);
1306 for (i = 0; i < QUAD_SIZE; i++)
1307 if (execmask & (1 << i))
1308 fprintf(stderr, "%f, ", chan->f[i]);
1309 fprintf(stderr, ")\n");
1310 }
1311 #endif
1312 break;
1313
1314 case TGSI_FILE_TEMPORARY:
1315 index = reg->Register.Index;
1316 assert( index < TGSI_EXEC_NUM_TEMPS );
1317 dst = &mach->Temps[offset + index].xyzw[chan_index];
1318 break;
1319
1320 case TGSI_FILE_ADDRESS:
1321 index = reg->Register.Index;
1322 dst = &mach->Addrs[index].xyzw[chan_index];
1323 break;
1324
1325 case TGSI_FILE_LOOP:
1326 assert(reg->Register.Index == 0);
1327 assert(mach->LoopCounterStackTop > 0);
1328 assert(chan_index == CHAN_X);
1329 dst = &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[chan_index];
1330 break;
1331
1332 case TGSI_FILE_PREDICATE:
1333 index = reg->Register.Index;
1334 assert(index < TGSI_EXEC_NUM_PREDS);
1335 dst = &mach->Predicates[index].xyzw[chan_index];
1336 break;
1337
1338 default:
1339 assert( 0 );
1340 return;
1341 }
1342
1343 if (inst->Instruction.Predicate) {
1344 uint swizzle;
1345 union tgsi_exec_channel *pred;
1346
1347 switch (chan_index) {
1348 case CHAN_X:
1349 swizzle = inst->Predicate.SwizzleX;
1350 break;
1351 case CHAN_Y:
1352 swizzle = inst->Predicate.SwizzleY;
1353 break;
1354 case CHAN_Z:
1355 swizzle = inst->Predicate.SwizzleZ;
1356 break;
1357 case CHAN_W:
1358 swizzle = inst->Predicate.SwizzleW;
1359 break;
1360 default:
1361 assert(0);
1362 return;
1363 }
1364
1365 assert(inst->Predicate.Index == 0);
1366
1367 pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
1368
1369 if (inst->Predicate.Negate) {
1370 for (i = 0; i < QUAD_SIZE; i++) {
1371 if (pred->u[i]) {
1372 execmask &= ~(1 << i);
1373 }
1374 }
1375 } else {
1376 for (i = 0; i < QUAD_SIZE; i++) {
1377 if (!pred->u[i]) {
1378 execmask &= ~(1 << i);
1379 }
1380 }
1381 }
1382 }
1383
1384 switch (inst->Instruction.Saturate) {
1385 case TGSI_SAT_NONE:
1386 for (i = 0; i < QUAD_SIZE; i++)
1387 if (execmask & (1 << i))
1388 dst->i[i] = chan->i[i];
1389 break;
1390
1391 case TGSI_SAT_ZERO_ONE:
1392 for (i = 0; i < QUAD_SIZE; i++)
1393 if (execmask & (1 << i)) {
1394 if (chan->f[i] < 0.0f)
1395 dst->f[i] = 0.0f;
1396 else if (chan->f[i] > 1.0f)
1397 dst->f[i] = 1.0f;
1398 else
1399 dst->i[i] = chan->i[i];
1400 }
1401 break;
1402
1403 case TGSI_SAT_MINUS_PLUS_ONE:
1404 for (i = 0; i < QUAD_SIZE; i++)
1405 if (execmask & (1 << i)) {
1406 if (chan->f[i] < -1.0f)
1407 dst->f[i] = -1.0f;
1408 else if (chan->f[i] > 1.0f)
1409 dst->f[i] = 1.0f;
1410 else
1411 dst->i[i] = chan->i[i];
1412 }
1413 break;
1414
1415 default:
1416 assert( 0 );
1417 }
1418 }
1419
1420 #define FETCH(VAL,INDEX,CHAN)\
1421 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1422
1423 #define STORE(VAL,INDEX,CHAN)\
1424 store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
1425
1426
1427 /**
1428 * Execute ARB-style KIL which is predicated by a src register.
1429 * Kill fragment if any of the four values is less than zero.
1430 */
1431 static void
1432 exec_kil(struct tgsi_exec_machine *mach,
1433 const struct tgsi_full_instruction *inst)
1434 {
1435 uint uniquemask;
1436 uint chan_index;
1437 uint kilmask = 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1438 union tgsi_exec_channel r[1];
1439
1440 /* This mask stores component bits that were already tested. */
1441 uniquemask = 0;
1442
1443 for (chan_index = 0; chan_index < 4; chan_index++)
1444 {
1445 uint swizzle;
1446 uint i;
1447
1448 /* unswizzle channel */
1449 swizzle = tgsi_util_get_full_src_register_swizzle (
1450 &inst->Src[0],
1451 chan_index);
1452
1453 /* check if the component has not been already tested */
1454 if (uniquemask & (1 << swizzle))
1455 continue;
1456 uniquemask |= 1 << swizzle;
1457
1458 FETCH(&r[0], 0, chan_index);
1459 for (i = 0; i < 4; i++)
1460 if (r[0].f[i] < 0.0f)
1461 kilmask |= 1 << i;
1462 }
1463
1464 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1465 }
1466
1467 /**
1468 * Execute NVIDIA-style KIL which is predicated by a condition code.
1469 * Kill fragment if the condition code is TRUE.
1470 */
1471 static void
1472 exec_kilp(struct tgsi_exec_machine *mach,
1473 const struct tgsi_full_instruction *inst)
1474 {
1475 uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1476
1477 /* "unconditional" kil */
1478 kilmask = mach->ExecMask;
1479 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1480 }
1481
1482 static void
1483 emit_vertex(struct tgsi_exec_machine *mach)
1484 {
1485 /* FIXME: check for exec mask correctly
1486 unsigned i;
1487 for (i = 0; i < QUAD_SIZE; ++i) {
1488 if ((mach->ExecMask & (1 << i)))
1489 */
1490 if (mach->ExecMask) {
1491 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] += mach->NumOutputs;
1492 mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]]++;
1493 }
1494 }
1495
1496 static void
1497 emit_primitive(struct tgsi_exec_machine *mach)
1498 {
1499 unsigned *prim_count = &mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0];
1500 /* FIXME: check for exec mask correctly
1501 unsigned i;
1502 for (i = 0; i < QUAD_SIZE; ++i) {
1503 if ((mach->ExecMask & (1 << i)))
1504 */
1505 if (mach->ExecMask) {
1506 ++(*prim_count);
1507 debug_assert((*prim_count * mach->NumOutputs) < mach->MaxGeometryShaderOutputs);
1508 mach->Primitives[*prim_count] = 0;
1509 }
1510 }
1511
1512 /*
1513 * Fetch four texture samples using STR texture coordinates.
1514 */
1515 static void
1516 fetch_texel( struct tgsi_sampler *sampler,
1517 const union tgsi_exec_channel *s,
1518 const union tgsi_exec_channel *t,
1519 const union tgsi_exec_channel *p,
1520 const union tgsi_exec_channel *c0,
1521 enum tgsi_sampler_control control,
1522 union tgsi_exec_channel *r,
1523 union tgsi_exec_channel *g,
1524 union tgsi_exec_channel *b,
1525 union tgsi_exec_channel *a )
1526 {
1527 uint j;
1528 float rgba[NUM_CHANNELS][QUAD_SIZE];
1529
1530 sampler->get_samples(sampler, s->f, t->f, p->f, c0->f, control, rgba);
1531
1532 for (j = 0; j < 4; j++) {
1533 r->f[j] = rgba[0][j];
1534 g->f[j] = rgba[1][j];
1535 b->f[j] = rgba[2][j];
1536 a->f[j] = rgba[3][j];
1537 }
1538 }
1539
1540
1541 #define TEX_MODIFIER_NONE 0
1542 #define TEX_MODIFIER_PROJECTED 1
1543 #define TEX_MODIFIER_LOD_BIAS 2
1544 #define TEX_MODIFIER_EXPLICIT_LOD 3
1545
1546
1547 static void
1548 exec_tex(struct tgsi_exec_machine *mach,
1549 const struct tgsi_full_instruction *inst,
1550 uint modifier)
1551 {
1552 const uint unit = inst->Src[1].Register.Index;
1553 union tgsi_exec_channel r[4];
1554 const union tgsi_exec_channel *lod = &ZeroVec;
1555 enum tgsi_sampler_control control;
1556 uint chan_index;
1557
1558 if (modifier != TEX_MODIFIER_NONE) {
1559 FETCH(&r[3], 0, CHAN_W);
1560 if (modifier != TEX_MODIFIER_PROJECTED) {
1561 lod = &r[3];
1562 }
1563 }
1564
1565 if (modifier == TEX_MODIFIER_EXPLICIT_LOD) {
1566 control = tgsi_sampler_lod_explicit;
1567 } else {
1568 control = tgsi_sampler_lod_bias;
1569 }
1570
1571 switch (inst->Texture.Texture) {
1572 case TGSI_TEXTURE_1D:
1573 case TGSI_TEXTURE_SHADOW1D:
1574 FETCH(&r[0], 0, CHAN_X);
1575
1576 if (modifier == TEX_MODIFIER_PROJECTED) {
1577 micro_div(&r[0], &r[0], &r[3]);
1578 }
1579
1580 fetch_texel(mach->Samplers[unit],
1581 &r[0], &ZeroVec, &ZeroVec, lod, /* S, T, P, LOD */
1582 control,
1583 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1584 break;
1585
1586 case TGSI_TEXTURE_2D:
1587 case TGSI_TEXTURE_RECT:
1588 case TGSI_TEXTURE_SHADOW2D:
1589 case TGSI_TEXTURE_SHADOWRECT:
1590 FETCH(&r[0], 0, CHAN_X);
1591 FETCH(&r[1], 0, CHAN_Y);
1592 FETCH(&r[2], 0, CHAN_Z);
1593
1594 if (modifier == TEX_MODIFIER_PROJECTED) {
1595 micro_div(&r[0], &r[0], &r[3]);
1596 micro_div(&r[1], &r[1], &r[3]);
1597 micro_div(&r[2], &r[2], &r[3]);
1598 }
1599
1600 fetch_texel(mach->Samplers[unit],
1601 &r[0], &r[1], &r[2], lod, /* S, T, P, LOD */
1602 control,
1603 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1604 break;
1605
1606 case TGSI_TEXTURE_3D:
1607 case TGSI_TEXTURE_CUBE:
1608 FETCH(&r[0], 0, CHAN_X);
1609 FETCH(&r[1], 0, CHAN_Y);
1610 FETCH(&r[2], 0, CHAN_Z);
1611
1612 if (modifier == TEX_MODIFIER_PROJECTED) {
1613 micro_div(&r[0], &r[0], &r[3]);
1614 micro_div(&r[1], &r[1], &r[3]);
1615 micro_div(&r[2], &r[2], &r[3]);
1616 }
1617
1618 fetch_texel(mach->Samplers[unit],
1619 &r[0], &r[1], &r[2], lod,
1620 control,
1621 &r[0], &r[1], &r[2], &r[3]);
1622 break;
1623
1624 default:
1625 assert(0);
1626 }
1627
1628 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1629 STORE(&r[chan_index], 0, chan_index);
1630 }
1631 }
1632
1633 static void
1634 exec_txd(struct tgsi_exec_machine *mach,
1635 const struct tgsi_full_instruction *inst)
1636 {
1637 const uint unit = inst->Src[3].Register.Index;
1638 union tgsi_exec_channel r[4];
1639 uint chan_index;
1640
1641 /*
1642 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1643 */
1644
1645 switch (inst->Texture.Texture) {
1646 case TGSI_TEXTURE_1D:
1647 case TGSI_TEXTURE_SHADOW1D:
1648
1649 FETCH(&r[0], 0, CHAN_X);
1650
1651 fetch_texel(mach->Samplers[unit],
1652 &r[0], &ZeroVec, &ZeroVec, &ZeroVec, /* S, T, P, BIAS */
1653 tgsi_sampler_lod_bias,
1654 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1655 break;
1656
1657 case TGSI_TEXTURE_2D:
1658 case TGSI_TEXTURE_RECT:
1659 case TGSI_TEXTURE_SHADOW2D:
1660 case TGSI_TEXTURE_SHADOWRECT:
1661
1662 FETCH(&r[0], 0, CHAN_X);
1663 FETCH(&r[1], 0, CHAN_Y);
1664 FETCH(&r[2], 0, CHAN_Z);
1665
1666 fetch_texel(mach->Samplers[unit],
1667 &r[0], &r[1], &r[2], &ZeroVec, /* inputs */
1668 tgsi_sampler_lod_bias,
1669 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1670 break;
1671
1672 case TGSI_TEXTURE_3D:
1673 case TGSI_TEXTURE_CUBE:
1674
1675 FETCH(&r[0], 0, CHAN_X);
1676 FETCH(&r[1], 0, CHAN_Y);
1677 FETCH(&r[2], 0, CHAN_Z);
1678
1679 fetch_texel(mach->Samplers[unit],
1680 &r[0], &r[1], &r[2], &ZeroVec,
1681 tgsi_sampler_lod_bias,
1682 &r[0], &r[1], &r[2], &r[3]);
1683 break;
1684
1685 default:
1686 assert(0);
1687 }
1688
1689 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1690 STORE(&r[chan_index], 0, chan_index);
1691 }
1692 }
1693
1694
1695 /**
1696 * Evaluate a constant-valued coefficient at the position of the
1697 * current quad.
1698 */
1699 static void
1700 eval_constant_coef(
1701 struct tgsi_exec_machine *mach,
1702 unsigned attrib,
1703 unsigned chan )
1704 {
1705 unsigned i;
1706
1707 for( i = 0; i < QUAD_SIZE; i++ ) {
1708 mach->Inputs[attrib].xyzw[chan].f[i] = mach->InterpCoefs[attrib].a0[chan];
1709 }
1710 }
1711
1712 /**
1713 * Evaluate a linear-valued coefficient at the position of the
1714 * current quad.
1715 */
1716 static void
1717 eval_linear_coef(
1718 struct tgsi_exec_machine *mach,
1719 unsigned attrib,
1720 unsigned chan )
1721 {
1722 const float x = mach->QuadPos.xyzw[0].f[0];
1723 const float y = mach->QuadPos.xyzw[1].f[0];
1724 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1725 const float dady = mach->InterpCoefs[attrib].dady[chan];
1726 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1727 mach->Inputs[attrib].xyzw[chan].f[0] = a0;
1728 mach->Inputs[attrib].xyzw[chan].f[1] = a0 + dadx;
1729 mach->Inputs[attrib].xyzw[chan].f[2] = a0 + dady;
1730 mach->Inputs[attrib].xyzw[chan].f[3] = a0 + dadx + dady;
1731 }
1732
1733 /**
1734 * Evaluate a perspective-valued coefficient at the position of the
1735 * current quad.
1736 */
1737 static void
1738 eval_perspective_coef(
1739 struct tgsi_exec_machine *mach,
1740 unsigned attrib,
1741 unsigned chan )
1742 {
1743 const float x = mach->QuadPos.xyzw[0].f[0];
1744 const float y = mach->QuadPos.xyzw[1].f[0];
1745 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1746 const float dady = mach->InterpCoefs[attrib].dady[chan];
1747 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1748 const float *w = mach->QuadPos.xyzw[3].f;
1749 /* divide by W here */
1750 mach->Inputs[attrib].xyzw[chan].f[0] = a0 / w[0];
1751 mach->Inputs[attrib].xyzw[chan].f[1] = (a0 + dadx) / w[1];
1752 mach->Inputs[attrib].xyzw[chan].f[2] = (a0 + dady) / w[2];
1753 mach->Inputs[attrib].xyzw[chan].f[3] = (a0 + dadx + dady) / w[3];
1754 }
1755
1756
1757 typedef void (* eval_coef_func)(
1758 struct tgsi_exec_machine *mach,
1759 unsigned attrib,
1760 unsigned chan );
1761
1762 static void
1763 exec_declaration(struct tgsi_exec_machine *mach,
1764 const struct tgsi_full_declaration *decl)
1765 {
1766 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
1767 if (decl->Declaration.File == TGSI_FILE_INPUT ||
1768 decl->Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
1769 uint first, last, mask;
1770
1771 first = decl->Range.First;
1772 last = decl->Range.Last;
1773 mask = decl->Declaration.UsageMask;
1774
1775 if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
1776 uint i;
1777
1778 assert(decl->Semantic.Index == 0);
1779 assert(first == last);
1780
1781 for (i = 0; i < QUAD_SIZE; i++) {
1782 mach->Inputs[first].xyzw[0].f[i] = mach->Face;
1783 }
1784 } else {
1785 eval_coef_func eval;
1786 uint i, j;
1787
1788 switch (decl->Declaration.Interpolate) {
1789 case TGSI_INTERPOLATE_CONSTANT:
1790 eval = eval_constant_coef;
1791 break;
1792
1793 case TGSI_INTERPOLATE_LINEAR:
1794 eval = eval_linear_coef;
1795 break;
1796
1797 case TGSI_INTERPOLATE_PERSPECTIVE:
1798 eval = eval_perspective_coef;
1799 break;
1800
1801 default:
1802 assert(0);
1803 return;
1804 }
1805
1806 for (j = 0; j < NUM_CHANNELS; j++) {
1807 if (mask & (1 << j)) {
1808 for (i = first; i <= last; i++) {
1809 eval(mach, i, j);
1810 }
1811 }
1812 }
1813 }
1814 }
1815 }
1816 }
1817
1818 typedef void (* micro_unary_op)(union tgsi_exec_channel *dst,
1819 const union tgsi_exec_channel *src);
1820
1821 static void
1822 exec_scalar_unary(struct tgsi_exec_machine *mach,
1823 const struct tgsi_full_instruction *inst,
1824 micro_unary_op op,
1825 enum tgsi_exec_datatype dst_datatype,
1826 enum tgsi_exec_datatype src_datatype)
1827 {
1828 unsigned int chan;
1829 union tgsi_exec_channel src;
1830 union tgsi_exec_channel dst;
1831
1832 fetch_source(mach, &src, &inst->Src[0], CHAN_X, src_datatype);
1833 op(&dst, &src);
1834 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1835 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1836 store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
1837 }
1838 }
1839 }
1840
1841 static void
1842 exec_vector_unary(struct tgsi_exec_machine *mach,
1843 const struct tgsi_full_instruction *inst,
1844 micro_unary_op op,
1845 enum tgsi_exec_datatype dst_datatype,
1846 enum tgsi_exec_datatype src_datatype)
1847 {
1848 unsigned int chan;
1849 struct tgsi_exec_vector dst;
1850
1851 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1852 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1853 union tgsi_exec_channel src;
1854
1855 fetch_source(mach, &src, &inst->Src[0], chan, src_datatype);
1856 op(&dst.xyzw[chan], &src);
1857 }
1858 }
1859 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1860 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1861 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1862 }
1863 }
1864 }
1865
1866 typedef void (* micro_binary_op)(union tgsi_exec_channel *dst,
1867 const union tgsi_exec_channel *src0,
1868 const union tgsi_exec_channel *src1);
1869
1870 static void
1871 exec_vector_binary(struct tgsi_exec_machine *mach,
1872 const struct tgsi_full_instruction *inst,
1873 micro_binary_op op,
1874 enum tgsi_exec_datatype dst_datatype,
1875 enum tgsi_exec_datatype src_datatype)
1876 {
1877 unsigned int chan;
1878 struct tgsi_exec_vector dst;
1879
1880 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1881 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1882 union tgsi_exec_channel src[2];
1883
1884 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1885 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1886 op(&dst.xyzw[chan], &src[0], &src[1]);
1887 }
1888 }
1889 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1890 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1891 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1892 }
1893 }
1894 }
1895
1896 typedef void (* micro_trinary_op)(union tgsi_exec_channel *dst,
1897 const union tgsi_exec_channel *src0,
1898 const union tgsi_exec_channel *src1,
1899 const union tgsi_exec_channel *src2);
1900
1901 static void
1902 exec_vector_trinary(struct tgsi_exec_machine *mach,
1903 const struct tgsi_full_instruction *inst,
1904 micro_trinary_op op,
1905 enum tgsi_exec_datatype dst_datatype,
1906 enum tgsi_exec_datatype src_datatype)
1907 {
1908 unsigned int chan;
1909 struct tgsi_exec_vector dst;
1910
1911 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1912 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1913 union tgsi_exec_channel src[3];
1914
1915 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1916 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1917 fetch_source(mach, &src[2], &inst->Src[2], chan, src_datatype);
1918 op(&dst.xyzw[chan], &src[0], &src[1], &src[2]);
1919 }
1920 }
1921 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1922 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1923 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1924 }
1925 }
1926 }
1927
1928 static void
1929 exec_dp3(struct tgsi_exec_machine *mach,
1930 const struct tgsi_full_instruction *inst)
1931 {
1932 unsigned int chan;
1933 union tgsi_exec_channel arg[3];
1934
1935 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1936 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1937 micro_mul(&arg[2], &arg[0], &arg[1]);
1938
1939 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
1940 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1941 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1942 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1943 }
1944
1945 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1946 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1947 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1948 }
1949 }
1950 }
1951
1952 static void
1953 exec_dp4(struct tgsi_exec_machine *mach,
1954 const struct tgsi_full_instruction *inst)
1955 {
1956 unsigned int chan;
1957 union tgsi_exec_channel arg[3];
1958
1959 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1960 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1961 micro_mul(&arg[2], &arg[0], &arg[1]);
1962
1963 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
1964 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1965 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1966 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1967 }
1968
1969 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1970 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1971 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1972 }
1973 }
1974 }
1975
1976 static void
1977 exec_dp2a(struct tgsi_exec_machine *mach,
1978 const struct tgsi_full_instruction *inst)
1979 {
1980 unsigned int chan;
1981 union tgsi_exec_channel arg[3];
1982
1983 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1984 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1985 micro_mul(&arg[2], &arg[0], &arg[1]);
1986
1987 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
1988 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
1989 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
1990
1991 fetch_source(mach, &arg[1], &inst->Src[2], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1992 micro_add(&arg[0], &arg[0], &arg[1]);
1993
1994 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1995 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1996 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1997 }
1998 }
1999 }
2000
2001 static void
2002 exec_dph(struct tgsi_exec_machine *mach,
2003 const struct tgsi_full_instruction *inst)
2004 {
2005 unsigned int chan;
2006 union tgsi_exec_channel arg[3];
2007
2008 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2009 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2010 micro_mul(&arg[2], &arg[0], &arg[1]);
2011
2012 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2013 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2014 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2015
2016 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2017 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2018 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2019
2020 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_W, TGSI_EXEC_DATA_FLOAT);
2021 micro_add(&arg[0], &arg[0], &arg[1]);
2022
2023 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2024 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2025 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2026 }
2027 }
2028 }
2029
2030 static void
2031 exec_dp2(struct tgsi_exec_machine *mach,
2032 const struct tgsi_full_instruction *inst)
2033 {
2034 unsigned int chan;
2035 union tgsi_exec_channel arg[3];
2036
2037 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2038 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2039 micro_mul(&arg[2], &arg[0], &arg[1]);
2040
2041 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2042 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2043 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2044
2045 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2046 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2047 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2048 }
2049 }
2050 }
2051
2052 static void
2053 exec_nrm4(struct tgsi_exec_machine *mach,
2054 const struct tgsi_full_instruction *inst)
2055 {
2056 unsigned int chan;
2057 union tgsi_exec_channel arg[4];
2058 union tgsi_exec_channel scale;
2059
2060 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2061 micro_mul(&scale, &arg[0], &arg[0]);
2062
2063 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
2064 union tgsi_exec_channel product;
2065
2066 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2067 micro_mul(&product, &arg[chan], &arg[chan]);
2068 micro_add(&scale, &scale, &product);
2069 }
2070
2071 micro_rsq(&scale, &scale);
2072
2073 for (chan = CHAN_X; chan <= CHAN_W; chan++) {
2074 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2075 micro_mul(&arg[chan], &arg[chan], &scale);
2076 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2077 }
2078 }
2079 }
2080
2081 static void
2082 exec_nrm3(struct tgsi_exec_machine *mach,
2083 const struct tgsi_full_instruction *inst)
2084 {
2085 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
2086 unsigned int chan;
2087 union tgsi_exec_channel arg[3];
2088 union tgsi_exec_channel scale;
2089
2090 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2091 micro_mul(&scale, &arg[0], &arg[0]);
2092
2093 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
2094 union tgsi_exec_channel product;
2095
2096 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2097 micro_mul(&product, &arg[chan], &arg[chan]);
2098 micro_add(&scale, &scale, &product);
2099 }
2100
2101 micro_rsq(&scale, &scale);
2102
2103 for (chan = CHAN_X; chan <= CHAN_Z; chan++) {
2104 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2105 micro_mul(&arg[chan], &arg[chan], &scale);
2106 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2107 }
2108 }
2109 }
2110
2111 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
2112 store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
2113 }
2114 }
2115
2116 static void
2117 exec_break(struct tgsi_exec_machine *mach)
2118 {
2119 if (mach->BreakType == TGSI_EXEC_BREAK_INSIDE_LOOP) {
2120 /* turn off loop channels for each enabled exec channel */
2121 mach->LoopMask &= ~mach->ExecMask;
2122 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2123 UPDATE_EXEC_MASK(mach);
2124 } else {
2125 assert(mach->BreakType == TGSI_EXEC_BREAK_INSIDE_SWITCH);
2126
2127 mach->Switch.mask = 0x0;
2128
2129 UPDATE_EXEC_MASK(mach);
2130 }
2131 }
2132
2133 static void
2134 exec_switch(struct tgsi_exec_machine *mach,
2135 const struct tgsi_full_instruction *inst)
2136 {
2137 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
2138 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
2139
2140 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
2141 fetch_source(mach, &mach->Switch.selector, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2142 mach->Switch.mask = 0x0;
2143 mach->Switch.defaultMask = 0x0;
2144
2145 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
2146 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_SWITCH;
2147
2148 UPDATE_EXEC_MASK(mach);
2149 }
2150
2151 static void
2152 exec_case(struct tgsi_exec_machine *mach,
2153 const struct tgsi_full_instruction *inst)
2154 {
2155 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2156 union tgsi_exec_channel src;
2157 uint mask = 0;
2158
2159 fetch_source(mach, &src, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2160
2161 if (mach->Switch.selector.u[0] == src.u[0]) {
2162 mask |= 0x1;
2163 }
2164 if (mach->Switch.selector.u[1] == src.u[1]) {
2165 mask |= 0x2;
2166 }
2167 if (mach->Switch.selector.u[2] == src.u[2]) {
2168 mask |= 0x4;
2169 }
2170 if (mach->Switch.selector.u[3] == src.u[3]) {
2171 mask |= 0x8;
2172 }
2173
2174 mach->Switch.defaultMask |= mask;
2175
2176 mach->Switch.mask |= mask & prevMask;
2177
2178 UPDATE_EXEC_MASK(mach);
2179 }
2180
2181 static void
2182 exec_default(struct tgsi_exec_machine *mach)
2183 {
2184 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2185
2186 mach->Switch.mask |= ~mach->Switch.defaultMask & prevMask;
2187
2188 UPDATE_EXEC_MASK(mach);
2189 }
2190
2191 static void
2192 exec_endswitch(struct tgsi_exec_machine *mach)
2193 {
2194 mach->Switch = mach->SwitchStack[--mach->SwitchStackTop];
2195 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
2196
2197 UPDATE_EXEC_MASK(mach);
2198 }
2199
2200 static void
2201 micro_i2f(union tgsi_exec_channel *dst,
2202 const union tgsi_exec_channel *src)
2203 {
2204 dst->f[0] = (float)src->i[0];
2205 dst->f[1] = (float)src->i[1];
2206 dst->f[2] = (float)src->i[2];
2207 dst->f[3] = (float)src->i[3];
2208 }
2209
2210 static void
2211 micro_not(union tgsi_exec_channel *dst,
2212 const union tgsi_exec_channel *src)
2213 {
2214 dst->u[0] = ~src->u[0];
2215 dst->u[1] = ~src->u[1];
2216 dst->u[2] = ~src->u[2];
2217 dst->u[3] = ~src->u[3];
2218 }
2219
2220 static void
2221 micro_shl(union tgsi_exec_channel *dst,
2222 const union tgsi_exec_channel *src0,
2223 const union tgsi_exec_channel *src1)
2224 {
2225 dst->u[0] = src0->u[0] << src1->u[0];
2226 dst->u[1] = src0->u[1] << src1->u[1];
2227 dst->u[2] = src0->u[2] << src1->u[2];
2228 dst->u[3] = src0->u[3] << src1->u[3];
2229 }
2230
2231 static void
2232 micro_and(union tgsi_exec_channel *dst,
2233 const union tgsi_exec_channel *src0,
2234 const union tgsi_exec_channel *src1)
2235 {
2236 dst->u[0] = src0->u[0] & src1->u[0];
2237 dst->u[1] = src0->u[1] & src1->u[1];
2238 dst->u[2] = src0->u[2] & src1->u[2];
2239 dst->u[3] = src0->u[3] & src1->u[3];
2240 }
2241
2242 static void
2243 micro_or(union tgsi_exec_channel *dst,
2244 const union tgsi_exec_channel *src0,
2245 const union tgsi_exec_channel *src1)
2246 {
2247 dst->u[0] = src0->u[0] | src1->u[0];
2248 dst->u[1] = src0->u[1] | src1->u[1];
2249 dst->u[2] = src0->u[2] | src1->u[2];
2250 dst->u[3] = src0->u[3] | src1->u[3];
2251 }
2252
2253 static void
2254 micro_xor(union tgsi_exec_channel *dst,
2255 const union tgsi_exec_channel *src0,
2256 const union tgsi_exec_channel *src1)
2257 {
2258 dst->u[0] = src0->u[0] ^ src1->u[0];
2259 dst->u[1] = src0->u[1] ^ src1->u[1];
2260 dst->u[2] = src0->u[2] ^ src1->u[2];
2261 dst->u[3] = src0->u[3] ^ src1->u[3];
2262 }
2263
2264 static void
2265 micro_f2i(union tgsi_exec_channel *dst,
2266 const union tgsi_exec_channel *src)
2267 {
2268 dst->i[0] = (int)src->f[0];
2269 dst->i[1] = (int)src->f[1];
2270 dst->i[2] = (int)src->f[2];
2271 dst->i[3] = (int)src->f[3];
2272 }
2273
2274 static void
2275 micro_idiv(union tgsi_exec_channel *dst,
2276 const union tgsi_exec_channel *src0,
2277 const union tgsi_exec_channel *src1)
2278 {
2279 dst->i[0] = src0->i[0] / src1->i[0];
2280 dst->i[1] = src0->i[1] / src1->i[1];
2281 dst->i[2] = src0->i[2] / src1->i[2];
2282 dst->i[3] = src0->i[3] / src1->i[3];
2283 }
2284
2285 static void
2286 micro_imax(union tgsi_exec_channel *dst,
2287 const union tgsi_exec_channel *src0,
2288 const union tgsi_exec_channel *src1)
2289 {
2290 dst->i[0] = src0->i[0] > src1->i[0] ? src0->i[0] : src1->i[0];
2291 dst->i[1] = src0->i[1] > src1->i[1] ? src0->i[1] : src1->i[1];
2292 dst->i[2] = src0->i[2] > src1->i[2] ? src0->i[2] : src1->i[2];
2293 dst->i[3] = src0->i[3] > src1->i[3] ? src0->i[3] : src1->i[3];
2294 }
2295
2296 static void
2297 micro_imin(union tgsi_exec_channel *dst,
2298 const union tgsi_exec_channel *src0,
2299 const union tgsi_exec_channel *src1)
2300 {
2301 dst->i[0] = src0->i[0] < src1->i[0] ? src0->i[0] : src1->i[0];
2302 dst->i[1] = src0->i[1] < src1->i[1] ? src0->i[1] : src1->i[1];
2303 dst->i[2] = src0->i[2] < src1->i[2] ? src0->i[2] : src1->i[2];
2304 dst->i[3] = src0->i[3] < src1->i[3] ? src0->i[3] : src1->i[3];
2305 }
2306
2307 static void
2308 micro_isge(union tgsi_exec_channel *dst,
2309 const union tgsi_exec_channel *src0,
2310 const union tgsi_exec_channel *src1)
2311 {
2312 dst->i[0] = src0->i[0] >= src1->i[0] ? -1 : 0;
2313 dst->i[1] = src0->i[1] >= src1->i[1] ? -1 : 0;
2314 dst->i[2] = src0->i[2] >= src1->i[2] ? -1 : 0;
2315 dst->i[3] = src0->i[3] >= src1->i[3] ? -1 : 0;
2316 }
2317
2318 static void
2319 micro_ishr(union tgsi_exec_channel *dst,
2320 const union tgsi_exec_channel *src0,
2321 const union tgsi_exec_channel *src1)
2322 {
2323 dst->i[0] = src0->i[0] >> src1->i[0];
2324 dst->i[1] = src0->i[1] >> src1->i[1];
2325 dst->i[2] = src0->i[2] >> src1->i[2];
2326 dst->i[3] = src0->i[3] >> src1->i[3];
2327 }
2328
2329 static void
2330 micro_islt(union tgsi_exec_channel *dst,
2331 const union tgsi_exec_channel *src0,
2332 const union tgsi_exec_channel *src1)
2333 {
2334 dst->i[0] = src0->i[0] < src1->i[0] ? -1 : 0;
2335 dst->i[1] = src0->i[1] < src1->i[1] ? -1 : 0;
2336 dst->i[2] = src0->i[2] < src1->i[2] ? -1 : 0;
2337 dst->i[3] = src0->i[3] < src1->i[3] ? -1 : 0;
2338 }
2339
2340 static void
2341 micro_f2u(union tgsi_exec_channel *dst,
2342 const union tgsi_exec_channel *src)
2343 {
2344 dst->u[0] = (uint)src->f[0];
2345 dst->u[1] = (uint)src->f[1];
2346 dst->u[2] = (uint)src->f[2];
2347 dst->u[3] = (uint)src->f[3];
2348 }
2349
2350 static void
2351 micro_u2f(union tgsi_exec_channel *dst,
2352 const union tgsi_exec_channel *src)
2353 {
2354 dst->f[0] = (float)src->u[0];
2355 dst->f[1] = (float)src->u[1];
2356 dst->f[2] = (float)src->u[2];
2357 dst->f[3] = (float)src->u[3];
2358 }
2359
2360 static void
2361 micro_uadd(union tgsi_exec_channel *dst,
2362 const union tgsi_exec_channel *src0,
2363 const union tgsi_exec_channel *src1)
2364 {
2365 dst->u[0] = src0->u[0] + src1->u[0];
2366 dst->u[1] = src0->u[1] + src1->u[1];
2367 dst->u[2] = src0->u[2] + src1->u[2];
2368 dst->u[3] = src0->u[3] + src1->u[3];
2369 }
2370
2371 static void
2372 micro_udiv(union tgsi_exec_channel *dst,
2373 const union tgsi_exec_channel *src0,
2374 const union tgsi_exec_channel *src1)
2375 {
2376 dst->u[0] = src0->u[0] / src1->u[0];
2377 dst->u[1] = src0->u[1] / src1->u[1];
2378 dst->u[2] = src0->u[2] / src1->u[2];
2379 dst->u[3] = src0->u[3] / src1->u[3];
2380 }
2381
2382 static void
2383 micro_umad(union tgsi_exec_channel *dst,
2384 const union tgsi_exec_channel *src0,
2385 const union tgsi_exec_channel *src1,
2386 const union tgsi_exec_channel *src2)
2387 {
2388 dst->u[0] = src0->u[0] * src1->u[0] + src2->u[0];
2389 dst->u[1] = src0->u[1] * src1->u[1] + src2->u[1];
2390 dst->u[2] = src0->u[2] * src1->u[2] + src2->u[2];
2391 dst->u[3] = src0->u[3] * src1->u[3] + src2->u[3];
2392 }
2393
2394 static void
2395 micro_umax(union tgsi_exec_channel *dst,
2396 const union tgsi_exec_channel *src0,
2397 const union tgsi_exec_channel *src1)
2398 {
2399 dst->u[0] = src0->u[0] > src1->u[0] ? src0->u[0] : src1->u[0];
2400 dst->u[1] = src0->u[1] > src1->u[1] ? src0->u[1] : src1->u[1];
2401 dst->u[2] = src0->u[2] > src1->u[2] ? src0->u[2] : src1->u[2];
2402 dst->u[3] = src0->u[3] > src1->u[3] ? src0->u[3] : src1->u[3];
2403 }
2404
2405 static void
2406 micro_umin(union tgsi_exec_channel *dst,
2407 const union tgsi_exec_channel *src0,
2408 const union tgsi_exec_channel *src1)
2409 {
2410 dst->u[0] = src0->u[0] < src1->u[0] ? src0->u[0] : src1->u[0];
2411 dst->u[1] = src0->u[1] < src1->u[1] ? src0->u[1] : src1->u[1];
2412 dst->u[2] = src0->u[2] < src1->u[2] ? src0->u[2] : src1->u[2];
2413 dst->u[3] = src0->u[3] < src1->u[3] ? src0->u[3] : src1->u[3];
2414 }
2415
2416 static void
2417 micro_umod(union tgsi_exec_channel *dst,
2418 const union tgsi_exec_channel *src0,
2419 const union tgsi_exec_channel *src1)
2420 {
2421 dst->u[0] = src0->u[0] % src1->u[0];
2422 dst->u[1] = src0->u[1] % src1->u[1];
2423 dst->u[2] = src0->u[2] % src1->u[2];
2424 dst->u[3] = src0->u[3] % src1->u[3];
2425 }
2426
2427 static void
2428 micro_umul(union tgsi_exec_channel *dst,
2429 const union tgsi_exec_channel *src0,
2430 const union tgsi_exec_channel *src1)
2431 {
2432 dst->u[0] = src0->u[0] * src1->u[0];
2433 dst->u[1] = src0->u[1] * src1->u[1];
2434 dst->u[2] = src0->u[2] * src1->u[2];
2435 dst->u[3] = src0->u[3] * src1->u[3];
2436 }
2437
2438 static void
2439 micro_useq(union tgsi_exec_channel *dst,
2440 const union tgsi_exec_channel *src0,
2441 const union tgsi_exec_channel *src1)
2442 {
2443 dst->u[0] = src0->u[0] == src1->u[0] ? ~0 : 0;
2444 dst->u[1] = src0->u[1] == src1->u[1] ? ~0 : 0;
2445 dst->u[2] = src0->u[2] == src1->u[2] ? ~0 : 0;
2446 dst->u[3] = src0->u[3] == src1->u[3] ? ~0 : 0;
2447 }
2448
2449 static void
2450 micro_usge(union tgsi_exec_channel *dst,
2451 const union tgsi_exec_channel *src0,
2452 const union tgsi_exec_channel *src1)
2453 {
2454 dst->u[0] = src0->u[0] >= src1->u[0] ? ~0 : 0;
2455 dst->u[1] = src0->u[1] >= src1->u[1] ? ~0 : 0;
2456 dst->u[2] = src0->u[2] >= src1->u[2] ? ~0 : 0;
2457 dst->u[3] = src0->u[3] >= src1->u[3] ? ~0 : 0;
2458 }
2459
2460 static void
2461 micro_ushr(union tgsi_exec_channel *dst,
2462 const union tgsi_exec_channel *src0,
2463 const union tgsi_exec_channel *src1)
2464 {
2465 dst->u[0] = src0->u[0] >> src1->u[0];
2466 dst->u[1] = src0->u[1] >> src1->u[1];
2467 dst->u[2] = src0->u[2] >> src1->u[2];
2468 dst->u[3] = src0->u[3] >> src1->u[3];
2469 }
2470
2471 static void
2472 micro_uslt(union tgsi_exec_channel *dst,
2473 const union tgsi_exec_channel *src0,
2474 const union tgsi_exec_channel *src1)
2475 {
2476 dst->u[0] = src0->u[0] < src1->u[0] ? ~0 : 0;
2477 dst->u[1] = src0->u[1] < src1->u[1] ? ~0 : 0;
2478 dst->u[2] = src0->u[2] < src1->u[2] ? ~0 : 0;
2479 dst->u[3] = src0->u[3] < src1->u[3] ? ~0 : 0;
2480 }
2481
2482 static void
2483 micro_usne(union tgsi_exec_channel *dst,
2484 const union tgsi_exec_channel *src0,
2485 const union tgsi_exec_channel *src1)
2486 {
2487 dst->u[0] = src0->u[0] != src1->u[0] ? ~0 : 0;
2488 dst->u[1] = src0->u[1] != src1->u[1] ? ~0 : 0;
2489 dst->u[2] = src0->u[2] != src1->u[2] ? ~0 : 0;
2490 dst->u[3] = src0->u[3] != src1->u[3] ? ~0 : 0;
2491 }
2492
2493 static void
2494 exec_instruction(
2495 struct tgsi_exec_machine *mach,
2496 const struct tgsi_full_instruction *inst,
2497 int *pc )
2498 {
2499 uint chan_index;
2500 union tgsi_exec_channel r[10];
2501 union tgsi_exec_channel d[8];
2502
2503 (*pc)++;
2504
2505 switch (inst->Instruction.Opcode) {
2506 case TGSI_OPCODE_ARL:
2507 exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
2508 break;
2509
2510 case TGSI_OPCODE_MOV:
2511 exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
2512 break;
2513
2514 case TGSI_OPCODE_LIT:
2515 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y ) || IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2516 FETCH( &r[0], 0, CHAN_X );
2517 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2518 micro_max(&d[CHAN_Y], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2519 }
2520
2521 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2522 FETCH( &r[1], 0, CHAN_Y );
2523 micro_max( &r[1], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
2524
2525 FETCH( &r[2], 0, CHAN_W );
2526 micro_min( &r[2], &r[2], &mach->Temps[TEMP_128_I].xyzw[TEMP_128_C] );
2527 micro_max( &r[2], &r[2], &mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C] );
2528 micro_pow( &r[1], &r[1], &r[2] );
2529 micro_lt(&d[CHAN_Z], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2530 }
2531
2532 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2533 STORE(&d[CHAN_Y], 0, CHAN_Y);
2534 }
2535 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2536 STORE(&d[CHAN_Z], 0, CHAN_Z);
2537 }
2538 }
2539 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2540 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
2541 }
2542 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2543 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2544 }
2545 break;
2546
2547 case TGSI_OPCODE_RCP:
2548 exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2549 break;
2550
2551 case TGSI_OPCODE_RSQ:
2552 exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2553 break;
2554
2555 case TGSI_OPCODE_EXP:
2556 FETCH( &r[0], 0, CHAN_X );
2557 micro_flr( &r[1], &r[0] ); /* r1 = floor(r0) */
2558 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2559 micro_exp2( &r[2], &r[1] ); /* r2 = 2 ^ r1 */
2560 STORE( &r[2], 0, CHAN_X ); /* store r2 */
2561 }
2562 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2563 micro_sub( &r[2], &r[0], &r[1] ); /* r2 = r0 - r1 */
2564 STORE( &r[2], 0, CHAN_Y ); /* store r2 */
2565 }
2566 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2567 micro_exp2( &r[2], &r[0] ); /* r2 = 2 ^ r0 */
2568 STORE( &r[2], 0, CHAN_Z ); /* store r2 */
2569 }
2570 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2571 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2572 }
2573 break;
2574
2575 case TGSI_OPCODE_LOG:
2576 FETCH( &r[0], 0, CHAN_X );
2577 micro_abs( &r[2], &r[0] ); /* r2 = abs(r0) */
2578 micro_lg2( &r[1], &r[2] ); /* r1 = lg2(r2) */
2579 micro_flr( &r[0], &r[1] ); /* r0 = floor(r1) */
2580 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2581 STORE( &r[0], 0, CHAN_X );
2582 }
2583 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2584 micro_exp2( &r[0], &r[0] ); /* r0 = 2 ^ r0 */
2585 micro_div( &r[0], &r[2], &r[0] ); /* r0 = r2 / r0 */
2586 STORE( &r[0], 0, CHAN_Y );
2587 }
2588 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2589 STORE( &r[1], 0, CHAN_Z );
2590 }
2591 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2592 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2593 }
2594 break;
2595
2596 case TGSI_OPCODE_MUL:
2597 exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2598 break;
2599
2600 case TGSI_OPCODE_ADD:
2601 exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2602 break;
2603
2604 case TGSI_OPCODE_DP3:
2605 exec_dp3(mach, inst);
2606 break;
2607
2608 case TGSI_OPCODE_DP4:
2609 exec_dp4(mach, inst);
2610 break;
2611
2612 case TGSI_OPCODE_DST:
2613 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2614 FETCH( &r[0], 0, CHAN_Y );
2615 FETCH( &r[1], 1, CHAN_Y);
2616 micro_mul(&d[CHAN_Y], &r[0], &r[1]);
2617 }
2618 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2619 FETCH(&d[CHAN_Z], 0, CHAN_Z);
2620 }
2621 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2622 FETCH(&d[CHAN_W], 1, CHAN_W);
2623 }
2624
2625 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2626 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X);
2627 }
2628 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2629 STORE(&d[CHAN_Y], 0, CHAN_Y);
2630 }
2631 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2632 STORE(&d[CHAN_Z], 0, CHAN_Z);
2633 }
2634 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2635 STORE(&d[CHAN_W], 0, CHAN_W);
2636 }
2637 break;
2638
2639 case TGSI_OPCODE_MIN:
2640 exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2641 break;
2642
2643 case TGSI_OPCODE_MAX:
2644 exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2645 break;
2646
2647 case TGSI_OPCODE_SLT:
2648 exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2649 break;
2650
2651 case TGSI_OPCODE_SGE:
2652 exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2653 break;
2654
2655 case TGSI_OPCODE_MAD:
2656 exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2657 break;
2658
2659 case TGSI_OPCODE_SUB:
2660 exec_vector_binary(mach, inst, micro_sub, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2661 break;
2662
2663 case TGSI_OPCODE_LRP:
2664 exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2665 break;
2666
2667 case TGSI_OPCODE_CND:
2668 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2669 FETCH(&r[0], 0, chan_index);
2670 FETCH(&r[1], 1, chan_index);
2671 FETCH(&r[2], 2, chan_index);
2672 micro_lt(&d[chan_index], &mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C], &r[2], &r[0], &r[1]);
2673 }
2674 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2675 STORE(&d[chan_index], 0, chan_index);
2676 }
2677 break;
2678
2679 case TGSI_OPCODE_DP2A:
2680 exec_dp2a(mach, inst);
2681 break;
2682
2683 case TGSI_OPCODE_FRC:
2684 exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2685 break;
2686
2687 case TGSI_OPCODE_CLAMP:
2688 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2689 FETCH(&r[0], 0, chan_index);
2690 FETCH(&r[1], 1, chan_index);
2691 micro_max(&r[0], &r[0], &r[1]);
2692 FETCH(&r[1], 2, chan_index);
2693 micro_min(&d[chan_index], &r[0], &r[1]);
2694 }
2695 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2696 STORE(&d[chan_index], 0, chan_index);
2697 }
2698 break;
2699
2700 case TGSI_OPCODE_FLR:
2701 exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2702 break;
2703
2704 case TGSI_OPCODE_ROUND:
2705 exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2706 break;
2707
2708 case TGSI_OPCODE_EX2:
2709 exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2710 break;
2711
2712 case TGSI_OPCODE_LG2:
2713 exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2714 break;
2715
2716 case TGSI_OPCODE_POW:
2717 FETCH(&r[0], 0, CHAN_X);
2718 FETCH(&r[1], 1, CHAN_X);
2719
2720 micro_pow( &r[0], &r[0], &r[1] );
2721
2722 FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
2723 STORE( &r[0], 0, chan_index );
2724 }
2725 break;
2726
2727 case TGSI_OPCODE_XPD:
2728 FETCH(&r[0], 0, CHAN_Y);
2729 FETCH(&r[1], 1, CHAN_Z);
2730
2731 micro_mul( &r[2], &r[0], &r[1] );
2732
2733 FETCH(&r[3], 0, CHAN_Z);
2734 FETCH(&r[4], 1, CHAN_Y);
2735
2736 micro_mul( &r[5], &r[3], &r[4] );
2737 micro_sub(&d[CHAN_X], &r[2], &r[5]);
2738
2739 FETCH(&r[2], 1, CHAN_X);
2740
2741 micro_mul( &r[3], &r[3], &r[2] );
2742
2743 FETCH(&r[5], 0, CHAN_X);
2744
2745 micro_mul( &r[1], &r[1], &r[5] );
2746 micro_sub(&d[CHAN_Y], &r[3], &r[1]);
2747
2748 micro_mul( &r[5], &r[5], &r[4] );
2749 micro_mul( &r[0], &r[0], &r[2] );
2750 micro_sub(&d[CHAN_Z], &r[5], &r[0]);
2751
2752 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2753 STORE(&d[CHAN_X], 0, CHAN_X);
2754 }
2755 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2756 STORE(&d[CHAN_Y], 0, CHAN_Y);
2757 }
2758 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2759 STORE(&d[CHAN_Z], 0, CHAN_Z);
2760 }
2761 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2762 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2763 }
2764 break;
2765
2766 case TGSI_OPCODE_ABS:
2767 exec_vector_unary(mach, inst, micro_abs, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2768 break;
2769
2770 case TGSI_OPCODE_RCC:
2771 FETCH(&r[0], 0, CHAN_X);
2772 micro_div(&r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &r[0]);
2773 micro_float_clamp(&r[0], &r[0]);
2774 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2775 STORE(&r[0], 0, chan_index);
2776 }
2777 break;
2778
2779 case TGSI_OPCODE_DPH:
2780 exec_dph(mach, inst);
2781 break;
2782
2783 case TGSI_OPCODE_COS:
2784 exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2785 break;
2786
2787 case TGSI_OPCODE_DDX:
2788 exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2789 break;
2790
2791 case TGSI_OPCODE_DDY:
2792 exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2793 break;
2794
2795 case TGSI_OPCODE_KILP:
2796 exec_kilp (mach, inst);
2797 break;
2798
2799 case TGSI_OPCODE_KIL:
2800 exec_kil (mach, inst);
2801 break;
2802
2803 case TGSI_OPCODE_PK2H:
2804 assert (0);
2805 break;
2806
2807 case TGSI_OPCODE_PK2US:
2808 assert (0);
2809 break;
2810
2811 case TGSI_OPCODE_PK4B:
2812 assert (0);
2813 break;
2814
2815 case TGSI_OPCODE_PK4UB:
2816 assert (0);
2817 break;
2818
2819 case TGSI_OPCODE_RFL:
2820 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2821 IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2822 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2823 /* r0 = dp3(src0, src0) */
2824 FETCH(&r[2], 0, CHAN_X);
2825 micro_mul(&r[0], &r[2], &r[2]);
2826 FETCH(&r[4], 0, CHAN_Y);
2827 micro_mul(&r[8], &r[4], &r[4]);
2828 micro_add(&r[0], &r[0], &r[8]);
2829 FETCH(&r[6], 0, CHAN_Z);
2830 micro_mul(&r[8], &r[6], &r[6]);
2831 micro_add(&r[0], &r[0], &r[8]);
2832
2833 /* r1 = dp3(src0, src1) */
2834 FETCH(&r[3], 1, CHAN_X);
2835 micro_mul(&r[1], &r[2], &r[3]);
2836 FETCH(&r[5], 1, CHAN_Y);
2837 micro_mul(&r[8], &r[4], &r[5]);
2838 micro_add(&r[1], &r[1], &r[8]);
2839 FETCH(&r[7], 1, CHAN_Z);
2840 micro_mul(&r[8], &r[6], &r[7]);
2841 micro_add(&r[1], &r[1], &r[8]);
2842
2843 /* r1 = 2 * r1 / r0 */
2844 micro_add(&r[1], &r[1], &r[1]);
2845 micro_div(&r[1], &r[1], &r[0]);
2846
2847 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2848 micro_mul(&r[2], &r[2], &r[1]);
2849 micro_sub(&r[2], &r[2], &r[3]);
2850 STORE(&r[2], 0, CHAN_X);
2851 }
2852 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2853 micro_mul(&r[4], &r[4], &r[1]);
2854 micro_sub(&r[4], &r[4], &r[5]);
2855 STORE(&r[4], 0, CHAN_Y);
2856 }
2857 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2858 micro_mul(&r[6], &r[6], &r[1]);
2859 micro_sub(&r[6], &r[6], &r[7]);
2860 STORE(&r[6], 0, CHAN_Z);
2861 }
2862 }
2863 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2864 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W);
2865 }
2866 break;
2867
2868 case TGSI_OPCODE_SEQ:
2869 exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2870 break;
2871
2872 case TGSI_OPCODE_SFL:
2873 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2874 STORE(&mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, chan_index);
2875 }
2876 break;
2877
2878 case TGSI_OPCODE_SGT:
2879 exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2880 break;
2881
2882 case TGSI_OPCODE_SIN:
2883 exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2884 break;
2885
2886 case TGSI_OPCODE_SLE:
2887 exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2888 break;
2889
2890 case TGSI_OPCODE_SNE:
2891 exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2892 break;
2893
2894 case TGSI_OPCODE_STR:
2895 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2896 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, chan_index);
2897 }
2898 break;
2899
2900 case TGSI_OPCODE_TEX:
2901 /* simple texture lookup */
2902 /* src[0] = texcoord */
2903 /* src[1] = sampler unit */
2904 exec_tex(mach, inst, TEX_MODIFIER_NONE);
2905 break;
2906
2907 case TGSI_OPCODE_TXB:
2908 /* Texture lookup with lod bias */
2909 /* src[0] = texcoord (src[0].w = LOD bias) */
2910 /* src[1] = sampler unit */
2911 exec_tex(mach, inst, TEX_MODIFIER_LOD_BIAS);
2912 break;
2913
2914 case TGSI_OPCODE_TXD:
2915 /* Texture lookup with explict partial derivatives */
2916 /* src[0] = texcoord */
2917 /* src[1] = d[strq]/dx */
2918 /* src[2] = d[strq]/dy */
2919 /* src[3] = sampler unit */
2920 exec_txd(mach, inst);
2921 break;
2922
2923 case TGSI_OPCODE_TXL:
2924 /* Texture lookup with explit LOD */
2925 /* src[0] = texcoord (src[0].w = LOD) */
2926 /* src[1] = sampler unit */
2927 exec_tex(mach, inst, TEX_MODIFIER_EXPLICIT_LOD);
2928 break;
2929
2930 case TGSI_OPCODE_TXP:
2931 /* Texture lookup with projection */
2932 /* src[0] = texcoord (src[0].w = projection) */
2933 /* src[1] = sampler unit */
2934 exec_tex(mach, inst, TEX_MODIFIER_PROJECTED);
2935 break;
2936
2937 case TGSI_OPCODE_UP2H:
2938 assert (0);
2939 break;
2940
2941 case TGSI_OPCODE_UP2US:
2942 assert (0);
2943 break;
2944
2945 case TGSI_OPCODE_UP4B:
2946 assert (0);
2947 break;
2948
2949 case TGSI_OPCODE_UP4UB:
2950 assert (0);
2951 break;
2952
2953 case TGSI_OPCODE_X2D:
2954 FETCH(&r[0], 1, CHAN_X);
2955 FETCH(&r[1], 1, CHAN_Y);
2956 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2957 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2958 FETCH(&r[2], 2, CHAN_X);
2959 micro_mul(&r[2], &r[2], &r[0]);
2960 FETCH(&r[3], 2, CHAN_Y);
2961 micro_mul(&r[3], &r[3], &r[1]);
2962 micro_add(&r[2], &r[2], &r[3]);
2963 FETCH(&r[3], 0, CHAN_X);
2964 micro_add(&d[CHAN_X], &r[2], &r[3]);
2965
2966 }
2967 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2968 IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2969 FETCH(&r[2], 2, CHAN_Z);
2970 micro_mul(&r[2], &r[2], &r[0]);
2971 FETCH(&r[3], 2, CHAN_W);
2972 micro_mul(&r[3], &r[3], &r[1]);
2973 micro_add(&r[2], &r[2], &r[3]);
2974 FETCH(&r[3], 0, CHAN_Y);
2975 micro_add(&d[CHAN_Y], &r[2], &r[3]);
2976
2977 }
2978 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2979 STORE(&d[CHAN_X], 0, CHAN_X);
2980 }
2981 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2982 STORE(&d[CHAN_Y], 0, CHAN_Y);
2983 }
2984 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2985 STORE(&d[CHAN_X], 0, CHAN_Z);
2986 }
2987 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2988 STORE(&d[CHAN_Y], 0, CHAN_W);
2989 }
2990 break;
2991
2992 case TGSI_OPCODE_ARA:
2993 assert (0);
2994 break;
2995
2996 case TGSI_OPCODE_ARR:
2997 exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
2998 break;
2999
3000 case TGSI_OPCODE_BRA:
3001 assert (0);
3002 break;
3003
3004 case TGSI_OPCODE_CAL:
3005 /* skip the call if no execution channels are enabled */
3006 if (mach->ExecMask) {
3007 /* do the call */
3008
3009 /* First, record the depths of the execution stacks.
3010 * This is important for deeply nested/looped return statements.
3011 * We have to unwind the stacks by the correct amount. For a
3012 * real code generator, we could determine the number of entries
3013 * to pop off each stack with simple static analysis and avoid
3014 * implementing this data structure at run time.
3015 */
3016 mach->CallStack[mach->CallStackTop].CondStackTop = mach->CondStackTop;
3017 mach->CallStack[mach->CallStackTop].LoopStackTop = mach->LoopStackTop;
3018 mach->CallStack[mach->CallStackTop].ContStackTop = mach->ContStackTop;
3019 mach->CallStack[mach->CallStackTop].SwitchStackTop = mach->SwitchStackTop;
3020 mach->CallStack[mach->CallStackTop].BreakStackTop = mach->BreakStackTop;
3021 /* note that PC was already incremented above */
3022 mach->CallStack[mach->CallStackTop].ReturnAddr = *pc;
3023
3024 mach->CallStackTop++;
3025
3026 /* Second, push the Cond, Loop, Cont, Func stacks */
3027 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3028 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3029 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3030 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
3031 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3032 assert(mach->FuncStackTop < TGSI_EXEC_MAX_CALL_NESTING);
3033
3034 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3035 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3036 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3037 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
3038 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3039 mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask;
3040
3041 /* Finally, jump to the subroutine */
3042 *pc = inst->Label.Label;
3043 }
3044 break;
3045
3046 case TGSI_OPCODE_RET:
3047 mach->FuncMask &= ~mach->ExecMask;
3048 UPDATE_EXEC_MASK(mach);
3049
3050 if (mach->FuncMask == 0x0) {
3051 /* really return now (otherwise, keep executing */
3052
3053 if (mach->CallStackTop == 0) {
3054 /* returning from main() */
3055 *pc = -1;
3056 return;
3057 }
3058
3059 assert(mach->CallStackTop > 0);
3060 mach->CallStackTop--;
3061
3062 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3063 mach->CondMask = mach->CondStack[mach->CondStackTop];
3064
3065 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3066 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3067
3068 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3069 mach->ContMask = mach->ContStack[mach->ContStackTop];
3070
3071 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3072 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3073
3074 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3075 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3076
3077 assert(mach->FuncStackTop > 0);
3078 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3079
3080 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3081
3082 UPDATE_EXEC_MASK(mach);
3083 }
3084 break;
3085
3086 case TGSI_OPCODE_SSG:
3087 exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3088 break;
3089
3090 case TGSI_OPCODE_CMP:
3091 FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
3092 FETCH(&r[0], 0, chan_index);
3093 FETCH(&r[1], 1, chan_index);
3094 FETCH(&r[2], 2, chan_index);
3095 micro_lt(&d[chan_index], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[1], &r[2]);
3096 }
3097 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
3098 STORE(&d[chan_index], 0, chan_index);
3099 }
3100 break;
3101
3102 case TGSI_OPCODE_SCS:
3103 if( IS_CHANNEL_ENABLED( *inst, CHAN_X ) || IS_CHANNEL_ENABLED( *inst, CHAN_Y ) ) {
3104 FETCH( &r[0], 0, CHAN_X );
3105 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
3106 micro_cos(&r[1], &r[0]);
3107 STORE(&r[1], 0, CHAN_X);
3108 }
3109 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
3110 micro_sin(&r[1], &r[0]);
3111 STORE(&r[1], 0, CHAN_Y);
3112 }
3113 }
3114 if( IS_CHANNEL_ENABLED( *inst, CHAN_Z ) ) {
3115 STORE( &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, CHAN_Z );
3116 }
3117 if( IS_CHANNEL_ENABLED( *inst, CHAN_W ) ) {
3118 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
3119 }
3120 break;
3121
3122 case TGSI_OPCODE_NRM:
3123 exec_nrm3(mach, inst);
3124 break;
3125
3126 case TGSI_OPCODE_NRM4:
3127 exec_nrm4(mach, inst);
3128 break;
3129
3130 case TGSI_OPCODE_DIV:
3131 assert( 0 );
3132 break;
3133
3134 case TGSI_OPCODE_DP2:
3135 exec_dp2(mach, inst);
3136 break;
3137
3138 case TGSI_OPCODE_IF:
3139 /* push CondMask */
3140 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3141 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3142 FETCH( &r[0], 0, CHAN_X );
3143 /* update CondMask */
3144 if( ! r[0].u[0] ) {
3145 mach->CondMask &= ~0x1;
3146 }
3147 if( ! r[0].u[1] ) {
3148 mach->CondMask &= ~0x2;
3149 }
3150 if( ! r[0].u[2] ) {
3151 mach->CondMask &= ~0x4;
3152 }
3153 if( ! r[0].u[3] ) {
3154 mach->CondMask &= ~0x8;
3155 }
3156 UPDATE_EXEC_MASK(mach);
3157 /* Todo: If CondMask==0, jump to ELSE */
3158 break;
3159
3160 case TGSI_OPCODE_ELSE:
3161 /* invert CondMask wrt previous mask */
3162 {
3163 uint prevMask;
3164 assert(mach->CondStackTop > 0);
3165 prevMask = mach->CondStack[mach->CondStackTop - 1];
3166 mach->CondMask = ~mach->CondMask & prevMask;
3167 UPDATE_EXEC_MASK(mach);
3168 /* Todo: If CondMask==0, jump to ENDIF */
3169 }
3170 break;
3171
3172 case TGSI_OPCODE_ENDIF:
3173 /* pop CondMask */
3174 assert(mach->CondStackTop > 0);
3175 mach->CondMask = mach->CondStack[--mach->CondStackTop];
3176 UPDATE_EXEC_MASK(mach);
3177 break;
3178
3179 case TGSI_OPCODE_END:
3180 /* halt execution */
3181 *pc = -1;
3182 break;
3183
3184 case TGSI_OPCODE_REP:
3185 assert (0);
3186 break;
3187
3188 case TGSI_OPCODE_ENDREP:
3189 assert (0);
3190 break;
3191
3192 case TGSI_OPCODE_PUSHA:
3193 assert (0);
3194 break;
3195
3196 case TGSI_OPCODE_POPA:
3197 assert (0);
3198 break;
3199
3200 case TGSI_OPCODE_CEIL:
3201 exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3202 break;
3203
3204 case TGSI_OPCODE_I2F:
3205 exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_INT);
3206 break;
3207
3208 case TGSI_OPCODE_NOT:
3209 exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3210 break;
3211
3212 case TGSI_OPCODE_TRUNC:
3213 exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3214 break;
3215
3216 case TGSI_OPCODE_SHL:
3217 exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3218 break;
3219
3220 case TGSI_OPCODE_AND:
3221 exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3222 break;
3223
3224 case TGSI_OPCODE_OR:
3225 exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3226 break;
3227
3228 case TGSI_OPCODE_MOD:
3229 assert (0);
3230 break;
3231
3232 case TGSI_OPCODE_XOR:
3233 exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3234 break;
3235
3236 case TGSI_OPCODE_SAD:
3237 assert (0);
3238 break;
3239
3240 case TGSI_OPCODE_TXF:
3241 assert (0);
3242 break;
3243
3244 case TGSI_OPCODE_TXQ:
3245 assert (0);
3246 break;
3247
3248 case TGSI_OPCODE_EMIT:
3249 emit_vertex(mach);
3250 break;
3251
3252 case TGSI_OPCODE_ENDPRIM:
3253 emit_primitive(mach);
3254 break;
3255
3256 case TGSI_OPCODE_BGNFOR:
3257 assert(mach->LoopCounterStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3258 for (chan_index = 0; chan_index < 3; chan_index++) {
3259 FETCH( &mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[chan_index], 0, chan_index );
3260 }
3261 ++mach->LoopCounterStackTop;
3262 STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X], 0, CHAN_X);
3263 /* update LoopMask */
3264 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) {
3265 mach->LoopMask &= ~0x1;
3266 }
3267 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) {
3268 mach->LoopMask &= ~0x2;
3269 }
3270 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) {
3271 mach->LoopMask &= ~0x4;
3272 }
3273 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) {
3274 mach->LoopMask &= ~0x8;
3275 }
3276 /* TODO: if mach->LoopMask == 0, jump to end of loop */
3277 UPDATE_EXEC_MASK(mach);
3278 /* fall-through (for now) */
3279 case TGSI_OPCODE_BGNLOOP:
3280 /* push LoopMask and ContMasks */
3281 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3282 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3283 assert(mach->LoopLabelStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3284 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3285
3286 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3287 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3288 mach->LoopLabelStack[mach->LoopLabelStackTop++] = *pc - 1;
3289 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3290 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_LOOP;
3291 break;
3292
3293 case TGSI_OPCODE_ENDFOR:
3294 assert(mach->LoopCounterStackTop > 0);
3295 micro_sub(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
3296 &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
3297 &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]);
3298 /* update LoopMask */
3299 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) {
3300 mach->LoopMask &= ~0x1;
3301 }
3302 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) {
3303 mach->LoopMask &= ~0x2;
3304 }
3305 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) {
3306 mach->LoopMask &= ~0x4;
3307 }
3308 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) {
3309 mach->LoopMask &= ~0x8;
3310 }
3311 micro_add(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
3312 &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
3313 &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Z]);
3314 assert(mach->LoopLabelStackTop > 0);
3315 inst = mach->Instructions + mach->LoopLabelStack[mach->LoopLabelStackTop - 1];
3316 STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[CHAN_X], 0, CHAN_X);
3317 /* Restore ContMask, but don't pop */
3318 assert(mach->ContStackTop > 0);
3319 mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
3320 UPDATE_EXEC_MASK(mach);
3321 if (mach->ExecMask) {
3322 /* repeat loop: jump to instruction just past BGNLOOP */
3323 assert(mach->LoopLabelStackTop > 0);
3324 *pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1;
3325 }
3326 else {
3327 /* exit loop: pop LoopMask */
3328 assert(mach->LoopStackTop > 0);
3329 mach->LoopMask = mach->LoopStack[--mach->LoopStackTop];
3330 /* pop ContMask */
3331 assert(mach->ContStackTop > 0);
3332 mach->ContMask = mach->ContStack[--mach->ContStackTop];
3333 assert(mach->LoopLabelStackTop > 0);
3334 --mach->LoopLabelStackTop;
3335 assert(mach->LoopCounterStackTop > 0);
3336 --mach->LoopCounterStackTop;
3337
3338 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
3339 }
3340 UPDATE_EXEC_MASK(mach);
3341 break;
3342
3343 case TGSI_OPCODE_ENDLOOP:
3344 /* Restore ContMask, but don't pop */
3345 assert(mach->ContStackTop > 0);
3346 mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
3347 UPDATE_EXEC_MASK(mach);
3348 if (mach->ExecMask) {
3349 /* repeat loop: jump to instruction just past BGNLOOP */
3350 assert(mach->LoopLabelStackTop > 0);
3351 *pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1;
3352 }
3353 else {
3354 /* exit loop: pop LoopMask */
3355 assert(mach->LoopStackTop > 0);
3356 mach->LoopMask = mach->LoopStack[--mach->LoopStackTop];
3357 /* pop ContMask */
3358 assert(mach->ContStackTop > 0);
3359 mach->ContMask = mach->ContStack[--mach->ContStackTop];
3360 assert(mach->LoopLabelStackTop > 0);
3361 --mach->LoopLabelStackTop;
3362
3363 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
3364 }
3365 UPDATE_EXEC_MASK(mach);
3366 break;
3367
3368 case TGSI_OPCODE_BRK:
3369 exec_break(mach);
3370 break;
3371
3372 case TGSI_OPCODE_CONT:
3373 /* turn off cont channels for each enabled exec channel */
3374 mach->ContMask &= ~mach->ExecMask;
3375 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3376 UPDATE_EXEC_MASK(mach);
3377 break;
3378
3379 case TGSI_OPCODE_BGNSUB:
3380 /* no-op */
3381 break;
3382
3383 case TGSI_OPCODE_ENDSUB:
3384 /*
3385 * XXX: This really should be a no-op. We should never reach this opcode.
3386 */
3387
3388 assert(mach->CallStackTop > 0);
3389 mach->CallStackTop--;
3390
3391 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3392 mach->CondMask = mach->CondStack[mach->CondStackTop];
3393
3394 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3395 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3396
3397 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3398 mach->ContMask = mach->ContStack[mach->ContStackTop];
3399
3400 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3401 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3402
3403 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3404 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3405
3406 assert(mach->FuncStackTop > 0);
3407 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3408
3409 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3410
3411 UPDATE_EXEC_MASK(mach);
3412 break;
3413
3414 case TGSI_OPCODE_NOP:
3415 break;
3416
3417 case TGSI_OPCODE_BREAKC:
3418 FETCH(&r[0], 0, CHAN_X);
3419 /* update CondMask */
3420 if (r[0].u[0] && (mach->ExecMask & 0x1)) {
3421 mach->LoopMask &= ~0x1;
3422 }
3423 if (r[0].u[1] && (mach->ExecMask & 0x2)) {
3424 mach->LoopMask &= ~0x2;
3425 }
3426 if (r[0].u[2] && (mach->ExecMask & 0x4)) {
3427 mach->LoopMask &= ~0x4;
3428 }
3429 if (r[0].u[3] && (mach->ExecMask & 0x8)) {
3430 mach->LoopMask &= ~0x8;
3431 }
3432 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3433 UPDATE_EXEC_MASK(mach);
3434 break;
3435
3436 case TGSI_OPCODE_F2I:
3437 exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3438 break;
3439
3440 case TGSI_OPCODE_IDIV:
3441 exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3442 break;
3443
3444 case TGSI_OPCODE_IMAX:
3445 exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3446 break;
3447
3448 case TGSI_OPCODE_IMIN:
3449 exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3450 break;
3451
3452 case TGSI_OPCODE_INEG:
3453 exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3454 break;
3455
3456 case TGSI_OPCODE_ISGE:
3457 exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3458 break;
3459
3460 case TGSI_OPCODE_ISHR:
3461 exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3462 break;
3463
3464 case TGSI_OPCODE_ISLT:
3465 exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3466 break;
3467
3468 case TGSI_OPCODE_F2U:
3469 exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
3470 break;
3471
3472 case TGSI_OPCODE_U2F:
3473 exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_UINT);
3474 break;
3475
3476 case TGSI_OPCODE_UADD:
3477 exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3478 break;
3479
3480 case TGSI_OPCODE_UDIV:
3481 exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3482 break;
3483
3484 case TGSI_OPCODE_UMAD:
3485 exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3486 break;
3487
3488 case TGSI_OPCODE_UMAX:
3489 exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3490 break;
3491
3492 case TGSI_OPCODE_UMIN:
3493 exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3494 break;
3495
3496 case TGSI_OPCODE_UMOD:
3497 exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3498 break;
3499
3500 case TGSI_OPCODE_UMUL:
3501 exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3502 break;
3503
3504 case TGSI_OPCODE_USEQ:
3505 exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3506 break;
3507
3508 case TGSI_OPCODE_USGE:
3509 exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3510 break;
3511
3512 case TGSI_OPCODE_USHR:
3513 exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3514 break;
3515
3516 case TGSI_OPCODE_USLT:
3517 exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3518 break;
3519
3520 case TGSI_OPCODE_USNE:
3521 exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3522 break;
3523
3524 case TGSI_OPCODE_SWITCH:
3525 exec_switch(mach, inst);
3526 break;
3527
3528 case TGSI_OPCODE_CASE:
3529 exec_case(mach, inst);
3530 break;
3531
3532 case TGSI_OPCODE_DEFAULT:
3533 exec_default(mach);
3534 break;
3535
3536 case TGSI_OPCODE_ENDSWITCH:
3537 exec_endswitch(mach);
3538 break;
3539
3540 default:
3541 assert( 0 );
3542 }
3543 }
3544
3545
3546 #define DEBUG_EXECUTION 0
3547
3548
3549 /**
3550 * Run TGSI interpreter.
3551 * \return bitmask of "alive" quad components
3552 */
3553 uint
3554 tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
3555 {
3556 uint i;
3557 int pc = 0;
3558
3559 mach->CondMask = 0xf;
3560 mach->LoopMask = 0xf;
3561 mach->ContMask = 0xf;
3562 mach->FuncMask = 0xf;
3563 mach->ExecMask = 0xf;
3564
3565 mach->Switch.mask = 0xf;
3566
3567 assert(mach->CondStackTop == 0);
3568 assert(mach->LoopStackTop == 0);
3569 assert(mach->ContStackTop == 0);
3570 assert(mach->SwitchStackTop == 0);
3571 assert(mach->BreakStackTop == 0);
3572 assert(mach->CallStackTop == 0);
3573
3574 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] = 0;
3575 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] = 0;
3576
3577 if( mach->Processor == TGSI_PROCESSOR_GEOMETRY ) {
3578 mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0] = 0;
3579 mach->Primitives[0] = 0;
3580 }
3581
3582 for (i = 0; i < QUAD_SIZE; i++) {
3583 mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C].u[i] =
3584 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_X_SHIFT) |
3585 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Y_SHIFT) |
3586 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Z_SHIFT) |
3587 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_W_SHIFT);
3588 }
3589
3590 /* execute declarations (interpolants) */
3591 for (i = 0; i < mach->NumDeclarations; i++) {
3592 exec_declaration( mach, mach->Declarations+i );
3593 }
3594
3595 {
3596 #if DEBUG_EXECUTION
3597 struct tgsi_exec_vector temps[TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS];
3598 struct tgsi_exec_vector outputs[PIPE_MAX_ATTRIBS];
3599 uint inst = 1;
3600
3601 memcpy(temps, mach->Temps, sizeof(temps));
3602 memcpy(outputs, mach->Outputs, sizeof(outputs));
3603 #endif
3604
3605 /* execute instructions, until pc is set to -1 */
3606 while (pc != -1) {
3607
3608 #if DEBUG_EXECUTION
3609 uint i;
3610
3611 tgsi_dump_instruction(&mach->Instructions[pc], inst++);
3612 #endif
3613
3614 assert(pc < (int) mach->NumInstructions);
3615 exec_instruction(mach, mach->Instructions + pc, &pc);
3616
3617 #if DEBUG_EXECUTION
3618 for (i = 0; i < TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS; i++) {
3619 if (memcmp(&temps[i], &mach->Temps[i], sizeof(temps[i]))) {
3620 uint j;
3621
3622 memcpy(&temps[i], &mach->Temps[i], sizeof(temps[i]));
3623 debug_printf("TEMP[%2u] = ", i);
3624 for (j = 0; j < 4; j++) {
3625 if (j > 0) {
3626 debug_printf(" ");
3627 }
3628 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3629 temps[i].xyzw[0].f[j], temps[i].xyzw[0].u[j],
3630 temps[i].xyzw[1].f[j], temps[i].xyzw[1].u[j],
3631 temps[i].xyzw[2].f[j], temps[i].xyzw[2].u[j],
3632 temps[i].xyzw[3].f[j], temps[i].xyzw[3].u[j]);
3633 }
3634 }
3635 }
3636 for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
3637 if (memcmp(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]))) {
3638 uint j;
3639
3640 memcpy(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]));
3641 debug_printf("OUT[%2u] = ", i);
3642 for (j = 0; j < 4; j++) {
3643 if (j > 0) {
3644 debug_printf(" ");
3645 }
3646 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3647 outputs[i].xyzw[0].f[j], outputs[i].xyzw[0].u[j],
3648 outputs[i].xyzw[1].f[j], outputs[i].xyzw[1].u[j],
3649 outputs[i].xyzw[2].f[j], outputs[i].xyzw[2].u[j],
3650 outputs[i].xyzw[3].f[j], outputs[i].xyzw[3].u[j]);
3651 }
3652 }
3653 }
3654 #endif
3655 }
3656 }
3657
3658 #if 0
3659 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3660 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
3661 /*
3662 * Scale back depth component.
3663 */
3664 for (i = 0; i < 4; i++)
3665 mach->Outputs[0].xyzw[2].f[i] *= ctx->DrawBuffer->_DepthMaxF;
3666 }
3667 #endif
3668
3669 assert(mach->CondStackTop == 0);
3670 assert(mach->LoopStackTop == 0);
3671 assert(mach->ContStackTop == 0);
3672 assert(mach->SwitchStackTop == 0);
3673 assert(mach->BreakStackTop == 0);
3674 assert(mach->CallStackTop == 0);
3675
3676 return ~mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0];
3677 }