1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * TGSI interpreter/executor.
31 * Flow control information:
33 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
34 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
35 * care since a condition may be true for some quad components but false
36 * for other components.
38 * We basically execute all statements (even if they're in the part of
39 * an IF/ELSE clause that's "not taken") and use a special mask to
40 * control writing to destination registers. This is the ExecMask.
43 * The ExecMask is computed from three other masks (CondMask, LoopMask and
44 * ContMask) which are controlled by the flow control instructions (namely:
45 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
53 #include "pipe/p_compiler.h"
54 #include "pipe/p_state.h"
55 #include "pipe/p_shader_tokens.h"
56 #include "tgsi/tgsi_dump.h"
57 #include "tgsi/tgsi_parse.h"
58 #include "tgsi/tgsi_util.h"
59 #include "tgsi_exec.h"
60 #include "util/u_memory.h"
61 #include "util/u_math.h"
65 #define TILE_TOP_LEFT 0
66 #define TILE_TOP_RIGHT 1
67 #define TILE_BOTTOM_LEFT 2
68 #define TILE_BOTTOM_RIGHT 3
76 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
78 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
79 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
80 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
81 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
82 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
83 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
84 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
85 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
86 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
87 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
88 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
89 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
90 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
91 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
92 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
93 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
94 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
95 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
96 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
97 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
98 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
99 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
100 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
101 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
102 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
103 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
104 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
105 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
106 #define TEMP_R0 TGSI_EXEC_TEMP_R0
107 #define TEMP_P0 TGSI_EXEC_TEMP_P0
109 #define IS_CHANNEL_ENABLED(INST, CHAN)\
110 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
112 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
113 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
115 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
116 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
117 if (IS_CHANNEL_ENABLED( INST, CHAN ))
119 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
120 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
121 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
124 /** The execution mask depends on the conditional mask and the loop mask */
125 #define UPDATE_EXEC_MASK(MACH) \
126 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
129 static const union tgsi_exec_channel ZeroVec
=
130 { { 0.0, 0.0, 0.0, 0.0 } };
135 check_inf_or_nan(const union tgsi_exec_channel
*chan
)
137 assert(!util_is_inf_or_nan(chan
->f
[0]));
138 assert(!util_is_inf_or_nan(chan
->f
[1]));
139 assert(!util_is_inf_or_nan(chan
->f
[2]));
140 assert(!util_is_inf_or_nan(chan
->f
[3]));
147 print_chan(const char *msg
, const union tgsi_exec_channel
*chan
)
149 debug_printf("%s = {%f, %f, %f, %f}\n",
150 msg
, chan
->f
[0], chan
->f
[1], chan
->f
[2], chan
->f
[3]);
157 print_temp(const struct tgsi_exec_machine
*mach
, uint index
)
159 const struct tgsi_exec_vector
*tmp
= &mach
->Temps
[index
];
161 debug_printf("Temp[%u] =\n", index
);
162 for (i
= 0; i
< 4; i
++) {
163 debug_printf(" %c: { %f, %f, %f, %f }\n",
175 * Check if there's a potential src/dst register data dependency when
176 * using SOA execution.
179 * This would expand into:
184 * The second instruction will have the wrong value for t0 if executed as-is.
187 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
)
191 uint writemask
= inst
->Dst
[0].Register
.WriteMask
;
192 if (writemask
== TGSI_WRITEMASK_X
||
193 writemask
== TGSI_WRITEMASK_Y
||
194 writemask
== TGSI_WRITEMASK_Z
||
195 writemask
== TGSI_WRITEMASK_W
||
196 writemask
== TGSI_WRITEMASK_NONE
) {
197 /* no chance of data dependency */
201 /* loop over src regs */
202 for (i
= 0; i
< inst
->Instruction
.NumSrcRegs
; i
++) {
203 if ((inst
->Src
[i
].Register
.File
==
204 inst
->Dst
[0].Register
.File
) &&
205 (inst
->Src
[i
].Register
.Index
==
206 inst
->Dst
[0].Register
.Index
)) {
207 /* loop over dest channels */
208 uint channelsWritten
= 0x0;
209 FOR_EACH_ENABLED_CHANNEL(*inst
, chan
) {
210 /* check if we're reading a channel that's been written */
211 uint swizzle
= tgsi_util_get_full_src_register_swizzle(&inst
->Src
[i
], chan
);
212 if (channelsWritten
& (1 << swizzle
)) {
216 channelsWritten
|= (1 << chan
);
225 * Initialize machine state by expanding tokens to full instructions,
226 * allocating temporary storage, setting up constants, etc.
227 * After this, we can call tgsi_exec_machine_run() many times.
230 tgsi_exec_machine_bind_shader(
231 struct tgsi_exec_machine
*mach
,
232 const struct tgsi_token
*tokens
,
234 struct tgsi_sampler
**samplers
)
237 struct tgsi_parse_context parse
;
238 struct tgsi_exec_labels
*labels
= &mach
->Labels
;
239 struct tgsi_full_instruction
*instructions
;
240 struct tgsi_full_declaration
*declarations
;
241 uint maxInstructions
= 10, numInstructions
= 0;
242 uint maxDeclarations
= 10, numDeclarations
= 0;
246 tgsi_dump(tokens
, 0);
251 mach
->Tokens
= tokens
;
252 mach
->Samplers
= samplers
;
254 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
255 if (k
!= TGSI_PARSE_OK
) {
256 debug_printf( "Problem parsing!\n" );
260 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
264 declarations
= (struct tgsi_full_declaration
*)
265 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
271 instructions
= (struct tgsi_full_instruction
*)
272 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
275 FREE( declarations
);
279 while( !tgsi_parse_end_of_tokens( &parse
) ) {
280 uint pointer
= parse
.Position
;
283 tgsi_parse_token( &parse
);
284 switch( parse
.FullToken
.Token
.Type
) {
285 case TGSI_TOKEN_TYPE_DECLARATION
:
286 /* save expanded declaration */
287 if (numDeclarations
== maxDeclarations
) {
288 declarations
= REALLOC(declarations
,
290 * sizeof(struct tgsi_full_declaration
),
291 (maxDeclarations
+ 10)
292 * sizeof(struct tgsi_full_declaration
));
293 maxDeclarations
+= 10;
295 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
== TGSI_FILE_OUTPUT
) {
297 for (reg
= parse
.FullToken
.FullDeclaration
.Range
.First
;
298 reg
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
303 memcpy(declarations
+ numDeclarations
,
304 &parse
.FullToken
.FullDeclaration
,
305 sizeof(declarations
[0]));
309 case TGSI_TOKEN_TYPE_IMMEDIATE
:
311 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
313 assert( mach
->ImmLimit
+ 1 <= TGSI_EXEC_NUM_IMMEDIATES
);
315 for( i
= 0; i
< size
; i
++ ) {
316 mach
->Imms
[mach
->ImmLimit
][i
] =
317 parse
.FullToken
.FullImmediate
.u
[i
].Float
;
323 case TGSI_TOKEN_TYPE_INSTRUCTION
:
324 assert( labels
->count
< MAX_LABELS
);
326 labels
->labels
[labels
->count
][0] = instno
;
327 labels
->labels
[labels
->count
][1] = pointer
;
330 /* save expanded instruction */
331 if (numInstructions
== maxInstructions
) {
332 instructions
= REALLOC(instructions
,
334 * sizeof(struct tgsi_full_instruction
),
335 (maxInstructions
+ 10)
336 * sizeof(struct tgsi_full_instruction
));
337 maxInstructions
+= 10;
340 memcpy(instructions
+ numInstructions
,
341 &parse
.FullToken
.FullInstruction
,
342 sizeof(instructions
[0]));
347 case TGSI_TOKEN_TYPE_PROPERTY
:
354 tgsi_parse_free (&parse
);
356 if (mach
->Declarations
) {
357 FREE( mach
->Declarations
);
359 mach
->Declarations
= declarations
;
360 mach
->NumDeclarations
= numDeclarations
;
362 if (mach
->Instructions
) {
363 FREE( mach
->Instructions
);
365 mach
->Instructions
= instructions
;
366 mach
->NumInstructions
= numInstructions
;
370 struct tgsi_exec_machine
*
371 tgsi_exec_machine_create( void )
373 struct tgsi_exec_machine
*mach
;
376 mach
= align_malloc( sizeof *mach
, 16 );
380 memset(mach
, 0, sizeof(*mach
));
382 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
383 mach
->MaxGeometryShaderOutputs
= TGSI_MAX_TOTAL_VERTICES
;
384 mach
->Predicates
= &mach
->Temps
[TGSI_EXEC_TEMP_P0
];
386 /* Setup constants. */
387 for( i
= 0; i
< 4; i
++ ) {
388 mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
].u
[i
] = 0x00000000;
389 mach
->Temps
[TEMP_7F_I
].xyzw
[TEMP_7F_C
].u
[i
] = 0x7FFFFFFF;
390 mach
->Temps
[TEMP_80_I
].xyzw
[TEMP_80_C
].u
[i
] = 0x80000000;
391 mach
->Temps
[TEMP_FF_I
].xyzw
[TEMP_FF_C
].u
[i
] = 0xFFFFFFFF;
392 mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
].f
[i
] = 1.0f
;
393 mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
].f
[i
] = 2.0f
;
394 mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
].f
[i
] = 128.0f
;
395 mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
].f
[i
] = -128.0f
;
396 mach
->Temps
[TEMP_3_I
].xyzw
[TEMP_3_C
].f
[i
] = 3.0f
;
397 mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
].f
[i
] = 0.5f
;
401 /* silence warnings */
415 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
)
418 FREE(mach
->Instructions
);
419 FREE(mach
->Declarations
);
428 union tgsi_exec_channel
*dst
,
429 const union tgsi_exec_channel
*src
)
431 dst
->f
[0] = fabsf( src
->f
[0] );
432 dst
->f
[1] = fabsf( src
->f
[1] );
433 dst
->f
[2] = fabsf( src
->f
[2] );
434 dst
->f
[3] = fabsf( src
->f
[3] );
439 union tgsi_exec_channel
*dst
,
440 const union tgsi_exec_channel
*src0
,
441 const union tgsi_exec_channel
*src1
)
443 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
444 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
445 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
446 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
451 union tgsi_exec_channel
*dst
,
452 const union tgsi_exec_channel
*src
)
454 dst
->f
[0] = ceilf( src
->f
[0] );
455 dst
->f
[1] = ceilf( src
->f
[1] );
456 dst
->f
[2] = ceilf( src
->f
[2] );
457 dst
->f
[3] = ceilf( src
->f
[3] );
462 union tgsi_exec_channel
*dst
,
463 const union tgsi_exec_channel
*src
)
465 dst
->f
[0] = cosf( src
->f
[0] );
466 dst
->f
[1] = cosf( src
->f
[1] );
467 dst
->f
[2] = cosf( src
->f
[2] );
468 dst
->f
[3] = cosf( src
->f
[3] );
473 union tgsi_exec_channel
*dst
,
474 const union tgsi_exec_channel
*src
)
479 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
484 union tgsi_exec_channel
*dst
,
485 const union tgsi_exec_channel
*src
)
490 dst
->f
[3] = src
->f
[TILE_BOTTOM_LEFT
] - src
->f
[TILE_TOP_LEFT
];
495 union tgsi_exec_channel
*dst
,
496 const union tgsi_exec_channel
*src0
,
497 const union tgsi_exec_channel
*src1
)
499 if (src1
->f
[0] != 0) {
500 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
502 if (src1
->f
[1] != 0) {
503 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
505 if (src1
->f
[2] != 0) {
506 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
508 if (src1
->f
[3] != 0) {
509 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
515 union tgsi_exec_channel
*dst
,
516 const union tgsi_exec_channel
*src0
,
517 const union tgsi_exec_channel
*src1
,
518 const union tgsi_exec_channel
*src2
,
519 const union tgsi_exec_channel
*src3
)
521 dst
->f
[0] = src0
->f
[0] == src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
522 dst
->f
[1] = src0
->f
[1] == src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
523 dst
->f
[2] = src0
->f
[2] == src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
524 dst
->f
[3] = src0
->f
[3] == src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
529 union tgsi_exec_channel
*dst
,
530 const union tgsi_exec_channel
*src
)
533 dst
->f
[0] = util_fast_exp2( src
->f
[0] );
534 dst
->f
[1] = util_fast_exp2( src
->f
[1] );
535 dst
->f
[2] = util_fast_exp2( src
->f
[2] );
536 dst
->f
[3] = util_fast_exp2( src
->f
[3] );
540 /* Inf is okay for this instruction, so clamp it to silence assertions. */
542 union tgsi_exec_channel clamped
;
544 for (i
= 0; i
< 4; i
++) {
545 if (src
->f
[i
] > 127.99999f
) {
546 clamped
.f
[i
] = 127.99999f
;
547 } else if (src
->f
[i
] < -126.99999f
) {
548 clamped
.f
[i
] = -126.99999f
;
550 clamped
.f
[i
] = src
->f
[i
];
556 dst
->f
[0] = powf( 2.0f
, src
->f
[0] );
557 dst
->f
[1] = powf( 2.0f
, src
->f
[1] );
558 dst
->f
[2] = powf( 2.0f
, src
->f
[2] );
559 dst
->f
[3] = powf( 2.0f
, src
->f
[3] );
564 micro_float_clamp(union tgsi_exec_channel
*dst
,
565 const union tgsi_exec_channel
*src
)
569 for (i
= 0; i
< 4; i
++) {
570 if (src
->f
[i
] > 0.0f
) {
571 if (src
->f
[i
] > 1.884467e+019f
)
572 dst
->f
[i
] = 1.884467e+019f
;
573 else if (src
->f
[i
] < 5.42101e-020f
)
574 dst
->f
[i
] = 5.42101e-020f
;
576 dst
->f
[i
] = src
->f
[i
];
579 if (src
->f
[i
] < -1.884467e+019f
)
580 dst
->f
[i
] = -1.884467e+019f
;
581 else if (src
->f
[i
] > -5.42101e-020f
)
582 dst
->f
[i
] = -5.42101e-020f
;
584 dst
->f
[i
] = src
->f
[i
];
591 union tgsi_exec_channel
*dst
,
592 const union tgsi_exec_channel
*src
)
594 dst
->f
[0] = floorf( src
->f
[0] );
595 dst
->f
[1] = floorf( src
->f
[1] );
596 dst
->f
[2] = floorf( src
->f
[2] );
597 dst
->f
[3] = floorf( src
->f
[3] );
602 union tgsi_exec_channel
*dst
,
603 const union tgsi_exec_channel
*src
)
605 dst
->f
[0] = src
->f
[0] - floorf( src
->f
[0] );
606 dst
->f
[1] = src
->f
[1] - floorf( src
->f
[1] );
607 dst
->f
[2] = src
->f
[2] - floorf( src
->f
[2] );
608 dst
->f
[3] = src
->f
[3] - floorf( src
->f
[3] );
613 union tgsi_exec_channel
*dst
,
614 const union tgsi_exec_channel
*src
)
617 dst
->f
[0] = util_fast_log2( src
->f
[0] );
618 dst
->f
[1] = util_fast_log2( src
->f
[1] );
619 dst
->f
[2] = util_fast_log2( src
->f
[2] );
620 dst
->f
[3] = util_fast_log2( src
->f
[3] );
622 dst
->f
[0] = logf( src
->f
[0] ) * 1.442695f
;
623 dst
->f
[1] = logf( src
->f
[1] ) * 1.442695f
;
624 dst
->f
[2] = logf( src
->f
[2] ) * 1.442695f
;
625 dst
->f
[3] = logf( src
->f
[3] ) * 1.442695f
;
631 union tgsi_exec_channel
*dst
,
632 const union tgsi_exec_channel
*src0
,
633 const union tgsi_exec_channel
*src1
,
634 const union tgsi_exec_channel
*src2
,
635 const union tgsi_exec_channel
*src3
)
637 dst
->f
[0] = src0
->f
[0] <= src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
638 dst
->f
[1] = src0
->f
[1] <= src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
639 dst
->f
[2] = src0
->f
[2] <= src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
640 dst
->f
[3] = src0
->f
[3] <= src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
645 union tgsi_exec_channel
*dst
,
646 const union tgsi_exec_channel
*src0
,
647 const union tgsi_exec_channel
*src1
,
648 const union tgsi_exec_channel
*src2
,
649 const union tgsi_exec_channel
*src3
)
651 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
652 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
653 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
654 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
659 union tgsi_exec_channel
*dst
,
660 const union tgsi_exec_channel
*src0
,
661 const union tgsi_exec_channel
*src1
)
663 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
664 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
665 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
666 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
671 union tgsi_exec_channel
*dst
,
672 const union tgsi_exec_channel
*src0
,
673 const union tgsi_exec_channel
*src1
)
675 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
676 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
677 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
678 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
684 union tgsi_exec_channel
*dst
,
685 const union tgsi_exec_channel
*src0
,
686 const union tgsi_exec_channel
*src1
)
688 dst
->u
[0] = src0
->u
[0] % src1
->u
[0];
689 dst
->u
[1] = src0
->u
[1] % src1
->u
[1];
690 dst
->u
[2] = src0
->u
[2] % src1
->u
[2];
691 dst
->u
[3] = src0
->u
[3] % src1
->u
[3];
697 union tgsi_exec_channel
*dst
,
698 const union tgsi_exec_channel
*src0
,
699 const union tgsi_exec_channel
*src1
)
701 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
702 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
703 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
704 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
710 union tgsi_exec_channel
*dst0
,
711 union tgsi_exec_channel
*dst1
,
712 const union tgsi_exec_channel
*src0
,
713 const union tgsi_exec_channel
*src1
)
715 dst1
->i
[0] = src0
->i
[0] * src1
->i
[0];
716 dst1
->i
[1] = src0
->i
[1] * src1
->i
[1];
717 dst1
->i
[2] = src0
->i
[2] * src1
->i
[2];
718 dst1
->i
[3] = src0
->i
[3] * src1
->i
[3];
729 union tgsi_exec_channel
*dst0
,
730 union tgsi_exec_channel
*dst1
,
731 const union tgsi_exec_channel
*src0
,
732 const union tgsi_exec_channel
*src1
)
734 dst1
->u
[0] = src0
->u
[0] * src1
->u
[0];
735 dst1
->u
[1] = src0
->u
[1] * src1
->u
[1];
736 dst1
->u
[2] = src0
->u
[2] * src1
->u
[2];
737 dst1
->u
[3] = src0
->u
[3] * src1
->u
[3];
749 union tgsi_exec_channel
*dst
,
750 const union tgsi_exec_channel
*src0
,
751 const union tgsi_exec_channel
*src1
,
752 const union tgsi_exec_channel
*src2
)
754 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
755 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
756 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
757 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
763 union tgsi_exec_channel
*dst
,
764 const union tgsi_exec_channel
*src
)
766 dst
->f
[0] = -src
->f
[0];
767 dst
->f
[1] = -src
->f
[1];
768 dst
->f
[2] = -src
->f
[2];
769 dst
->f
[3] = -src
->f
[3];
774 union tgsi_exec_channel
*dst
,
775 const union tgsi_exec_channel
*src0
,
776 const union tgsi_exec_channel
*src1
)
779 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
780 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
781 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
782 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
784 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
785 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
786 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
787 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
793 union tgsi_exec_channel
*dst
,
794 const union tgsi_exec_channel
*src
)
796 dst
->f
[0] = floorf( src
->f
[0] + 0.5f
);
797 dst
->f
[1] = floorf( src
->f
[1] + 0.5f
);
798 dst
->f
[2] = floorf( src
->f
[2] + 0.5f
);
799 dst
->f
[3] = floorf( src
->f
[3] + 0.5f
);
804 union tgsi_exec_channel
*dst
,
805 const union tgsi_exec_channel
*src
)
807 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
808 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
809 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
810 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
815 union tgsi_exec_channel
*dst
,
816 const union tgsi_exec_channel
*src0
)
818 dst
->f
[0] = (float) (int) src0
->f
[0];
819 dst
->f
[1] = (float) (int) src0
->f
[1];
820 dst
->f
[2] = (float) (int) src0
->f
[2];
821 dst
->f
[3] = (float) (int) src0
->f
[3];
826 union tgsi_exec_channel
*dst
,
827 const union tgsi_exec_channel
*src
)
829 dst
->f
[0] = sinf( src
->f
[0] );
830 dst
->f
[1] = sinf( src
->f
[1] );
831 dst
->f
[2] = sinf( src
->f
[2] );
832 dst
->f
[3] = sinf( src
->f
[3] );
836 micro_sqrt( union tgsi_exec_channel
*dst
,
837 const union tgsi_exec_channel
*src
)
839 dst
->f
[0] = sqrtf( src
->f
[0] );
840 dst
->f
[1] = sqrtf( src
->f
[1] );
841 dst
->f
[2] = sqrtf( src
->f
[2] );
842 dst
->f
[3] = sqrtf( src
->f
[3] );
847 union tgsi_exec_channel
*dst
,
848 const union tgsi_exec_channel
*src0
,
849 const union tgsi_exec_channel
*src1
)
851 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
852 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
853 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
854 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
858 fetch_src_file_channel(
859 const struct tgsi_exec_machine
*mach
,
862 const union tgsi_exec_channel
*index
,
863 union tgsi_exec_channel
*chan
)
871 case TGSI_FILE_CONSTANT
:
872 assert(mach
->Consts
);
876 chan
->f
[0] = mach
->Consts
[index
->i
[0]][swizzle
];
880 chan
->f
[1] = mach
->Consts
[index
->i
[1]][swizzle
];
884 chan
->f
[2] = mach
->Consts
[index
->i
[2]][swizzle
];
888 chan
->f
[3] = mach
->Consts
[index
->i
[3]][swizzle
];
891 case TGSI_FILE_INPUT
:
892 case TGSI_FILE_SYSTEM_VALUE
:
893 chan
->u
[0] = mach
->Inputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
894 chan
->u
[1] = mach
->Inputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
895 chan
->u
[2] = mach
->Inputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
896 chan
->u
[3] = mach
->Inputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
899 case TGSI_FILE_TEMPORARY
:
900 assert(index
->i
[0] < TGSI_EXEC_NUM_TEMPS
);
901 chan
->u
[0] = mach
->Temps
[index
->i
[0]].xyzw
[swizzle
].u
[0];
902 chan
->u
[1] = mach
->Temps
[index
->i
[1]].xyzw
[swizzle
].u
[1];
903 chan
->u
[2] = mach
->Temps
[index
->i
[2]].xyzw
[swizzle
].u
[2];
904 chan
->u
[3] = mach
->Temps
[index
->i
[3]].xyzw
[swizzle
].u
[3];
907 case TGSI_FILE_IMMEDIATE
:
908 assert( index
->i
[0] < (int) mach
->ImmLimit
);
909 chan
->f
[0] = mach
->Imms
[index
->i
[0]][swizzle
];
910 assert( index
->i
[1] < (int) mach
->ImmLimit
);
911 chan
->f
[1] = mach
->Imms
[index
->i
[1]][swizzle
];
912 assert( index
->i
[2] < (int) mach
->ImmLimit
);
913 chan
->f
[2] = mach
->Imms
[index
->i
[2]][swizzle
];
914 assert( index
->i
[3] < (int) mach
->ImmLimit
);
915 chan
->f
[3] = mach
->Imms
[index
->i
[3]][swizzle
];
918 case TGSI_FILE_ADDRESS
:
919 chan
->u
[0] = mach
->Addrs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
920 chan
->u
[1] = mach
->Addrs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
921 chan
->u
[2] = mach
->Addrs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
922 chan
->u
[3] = mach
->Addrs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
925 case TGSI_FILE_PREDICATE
:
926 assert(index
->i
[0] < TGSI_EXEC_NUM_PREDS
);
927 assert(index
->i
[1] < TGSI_EXEC_NUM_PREDS
);
928 assert(index
->i
[2] < TGSI_EXEC_NUM_PREDS
);
929 assert(index
->i
[3] < TGSI_EXEC_NUM_PREDS
);
930 chan
->u
[0] = mach
->Predicates
[0].xyzw
[swizzle
].u
[0];
931 chan
->u
[1] = mach
->Predicates
[0].xyzw
[swizzle
].u
[1];
932 chan
->u
[2] = mach
->Predicates
[0].xyzw
[swizzle
].u
[2];
933 chan
->u
[3] = mach
->Predicates
[0].xyzw
[swizzle
].u
[3];
936 case TGSI_FILE_OUTPUT
:
937 /* vertex/fragment output vars can be read too */
938 chan
->u
[0] = mach
->Outputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
939 chan
->u
[1] = mach
->Outputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
940 chan
->u
[2] = mach
->Outputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
941 chan
->u
[3] = mach
->Outputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
956 const struct tgsi_exec_machine
*mach
,
957 union tgsi_exec_channel
*chan
,
958 const struct tgsi_full_src_register
*reg
,
959 const uint chan_index
)
961 union tgsi_exec_channel index
;
964 /* We start with a direct index into a register file.
968 * file = Register.File
969 * [1] = Register.Index
974 index
.i
[3] = reg
->Register
.Index
;
976 /* There is an extra source register that indirectly subscripts
977 * a register file. The direct index now becomes an offset
978 * that is being added to the indirect register.
982 * ind = Indirect.File
983 * [2] = Indirect.Index
984 * .x = Indirect.SwizzleX
986 if (reg
->Register
.Indirect
) {
987 union tgsi_exec_channel index2
;
988 union tgsi_exec_channel indir_index
;
989 const uint execmask
= mach
->ExecMask
;
992 /* which address register (always zero now) */
996 index2
.i
[3] = reg
->Indirect
.Index
;
998 /* get current value of address register[swizzle] */
999 swizzle
= tgsi_util_get_src_register_swizzle( ®
->Indirect
, CHAN_X
);
1000 fetch_src_file_channel(
1007 /* add value of address register to the offset */
1008 index
.i
[0] += (int) indir_index
.f
[0];
1009 index
.i
[1] += (int) indir_index
.f
[1];
1010 index
.i
[2] += (int) indir_index
.f
[2];
1011 index
.i
[3] += (int) indir_index
.f
[3];
1013 /* for disabled execution channels, zero-out the index to
1014 * avoid using a potential garbage value.
1016 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1017 if ((execmask
& (1 << i
)) == 0)
1022 /* There is an extra source register that is a second
1023 * subscript to a register file. Effectively it means that
1024 * the register file is actually a 2D array of registers.
1026 * file[1][3] == file[1*sizeof(file[1])+3],
1028 * [3] = Dimension.Index
1030 if (reg
->Register
.Dimension
) {
1031 /* The size of the first-order array depends on the register file type.
1032 * We need to multiply the index to the first array to get an effective,
1033 * "flat" index that points to the beginning of the second-order array.
1035 switch (reg
->Register
.File
) {
1036 case TGSI_FILE_INPUT
:
1037 case TGSI_FILE_SYSTEM_VALUE
:
1038 index
.i
[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1039 index
.i
[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1040 index
.i
[2] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1041 index
.i
[3] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1043 case TGSI_FILE_CONSTANT
:
1044 index
.i
[0] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1045 index
.i
[1] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1046 index
.i
[2] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1047 index
.i
[3] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1053 index
.i
[0] += reg
->Dimension
.Index
;
1054 index
.i
[1] += reg
->Dimension
.Index
;
1055 index
.i
[2] += reg
->Dimension
.Index
;
1056 index
.i
[3] += reg
->Dimension
.Index
;
1058 /* Again, the second subscript index can be addressed indirectly
1059 * identically to the first one.
1060 * Nothing stops us from indirectly addressing the indirect register,
1061 * but there is no need for that, so we won't exercise it.
1063 * file[1][ind[4].y+3],
1065 * ind = DimIndirect.File
1066 * [4] = DimIndirect.Index
1067 * .y = DimIndirect.SwizzleX
1069 if (reg
->Dimension
.Indirect
) {
1070 union tgsi_exec_channel index2
;
1071 union tgsi_exec_channel indir_index
;
1072 const uint execmask
= mach
->ExecMask
;
1078 index2
.i
[3] = reg
->DimIndirect
.Index
;
1080 swizzle
= tgsi_util_get_src_register_swizzle( ®
->DimIndirect
, CHAN_X
);
1081 fetch_src_file_channel(
1083 reg
->DimIndirect
.File
,
1088 index
.i
[0] += (int) indir_index
.f
[0];
1089 index
.i
[1] += (int) indir_index
.f
[1];
1090 index
.i
[2] += (int) indir_index
.f
[2];
1091 index
.i
[3] += (int) indir_index
.f
[3];
1093 /* for disabled execution channels, zero-out the index to
1094 * avoid using a potential garbage value.
1096 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1097 if ((execmask
& (1 << i
)) == 0)
1102 /* If by any chance there was a need for a 3D array of register
1103 * files, we would have to check whether Dimension is followed
1104 * by a dimension register and continue the saga.
1108 swizzle
= tgsi_util_get_full_src_register_swizzle( reg
, chan_index
);
1109 fetch_src_file_channel(
1116 switch (tgsi_util_get_full_src_register_sign_mode( reg
, chan_index
)) {
1117 case TGSI_UTIL_SIGN_CLEAR
:
1118 micro_abs( chan
, chan
);
1121 case TGSI_UTIL_SIGN_SET
:
1122 micro_abs( chan
, chan
);
1123 micro_neg( chan
, chan
);
1126 case TGSI_UTIL_SIGN_TOGGLE
:
1127 micro_neg( chan
, chan
);
1130 case TGSI_UTIL_SIGN_KEEP
:
1137 struct tgsi_exec_machine
*mach
,
1138 const union tgsi_exec_channel
*chan
,
1139 const struct tgsi_full_dst_register
*reg
,
1140 const struct tgsi_full_instruction
*inst
,
1144 union tgsi_exec_channel null
;
1145 union tgsi_exec_channel
*dst
;
1146 uint execmask
= mach
->ExecMask
;
1147 int offset
= 0; /* indirection offset */
1151 check_inf_or_nan(chan
);
1154 /* There is an extra source register that indirectly subscripts
1155 * a register file. The direct index now becomes an offset
1156 * that is being added to the indirect register.
1160 * ind = Indirect.File
1161 * [2] = Indirect.Index
1162 * .x = Indirect.SwizzleX
1164 if (reg
->Register
.Indirect
) {
1165 union tgsi_exec_channel index
;
1166 union tgsi_exec_channel indir_index
;
1169 /* which address register (always zero for now) */
1173 index
.i
[3] = reg
->Indirect
.Index
;
1175 /* get current value of address register[swizzle] */
1176 swizzle
= tgsi_util_get_src_register_swizzle( ®
->Indirect
, CHAN_X
);
1178 /* fetch values from the address/indirection register */
1179 fetch_src_file_channel(
1186 /* save indirection offset */
1187 offset
= (int) indir_index
.f
[0];
1190 switch (reg
->Register
.File
) {
1191 case TGSI_FILE_NULL
:
1195 case TGSI_FILE_OUTPUT
:
1196 index
= mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1197 + reg
->Register
.Index
;
1198 dst
= &mach
->Outputs
[offset
+ index
].xyzw
[chan_index
];
1200 if (TGSI_PROCESSOR_GEOMETRY
== mach
->Processor
) {
1201 fprintf(stderr
, "STORING OUT[%d] mask(%d), = (", offset
+ index
, execmask
);
1202 for (i
= 0; i
< QUAD_SIZE
; i
++)
1203 if (execmask
& (1 << i
))
1204 fprintf(stderr
, "%f, ", chan
->f
[i
]);
1205 fprintf(stderr
, ")\n");
1210 case TGSI_FILE_TEMPORARY
:
1211 index
= reg
->Register
.Index
;
1212 assert( index
< TGSI_EXEC_NUM_TEMPS
);
1213 dst
= &mach
->Temps
[offset
+ index
].xyzw
[chan_index
];
1216 case TGSI_FILE_ADDRESS
:
1217 index
= reg
->Register
.Index
;
1218 dst
= &mach
->Addrs
[index
].xyzw
[chan_index
];
1221 case TGSI_FILE_LOOP
:
1222 assert(reg
->Register
.Index
== 0);
1223 assert(mach
->LoopCounterStackTop
> 0);
1224 assert(chan_index
== CHAN_X
);
1225 dst
= &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[chan_index
];
1228 case TGSI_FILE_PREDICATE
:
1229 index
= reg
->Register
.Index
;
1230 assert(index
< TGSI_EXEC_NUM_PREDS
);
1231 dst
= &mach
->Predicates
[index
].xyzw
[chan_index
];
1239 if (inst
->Instruction
.Predicate
) {
1241 union tgsi_exec_channel
*pred
;
1243 switch (chan_index
) {
1245 swizzle
= inst
->Predicate
.SwizzleX
;
1248 swizzle
= inst
->Predicate
.SwizzleY
;
1251 swizzle
= inst
->Predicate
.SwizzleZ
;
1254 swizzle
= inst
->Predicate
.SwizzleW
;
1261 assert(inst
->Predicate
.Index
== 0);
1263 pred
= &mach
->Predicates
[inst
->Predicate
.Index
].xyzw
[swizzle
];
1265 if (inst
->Predicate
.Negate
) {
1266 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1268 execmask
&= ~(1 << i
);
1272 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1274 execmask
&= ~(1 << i
);
1280 switch (inst
->Instruction
.Saturate
) {
1282 for (i
= 0; i
< QUAD_SIZE
; i
++)
1283 if (execmask
& (1 << i
))
1284 dst
->i
[i
] = chan
->i
[i
];
1287 case TGSI_SAT_ZERO_ONE
:
1288 for (i
= 0; i
< QUAD_SIZE
; i
++)
1289 if (execmask
& (1 << i
)) {
1290 if (chan
->f
[i
] < 0.0f
)
1292 else if (chan
->f
[i
] > 1.0f
)
1295 dst
->i
[i
] = chan
->i
[i
];
1299 case TGSI_SAT_MINUS_PLUS_ONE
:
1300 for (i
= 0; i
< QUAD_SIZE
; i
++)
1301 if (execmask
& (1 << i
)) {
1302 if (chan
->f
[i
] < -1.0f
)
1304 else if (chan
->f
[i
] > 1.0f
)
1307 dst
->i
[i
] = chan
->i
[i
];
1316 #define FETCH(VAL,INDEX,CHAN)\
1317 fetch_source (mach, VAL, &inst->Src[INDEX], CHAN)
1319 #define STORE(VAL,INDEX,CHAN)\
1320 store_dest (mach, VAL, &inst->Dst[INDEX], inst, CHAN )
1324 * Execute ARB-style KIL which is predicated by a src register.
1325 * Kill fragment if any of the four values is less than zero.
1328 exec_kil(struct tgsi_exec_machine
*mach
,
1329 const struct tgsi_full_instruction
*inst
)
1333 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1334 union tgsi_exec_channel r
[1];
1336 /* This mask stores component bits that were already tested. */
1339 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1344 /* unswizzle channel */
1345 swizzle
= tgsi_util_get_full_src_register_swizzle (
1349 /* check if the component has not been already tested */
1350 if (uniquemask
& (1 << swizzle
))
1352 uniquemask
|= 1 << swizzle
;
1354 FETCH(&r
[0], 0, chan_index
);
1355 for (i
= 0; i
< 4; i
++)
1356 if (r
[0].f
[i
] < 0.0f
)
1360 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1364 * Execute NVIDIA-style KIL which is predicated by a condition code.
1365 * Kill fragment if the condition code is TRUE.
1368 exec_kilp(struct tgsi_exec_machine
*mach
,
1369 const struct tgsi_full_instruction
*inst
)
1371 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1373 /* "unconditional" kil */
1374 kilmask
= mach
->ExecMask
;
1375 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1379 emit_vertex(struct tgsi_exec_machine
*mach
)
1381 /* FIXME: check for exec mask correctly
1383 for (i = 0; i < QUAD_SIZE; ++i) {
1384 if ((mach->ExecMask & (1 << i)))
1386 if (mach
->ExecMask
) {
1387 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += mach
->NumOutputs
;
1388 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
1393 emit_primitive(struct tgsi_exec_machine
*mach
)
1395 unsigned *prim_count
= &mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0];
1396 /* FIXME: check for exec mask correctly
1398 for (i = 0; i < QUAD_SIZE; ++i) {
1399 if ((mach->ExecMask & (1 << i)))
1401 if (mach
->ExecMask
) {
1403 debug_assert((*prim_count
* mach
->NumOutputs
) < mach
->MaxGeometryShaderOutputs
);
1404 mach
->Primitives
[*prim_count
] = 0;
1409 * Fetch a four texture samples using STR texture coordinates.
1412 fetch_texel( struct tgsi_sampler
*sampler
,
1413 const union tgsi_exec_channel
*s
,
1414 const union tgsi_exec_channel
*t
,
1415 const union tgsi_exec_channel
*p
,
1416 float lodbias
, /* XXX should be float[4] */
1417 union tgsi_exec_channel
*r
,
1418 union tgsi_exec_channel
*g
,
1419 union tgsi_exec_channel
*b
,
1420 union tgsi_exec_channel
*a
)
1423 float rgba
[NUM_CHANNELS
][QUAD_SIZE
];
1425 sampler
->get_samples(sampler
, s
->f
, t
->f
, p
->f
, lodbias
, rgba
);
1427 for (j
= 0; j
< 4; j
++) {
1428 r
->f
[j
] = rgba
[0][j
];
1429 g
->f
[j
] = rgba
[1][j
];
1430 b
->f
[j
] = rgba
[2][j
];
1431 a
->f
[j
] = rgba
[3][j
];
1437 exec_tex(struct tgsi_exec_machine
*mach
,
1438 const struct tgsi_full_instruction
*inst
,
1442 const uint unit
= inst
->Src
[1].Register
.Index
;
1443 union tgsi_exec_channel r
[4];
1447 /* debug_printf("Sampler %u unit %u\n", sampler, unit); */
1449 switch (inst
->Texture
.Texture
) {
1450 case TGSI_TEXTURE_1D
:
1451 case TGSI_TEXTURE_SHADOW1D
:
1453 FETCH(&r
[0], 0, CHAN_X
);
1456 FETCH(&r
[1], 0, CHAN_W
);
1457 micro_div( &r
[0], &r
[0], &r
[1] );
1461 FETCH(&r
[1], 0, CHAN_W
);
1462 lodBias
= r
[2].f
[0];
1467 fetch_texel(mach
->Samplers
[unit
],
1468 &r
[0], &ZeroVec
, &ZeroVec
, lodBias
, /* S, T, P, BIAS */
1469 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1472 case TGSI_TEXTURE_2D
:
1473 case TGSI_TEXTURE_RECT
:
1474 case TGSI_TEXTURE_SHADOW2D
:
1475 case TGSI_TEXTURE_SHADOWRECT
:
1477 FETCH(&r
[0], 0, CHAN_X
);
1478 FETCH(&r
[1], 0, CHAN_Y
);
1479 FETCH(&r
[2], 0, CHAN_Z
);
1482 FETCH(&r
[3], 0, CHAN_W
);
1483 micro_div( &r
[0], &r
[0], &r
[3] );
1484 micro_div( &r
[1], &r
[1], &r
[3] );
1485 micro_div( &r
[2], &r
[2], &r
[3] );
1489 FETCH(&r
[3], 0, CHAN_W
);
1490 lodBias
= r
[3].f
[0];
1495 fetch_texel(mach
->Samplers
[unit
],
1496 &r
[0], &r
[1], &r
[2], lodBias
, /* inputs */
1497 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1500 case TGSI_TEXTURE_3D
:
1501 case TGSI_TEXTURE_CUBE
:
1503 FETCH(&r
[0], 0, CHAN_X
);
1504 FETCH(&r
[1], 0, CHAN_Y
);
1505 FETCH(&r
[2], 0, CHAN_Z
);
1508 FETCH(&r
[3], 0, CHAN_W
);
1509 micro_div( &r
[0], &r
[0], &r
[3] );
1510 micro_div( &r
[1], &r
[1], &r
[3] );
1511 micro_div( &r
[2], &r
[2], &r
[3] );
1515 FETCH(&r
[3], 0, CHAN_W
);
1516 lodBias
= r
[3].f
[0];
1521 fetch_texel(mach
->Samplers
[unit
],
1522 &r
[0], &r
[1], &r
[2], lodBias
,
1523 &r
[0], &r
[1], &r
[2], &r
[3]);
1530 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1531 STORE( &r
[chan_index
], 0, chan_index
);
1536 exec_txd(struct tgsi_exec_machine
*mach
,
1537 const struct tgsi_full_instruction
*inst
)
1539 const uint unit
= inst
->Src
[3].Register
.Index
;
1540 union tgsi_exec_channel r
[4];
1544 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1547 switch (inst
->Texture
.Texture
) {
1548 case TGSI_TEXTURE_1D
:
1549 case TGSI_TEXTURE_SHADOW1D
:
1551 FETCH(&r
[0], 0, CHAN_X
);
1553 fetch_texel(mach
->Samplers
[unit
],
1554 &r
[0], &ZeroVec
, &ZeroVec
, 0.0f
, /* S, T, P, BIAS */
1555 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1558 case TGSI_TEXTURE_2D
:
1559 case TGSI_TEXTURE_RECT
:
1560 case TGSI_TEXTURE_SHADOW2D
:
1561 case TGSI_TEXTURE_SHADOWRECT
:
1563 FETCH(&r
[0], 0, CHAN_X
);
1564 FETCH(&r
[1], 0, CHAN_Y
);
1565 FETCH(&r
[2], 0, CHAN_Z
);
1567 fetch_texel(mach
->Samplers
[unit
],
1568 &r
[0], &r
[1], &r
[2], 0.0f
, /* inputs */
1569 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1572 case TGSI_TEXTURE_3D
:
1573 case TGSI_TEXTURE_CUBE
:
1575 FETCH(&r
[0], 0, CHAN_X
);
1576 FETCH(&r
[1], 0, CHAN_Y
);
1577 FETCH(&r
[2], 0, CHAN_Z
);
1579 fetch_texel(mach
->Samplers
[unit
],
1580 &r
[0], &r
[1], &r
[2], 0.0f
,
1581 &r
[0], &r
[1], &r
[2], &r
[3]);
1588 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
1589 STORE(&r
[chan_index
], 0, chan_index
);
1595 * Evaluate a constant-valued coefficient at the position of the
1600 struct tgsi_exec_machine
*mach
,
1606 for( i
= 0; i
< QUAD_SIZE
; i
++ ) {
1607 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
1612 * Evaluate a linear-valued coefficient at the position of the
1617 struct tgsi_exec_machine
*mach
,
1621 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1622 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1623 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1624 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1625 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1626 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
1627 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
1628 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
1629 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
1633 * Evaluate a perspective-valued coefficient at the position of the
1637 eval_perspective_coef(
1638 struct tgsi_exec_machine
*mach
,
1642 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1643 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1644 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1645 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1646 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1647 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
1648 /* divide by W here */
1649 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
1650 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
1651 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
1652 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
1656 typedef void (* eval_coef_func
)(
1657 struct tgsi_exec_machine
*mach
,
1662 exec_declaration(struct tgsi_exec_machine
*mach
,
1663 const struct tgsi_full_declaration
*decl
)
1665 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
1666 if (decl
->Declaration
.File
== TGSI_FILE_INPUT
||
1667 decl
->Declaration
.File
== TGSI_FILE_SYSTEM_VALUE
) {
1668 uint first
, last
, mask
;
1670 first
= decl
->Range
.First
;
1671 last
= decl
->Range
.Last
;
1672 mask
= decl
->Declaration
.UsageMask
;
1674 if (decl
->Semantic
.Name
== TGSI_SEMANTIC_POSITION
) {
1675 assert(decl
->Semantic
.Index
== 0);
1676 assert(first
== last
);
1677 assert(mask
== TGSI_WRITEMASK_XYZW
);
1679 mach
->Inputs
[first
] = mach
->QuadPos
;
1680 } else if (decl
->Semantic
.Name
== TGSI_SEMANTIC_FACE
) {
1683 assert(decl
->Semantic
.Index
== 0);
1684 assert(first
== last
);
1686 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1687 mach
->Inputs
[first
].xyzw
[0].f
[i
] = mach
->Face
;
1690 eval_coef_func eval
;
1693 switch (decl
->Declaration
.Interpolate
) {
1694 case TGSI_INTERPOLATE_CONSTANT
:
1695 eval
= eval_constant_coef
;
1698 case TGSI_INTERPOLATE_LINEAR
:
1699 eval
= eval_linear_coef
;
1702 case TGSI_INTERPOLATE_PERSPECTIVE
:
1703 eval
= eval_perspective_coef
;
1711 for (j
= 0; j
< NUM_CHANNELS
; j
++) {
1712 if (mask
& (1 << j
)) {
1713 for (i
= first
; i
<= last
; i
++) {
1723 typedef void (* micro_op
)(union tgsi_exec_channel
*dst
,
1724 const union tgsi_exec_channel
*src
);
1727 exec_vector_unary(struct tgsi_exec_machine
*mach
,
1728 const struct tgsi_full_instruction
*inst
,
1732 struct tgsi_exec_vector dst
;
1734 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1735 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1736 union tgsi_exec_channel src
;
1738 fetch_source(mach
, &src
, &inst
->Src
[0], chan
);
1739 op(&dst
.xyzw
[chan
], &src
);
1742 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1743 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1744 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
);
1750 exec_vector_binary(struct tgsi_exec_machine
*mach
,
1751 const struct tgsi_full_instruction
*inst
,
1755 struct tgsi_exec_vector dst
;
1757 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1758 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1759 union tgsi_exec_channel src
[2];
1761 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
);
1762 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
);
1763 op(&dst
.xyzw
[chan
], src
);
1766 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1767 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1768 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
);
1774 exec_vector_trinary(struct tgsi_exec_machine
*mach
,
1775 const struct tgsi_full_instruction
*inst
,
1779 struct tgsi_exec_vector dst
;
1781 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1782 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1783 union tgsi_exec_channel src
[3];
1785 fetch_source(mach
, &src
[0], &inst
->Src
[0], chan
);
1786 fetch_source(mach
, &src
[1], &inst
->Src
[1], chan
);
1787 fetch_source(mach
, &src
[2], &inst
->Src
[2], chan
);
1788 op(&dst
.xyzw
[chan
], src
);
1791 for (chan
= 0; chan
< NUM_CHANNELS
; chan
++) {
1792 if (inst
->Dst
[0].Register
.WriteMask
& (1 << chan
)) {
1793 store_dest(mach
, &dst
.xyzw
[chan
], &inst
->Dst
[0], inst
, chan
);
1799 exec_break(struct tgsi_exec_machine
*mach
)
1801 if (mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_LOOP
) {
1802 /* turn off loop channels for each enabled exec channel */
1803 mach
->LoopMask
&= ~mach
->ExecMask
;
1804 /* Todo: if mach->LoopMask == 0, jump to end of loop */
1805 UPDATE_EXEC_MASK(mach
);
1807 assert(mach
->BreakType
== TGSI_EXEC_BREAK_INSIDE_SWITCH
);
1809 mach
->Switch
.mask
= 0x0;
1811 UPDATE_EXEC_MASK(mach
);
1816 exec_switch(struct tgsi_exec_machine
*mach
,
1817 const struct tgsi_full_instruction
*inst
)
1819 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
1820 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
1822 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
1823 fetch_source(mach
, &mach
->Switch
.selector
, &inst
->Src
[0], CHAN_X
);
1824 mach
->Switch
.mask
= 0x0;
1825 mach
->Switch
.defaultMask
= 0x0;
1827 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
1828 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_SWITCH
;
1830 UPDATE_EXEC_MASK(mach
);
1834 exec_case(struct tgsi_exec_machine
*mach
,
1835 const struct tgsi_full_instruction
*inst
)
1837 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
1838 union tgsi_exec_channel src
;
1841 fetch_source(mach
, &src
, &inst
->Src
[0], CHAN_X
);
1843 if (mach
->Switch
.selector
.u
[0] == src
.u
[0]) {
1846 if (mach
->Switch
.selector
.u
[1] == src
.u
[1]) {
1849 if (mach
->Switch
.selector
.u
[2] == src
.u
[2]) {
1852 if (mach
->Switch
.selector
.u
[3] == src
.u
[3]) {
1856 mach
->Switch
.defaultMask
|= mask
;
1858 mach
->Switch
.mask
|= mask
& prevMask
;
1860 UPDATE_EXEC_MASK(mach
);
1864 exec_default(struct tgsi_exec_machine
*mach
)
1866 uint prevMask
= mach
->SwitchStack
[mach
->SwitchStackTop
- 1].mask
;
1868 mach
->Switch
.mask
|= ~mach
->Switch
.defaultMask
& prevMask
;
1870 UPDATE_EXEC_MASK(mach
);
1874 exec_endswitch(struct tgsi_exec_machine
*mach
)
1876 mach
->Switch
= mach
->SwitchStack
[--mach
->SwitchStackTop
];
1877 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
1879 UPDATE_EXEC_MASK(mach
);
1883 micro_i2f(union tgsi_exec_channel
*dst
,
1884 const union tgsi_exec_channel
*src
)
1886 dst
->f
[0] = (float)src
->i
[0];
1887 dst
->f
[1] = (float)src
->i
[1];
1888 dst
->f
[2] = (float)src
->i
[2];
1889 dst
->f
[3] = (float)src
->i
[3];
1893 micro_not(union tgsi_exec_channel
*dst
,
1894 const union tgsi_exec_channel
*src
)
1896 dst
->u
[0] = ~src
->u
[0];
1897 dst
->u
[1] = ~src
->u
[1];
1898 dst
->u
[2] = ~src
->u
[2];
1899 dst
->u
[3] = ~src
->u
[3];
1903 micro_shl(union tgsi_exec_channel
*dst
,
1904 const union tgsi_exec_channel
*src
)
1906 dst
->u
[0] = src
[0].u
[0] << src
[1].u
[0];
1907 dst
->u
[1] = src
[0].u
[1] << src
[1].u
[1];
1908 dst
->u
[2] = src
[0].u
[2] << src
[1].u
[2];
1909 dst
->u
[3] = src
[0].u
[3] << src
[1].u
[3];
1913 micro_and(union tgsi_exec_channel
*dst
,
1914 const union tgsi_exec_channel
*src
)
1916 dst
->u
[0] = src
[0].u
[0] & src
[1].u
[0];
1917 dst
->u
[1] = src
[0].u
[1] & src
[1].u
[1];
1918 dst
->u
[2] = src
[0].u
[2] & src
[1].u
[2];
1919 dst
->u
[3] = src
[0].u
[3] & src
[1].u
[3];
1923 micro_or(union tgsi_exec_channel
*dst
,
1924 const union tgsi_exec_channel
*src
)
1926 dst
->u
[0] = src
[0].u
[0] | src
[1].u
[0];
1927 dst
->u
[1] = src
[0].u
[1] | src
[1].u
[1];
1928 dst
->u
[2] = src
[0].u
[2] | src
[1].u
[2];
1929 dst
->u
[3] = src
[0].u
[3] | src
[1].u
[3];
1933 micro_xor(union tgsi_exec_channel
*dst
,
1934 const union tgsi_exec_channel
*src
)
1936 dst
->u
[0] = src
[0].u
[0] ^ src
[1].u
[0];
1937 dst
->u
[1] = src
[0].u
[1] ^ src
[1].u
[1];
1938 dst
->u
[2] = src
[0].u
[2] ^ src
[1].u
[2];
1939 dst
->u
[3] = src
[0].u
[3] ^ src
[1].u
[3];
1943 micro_f2i(union tgsi_exec_channel
*dst
,
1944 const union tgsi_exec_channel
*src
)
1946 dst
->i
[0] = (int)src
->f
[0];
1947 dst
->i
[1] = (int)src
->f
[1];
1948 dst
->i
[2] = (int)src
->f
[2];
1949 dst
->i
[3] = (int)src
->f
[3];
1953 micro_idiv(union tgsi_exec_channel
*dst
,
1954 const union tgsi_exec_channel
*src
)
1956 dst
->i
[0] = src
[0].i
[0] / src
[1].i
[0];
1957 dst
->i
[1] = src
[0].i
[1] / src
[1].i
[1];
1958 dst
->i
[2] = src
[0].i
[2] / src
[1].i
[2];
1959 dst
->i
[3] = src
[0].i
[3] / src
[1].i
[3];
1963 micro_imax(union tgsi_exec_channel
*dst
,
1964 const union tgsi_exec_channel
*src
)
1966 dst
->i
[0] = src
[0].i
[0] > src
[1].i
[0] ? src
[0].i
[0] : src
[1].i
[0];
1967 dst
->i
[1] = src
[0].i
[1] > src
[1].i
[1] ? src
[0].i
[1] : src
[1].i
[1];
1968 dst
->i
[2] = src
[0].i
[2] > src
[1].i
[2] ? src
[0].i
[2] : src
[1].i
[2];
1969 dst
->i
[3] = src
[0].i
[3] > src
[1].i
[3] ? src
[0].i
[3] : src
[1].i
[3];
1973 micro_imin(union tgsi_exec_channel
*dst
,
1974 const union tgsi_exec_channel
*src
)
1976 dst
->i
[0] = src
[0].i
[0] < src
[1].i
[0] ? src
[0].i
[0] : src
[1].i
[0];
1977 dst
->i
[1] = src
[0].i
[1] < src
[1].i
[1] ? src
[0].i
[1] : src
[1].i
[1];
1978 dst
->i
[2] = src
[0].i
[2] < src
[1].i
[2] ? src
[0].i
[2] : src
[1].i
[2];
1979 dst
->i
[3] = src
[0].i
[3] < src
[1].i
[3] ? src
[0].i
[3] : src
[1].i
[3];
1983 micro_ineg(union tgsi_exec_channel
*dst
,
1984 const union tgsi_exec_channel
*src
)
1986 dst
->i
[0] = -src
->i
[0];
1987 dst
->i
[1] = -src
->i
[1];
1988 dst
->i
[2] = -src
->i
[2];
1989 dst
->i
[3] = -src
->i
[3];
1993 micro_isge(union tgsi_exec_channel
*dst
,
1994 const union tgsi_exec_channel
*src
)
1996 dst
->i
[0] = src
[0].i
[0] >= src
[1].i
[0] ? -1 : 0;
1997 dst
->i
[1] = src
[0].i
[1] >= src
[1].i
[1] ? -1 : 0;
1998 dst
->i
[2] = src
[0].i
[2] >= src
[1].i
[2] ? -1 : 0;
1999 dst
->i
[3] = src
[0].i
[3] >= src
[1].i
[3] ? -1 : 0;
2003 micro_ishr(union tgsi_exec_channel
*dst
,
2004 const union tgsi_exec_channel
*src
)
2006 dst
->i
[0] = src
[0].i
[0] >> src
[1].i
[0];
2007 dst
->i
[1] = src
[0].i
[1] >> src
[1].i
[1];
2008 dst
->i
[2] = src
[0].i
[2] >> src
[1].i
[2];
2009 dst
->i
[3] = src
[0].i
[3] >> src
[1].i
[3];
2013 micro_islt(union tgsi_exec_channel
*dst
,
2014 const union tgsi_exec_channel
*src
)
2016 dst
->i
[0] = src
[0].i
[0] < src
[1].i
[0] ? -1 : 0;
2017 dst
->i
[1] = src
[0].i
[1] < src
[1].i
[1] ? -1 : 0;
2018 dst
->i
[2] = src
[0].i
[2] < src
[1].i
[2] ? -1 : 0;
2019 dst
->i
[3] = src
[0].i
[3] < src
[1].i
[3] ? -1 : 0;
2023 micro_f2u(union tgsi_exec_channel
*dst
,
2024 const union tgsi_exec_channel
*src
)
2026 dst
->u
[0] = (uint
)src
->f
[0];
2027 dst
->u
[1] = (uint
)src
->f
[1];
2028 dst
->u
[2] = (uint
)src
->f
[2];
2029 dst
->u
[3] = (uint
)src
->f
[3];
2033 micro_u2f(union tgsi_exec_channel
*dst
,
2034 const union tgsi_exec_channel
*src
)
2036 dst
->f
[0] = (float)src
->u
[0];
2037 dst
->f
[1] = (float)src
->u
[1];
2038 dst
->f
[2] = (float)src
->u
[2];
2039 dst
->f
[3] = (float)src
->u
[3];
2043 micro_uadd(union tgsi_exec_channel
*dst
,
2044 const union tgsi_exec_channel
*src
)
2046 dst
->u
[0] = src
[0].u
[0] + src
[1].u
[0];
2047 dst
->u
[1] = src
[0].u
[1] + src
[1].u
[1];
2048 dst
->u
[2] = src
[0].u
[2] + src
[1].u
[2];
2049 dst
->u
[3] = src
[0].u
[3] + src
[1].u
[3];
2053 micro_udiv(union tgsi_exec_channel
*dst
,
2054 const union tgsi_exec_channel
*src
)
2056 dst
->u
[0] = src
[0].u
[0] / src
[1].u
[0];
2057 dst
->u
[1] = src
[0].u
[1] / src
[1].u
[1];
2058 dst
->u
[2] = src
[0].u
[2] / src
[1].u
[2];
2059 dst
->u
[3] = src
[0].u
[3] / src
[1].u
[3];
2063 micro_umad(union tgsi_exec_channel
*dst
,
2064 const union tgsi_exec_channel
*src
)
2066 dst
->u
[0] = src
[0].u
[0] * src
[1].u
[0] + src
[2].u
[0];
2067 dst
->u
[1] = src
[0].u
[1] * src
[1].u
[1] + src
[2].u
[1];
2068 dst
->u
[2] = src
[0].u
[2] * src
[1].u
[2] + src
[2].u
[2];
2069 dst
->u
[3] = src
[0].u
[3] * src
[1].u
[3] + src
[2].u
[3];
2073 micro_umax(union tgsi_exec_channel
*dst
,
2074 const union tgsi_exec_channel
*src
)
2076 dst
->u
[0] = src
[0].u
[0] > src
[1].u
[0] ? src
[0].u
[0] : src
[1].u
[0];
2077 dst
->u
[1] = src
[0].u
[1] > src
[1].u
[1] ? src
[0].u
[1] : src
[1].u
[1];
2078 dst
->u
[2] = src
[0].u
[2] > src
[1].u
[2] ? src
[0].u
[2] : src
[1].u
[2];
2079 dst
->u
[3] = src
[0].u
[3] > src
[1].u
[3] ? src
[0].u
[3] : src
[1].u
[3];
2083 micro_umin(union tgsi_exec_channel
*dst
,
2084 const union tgsi_exec_channel
*src
)
2086 dst
->u
[0] = src
[0].u
[0] < src
[1].u
[0] ? src
[0].u
[0] : src
[1].u
[0];
2087 dst
->u
[1] = src
[0].u
[1] < src
[1].u
[1] ? src
[0].u
[1] : src
[1].u
[1];
2088 dst
->u
[2] = src
[0].u
[2] < src
[1].u
[2] ? src
[0].u
[2] : src
[1].u
[2];
2089 dst
->u
[3] = src
[0].u
[3] < src
[1].u
[3] ? src
[0].u
[3] : src
[1].u
[3];
2093 micro_umod(union tgsi_exec_channel
*dst
,
2094 const union tgsi_exec_channel
*src
)
2096 dst
->u
[0] = src
[0].u
[0] % src
[1].u
[0];
2097 dst
->u
[1] = src
[0].u
[1] % src
[1].u
[1];
2098 dst
->u
[2] = src
[0].u
[2] % src
[1].u
[2];
2099 dst
->u
[3] = src
[0].u
[3] % src
[1].u
[3];
2103 micro_umul(union tgsi_exec_channel
*dst
,
2104 const union tgsi_exec_channel
*src
)
2106 dst
->u
[0] = src
[0].u
[0] * src
[1].u
[0];
2107 dst
->u
[1] = src
[0].u
[1] * src
[1].u
[1];
2108 dst
->u
[2] = src
[0].u
[2] * src
[1].u
[2];
2109 dst
->u
[3] = src
[0].u
[3] * src
[1].u
[3];
2113 micro_useq(union tgsi_exec_channel
*dst
,
2114 const union tgsi_exec_channel
*src
)
2116 dst
->u
[0] = src
[0].u
[0] == src
[1].u
[0] ? ~0 : 0;
2117 dst
->u
[1] = src
[0].u
[1] == src
[1].u
[1] ? ~0 : 0;
2118 dst
->u
[2] = src
[0].u
[2] == src
[1].u
[2] ? ~0 : 0;
2119 dst
->u
[3] = src
[0].u
[3] == src
[1].u
[3] ? ~0 : 0;
2123 micro_usge(union tgsi_exec_channel
*dst
,
2124 const union tgsi_exec_channel
*src
)
2126 dst
->u
[0] = src
[0].u
[0] >= src
[1].u
[0] ? ~0 : 0;
2127 dst
->u
[1] = src
[0].u
[1] >= src
[1].u
[1] ? ~0 : 0;
2128 dst
->u
[2] = src
[0].u
[2] >= src
[1].u
[2] ? ~0 : 0;
2129 dst
->u
[3] = src
[0].u
[3] >= src
[1].u
[3] ? ~0 : 0;
2133 micro_ushr(union tgsi_exec_channel
*dst
,
2134 const union tgsi_exec_channel
*src
)
2136 dst
->u
[0] = src
[0].u
[0] >> src
[1].u
[0];
2137 dst
->u
[1] = src
[0].u
[1] >> src
[1].u
[1];
2138 dst
->u
[2] = src
[0].u
[2] >> src
[1].u
[2];
2139 dst
->u
[3] = src
[0].u
[3] >> src
[1].u
[3];
2143 micro_uslt(union tgsi_exec_channel
*dst
,
2144 const union tgsi_exec_channel
*src
)
2146 dst
->u
[0] = src
[0].u
[0] < src
[1].u
[0] ? ~0 : 0;
2147 dst
->u
[1] = src
[0].u
[1] < src
[1].u
[1] ? ~0 : 0;
2148 dst
->u
[2] = src
[0].u
[2] < src
[1].u
[2] ? ~0 : 0;
2149 dst
->u
[3] = src
[0].u
[3] < src
[1].u
[3] ? ~0 : 0;
2153 micro_usne(union tgsi_exec_channel
*dst
,
2154 const union tgsi_exec_channel
*src
)
2156 dst
->u
[0] = src
[0].u
[0] != src
[1].u
[0] ? ~0 : 0;
2157 dst
->u
[1] = src
[0].u
[1] != src
[1].u
[1] ? ~0 : 0;
2158 dst
->u
[2] = src
[0].u
[2] != src
[1].u
[2] ? ~0 : 0;
2159 dst
->u
[3] = src
[0].u
[3] != src
[1].u
[3] ? ~0 : 0;
2164 struct tgsi_exec_machine
*mach
,
2165 const struct tgsi_full_instruction
*inst
,
2169 union tgsi_exec_channel r
[10];
2170 union tgsi_exec_channel d
[8];
2174 switch (inst
->Instruction
.Opcode
) {
2175 case TGSI_OPCODE_ARL
:
2176 case TGSI_OPCODE_FLR
:
2177 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2178 FETCH( &r
[0], 0, chan_index
);
2179 micro_flr(&d
[chan_index
], &r
[0]);
2181 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2182 STORE(&d
[chan_index
], 0, chan_index
);
2186 case TGSI_OPCODE_MOV
:
2187 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2188 FETCH(&d
[chan_index
], 0, chan_index
);
2190 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2191 STORE(&d
[chan_index
], 0, chan_index
);
2195 case TGSI_OPCODE_LIT
:
2196 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2197 FETCH( &r
[0], 0, CHAN_X
);
2198 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2199 micro_max(&d
[CHAN_Y
], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2202 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2203 FETCH( &r
[1], 0, CHAN_Y
);
2204 micro_max( &r
[1], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2206 FETCH( &r
[2], 0, CHAN_W
);
2207 micro_min( &r
[2], &r
[2], &mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
] );
2208 micro_max( &r
[2], &r
[2], &mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
] );
2209 micro_pow( &r
[1], &r
[1], &r
[2] );
2210 micro_lt(&d
[CHAN_Z
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2213 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2214 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2216 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2217 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2220 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2221 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2223 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2224 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2228 case TGSI_OPCODE_RCP
:
2229 /* TGSI_OPCODE_RECIP */
2230 FETCH( &r
[0], 0, CHAN_X
);
2231 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
2232 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2233 STORE( &r
[0], 0, chan_index
);
2237 case TGSI_OPCODE_RSQ
:
2238 /* TGSI_OPCODE_RECIPSQRT */
2239 FETCH( &r
[0], 0, CHAN_X
);
2240 micro_abs( &r
[0], &r
[0] );
2241 micro_sqrt( &r
[0], &r
[0] );
2242 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
2243 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2244 STORE( &r
[0], 0, chan_index
);
2248 case TGSI_OPCODE_EXP
:
2249 FETCH( &r
[0], 0, CHAN_X
);
2250 micro_flr( &r
[1], &r
[0] ); /* r1 = floor(r0) */
2251 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2252 micro_exp2( &r
[2], &r
[1] ); /* r2 = 2 ^ r1 */
2253 STORE( &r
[2], 0, CHAN_X
); /* store r2 */
2255 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2256 micro_sub( &r
[2], &r
[0], &r
[1] ); /* r2 = r0 - r1 */
2257 STORE( &r
[2], 0, CHAN_Y
); /* store r2 */
2259 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2260 micro_exp2( &r
[2], &r
[0] ); /* r2 = 2 ^ r0 */
2261 STORE( &r
[2], 0, CHAN_Z
); /* store r2 */
2263 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2264 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2268 case TGSI_OPCODE_LOG
:
2269 FETCH( &r
[0], 0, CHAN_X
);
2270 micro_abs( &r
[2], &r
[0] ); /* r2 = abs(r0) */
2271 micro_lg2( &r
[1], &r
[2] ); /* r1 = lg2(r2) */
2272 micro_flr( &r
[0], &r
[1] ); /* r0 = floor(r1) */
2273 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2274 STORE( &r
[0], 0, CHAN_X
);
2276 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2277 micro_exp2( &r
[0], &r
[0] ); /* r0 = 2 ^ r0 */
2278 micro_div( &r
[0], &r
[2], &r
[0] ); /* r0 = r2 / r0 */
2279 STORE( &r
[0], 0, CHAN_Y
);
2281 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2282 STORE( &r
[1], 0, CHAN_Z
);
2284 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2285 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2289 case TGSI_OPCODE_MUL
:
2290 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2291 FETCH(&r
[0], 0, chan_index
);
2292 FETCH(&r
[1], 1, chan_index
);
2293 micro_mul(&d
[chan_index
], &r
[0], &r
[1]);
2295 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2296 STORE(&d
[chan_index
], 0, chan_index
);
2300 case TGSI_OPCODE_ADD
:
2301 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2302 FETCH( &r
[0], 0, chan_index
);
2303 FETCH( &r
[1], 1, chan_index
);
2304 micro_add(&d
[chan_index
], &r
[0], &r
[1]);
2306 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2307 STORE(&d
[chan_index
], 0, chan_index
);
2311 case TGSI_OPCODE_DP3
:
2312 /* TGSI_OPCODE_DOT3 */
2313 FETCH( &r
[0], 0, CHAN_X
);
2314 FETCH( &r
[1], 1, CHAN_X
);
2315 micro_mul( &r
[0], &r
[0], &r
[1] );
2317 FETCH( &r
[1], 0, CHAN_Y
);
2318 FETCH( &r
[2], 1, CHAN_Y
);
2319 micro_mul( &r
[1], &r
[1], &r
[2] );
2320 micro_add( &r
[0], &r
[0], &r
[1] );
2322 FETCH( &r
[1], 0, CHAN_Z
);
2323 FETCH( &r
[2], 1, CHAN_Z
);
2324 micro_mul( &r
[1], &r
[1], &r
[2] );
2325 micro_add( &r
[0], &r
[0], &r
[1] );
2327 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2328 STORE( &r
[0], 0, chan_index
);
2332 case TGSI_OPCODE_DP4
:
2333 /* TGSI_OPCODE_DOT4 */
2334 FETCH(&r
[0], 0, CHAN_X
);
2335 FETCH(&r
[1], 1, CHAN_X
);
2337 micro_mul( &r
[0], &r
[0], &r
[1] );
2339 FETCH(&r
[1], 0, CHAN_Y
);
2340 FETCH(&r
[2], 1, CHAN_Y
);
2342 micro_mul( &r
[1], &r
[1], &r
[2] );
2343 micro_add( &r
[0], &r
[0], &r
[1] );
2345 FETCH(&r
[1], 0, CHAN_Z
);
2346 FETCH(&r
[2], 1, CHAN_Z
);
2348 micro_mul( &r
[1], &r
[1], &r
[2] );
2349 micro_add( &r
[0], &r
[0], &r
[1] );
2351 FETCH(&r
[1], 0, CHAN_W
);
2352 FETCH(&r
[2], 1, CHAN_W
);
2354 micro_mul( &r
[1], &r
[1], &r
[2] );
2355 micro_add( &r
[0], &r
[0], &r
[1] );
2357 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2358 STORE( &r
[0], 0, chan_index
);
2362 case TGSI_OPCODE_DST
:
2363 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2364 FETCH( &r
[0], 0, CHAN_Y
);
2365 FETCH( &r
[1], 1, CHAN_Y
);
2366 micro_mul(&d
[CHAN_Y
], &r
[0], &r
[1]);
2368 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2369 FETCH(&d
[CHAN_Z
], 0, CHAN_Z
);
2371 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2372 FETCH(&d
[CHAN_W
], 1, CHAN_W
);
2375 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2376 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2378 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2379 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2381 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2382 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2384 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2385 STORE(&d
[CHAN_W
], 0, CHAN_W
);
2389 case TGSI_OPCODE_MIN
:
2390 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2391 FETCH(&r
[0], 0, chan_index
);
2392 FETCH(&r
[1], 1, chan_index
);
2394 /* XXX use micro_min()?? */
2395 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &r
[0], &r
[1]);
2397 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2398 STORE(&d
[chan_index
], 0, chan_index
);
2402 case TGSI_OPCODE_MAX
:
2403 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2404 FETCH(&r
[0], 0, chan_index
);
2405 FETCH(&r
[1], 1, chan_index
);
2407 /* XXX use micro_max()?? */
2408 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &r
[1], &r
[0] );
2410 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2411 STORE(&d
[chan_index
], 0, chan_index
);
2415 case TGSI_OPCODE_SLT
:
2416 /* TGSI_OPCODE_SETLT */
2417 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2418 FETCH( &r
[0], 0, chan_index
);
2419 FETCH( &r
[1], 1, chan_index
);
2420 micro_lt(&d
[chan_index
], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2422 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2423 STORE(&d
[chan_index
], 0, chan_index
);
2427 case TGSI_OPCODE_SGE
:
2428 /* TGSI_OPCODE_SETGE */
2429 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2430 FETCH( &r
[0], 0, chan_index
);
2431 FETCH( &r
[1], 1, chan_index
);
2432 micro_le(&d
[chan_index
], &r
[1], &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2434 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2435 STORE(&d
[chan_index
], 0, chan_index
);
2439 case TGSI_OPCODE_MAD
:
2440 /* TGSI_OPCODE_MADD */
2441 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2442 FETCH( &r
[0], 0, chan_index
);
2443 FETCH( &r
[1], 1, chan_index
);
2444 micro_mul( &r
[0], &r
[0], &r
[1] );
2445 FETCH( &r
[1], 2, chan_index
);
2446 micro_add(&d
[chan_index
], &r
[0], &r
[1]);
2448 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2449 STORE(&d
[chan_index
], 0, chan_index
);
2453 case TGSI_OPCODE_SUB
:
2454 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2455 FETCH(&r
[0], 0, chan_index
);
2456 FETCH(&r
[1], 1, chan_index
);
2457 micro_sub(&d
[chan_index
], &r
[0], &r
[1]);
2459 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2460 STORE(&d
[chan_index
], 0, chan_index
);
2464 case TGSI_OPCODE_LRP
:
2465 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2466 FETCH(&r
[0], 0, chan_index
);
2467 FETCH(&r
[1], 1, chan_index
);
2468 FETCH(&r
[2], 2, chan_index
);
2469 micro_sub( &r
[1], &r
[1], &r
[2] );
2470 micro_mul( &r
[0], &r
[0], &r
[1] );
2471 micro_add(&d
[chan_index
], &r
[0], &r
[2]);
2473 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2474 STORE(&d
[chan_index
], 0, chan_index
);
2478 case TGSI_OPCODE_CND
:
2479 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2480 FETCH(&r
[0], 0, chan_index
);
2481 FETCH(&r
[1], 1, chan_index
);
2482 FETCH(&r
[2], 2, chan_index
);
2483 micro_lt(&d
[chan_index
], &mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
], &r
[2], &r
[0], &r
[1]);
2485 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2486 STORE(&d
[chan_index
], 0, chan_index
);
2490 case TGSI_OPCODE_DP2A
:
2491 FETCH( &r
[0], 0, CHAN_X
);
2492 FETCH( &r
[1], 1, CHAN_X
);
2493 micro_mul( &r
[0], &r
[0], &r
[1] );
2495 FETCH( &r
[1], 0, CHAN_Y
);
2496 FETCH( &r
[2], 1, CHAN_Y
);
2497 micro_mul( &r
[1], &r
[1], &r
[2] );
2498 micro_add( &r
[0], &r
[0], &r
[1] );
2500 FETCH( &r
[2], 2, CHAN_X
);
2501 micro_add( &r
[0], &r
[0], &r
[2] );
2503 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2504 STORE( &r
[0], 0, chan_index
);
2508 case TGSI_OPCODE_FRC
:
2509 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2510 FETCH( &r
[0], 0, chan_index
);
2511 micro_frc(&d
[chan_index
], &r
[0]);
2513 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2514 STORE(&d
[chan_index
], 0, chan_index
);
2518 case TGSI_OPCODE_CLAMP
:
2519 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2520 FETCH(&r
[0], 0, chan_index
);
2521 FETCH(&r
[1], 1, chan_index
);
2522 micro_max(&r
[0], &r
[0], &r
[1]);
2523 FETCH(&r
[1], 2, chan_index
);
2524 micro_min(&d
[chan_index
], &r
[0], &r
[1]);
2526 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2527 STORE(&d
[chan_index
], 0, chan_index
);
2531 case TGSI_OPCODE_ROUND
:
2532 case TGSI_OPCODE_ARR
:
2533 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2534 FETCH( &r
[0], 0, chan_index
);
2535 micro_rnd(&d
[chan_index
], &r
[0]);
2537 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2538 STORE(&d
[chan_index
], 0, chan_index
);
2542 case TGSI_OPCODE_EX2
:
2543 FETCH(&r
[0], 0, CHAN_X
);
2545 micro_exp2( &r
[0], &r
[0] );
2547 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2548 STORE( &r
[0], 0, chan_index
);
2552 case TGSI_OPCODE_LG2
:
2553 FETCH( &r
[0], 0, CHAN_X
);
2554 micro_lg2( &r
[0], &r
[0] );
2555 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2556 STORE( &r
[0], 0, chan_index
);
2560 case TGSI_OPCODE_POW
:
2561 FETCH(&r
[0], 0, CHAN_X
);
2562 FETCH(&r
[1], 1, CHAN_X
);
2564 micro_pow( &r
[0], &r
[0], &r
[1] );
2566 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2567 STORE( &r
[0], 0, chan_index
);
2571 case TGSI_OPCODE_XPD
:
2572 FETCH(&r
[0], 0, CHAN_Y
);
2573 FETCH(&r
[1], 1, CHAN_Z
);
2575 micro_mul( &r
[2], &r
[0], &r
[1] );
2577 FETCH(&r
[3], 0, CHAN_Z
);
2578 FETCH(&r
[4], 1, CHAN_Y
);
2580 micro_mul( &r
[5], &r
[3], &r
[4] );
2581 micro_sub(&d
[CHAN_X
], &r
[2], &r
[5]);
2583 FETCH(&r
[2], 1, CHAN_X
);
2585 micro_mul( &r
[3], &r
[3], &r
[2] );
2587 FETCH(&r
[5], 0, CHAN_X
);
2589 micro_mul( &r
[1], &r
[1], &r
[5] );
2590 micro_sub(&d
[CHAN_Y
], &r
[3], &r
[1]);
2592 micro_mul( &r
[5], &r
[5], &r
[4] );
2593 micro_mul( &r
[0], &r
[0], &r
[2] );
2594 micro_sub(&d
[CHAN_Z
], &r
[5], &r
[0]);
2596 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2597 STORE(&d
[CHAN_X
], 0, CHAN_X
);
2599 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2600 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2602 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2603 STORE(&d
[CHAN_Z
], 0, CHAN_Z
);
2605 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2606 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2610 case TGSI_OPCODE_ABS
:
2611 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2612 FETCH(&r
[0], 0, chan_index
);
2613 micro_abs(&d
[chan_index
], &r
[0]);
2615 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2616 STORE(&d
[chan_index
], 0, chan_index
);
2620 case TGSI_OPCODE_RCC
:
2621 FETCH(&r
[0], 0, CHAN_X
);
2622 micro_div(&r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0]);
2623 micro_float_clamp(&r
[0], &r
[0]);
2624 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2625 STORE(&r
[0], 0, chan_index
);
2629 case TGSI_OPCODE_DPH
:
2630 FETCH(&r
[0], 0, CHAN_X
);
2631 FETCH(&r
[1], 1, CHAN_X
);
2633 micro_mul( &r
[0], &r
[0], &r
[1] );
2635 FETCH(&r
[1], 0, CHAN_Y
);
2636 FETCH(&r
[2], 1, CHAN_Y
);
2638 micro_mul( &r
[1], &r
[1], &r
[2] );
2639 micro_add( &r
[0], &r
[0], &r
[1] );
2641 FETCH(&r
[1], 0, CHAN_Z
);
2642 FETCH(&r
[2], 1, CHAN_Z
);
2644 micro_mul( &r
[1], &r
[1], &r
[2] );
2645 micro_add( &r
[0], &r
[0], &r
[1] );
2647 FETCH(&r
[1], 1, CHAN_W
);
2649 micro_add( &r
[0], &r
[0], &r
[1] );
2651 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2652 STORE( &r
[0], 0, chan_index
);
2656 case TGSI_OPCODE_COS
:
2657 FETCH(&r
[0], 0, CHAN_X
);
2659 micro_cos( &r
[0], &r
[0] );
2661 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2662 STORE( &r
[0], 0, chan_index
);
2666 case TGSI_OPCODE_DDX
:
2667 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2668 FETCH( &r
[0], 0, chan_index
);
2669 micro_ddx(&d
[chan_index
], &r
[0]);
2671 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2672 STORE(&d
[chan_index
], 0, chan_index
);
2676 case TGSI_OPCODE_DDY
:
2677 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2678 FETCH( &r
[0], 0, chan_index
);
2679 micro_ddy(&d
[chan_index
], &r
[0]);
2681 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2682 STORE(&d
[chan_index
], 0, chan_index
);
2686 case TGSI_OPCODE_KILP
:
2687 exec_kilp (mach
, inst
);
2690 case TGSI_OPCODE_KIL
:
2691 exec_kil (mach
, inst
);
2694 case TGSI_OPCODE_PK2H
:
2698 case TGSI_OPCODE_PK2US
:
2702 case TGSI_OPCODE_PK4B
:
2706 case TGSI_OPCODE_PK4UB
:
2710 case TGSI_OPCODE_RFL
:
2711 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2712 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2713 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2714 /* r0 = dp3(src0, src0) */
2715 FETCH(&r
[2], 0, CHAN_X
);
2716 micro_mul(&r
[0], &r
[2], &r
[2]);
2717 FETCH(&r
[4], 0, CHAN_Y
);
2718 micro_mul(&r
[8], &r
[4], &r
[4]);
2719 micro_add(&r
[0], &r
[0], &r
[8]);
2720 FETCH(&r
[6], 0, CHAN_Z
);
2721 micro_mul(&r
[8], &r
[6], &r
[6]);
2722 micro_add(&r
[0], &r
[0], &r
[8]);
2724 /* r1 = dp3(src0, src1) */
2725 FETCH(&r
[3], 1, CHAN_X
);
2726 micro_mul(&r
[1], &r
[2], &r
[3]);
2727 FETCH(&r
[5], 1, CHAN_Y
);
2728 micro_mul(&r
[8], &r
[4], &r
[5]);
2729 micro_add(&r
[1], &r
[1], &r
[8]);
2730 FETCH(&r
[7], 1, CHAN_Z
);
2731 micro_mul(&r
[8], &r
[6], &r
[7]);
2732 micro_add(&r
[1], &r
[1], &r
[8]);
2734 /* r1 = 2 * r1 / r0 */
2735 micro_add(&r
[1], &r
[1], &r
[1]);
2736 micro_div(&r
[1], &r
[1], &r
[0]);
2738 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2739 micro_mul(&r
[2], &r
[2], &r
[1]);
2740 micro_sub(&r
[2], &r
[2], &r
[3]);
2741 STORE(&r
[2], 0, CHAN_X
);
2743 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2744 micro_mul(&r
[4], &r
[4], &r
[1]);
2745 micro_sub(&r
[4], &r
[4], &r
[5]);
2746 STORE(&r
[4], 0, CHAN_Y
);
2748 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2749 micro_mul(&r
[6], &r
[6], &r
[1]);
2750 micro_sub(&r
[6], &r
[6], &r
[7]);
2751 STORE(&r
[6], 0, CHAN_Z
);
2754 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2755 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2759 case TGSI_OPCODE_SEQ
:
2760 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2761 FETCH( &r
[0], 0, chan_index
);
2762 FETCH( &r
[1], 1, chan_index
);
2763 micro_eq(&d
[chan_index
], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2765 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2766 STORE(&d
[chan_index
], 0, chan_index
);
2770 case TGSI_OPCODE_SFL
:
2771 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2772 STORE(&mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, chan_index
);
2776 case TGSI_OPCODE_SGT
:
2777 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2778 FETCH( &r
[0], 0, chan_index
);
2779 FETCH( &r
[1], 1, chan_index
);
2780 micro_le(&d
[chan_index
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
]);
2782 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2783 STORE(&d
[chan_index
], 0, chan_index
);
2787 case TGSI_OPCODE_SIN
:
2788 FETCH( &r
[0], 0, CHAN_X
);
2789 micro_sin( &r
[0], &r
[0] );
2790 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2791 STORE( &r
[0], 0, chan_index
);
2795 case TGSI_OPCODE_SLE
:
2796 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2797 FETCH( &r
[0], 0, chan_index
);
2798 FETCH( &r
[1], 1, chan_index
);
2799 micro_le(&d
[chan_index
], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
]);
2801 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2802 STORE(&d
[chan_index
], 0, chan_index
);
2806 case TGSI_OPCODE_SNE
:
2807 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2808 FETCH( &r
[0], 0, chan_index
);
2809 FETCH( &r
[1], 1, chan_index
);
2810 micro_eq(&d
[chan_index
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
]);
2812 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2813 STORE(&d
[chan_index
], 0, chan_index
);
2817 case TGSI_OPCODE_STR
:
2818 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2819 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, chan_index
);
2823 case TGSI_OPCODE_TEX
:
2824 /* simple texture lookup */
2825 /* src[0] = texcoord */
2826 /* src[1] = sampler unit */
2827 exec_tex(mach
, inst
, FALSE
, FALSE
);
2830 case TGSI_OPCODE_TXB
:
2831 /* Texture lookup with lod bias */
2832 /* src[0] = texcoord (src[0].w = LOD bias) */
2833 /* src[1] = sampler unit */
2834 exec_tex(mach
, inst
, TRUE
, FALSE
);
2837 case TGSI_OPCODE_TXD
:
2838 /* Texture lookup with explict partial derivatives */
2839 /* src[0] = texcoord */
2840 /* src[1] = d[strq]/dx */
2841 /* src[2] = d[strq]/dy */
2842 /* src[3] = sampler unit */
2843 exec_txd(mach
, inst
);
2846 case TGSI_OPCODE_TXL
:
2847 /* Texture lookup with explit LOD */
2848 /* src[0] = texcoord (src[0].w = LOD) */
2849 /* src[1] = sampler unit */
2850 exec_tex(mach
, inst
, TRUE
, FALSE
);
2853 case TGSI_OPCODE_TXP
:
2854 /* Texture lookup with projection */
2855 /* src[0] = texcoord (src[0].w = projection) */
2856 /* src[1] = sampler unit */
2857 exec_tex(mach
, inst
, FALSE
, TRUE
);
2860 case TGSI_OPCODE_UP2H
:
2864 case TGSI_OPCODE_UP2US
:
2868 case TGSI_OPCODE_UP4B
:
2872 case TGSI_OPCODE_UP4UB
:
2876 case TGSI_OPCODE_X2D
:
2877 FETCH(&r
[0], 1, CHAN_X
);
2878 FETCH(&r
[1], 1, CHAN_Y
);
2879 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2880 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2881 FETCH(&r
[2], 2, CHAN_X
);
2882 micro_mul(&r
[2], &r
[2], &r
[0]);
2883 FETCH(&r
[3], 2, CHAN_Y
);
2884 micro_mul(&r
[3], &r
[3], &r
[1]);
2885 micro_add(&r
[2], &r
[2], &r
[3]);
2886 FETCH(&r
[3], 0, CHAN_X
);
2887 micro_add(&d
[CHAN_X
], &r
[2], &r
[3]);
2890 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2891 IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2892 FETCH(&r
[2], 2, CHAN_Z
);
2893 micro_mul(&r
[2], &r
[2], &r
[0]);
2894 FETCH(&r
[3], 2, CHAN_W
);
2895 micro_mul(&r
[3], &r
[3], &r
[1]);
2896 micro_add(&r
[2], &r
[2], &r
[3]);
2897 FETCH(&r
[3], 0, CHAN_Y
);
2898 micro_add(&d
[CHAN_Y
], &r
[2], &r
[3]);
2901 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2902 STORE(&d
[CHAN_X
], 0, CHAN_X
);
2904 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2905 STORE(&d
[CHAN_Y
], 0, CHAN_Y
);
2907 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2908 STORE(&d
[CHAN_X
], 0, CHAN_Z
);
2910 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2911 STORE(&d
[CHAN_Y
], 0, CHAN_W
);
2915 case TGSI_OPCODE_ARA
:
2919 case TGSI_OPCODE_BRA
:
2923 case TGSI_OPCODE_CAL
:
2924 /* skip the call if no execution channels are enabled */
2925 if (mach
->ExecMask
) {
2928 /* First, record the depths of the execution stacks.
2929 * This is important for deeply nested/looped return statements.
2930 * We have to unwind the stacks by the correct amount. For a
2931 * real code generator, we could determine the number of entries
2932 * to pop off each stack with simple static analysis and avoid
2933 * implementing this data structure at run time.
2935 mach
->CallStack
[mach
->CallStackTop
].CondStackTop
= mach
->CondStackTop
;
2936 mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
= mach
->LoopStackTop
;
2937 mach
->CallStack
[mach
->CallStackTop
].ContStackTop
= mach
->ContStackTop
;
2938 mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
= mach
->SwitchStackTop
;
2939 mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
= mach
->BreakStackTop
;
2940 /* note that PC was already incremented above */
2941 mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
= *pc
;
2943 mach
->CallStackTop
++;
2945 /* Second, push the Cond, Loop, Cont, Func stacks */
2946 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2947 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2948 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2949 assert(mach
->SwitchStackTop
< TGSI_EXEC_MAX_SWITCH_NESTING
);
2950 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
2951 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
2953 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2954 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2955 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2956 mach
->SwitchStack
[mach
->SwitchStackTop
++] = mach
->Switch
;
2957 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
2958 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
2960 /* Finally, jump to the subroutine */
2961 *pc
= inst
->Label
.Label
;
2965 case TGSI_OPCODE_RET
:
2966 mach
->FuncMask
&= ~mach
->ExecMask
;
2967 UPDATE_EXEC_MASK(mach
);
2969 if (mach
->FuncMask
== 0x0) {
2970 /* really return now (otherwise, keep executing */
2972 if (mach
->CallStackTop
== 0) {
2973 /* returning from main() */
2978 assert(mach
->CallStackTop
> 0);
2979 mach
->CallStackTop
--;
2981 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
2982 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
2984 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
2985 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
2987 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
2988 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
2990 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
2991 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
2993 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
2994 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
2996 assert(mach
->FuncStackTop
> 0);
2997 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
2999 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
3001 UPDATE_EXEC_MASK(mach
);
3005 case TGSI_OPCODE_SSG
:
3006 /* TGSI_OPCODE_SGN */
3007 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3008 FETCH( &r
[0], 0, chan_index
);
3009 micro_sgn(&d
[chan_index
], &r
[0]);
3011 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
3012 STORE(&d
[chan_index
], 0, chan_index
);
3016 case TGSI_OPCODE_CMP
:
3017 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3018 FETCH(&r
[0], 0, chan_index
);
3019 FETCH(&r
[1], 1, chan_index
);
3020 FETCH(&r
[2], 2, chan_index
);
3021 micro_lt(&d
[chan_index
], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[1], &r
[2]);
3023 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
3024 STORE(&d
[chan_index
], 0, chan_index
);
3028 case TGSI_OPCODE_SCS
:
3029 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
3030 FETCH( &r
[0], 0, CHAN_X
);
3031 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
3032 micro_cos(&r
[1], &r
[0]);
3033 STORE(&r
[1], 0, CHAN_X
);
3035 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
3036 micro_sin(&r
[1], &r
[0]);
3037 STORE(&r
[1], 0, CHAN_Y
);
3040 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Z
) ) {
3041 STORE( &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, CHAN_Z
);
3043 if( IS_CHANNEL_ENABLED( *inst
, CHAN_W
) ) {
3044 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
3048 case TGSI_OPCODE_NRM
:
3049 /* 3-component vector normalize */
3050 if(IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
3051 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
3052 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
3053 /* r3 = sqrt(dp3(src0, src0)) */
3054 FETCH(&r
[0], 0, CHAN_X
);
3055 micro_mul(&r
[3], &r
[0], &r
[0]);
3056 FETCH(&r
[1], 0, CHAN_Y
);
3057 micro_mul(&r
[4], &r
[1], &r
[1]);
3058 micro_add(&r
[3], &r
[3], &r
[4]);
3059 FETCH(&r
[2], 0, CHAN_Z
);
3060 micro_mul(&r
[4], &r
[2], &r
[2]);
3061 micro_add(&r
[3], &r
[3], &r
[4]);
3062 micro_sqrt(&r
[3], &r
[3]);
3064 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
3065 micro_div(&r
[0], &r
[0], &r
[3]);
3066 STORE(&r
[0], 0, CHAN_X
);
3068 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
3069 micro_div(&r
[1], &r
[1], &r
[3]);
3070 STORE(&r
[1], 0, CHAN_Y
);
3072 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
3073 micro_div(&r
[2], &r
[2], &r
[3]);
3074 STORE(&r
[2], 0, CHAN_Z
);
3077 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
3078 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
3082 case TGSI_OPCODE_NRM4
:
3083 /* 4-component vector normalize */
3085 union tgsi_exec_channel tmp
, dot
;
3087 /* tmp = dp4(src0, src0): */
3088 FETCH( &r
[0], 0, CHAN_X
);
3089 micro_mul( &tmp
, &r
[0], &r
[0] );
3091 FETCH( &r
[1], 0, CHAN_Y
);
3092 micro_mul( &dot
, &r
[1], &r
[1] );
3093 micro_add( &tmp
, &tmp
, &dot
);
3095 FETCH( &r
[2], 0, CHAN_Z
);
3096 micro_mul( &dot
, &r
[2], &r
[2] );
3097 micro_add( &tmp
, &tmp
, &dot
);
3099 FETCH( &r
[3], 0, CHAN_W
);
3100 micro_mul( &dot
, &r
[3], &r
[3] );
3101 micro_add( &tmp
, &tmp
, &dot
);
3103 /* tmp = 1 / sqrt(tmp) */
3104 micro_sqrt( &tmp
, &tmp
);
3105 micro_div( &tmp
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &tmp
);
3107 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3108 /* chan = chan * tmp */
3109 micro_mul( &r
[chan_index
], &tmp
, &r
[chan_index
] );
3110 STORE( &r
[chan_index
], 0, chan_index
);
3115 case TGSI_OPCODE_DIV
:
3119 case TGSI_OPCODE_DP2
:
3120 FETCH( &r
[0], 0, CHAN_X
);
3121 FETCH( &r
[1], 1, CHAN_X
);
3122 micro_mul( &r
[0], &r
[0], &r
[1] );
3124 FETCH( &r
[1], 0, CHAN_Y
);
3125 FETCH( &r
[2], 1, CHAN_Y
);
3126 micro_mul( &r
[1], &r
[1], &r
[2] );
3127 micro_add( &r
[0], &r
[0], &r
[1] );
3129 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3130 STORE( &r
[0], 0, chan_index
);
3134 case TGSI_OPCODE_IF
:
3136 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
3137 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
3138 FETCH( &r
[0], 0, CHAN_X
);
3139 /* update CondMask */
3141 mach
->CondMask
&= ~0x1;
3144 mach
->CondMask
&= ~0x2;
3147 mach
->CondMask
&= ~0x4;
3150 mach
->CondMask
&= ~0x8;
3152 UPDATE_EXEC_MASK(mach
);
3153 /* Todo: If CondMask==0, jump to ELSE */
3156 case TGSI_OPCODE_ELSE
:
3157 /* invert CondMask wrt previous mask */
3160 assert(mach
->CondStackTop
> 0);
3161 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
3162 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
3163 UPDATE_EXEC_MASK(mach
);
3164 /* Todo: If CondMask==0, jump to ENDIF */
3168 case TGSI_OPCODE_ENDIF
:
3170 assert(mach
->CondStackTop
> 0);
3171 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
3172 UPDATE_EXEC_MASK(mach
);
3175 case TGSI_OPCODE_END
:
3176 /* halt execution */
3180 case TGSI_OPCODE_REP
:
3184 case TGSI_OPCODE_ENDREP
:
3188 case TGSI_OPCODE_PUSHA
:
3192 case TGSI_OPCODE_POPA
:
3196 case TGSI_OPCODE_CEIL
:
3197 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3198 FETCH( &r
[0], 0, chan_index
);
3199 micro_ceil(&d
[chan_index
], &r
[0]);
3201 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
3202 STORE(&d
[chan_index
], 0, chan_index
);
3206 case TGSI_OPCODE_I2F
:
3207 exec_vector_unary(mach
, inst
, micro_i2f
);
3210 case TGSI_OPCODE_NOT
:
3211 exec_vector_unary(mach
, inst
, micro_not
);
3214 case TGSI_OPCODE_TRUNC
:
3215 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3216 FETCH( &r
[0], 0, chan_index
);
3217 micro_trunc(&d
[chan_index
], &r
[0]);
3219 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
3220 STORE(&d
[chan_index
], 0, chan_index
);
3224 case TGSI_OPCODE_SHL
:
3225 exec_vector_binary(mach
, inst
, micro_shl
);
3228 case TGSI_OPCODE_AND
:
3229 exec_vector_binary(mach
, inst
, micro_and
);
3232 case TGSI_OPCODE_OR
:
3233 exec_vector_binary(mach
, inst
, micro_or
);
3236 case TGSI_OPCODE_MOD
:
3240 case TGSI_OPCODE_XOR
:
3241 exec_vector_binary(mach
, inst
, micro_xor
);
3244 case TGSI_OPCODE_SAD
:
3248 case TGSI_OPCODE_TXF
:
3252 case TGSI_OPCODE_TXQ
:
3256 case TGSI_OPCODE_EMIT
:
3260 case TGSI_OPCODE_ENDPRIM
:
3261 emit_primitive(mach
);
3264 case TGSI_OPCODE_BGNFOR
:
3265 assert(mach
->LoopCounterStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3266 for (chan_index
= 0; chan_index
< 3; chan_index
++) {
3267 FETCH( &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
].xyzw
[chan_index
], 0, chan_index
);
3269 ++mach
->LoopCounterStackTop
;
3270 STORE(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
], 0, CHAN_X
);
3271 /* update LoopMask */
3272 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[0] <= 0.0f
) {
3273 mach
->LoopMask
&= ~0x1;
3275 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[1] <= 0.0f
) {
3276 mach
->LoopMask
&= ~0x2;
3278 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[2] <= 0.0f
) {
3279 mach
->LoopMask
&= ~0x4;
3281 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[3] <= 0.0f
) {
3282 mach
->LoopMask
&= ~0x8;
3284 /* TODO: if mach->LoopMask == 0, jump to end of loop */
3285 UPDATE_EXEC_MASK(mach
);
3286 /* fall-through (for now) */
3287 case TGSI_OPCODE_BGNLOOP
:
3288 /* push LoopMask and ContMasks */
3289 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3290 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3291 assert(mach
->LoopLabelStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3292 assert(mach
->BreakStackTop
< TGSI_EXEC_MAX_BREAK_STACK
);
3294 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
3295 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
3296 mach
->LoopLabelStack
[mach
->LoopLabelStackTop
++] = *pc
- 1;
3297 mach
->BreakStack
[mach
->BreakStackTop
++] = mach
->BreakType
;
3298 mach
->BreakType
= TGSI_EXEC_BREAK_INSIDE_LOOP
;
3301 case TGSI_OPCODE_ENDFOR
:
3302 assert(mach
->LoopCounterStackTop
> 0);
3303 micro_sub(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
],
3304 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
],
3305 &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
]);
3306 /* update LoopMask */
3307 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[0] <= 0.0f
) {
3308 mach
->LoopMask
&= ~0x1;
3310 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[1] <= 0.0f
) {
3311 mach
->LoopMask
&= ~0x2;
3313 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[2] <= 0.0f
) {
3314 mach
->LoopMask
&= ~0x4;
3316 if (mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Y
].f
[3] <= 0.0f
) {
3317 mach
->LoopMask
&= ~0x8;
3319 micro_add(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
],
3320 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_X
],
3321 &mach
->LoopCounterStack
[mach
->LoopCounterStackTop
- 1].xyzw
[CHAN_Z
]);
3322 assert(mach
->LoopLabelStackTop
> 0);
3323 inst
= mach
->Instructions
+ mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1];
3324 STORE(&mach
->LoopCounterStack
[mach
->LoopCounterStackTop
].xyzw
[CHAN_X
], 0, CHAN_X
);
3325 /* Restore ContMask, but don't pop */
3326 assert(mach
->ContStackTop
> 0);
3327 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3328 UPDATE_EXEC_MASK(mach
);
3329 if (mach
->ExecMask
) {
3330 /* repeat loop: jump to instruction just past BGNLOOP */
3331 assert(mach
->LoopLabelStackTop
> 0);
3332 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
3335 /* exit loop: pop LoopMask */
3336 assert(mach
->LoopStackTop
> 0);
3337 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3339 assert(mach
->ContStackTop
> 0);
3340 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3341 assert(mach
->LoopLabelStackTop
> 0);
3342 --mach
->LoopLabelStackTop
;
3343 assert(mach
->LoopCounterStackTop
> 0);
3344 --mach
->LoopCounterStackTop
;
3346 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3348 UPDATE_EXEC_MASK(mach
);
3351 case TGSI_OPCODE_ENDLOOP
:
3352 /* Restore ContMask, but don't pop */
3353 assert(mach
->ContStackTop
> 0);
3354 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3355 UPDATE_EXEC_MASK(mach
);
3356 if (mach
->ExecMask
) {
3357 /* repeat loop: jump to instruction just past BGNLOOP */
3358 assert(mach
->LoopLabelStackTop
> 0);
3359 *pc
= mach
->LoopLabelStack
[mach
->LoopLabelStackTop
- 1] + 1;
3362 /* exit loop: pop LoopMask */
3363 assert(mach
->LoopStackTop
> 0);
3364 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3366 assert(mach
->ContStackTop
> 0);
3367 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3368 assert(mach
->LoopLabelStackTop
> 0);
3369 --mach
->LoopLabelStackTop
;
3371 mach
->BreakType
= mach
->BreakStack
[--mach
->BreakStackTop
];
3373 UPDATE_EXEC_MASK(mach
);
3376 case TGSI_OPCODE_BRK
:
3380 case TGSI_OPCODE_CONT
:
3381 /* turn off cont channels for each enabled exec channel */
3382 mach
->ContMask
&= ~mach
->ExecMask
;
3383 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3384 UPDATE_EXEC_MASK(mach
);
3387 case TGSI_OPCODE_BGNSUB
:
3391 case TGSI_OPCODE_ENDSUB
:
3393 * XXX: This really should be a no-op. We should never reach this opcode.
3396 assert(mach
->CallStackTop
> 0);
3397 mach
->CallStackTop
--;
3399 mach
->CondStackTop
= mach
->CallStack
[mach
->CallStackTop
].CondStackTop
;
3400 mach
->CondMask
= mach
->CondStack
[mach
->CondStackTop
];
3402 mach
->LoopStackTop
= mach
->CallStack
[mach
->CallStackTop
].LoopStackTop
;
3403 mach
->LoopMask
= mach
->LoopStack
[mach
->LoopStackTop
];
3405 mach
->ContStackTop
= mach
->CallStack
[mach
->CallStackTop
].ContStackTop
;
3406 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
];
3408 mach
->SwitchStackTop
= mach
->CallStack
[mach
->CallStackTop
].SwitchStackTop
;
3409 mach
->Switch
= mach
->SwitchStack
[mach
->SwitchStackTop
];
3411 mach
->BreakStackTop
= mach
->CallStack
[mach
->CallStackTop
].BreakStackTop
;
3412 mach
->BreakType
= mach
->BreakStack
[mach
->BreakStackTop
];
3414 assert(mach
->FuncStackTop
> 0);
3415 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
3417 *pc
= mach
->CallStack
[mach
->CallStackTop
].ReturnAddr
;
3419 UPDATE_EXEC_MASK(mach
);
3422 case TGSI_OPCODE_NOP
:
3425 case TGSI_OPCODE_BREAKC
:
3426 FETCH(&r
[0], 0, CHAN_X
);
3427 /* update CondMask */
3428 if (r
[0].u
[0] && (mach
->ExecMask
& 0x1)) {
3429 mach
->LoopMask
&= ~0x1;
3431 if (r
[0].u
[1] && (mach
->ExecMask
& 0x2)) {
3432 mach
->LoopMask
&= ~0x2;
3434 if (r
[0].u
[2] && (mach
->ExecMask
& 0x4)) {
3435 mach
->LoopMask
&= ~0x4;
3437 if (r
[0].u
[3] && (mach
->ExecMask
& 0x8)) {
3438 mach
->LoopMask
&= ~0x8;
3440 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3441 UPDATE_EXEC_MASK(mach
);
3444 case TGSI_OPCODE_F2I
:
3445 exec_vector_unary(mach
, inst
, micro_f2i
);
3448 case TGSI_OPCODE_IDIV
:
3449 exec_vector_binary(mach
, inst
, micro_idiv
);
3452 case TGSI_OPCODE_IMAX
:
3453 exec_vector_binary(mach
, inst
, micro_imax
);
3456 case TGSI_OPCODE_IMIN
:
3457 exec_vector_binary(mach
, inst
, micro_imin
);
3460 case TGSI_OPCODE_INEG
:
3461 exec_vector_unary(mach
, inst
, micro_ineg
);
3464 case TGSI_OPCODE_ISGE
:
3465 exec_vector_binary(mach
, inst
, micro_isge
);
3468 case TGSI_OPCODE_ISHR
:
3469 exec_vector_binary(mach
, inst
, micro_ishr
);
3472 case TGSI_OPCODE_ISLT
:
3473 exec_vector_binary(mach
, inst
, micro_islt
);
3476 case TGSI_OPCODE_F2U
:
3477 exec_vector_unary(mach
, inst
, micro_f2u
);
3480 case TGSI_OPCODE_U2F
:
3481 exec_vector_unary(mach
, inst
, micro_u2f
);
3484 case TGSI_OPCODE_UADD
:
3485 exec_vector_binary(mach
, inst
, micro_uadd
);
3488 case TGSI_OPCODE_UDIV
:
3489 exec_vector_binary(mach
, inst
, micro_udiv
);
3492 case TGSI_OPCODE_UMAD
:
3493 exec_vector_trinary(mach
, inst
, micro_umad
);
3496 case TGSI_OPCODE_UMAX
:
3497 exec_vector_binary(mach
, inst
, micro_umax
);
3500 case TGSI_OPCODE_UMIN
:
3501 exec_vector_binary(mach
, inst
, micro_umin
);
3504 case TGSI_OPCODE_UMOD
:
3505 exec_vector_binary(mach
, inst
, micro_umod
);
3508 case TGSI_OPCODE_UMUL
:
3509 exec_vector_binary(mach
, inst
, micro_umul
);
3512 case TGSI_OPCODE_USEQ
:
3513 exec_vector_binary(mach
, inst
, micro_useq
);
3516 case TGSI_OPCODE_USGE
:
3517 exec_vector_binary(mach
, inst
, micro_usge
);
3520 case TGSI_OPCODE_USHR
:
3521 exec_vector_binary(mach
, inst
, micro_ushr
);
3524 case TGSI_OPCODE_USLT
:
3525 exec_vector_binary(mach
, inst
, micro_uslt
);
3528 case TGSI_OPCODE_USNE
:
3529 exec_vector_binary(mach
, inst
, micro_usne
);
3532 case TGSI_OPCODE_SWITCH
:
3533 exec_switch(mach
, inst
);
3536 case TGSI_OPCODE_CASE
:
3537 exec_case(mach
, inst
);
3540 case TGSI_OPCODE_DEFAULT
:
3544 case TGSI_OPCODE_ENDSWITCH
:
3545 exec_endswitch(mach
);
3553 #define DEBUG_EXECUTION 0
3557 * Run TGSI interpreter.
3558 * \return bitmask of "alive" quad components
3561 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
3566 mach
->CondMask
= 0xf;
3567 mach
->LoopMask
= 0xf;
3568 mach
->ContMask
= 0xf;
3569 mach
->FuncMask
= 0xf;
3570 mach
->ExecMask
= 0xf;
3572 mach
->Switch
.mask
= 0xf;
3574 assert(mach
->CondStackTop
== 0);
3575 assert(mach
->LoopStackTop
== 0);
3576 assert(mach
->ContStackTop
== 0);
3577 assert(mach
->SwitchStackTop
== 0);
3578 assert(mach
->BreakStackTop
== 0);
3579 assert(mach
->CallStackTop
== 0);
3581 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
3582 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
3584 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
3585 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
3586 mach
->Primitives
[0] = 0;
3589 for (i
= 0; i
< QUAD_SIZE
; i
++) {
3590 mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
].u
[i
] =
3591 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_X_SHIFT
) |
3592 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Y_SHIFT
) |
3593 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Z_SHIFT
) |
3594 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_W_SHIFT
);
3597 /* execute declarations (interpolants) */
3598 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
3599 exec_declaration( mach
, mach
->Declarations
+i
);
3604 struct tgsi_exec_vector temps
[TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
];
3605 struct tgsi_exec_vector outputs
[PIPE_MAX_ATTRIBS
];
3608 memcpy(temps
, mach
->Temps
, sizeof(temps
));
3609 memcpy(outputs
, mach
->Outputs
, sizeof(outputs
));
3612 /* execute instructions, until pc is set to -1 */
3618 tgsi_dump_instruction(&mach
->Instructions
[pc
], inst
++);
3621 assert(pc
< (int) mach
->NumInstructions
);
3622 exec_instruction(mach
, mach
->Instructions
+ pc
, &pc
);
3625 for (i
= 0; i
< TGSI_EXEC_NUM_TEMPS
+ TGSI_EXEC_NUM_TEMP_EXTRAS
; i
++) {
3626 if (memcmp(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]))) {
3629 memcpy(&temps
[i
], &mach
->Temps
[i
], sizeof(temps
[i
]));
3630 debug_printf("TEMP[%2u] = ", i
);
3631 for (j
= 0; j
< 4; j
++) {
3635 debug_printf("(%6f, %6f, %6f, %6f)\n",
3636 temps
[i
].xyzw
[0].f
[j
],
3637 temps
[i
].xyzw
[1].f
[j
],
3638 temps
[i
].xyzw
[2].f
[j
],
3639 temps
[i
].xyzw
[3].f
[j
]);
3643 for (i
= 0; i
< PIPE_MAX_ATTRIBS
; i
++) {
3644 if (memcmp(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]))) {
3647 memcpy(&outputs
[i
], &mach
->Outputs
[i
], sizeof(outputs
[i
]));
3648 debug_printf("OUT[%2u] = ", i
);
3649 for (j
= 0; j
< 4; j
++) {
3653 debug_printf("{%6f, %6f, %6f, %6f}\n",
3654 outputs
[i
].xyzw
[0].f
[j
],
3655 outputs
[i
].xyzw
[1].f
[j
],
3656 outputs
[i
].xyzw
[2].f
[j
],
3657 outputs
[i
].xyzw
[3].f
[j
]);
3666 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3667 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
3669 * Scale back depth component.
3671 for (i
= 0; i
< 4; i
++)
3672 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
3676 assert(mach
->CondStackTop
== 0);
3677 assert(mach
->LoopStackTop
== 0);
3678 assert(mach
->ContStackTop
== 0);
3679 assert(mach
->SwitchStackTop
== 0);
3680 assert(mach
->BreakStackTop
== 0);
3681 assert(mach
->CallStackTop
== 0);
3683 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];