1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * TGSI interpreter/executor.
31 * Flow control information:
33 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
34 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
35 * care since a condition may be true for some quad components but false
36 * for other components.
38 * We basically execute all statements (even if they're in the part of
39 * an IF/ELSE clause that's "not taken") and use a special mask to
40 * control writing to destination registers. This is the ExecMask.
43 * The ExecMask is computed from three other masks (CondMask, LoopMask and
44 * ContMask) which are controlled by the flow control instructions (namely:
45 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
53 #include "pipe/p_compiler.h"
54 #include "pipe/p_state.h"
55 #include "pipe/p_shader_tokens.h"
56 #include "tgsi/tgsi_dump.h"
57 #include "tgsi/tgsi_parse.h"
58 #include "tgsi/tgsi_util.h"
59 #include "tgsi_exec.h"
60 #include "util/u_memory.h"
61 #include "util/u_math.h"
65 #define TILE_TOP_LEFT 0
66 #define TILE_TOP_RIGHT 1
67 #define TILE_BOTTOM_LEFT 2
68 #define TILE_BOTTOM_RIGHT 3
76 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
78 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
79 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
80 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
81 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
82 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
83 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
84 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
85 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
86 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
87 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
88 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
89 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
90 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
91 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
92 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
93 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
94 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
95 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
96 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
97 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
98 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
99 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
100 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
101 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
102 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
103 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
104 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
105 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
106 #define TEMP_R0 TGSI_EXEC_TEMP_R0
108 #define IS_CHANNEL_ENABLED(INST, CHAN)\
109 ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
111 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
112 ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
114 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
115 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
116 if (IS_CHANNEL_ENABLED( INST, CHAN ))
118 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
119 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
120 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
123 /** The execution mask depends on the conditional mask and the loop mask */
124 #define UPDATE_EXEC_MASK(MACH) \
125 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->FuncMask
128 static const union tgsi_exec_channel ZeroVec
=
129 { { 0.0, 0.0, 0.0, 0.0 } };
134 check_inf_or_nan(const union tgsi_exec_channel
*chan
)
136 assert(!util_is_inf_or_nan(chan
->f
[0]));
137 assert(!util_is_inf_or_nan(chan
->f
[1]));
138 assert(!util_is_inf_or_nan(chan
->f
[2]));
139 assert(!util_is_inf_or_nan(chan
->f
[3]));
146 print_chan(const char *msg
, const union tgsi_exec_channel
*chan
)
148 debug_printf("%s = {%f, %f, %f, %f}\n",
149 msg
, chan
->f
[0], chan
->f
[1], chan
->f
[2], chan
->f
[3]);
156 print_temp(const struct tgsi_exec_machine
*mach
, uint index
)
158 const struct tgsi_exec_vector
*tmp
= &mach
->Temps
[index
];
160 debug_printf("Temp[%u] =\n", index
);
161 for (i
= 0; i
< 4; i
++) {
162 debug_printf(" %c: { %f, %f, %f, %f }\n",
174 * Check if there's a potential src/dst register data dependency when
175 * using SOA execution.
178 * This would expand into:
183 * The second instruction will have the wrong value for t0 if executed as-is.
186 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
)
190 uint writemask
= inst
->FullDstRegisters
[0].DstRegister
.WriteMask
;
191 if (writemask
== TGSI_WRITEMASK_X
||
192 writemask
== TGSI_WRITEMASK_Y
||
193 writemask
== TGSI_WRITEMASK_Z
||
194 writemask
== TGSI_WRITEMASK_W
||
195 writemask
== TGSI_WRITEMASK_NONE
) {
196 /* no chance of data dependency */
200 /* loop over src regs */
201 for (i
= 0; i
< inst
->Instruction
.NumSrcRegs
; i
++) {
202 if ((inst
->FullSrcRegisters
[i
].SrcRegister
.File
==
203 inst
->FullDstRegisters
[0].DstRegister
.File
) &&
204 (inst
->FullSrcRegisters
[i
].SrcRegister
.Index
==
205 inst
->FullDstRegisters
[0].DstRegister
.Index
)) {
206 /* loop over dest channels */
207 uint channelsWritten
= 0x0;
208 FOR_EACH_ENABLED_CHANNEL(*inst
, chan
) {
209 /* check if we're reading a channel that's been written */
210 uint swizzle
= tgsi_util_get_full_src_register_extswizzle(&inst
->FullSrcRegisters
[i
], chan
);
211 if (swizzle
<= TGSI_SWIZZLE_W
&&
212 (channelsWritten
& (1 << swizzle
))) {
216 channelsWritten
|= (1 << chan
);
225 * Initialize machine state by expanding tokens to full instructions,
226 * allocating temporary storage, setting up constants, etc.
227 * After this, we can call tgsi_exec_machine_run() many times.
230 tgsi_exec_machine_bind_shader(
231 struct tgsi_exec_machine
*mach
,
232 const struct tgsi_token
*tokens
,
234 struct tgsi_sampler
**samplers
)
237 struct tgsi_parse_context parse
;
238 struct tgsi_exec_labels
*labels
= &mach
->Labels
;
239 struct tgsi_full_instruction
*instructions
;
240 struct tgsi_full_declaration
*declarations
;
241 uint maxInstructions
= 10, numInstructions
= 0;
242 uint maxDeclarations
= 10, numDeclarations
= 0;
246 tgsi_dump(tokens
, 0);
251 mach
->Tokens
= tokens
;
252 mach
->Samplers
= samplers
;
254 k
= tgsi_parse_init (&parse
, mach
->Tokens
);
255 if (k
!= TGSI_PARSE_OK
) {
256 debug_printf( "Problem parsing!\n" );
260 mach
->Processor
= parse
.FullHeader
.Processor
.Processor
;
264 declarations
= (struct tgsi_full_declaration
*)
265 MALLOC( maxDeclarations
* sizeof(struct tgsi_full_declaration
) );
271 instructions
= (struct tgsi_full_instruction
*)
272 MALLOC( maxInstructions
* sizeof(struct tgsi_full_instruction
) );
275 FREE( declarations
);
279 while( !tgsi_parse_end_of_tokens( &parse
) ) {
280 uint pointer
= parse
.Position
;
283 tgsi_parse_token( &parse
);
284 switch( parse
.FullToken
.Token
.Type
) {
285 case TGSI_TOKEN_TYPE_DECLARATION
:
286 /* save expanded declaration */
287 if (numDeclarations
== maxDeclarations
) {
288 declarations
= REALLOC(declarations
,
290 * sizeof(struct tgsi_full_declaration
),
291 (maxDeclarations
+ 10)
292 * sizeof(struct tgsi_full_declaration
));
293 maxDeclarations
+= 10;
295 memcpy(declarations
+ numDeclarations
,
296 &parse
.FullToken
.FullDeclaration
,
297 sizeof(declarations
[0]));
301 case TGSI_TOKEN_TYPE_IMMEDIATE
:
303 uint size
= parse
.FullToken
.FullImmediate
.Immediate
.NrTokens
- 1;
305 assert( mach
->ImmLimit
+ 1 <= TGSI_EXEC_NUM_IMMEDIATES
);
307 for( i
= 0; i
< size
; i
++ ) {
308 mach
->Imms
[mach
->ImmLimit
][i
] =
309 parse
.FullToken
.FullImmediate
.u
[i
].Float
;
315 case TGSI_TOKEN_TYPE_INSTRUCTION
:
316 assert( labels
->count
< MAX_LABELS
);
318 labels
->labels
[labels
->count
][0] = instno
;
319 labels
->labels
[labels
->count
][1] = pointer
;
322 /* save expanded instruction */
323 if (numInstructions
== maxInstructions
) {
324 instructions
= REALLOC(instructions
,
326 * sizeof(struct tgsi_full_instruction
),
327 (maxInstructions
+ 10)
328 * sizeof(struct tgsi_full_instruction
));
329 maxInstructions
+= 10;
331 memcpy(instructions
+ numInstructions
,
332 &parse
.FullToken
.FullInstruction
,
333 sizeof(instructions
[0]));
336 if (tgsi_check_soa_dependencies(&parse
.FullToken
.FullInstruction
)) {
337 debug_printf("SOA dependency in instruction:\n");
338 tgsi_dump_instruction(&parse
.FullToken
.FullInstruction
,
342 (void) tgsi_check_soa_dependencies
;
352 tgsi_parse_free (&parse
);
354 if (mach
->Declarations
) {
355 FREE( mach
->Declarations
);
357 mach
->Declarations
= declarations
;
358 mach
->NumDeclarations
= numDeclarations
;
360 if (mach
->Instructions
) {
361 FREE( mach
->Instructions
);
363 mach
->Instructions
= instructions
;
364 mach
->NumInstructions
= numInstructions
;
368 struct tgsi_exec_machine
*
369 tgsi_exec_machine_create( void )
371 struct tgsi_exec_machine
*mach
;
374 mach
= align_malloc( sizeof *mach
, 16 );
378 mach
->Addrs
= &mach
->Temps
[TGSI_EXEC_TEMP_ADDR
];
380 mach
->Samplers
= NULL
;
383 mach
->Primitives
= NULL
;
384 mach
->InterpCoefs
= NULL
;
385 mach
->Instructions
= NULL
;
386 mach
->Declarations
= NULL
;
388 /* Setup constants. */
389 for( i
= 0; i
< 4; i
++ ) {
390 mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
].u
[i
] = 0x00000000;
391 mach
->Temps
[TEMP_7F_I
].xyzw
[TEMP_7F_C
].u
[i
] = 0x7FFFFFFF;
392 mach
->Temps
[TEMP_80_I
].xyzw
[TEMP_80_C
].u
[i
] = 0x80000000;
393 mach
->Temps
[TEMP_FF_I
].xyzw
[TEMP_FF_C
].u
[i
] = 0xFFFFFFFF;
394 mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
].f
[i
] = 1.0f
;
395 mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
].f
[i
] = 2.0f
;
396 mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
].f
[i
] = 128.0f
;
397 mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
].f
[i
] = -128.0f
;
398 mach
->Temps
[TEMP_3_I
].xyzw
[TEMP_3_C
].f
[i
] = 3.0f
;
399 mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
].f
[i
] = 0.5f
;
403 /* silence warnings */
417 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
)
420 FREE(mach
->Instructions
);
421 FREE(mach
->Declarations
);
430 union tgsi_exec_channel
*dst
,
431 const union tgsi_exec_channel
*src
)
433 dst
->f
[0] = fabsf( src
->f
[0] );
434 dst
->f
[1] = fabsf( src
->f
[1] );
435 dst
->f
[2] = fabsf( src
->f
[2] );
436 dst
->f
[3] = fabsf( src
->f
[3] );
441 union tgsi_exec_channel
*dst
,
442 const union tgsi_exec_channel
*src0
,
443 const union tgsi_exec_channel
*src1
)
445 dst
->f
[0] = src0
->f
[0] + src1
->f
[0];
446 dst
->f
[1] = src0
->f
[1] + src1
->f
[1];
447 dst
->f
[2] = src0
->f
[2] + src1
->f
[2];
448 dst
->f
[3] = src0
->f
[3] + src1
->f
[3];
454 union tgsi_exec_channel
*dst
,
455 const union tgsi_exec_channel
*src0
,
456 const union tgsi_exec_channel
*src1
)
458 dst
->i
[0] = src0
->i
[0] + src1
->i
[0];
459 dst
->i
[1] = src0
->i
[1] + src1
->i
[1];
460 dst
->i
[2] = src0
->i
[2] + src1
->i
[2];
461 dst
->i
[3] = src0
->i
[3] + src1
->i
[3];
467 union tgsi_exec_channel
*dst
,
468 const union tgsi_exec_channel
*src0
,
469 const union tgsi_exec_channel
*src1
)
471 dst
->u
[0] = src0
->u
[0] & src1
->u
[0];
472 dst
->u
[1] = src0
->u
[1] & src1
->u
[1];
473 dst
->u
[2] = src0
->u
[2] & src1
->u
[2];
474 dst
->u
[3] = src0
->u
[3] & src1
->u
[3];
479 union tgsi_exec_channel
*dst
,
480 const union tgsi_exec_channel
*src
)
482 dst
->f
[0] = ceilf( src
->f
[0] );
483 dst
->f
[1] = ceilf( src
->f
[1] );
484 dst
->f
[2] = ceilf( src
->f
[2] );
485 dst
->f
[3] = ceilf( src
->f
[3] );
490 union tgsi_exec_channel
*dst
,
491 const union tgsi_exec_channel
*src
)
493 dst
->f
[0] = cosf( src
->f
[0] );
494 dst
->f
[1] = cosf( src
->f
[1] );
495 dst
->f
[2] = cosf( src
->f
[2] );
496 dst
->f
[3] = cosf( src
->f
[3] );
501 union tgsi_exec_channel
*dst
,
502 const union tgsi_exec_channel
*src
)
507 dst
->f
[3] = src
->f
[TILE_BOTTOM_RIGHT
] - src
->f
[TILE_BOTTOM_LEFT
];
512 union tgsi_exec_channel
*dst
,
513 const union tgsi_exec_channel
*src
)
518 dst
->f
[3] = src
->f
[TILE_TOP_LEFT
] - src
->f
[TILE_BOTTOM_LEFT
];
523 union tgsi_exec_channel
*dst
,
524 const union tgsi_exec_channel
*src0
,
525 const union tgsi_exec_channel
*src1
)
527 if (src1
->f
[0] != 0) {
528 dst
->f
[0] = src0
->f
[0] / src1
->f
[0];
530 if (src1
->f
[1] != 0) {
531 dst
->f
[1] = src0
->f
[1] / src1
->f
[1];
533 if (src1
->f
[2] != 0) {
534 dst
->f
[2] = src0
->f
[2] / src1
->f
[2];
536 if (src1
->f
[3] != 0) {
537 dst
->f
[3] = src0
->f
[3] / src1
->f
[3];
544 union tgsi_exec_channel
*dst
,
545 const union tgsi_exec_channel
*src0
,
546 const union tgsi_exec_channel
*src1
)
548 dst
->u
[0] = src0
->u
[0] / src1
->u
[0];
549 dst
->u
[1] = src0
->u
[1] / src1
->u
[1];
550 dst
->u
[2] = src0
->u
[2] / src1
->u
[2];
551 dst
->u
[3] = src0
->u
[3] / src1
->u
[3];
557 union tgsi_exec_channel
*dst
,
558 const union tgsi_exec_channel
*src0
,
559 const union tgsi_exec_channel
*src1
,
560 const union tgsi_exec_channel
*src2
,
561 const union tgsi_exec_channel
*src3
)
563 dst
->f
[0] = src0
->f
[0] == src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
564 dst
->f
[1] = src0
->f
[1] == src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
565 dst
->f
[2] = src0
->f
[2] == src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
566 dst
->f
[3] = src0
->f
[3] == src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
572 union tgsi_exec_channel
*dst
,
573 const union tgsi_exec_channel
*src0
,
574 const union tgsi_exec_channel
*src1
,
575 const union tgsi_exec_channel
*src2
,
576 const union tgsi_exec_channel
*src3
)
578 dst
->i
[0] = src0
->i
[0] == src1
->i
[0] ? src2
->i
[0] : src3
->i
[0];
579 dst
->i
[1] = src0
->i
[1] == src1
->i
[1] ? src2
->i
[1] : src3
->i
[1];
580 dst
->i
[2] = src0
->i
[2] == src1
->i
[2] ? src2
->i
[2] : src3
->i
[2];
581 dst
->i
[3] = src0
->i
[3] == src1
->i
[3] ? src2
->i
[3] : src3
->i
[3];
587 union tgsi_exec_channel
*dst
,
588 const union tgsi_exec_channel
*src
)
591 dst
->f
[0] = util_fast_exp2( src
->f
[0] );
592 dst
->f
[1] = util_fast_exp2( src
->f
[1] );
593 dst
->f
[2] = util_fast_exp2( src
->f
[2] );
594 dst
->f
[3] = util_fast_exp2( src
->f
[3] );
596 dst
->f
[0] = powf( 2.0f
, src
->f
[0] );
597 dst
->f
[1] = powf( 2.0f
, src
->f
[1] );
598 dst
->f
[2] = powf( 2.0f
, src
->f
[2] );
599 dst
->f
[3] = powf( 2.0f
, src
->f
[3] );
606 union tgsi_exec_channel
*dst
,
607 const union tgsi_exec_channel
*src
)
609 dst
->u
[0] = (uint
) src
->f
[0];
610 dst
->u
[1] = (uint
) src
->f
[1];
611 dst
->u
[2] = (uint
) src
->f
[2];
612 dst
->u
[3] = (uint
) src
->f
[3];
617 micro_float_clamp(union tgsi_exec_channel
*dst
,
618 const union tgsi_exec_channel
*src
)
622 for (i
= 0; i
< 4; i
++) {
623 if (src
->f
[i
] > 0.0f
) {
624 if (src
->f
[i
] > 1.884467e+019f
)
625 dst
->f
[i
] = 1.884467e+019f
;
626 else if (src
->f
[i
] < 5.42101e-020f
)
627 dst
->f
[i
] = 5.42101e-020f
;
629 dst
->f
[i
] = src
->f
[i
];
632 if (src
->f
[i
] < -1.884467e+019f
)
633 dst
->f
[i
] = -1.884467e+019f
;
634 else if (src
->f
[i
] > -5.42101e-020f
)
635 dst
->f
[i
] = -5.42101e-020f
;
637 dst
->f
[i
] = src
->f
[i
];
644 union tgsi_exec_channel
*dst
,
645 const union tgsi_exec_channel
*src
)
647 dst
->f
[0] = floorf( src
->f
[0] );
648 dst
->f
[1] = floorf( src
->f
[1] );
649 dst
->f
[2] = floorf( src
->f
[2] );
650 dst
->f
[3] = floorf( src
->f
[3] );
655 union tgsi_exec_channel
*dst
,
656 const union tgsi_exec_channel
*src
)
658 dst
->f
[0] = src
->f
[0] - floorf( src
->f
[0] );
659 dst
->f
[1] = src
->f
[1] - floorf( src
->f
[1] );
660 dst
->f
[2] = src
->f
[2] - floorf( src
->f
[2] );
661 dst
->f
[3] = src
->f
[3] - floorf( src
->f
[3] );
666 union tgsi_exec_channel
*dst
,
667 const union tgsi_exec_channel
*src
)
669 dst
->f
[0] = (float) src
->i
[0];
670 dst
->f
[1] = (float) src
->i
[1];
671 dst
->f
[2] = (float) src
->i
[2];
672 dst
->f
[3] = (float) src
->i
[3];
677 union tgsi_exec_channel
*dst
,
678 const union tgsi_exec_channel
*src
)
681 dst
->f
[0] = util_fast_log2( src
->f
[0] );
682 dst
->f
[1] = util_fast_log2( src
->f
[1] );
683 dst
->f
[2] = util_fast_log2( src
->f
[2] );
684 dst
->f
[3] = util_fast_log2( src
->f
[3] );
686 dst
->f
[0] = logf( src
->f
[0] ) * 1.442695f
;
687 dst
->f
[1] = logf( src
->f
[1] ) * 1.442695f
;
688 dst
->f
[2] = logf( src
->f
[2] ) * 1.442695f
;
689 dst
->f
[3] = logf( src
->f
[3] ) * 1.442695f
;
695 union tgsi_exec_channel
*dst
,
696 const union tgsi_exec_channel
*src0
,
697 const union tgsi_exec_channel
*src1
,
698 const union tgsi_exec_channel
*src2
,
699 const union tgsi_exec_channel
*src3
)
701 dst
->f
[0] = src0
->f
[0] <= src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
702 dst
->f
[1] = src0
->f
[1] <= src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
703 dst
->f
[2] = src0
->f
[2] <= src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
704 dst
->f
[3] = src0
->f
[3] <= src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
709 union tgsi_exec_channel
*dst
,
710 const union tgsi_exec_channel
*src0
,
711 const union tgsi_exec_channel
*src1
,
712 const union tgsi_exec_channel
*src2
,
713 const union tgsi_exec_channel
*src3
)
715 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src2
->f
[0] : src3
->f
[0];
716 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src2
->f
[1] : src3
->f
[1];
717 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src2
->f
[2] : src3
->f
[2];
718 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src2
->f
[3] : src3
->f
[3];
724 union tgsi_exec_channel
*dst
,
725 const union tgsi_exec_channel
*src0
,
726 const union tgsi_exec_channel
*src1
,
727 const union tgsi_exec_channel
*src2
,
728 const union tgsi_exec_channel
*src3
)
730 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src2
->i
[0] : src3
->i
[0];
731 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src2
->i
[1] : src3
->i
[1];
732 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src2
->i
[2] : src3
->i
[2];
733 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src2
->i
[3] : src3
->i
[3];
740 union tgsi_exec_channel
*dst
,
741 const union tgsi_exec_channel
*src0
,
742 const union tgsi_exec_channel
*src1
,
743 const union tgsi_exec_channel
*src2
,
744 const union tgsi_exec_channel
*src3
)
746 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src2
->u
[0] : src3
->u
[0];
747 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src2
->u
[1] : src3
->u
[1];
748 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src2
->u
[2] : src3
->u
[2];
749 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src2
->u
[3] : src3
->u
[3];
755 union tgsi_exec_channel
*dst
,
756 const union tgsi_exec_channel
*src0
,
757 const union tgsi_exec_channel
*src1
)
759 dst
->f
[0] = src0
->f
[0] > src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
760 dst
->f
[1] = src0
->f
[1] > src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
761 dst
->f
[2] = src0
->f
[2] > src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
762 dst
->f
[3] = src0
->f
[3] > src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
768 union tgsi_exec_channel
*dst
,
769 const union tgsi_exec_channel
*src0
,
770 const union tgsi_exec_channel
*src1
)
772 dst
->i
[0] = src0
->i
[0] > src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
773 dst
->i
[1] = src0
->i
[1] > src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
774 dst
->i
[2] = src0
->i
[2] > src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
775 dst
->i
[3] = src0
->i
[3] > src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
782 union tgsi_exec_channel
*dst
,
783 const union tgsi_exec_channel
*src0
,
784 const union tgsi_exec_channel
*src1
)
786 dst
->u
[0] = src0
->u
[0] > src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
787 dst
->u
[1] = src0
->u
[1] > src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
788 dst
->u
[2] = src0
->u
[2] > src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
789 dst
->u
[3] = src0
->u
[3] > src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
795 union tgsi_exec_channel
*dst
,
796 const union tgsi_exec_channel
*src0
,
797 const union tgsi_exec_channel
*src1
)
799 dst
->f
[0] = src0
->f
[0] < src1
->f
[0] ? src0
->f
[0] : src1
->f
[0];
800 dst
->f
[1] = src0
->f
[1] < src1
->f
[1] ? src0
->f
[1] : src1
->f
[1];
801 dst
->f
[2] = src0
->f
[2] < src1
->f
[2] ? src0
->f
[2] : src1
->f
[2];
802 dst
->f
[3] = src0
->f
[3] < src1
->f
[3] ? src0
->f
[3] : src1
->f
[3];
808 union tgsi_exec_channel
*dst
,
809 const union tgsi_exec_channel
*src0
,
810 const union tgsi_exec_channel
*src1
)
812 dst
->i
[0] = src0
->i
[0] < src1
->i
[0] ? src0
->i
[0] : src1
->i
[0];
813 dst
->i
[1] = src0
->i
[1] < src1
->i
[1] ? src0
->i
[1] : src1
->i
[1];
814 dst
->i
[2] = src0
->i
[2] < src1
->i
[2] ? src0
->i
[2] : src1
->i
[2];
815 dst
->i
[3] = src0
->i
[3] < src1
->i
[3] ? src0
->i
[3] : src1
->i
[3];
822 union tgsi_exec_channel
*dst
,
823 const union tgsi_exec_channel
*src0
,
824 const union tgsi_exec_channel
*src1
)
826 dst
->u
[0] = src0
->u
[0] < src1
->u
[0] ? src0
->u
[0] : src1
->u
[0];
827 dst
->u
[1] = src0
->u
[1] < src1
->u
[1] ? src0
->u
[1] : src1
->u
[1];
828 dst
->u
[2] = src0
->u
[2] < src1
->u
[2] ? src0
->u
[2] : src1
->u
[2];
829 dst
->u
[3] = src0
->u
[3] < src1
->u
[3] ? src0
->u
[3] : src1
->u
[3];
836 union tgsi_exec_channel
*dst
,
837 const union tgsi_exec_channel
*src0
,
838 const union tgsi_exec_channel
*src1
)
840 dst
->u
[0] = src0
->u
[0] % src1
->u
[0];
841 dst
->u
[1] = src0
->u
[1] % src1
->u
[1];
842 dst
->u
[2] = src0
->u
[2] % src1
->u
[2];
843 dst
->u
[3] = src0
->u
[3] % src1
->u
[3];
849 union tgsi_exec_channel
*dst
,
850 const union tgsi_exec_channel
*src0
,
851 const union tgsi_exec_channel
*src1
)
853 dst
->f
[0] = src0
->f
[0] * src1
->f
[0];
854 dst
->f
[1] = src0
->f
[1] * src1
->f
[1];
855 dst
->f
[2] = src0
->f
[2] * src1
->f
[2];
856 dst
->f
[3] = src0
->f
[3] * src1
->f
[3];
862 union tgsi_exec_channel
*dst
,
863 const union tgsi_exec_channel
*src0
,
864 const union tgsi_exec_channel
*src1
)
866 dst
->i
[0] = src0
->i
[0] * src1
->i
[0];
867 dst
->i
[1] = src0
->i
[1] * src1
->i
[1];
868 dst
->i
[2] = src0
->i
[2] * src1
->i
[2];
869 dst
->i
[3] = src0
->i
[3] * src1
->i
[3];
876 union tgsi_exec_channel
*dst0
,
877 union tgsi_exec_channel
*dst1
,
878 const union tgsi_exec_channel
*src0
,
879 const union tgsi_exec_channel
*src1
)
881 dst1
->i
[0] = src0
->i
[0] * src1
->i
[0];
882 dst1
->i
[1] = src0
->i
[1] * src1
->i
[1];
883 dst1
->i
[2] = src0
->i
[2] * src1
->i
[2];
884 dst1
->i
[3] = src0
->i
[3] * src1
->i
[3];
895 union tgsi_exec_channel
*dst0
,
896 union tgsi_exec_channel
*dst1
,
897 const union tgsi_exec_channel
*src0
,
898 const union tgsi_exec_channel
*src1
)
900 dst1
->u
[0] = src0
->u
[0] * src1
->u
[0];
901 dst1
->u
[1] = src0
->u
[1] * src1
->u
[1];
902 dst1
->u
[2] = src0
->u
[2] * src1
->u
[2];
903 dst1
->u
[3] = src0
->u
[3] * src1
->u
[3];
915 union tgsi_exec_channel
*dst
,
916 const union tgsi_exec_channel
*src0
,
917 const union tgsi_exec_channel
*src1
,
918 const union tgsi_exec_channel
*src2
)
920 dst
->u
[0] = src0
->u
[0] ? src1
->u
[0] : src2
->u
[0];
921 dst
->u
[1] = src0
->u
[1] ? src1
->u
[1] : src2
->u
[1];
922 dst
->u
[2] = src0
->u
[2] ? src1
->u
[2] : src2
->u
[2];
923 dst
->u
[3] = src0
->u
[3] ? src1
->u
[3] : src2
->u
[3];
929 union tgsi_exec_channel
*dst
,
930 const union tgsi_exec_channel
*src
)
932 dst
->f
[0] = -src
->f
[0];
933 dst
->f
[1] = -src
->f
[1];
934 dst
->f
[2] = -src
->f
[2];
935 dst
->f
[3] = -src
->f
[3];
941 union tgsi_exec_channel
*dst
,
942 const union tgsi_exec_channel
*src
)
944 dst
->i
[0] = -src
->i
[0];
945 dst
->i
[1] = -src
->i
[1];
946 dst
->i
[2] = -src
->i
[2];
947 dst
->i
[3] = -src
->i
[3];
953 union tgsi_exec_channel
*dst
,
954 const union tgsi_exec_channel
*src
)
956 dst
->u
[0] = ~src
->u
[0];
957 dst
->u
[1] = ~src
->u
[1];
958 dst
->u
[2] = ~src
->u
[2];
959 dst
->u
[3] = ~src
->u
[3];
964 union tgsi_exec_channel
*dst
,
965 const union tgsi_exec_channel
*src0
,
966 const union tgsi_exec_channel
*src1
)
968 dst
->u
[0] = src0
->u
[0] | src1
->u
[0];
969 dst
->u
[1] = src0
->u
[1] | src1
->u
[1];
970 dst
->u
[2] = src0
->u
[2] | src1
->u
[2];
971 dst
->u
[3] = src0
->u
[3] | src1
->u
[3];
976 union tgsi_exec_channel
*dst
,
977 const union tgsi_exec_channel
*src0
,
978 const union tgsi_exec_channel
*src1
)
981 dst
->f
[0] = util_fast_pow( src0
->f
[0], src1
->f
[0] );
982 dst
->f
[1] = util_fast_pow( src0
->f
[1], src1
->f
[1] );
983 dst
->f
[2] = util_fast_pow( src0
->f
[2], src1
->f
[2] );
984 dst
->f
[3] = util_fast_pow( src0
->f
[3], src1
->f
[3] );
986 dst
->f
[0] = powf( src0
->f
[0], src1
->f
[0] );
987 dst
->f
[1] = powf( src0
->f
[1], src1
->f
[1] );
988 dst
->f
[2] = powf( src0
->f
[2], src1
->f
[2] );
989 dst
->f
[3] = powf( src0
->f
[3], src1
->f
[3] );
995 union tgsi_exec_channel
*dst
,
996 const union tgsi_exec_channel
*src
)
998 dst
->f
[0] = floorf( src
->f
[0] + 0.5f
);
999 dst
->f
[1] = floorf( src
->f
[1] + 0.5f
);
1000 dst
->f
[2] = floorf( src
->f
[2] + 0.5f
);
1001 dst
->f
[3] = floorf( src
->f
[3] + 0.5f
);
1006 union tgsi_exec_channel
*dst
,
1007 const union tgsi_exec_channel
*src
)
1009 dst
->f
[0] = src
->f
[0] < 0.0f
? -1.0f
: src
->f
[0] > 0.0f
? 1.0f
: 0.0f
;
1010 dst
->f
[1] = src
->f
[1] < 0.0f
? -1.0f
: src
->f
[1] > 0.0f
? 1.0f
: 0.0f
;
1011 dst
->f
[2] = src
->f
[2] < 0.0f
? -1.0f
: src
->f
[2] > 0.0f
? 1.0f
: 0.0f
;
1012 dst
->f
[3] = src
->f
[3] < 0.0f
? -1.0f
: src
->f
[3] > 0.0f
? 1.0f
: 0.0f
;
1017 union tgsi_exec_channel
*dst
,
1018 const union tgsi_exec_channel
*src0
,
1019 const union tgsi_exec_channel
*src1
)
1021 dst
->i
[0] = src0
->i
[0] << src1
->i
[0];
1022 dst
->i
[1] = src0
->i
[1] << src1
->i
[1];
1023 dst
->i
[2] = src0
->i
[2] << src1
->i
[2];
1024 dst
->i
[3] = src0
->i
[3] << src1
->i
[3];
1029 union tgsi_exec_channel
*dst
,
1030 const union tgsi_exec_channel
*src0
,
1031 const union tgsi_exec_channel
*src1
)
1033 dst
->i
[0] = src0
->i
[0] >> src1
->i
[0];
1034 dst
->i
[1] = src0
->i
[1] >> src1
->i
[1];
1035 dst
->i
[2] = src0
->i
[2] >> src1
->i
[2];
1036 dst
->i
[3] = src0
->i
[3] >> src1
->i
[3];
1041 union tgsi_exec_channel
*dst
,
1042 const union tgsi_exec_channel
*src0
)
1044 dst
->f
[0] = (float) (int) src0
->f
[0];
1045 dst
->f
[1] = (float) (int) src0
->f
[1];
1046 dst
->f
[2] = (float) (int) src0
->f
[2];
1047 dst
->f
[3] = (float) (int) src0
->f
[3];
1053 union tgsi_exec_channel
*dst
,
1054 const union tgsi_exec_channel
*src0
,
1055 const union tgsi_exec_channel
*src1
)
1057 dst
->u
[0] = src0
->u
[0] >> src1
->u
[0];
1058 dst
->u
[1] = src0
->u
[1] >> src1
->u
[1];
1059 dst
->u
[2] = src0
->u
[2] >> src1
->u
[2];
1060 dst
->u
[3] = src0
->u
[3] >> src1
->u
[3];
1066 union tgsi_exec_channel
*dst
,
1067 const union tgsi_exec_channel
*src
)
1069 dst
->f
[0] = sinf( src
->f
[0] );
1070 dst
->f
[1] = sinf( src
->f
[1] );
1071 dst
->f
[2] = sinf( src
->f
[2] );
1072 dst
->f
[3] = sinf( src
->f
[3] );
1076 micro_sqrt( union tgsi_exec_channel
*dst
,
1077 const union tgsi_exec_channel
*src
)
1079 dst
->f
[0] = sqrtf( src
->f
[0] );
1080 dst
->f
[1] = sqrtf( src
->f
[1] );
1081 dst
->f
[2] = sqrtf( src
->f
[2] );
1082 dst
->f
[3] = sqrtf( src
->f
[3] );
1087 union tgsi_exec_channel
*dst
,
1088 const union tgsi_exec_channel
*src0
,
1089 const union tgsi_exec_channel
*src1
)
1091 dst
->f
[0] = src0
->f
[0] - src1
->f
[0];
1092 dst
->f
[1] = src0
->f
[1] - src1
->f
[1];
1093 dst
->f
[2] = src0
->f
[2] - src1
->f
[2];
1094 dst
->f
[3] = src0
->f
[3] - src1
->f
[3];
1100 union tgsi_exec_channel
*dst
,
1101 const union tgsi_exec_channel
*src
)
1103 dst
->f
[0] = (float) src
->u
[0];
1104 dst
->f
[1] = (float) src
->u
[1];
1105 dst
->f
[2] = (float) src
->u
[2];
1106 dst
->f
[3] = (float) src
->u
[3];
1112 union tgsi_exec_channel
*dst
,
1113 const union tgsi_exec_channel
*src0
,
1114 const union tgsi_exec_channel
*src1
)
1116 dst
->u
[0] = src0
->u
[0] ^ src1
->u
[0];
1117 dst
->u
[1] = src0
->u
[1] ^ src1
->u
[1];
1118 dst
->u
[2] = src0
->u
[2] ^ src1
->u
[2];
1119 dst
->u
[3] = src0
->u
[3] ^ src1
->u
[3];
1123 fetch_src_file_channel(
1124 const struct tgsi_exec_machine
*mach
,
1127 const union tgsi_exec_channel
*index
,
1128 union tgsi_exec_channel
*chan
)
1131 case TGSI_EXTSWIZZLE_X
:
1132 case TGSI_EXTSWIZZLE_Y
:
1133 case TGSI_EXTSWIZZLE_Z
:
1134 case TGSI_EXTSWIZZLE_W
:
1136 case TGSI_FILE_CONSTANT
:
1137 assert(mach
->Consts
);
1138 if (index
->i
[0] < 0)
1141 chan
->f
[0] = mach
->Consts
[index
->i
[0]][swizzle
];
1142 if (index
->i
[1] < 0)
1145 chan
->f
[1] = mach
->Consts
[index
->i
[1]][swizzle
];
1146 if (index
->i
[2] < 0)
1149 chan
->f
[2] = mach
->Consts
[index
->i
[2]][swizzle
];
1150 if (index
->i
[3] < 0)
1153 chan
->f
[3] = mach
->Consts
[index
->i
[3]][swizzle
];
1156 case TGSI_FILE_INPUT
:
1157 chan
->u
[0] = mach
->Inputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1158 chan
->u
[1] = mach
->Inputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1159 chan
->u
[2] = mach
->Inputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1160 chan
->u
[3] = mach
->Inputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1163 case TGSI_FILE_TEMPORARY
:
1164 assert(index
->i
[0] < TGSI_EXEC_NUM_TEMPS
);
1165 chan
->u
[0] = mach
->Temps
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1166 chan
->u
[1] = mach
->Temps
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1167 chan
->u
[2] = mach
->Temps
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1168 chan
->u
[3] = mach
->Temps
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1171 case TGSI_FILE_IMMEDIATE
:
1172 assert( index
->i
[0] < (int) mach
->ImmLimit
);
1173 chan
->f
[0] = mach
->Imms
[index
->i
[0]][swizzle
];
1174 assert( index
->i
[1] < (int) mach
->ImmLimit
);
1175 chan
->f
[1] = mach
->Imms
[index
->i
[1]][swizzle
];
1176 assert( index
->i
[2] < (int) mach
->ImmLimit
);
1177 chan
->f
[2] = mach
->Imms
[index
->i
[2]][swizzle
];
1178 assert( index
->i
[3] < (int) mach
->ImmLimit
);
1179 chan
->f
[3] = mach
->Imms
[index
->i
[3]][swizzle
];
1182 case TGSI_FILE_ADDRESS
:
1183 chan
->u
[0] = mach
->Addrs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1184 chan
->u
[1] = mach
->Addrs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1185 chan
->u
[2] = mach
->Addrs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1186 chan
->u
[3] = mach
->Addrs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1189 case TGSI_FILE_OUTPUT
:
1190 /* vertex/fragment output vars can be read too */
1191 chan
->u
[0] = mach
->Outputs
[index
->i
[0]].xyzw
[swizzle
].u
[0];
1192 chan
->u
[1] = mach
->Outputs
[index
->i
[1]].xyzw
[swizzle
].u
[1];
1193 chan
->u
[2] = mach
->Outputs
[index
->i
[2]].xyzw
[swizzle
].u
[2];
1194 chan
->u
[3] = mach
->Outputs
[index
->i
[3]].xyzw
[swizzle
].u
[3];
1202 case TGSI_EXTSWIZZLE_ZERO
:
1203 *chan
= mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
];
1206 case TGSI_EXTSWIZZLE_ONE
:
1207 *chan
= mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
];
1217 const struct tgsi_exec_machine
*mach
,
1218 union tgsi_exec_channel
*chan
,
1219 const struct tgsi_full_src_register
*reg
,
1220 const uint chan_index
)
1222 union tgsi_exec_channel index
;
1225 /* We start with a direct index into a register file.
1229 * file = SrcRegister.File
1230 * [1] = SrcRegister.Index
1235 index
.i
[3] = reg
->SrcRegister
.Index
;
1237 /* There is an extra source register that indirectly subscripts
1238 * a register file. The direct index now becomes an offset
1239 * that is being added to the indirect register.
1243 * ind = SrcRegisterInd.File
1244 * [2] = SrcRegisterInd.Index
1245 * .x = SrcRegisterInd.SwizzleX
1247 if (reg
->SrcRegister
.Indirect
) {
1248 union tgsi_exec_channel index2
;
1249 union tgsi_exec_channel indir_index
;
1250 const uint execmask
= mach
->ExecMask
;
1253 /* which address register (always zero now) */
1257 index2
.i
[3] = reg
->SrcRegisterInd
.Index
;
1259 /* get current value of address register[swizzle] */
1260 swizzle
= tgsi_util_get_src_register_swizzle( ®
->SrcRegisterInd
, CHAN_X
);
1261 fetch_src_file_channel(
1263 reg
->SrcRegisterInd
.File
,
1268 /* add value of address register to the offset */
1269 index
.i
[0] += (int) indir_index
.f
[0];
1270 index
.i
[1] += (int) indir_index
.f
[1];
1271 index
.i
[2] += (int) indir_index
.f
[2];
1272 index
.i
[3] += (int) indir_index
.f
[3];
1274 /* for disabled execution channels, zero-out the index to
1275 * avoid using a potential garbage value.
1277 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1278 if ((execmask
& (1 << i
)) == 0)
1283 /* There is an extra source register that is a second
1284 * subscript to a register file. Effectively it means that
1285 * the register file is actually a 2D array of registers.
1287 * file[1][3] == file[1*sizeof(file[1])+3],
1289 * [3] = SrcRegisterDim.Index
1291 if (reg
->SrcRegister
.Dimension
) {
1292 /* The size of the first-order array depends on the register file type.
1293 * We need to multiply the index to the first array to get an effective,
1294 * "flat" index that points to the beginning of the second-order array.
1296 switch (reg
->SrcRegister
.File
) {
1297 case TGSI_FILE_INPUT
:
1298 index
.i
[0] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1299 index
.i
[1] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1300 index
.i
[2] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1301 index
.i
[3] *= TGSI_EXEC_MAX_INPUT_ATTRIBS
;
1303 case TGSI_FILE_CONSTANT
:
1304 index
.i
[0] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1305 index
.i
[1] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1306 index
.i
[2] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1307 index
.i
[3] *= TGSI_EXEC_MAX_CONST_BUFFER
;
1313 index
.i
[0] += reg
->SrcRegisterDim
.Index
;
1314 index
.i
[1] += reg
->SrcRegisterDim
.Index
;
1315 index
.i
[2] += reg
->SrcRegisterDim
.Index
;
1316 index
.i
[3] += reg
->SrcRegisterDim
.Index
;
1318 /* Again, the second subscript index can be addressed indirectly
1319 * identically to the first one.
1320 * Nothing stops us from indirectly addressing the indirect register,
1321 * but there is no need for that, so we won't exercise it.
1323 * file[1][ind[4].y+3],
1325 * ind = SrcRegisterDimInd.File
1326 * [4] = SrcRegisterDimInd.Index
1327 * .y = SrcRegisterDimInd.SwizzleX
1329 if (reg
->SrcRegisterDim
.Indirect
) {
1330 union tgsi_exec_channel index2
;
1331 union tgsi_exec_channel indir_index
;
1332 const uint execmask
= mach
->ExecMask
;
1338 index2
.i
[3] = reg
->SrcRegisterDimInd
.Index
;
1340 swizzle
= tgsi_util_get_src_register_swizzle( ®
->SrcRegisterDimInd
, CHAN_X
);
1341 fetch_src_file_channel(
1343 reg
->SrcRegisterDimInd
.File
,
1348 index
.i
[0] += (int) indir_index
.f
[0];
1349 index
.i
[1] += (int) indir_index
.f
[1];
1350 index
.i
[2] += (int) indir_index
.f
[2];
1351 index
.i
[3] += (int) indir_index
.f
[3];
1353 /* for disabled execution channels, zero-out the index to
1354 * avoid using a potential garbage value.
1356 for (i
= 0; i
< QUAD_SIZE
; i
++) {
1357 if ((execmask
& (1 << i
)) == 0)
1362 /* If by any chance there was a need for a 3D array of register
1363 * files, we would have to check whether SrcRegisterDim is followed
1364 * by a dimension register and continue the saga.
1368 swizzle
= tgsi_util_get_full_src_register_extswizzle( reg
, chan_index
);
1369 fetch_src_file_channel(
1371 reg
->SrcRegister
.File
,
1376 switch (tgsi_util_get_full_src_register_sign_mode( reg
, chan_index
)) {
1377 case TGSI_UTIL_SIGN_CLEAR
:
1378 micro_abs( chan
, chan
);
1381 case TGSI_UTIL_SIGN_SET
:
1382 micro_abs( chan
, chan
);
1383 micro_neg( chan
, chan
);
1386 case TGSI_UTIL_SIGN_TOGGLE
:
1387 micro_neg( chan
, chan
);
1390 case TGSI_UTIL_SIGN_KEEP
:
1394 if (reg
->SrcRegisterExtMod
.Complement
) {
1395 micro_sub( chan
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], chan
);
1401 struct tgsi_exec_machine
*mach
,
1402 const union tgsi_exec_channel
*chan
,
1403 const struct tgsi_full_dst_register
*reg
,
1404 const struct tgsi_full_instruction
*inst
,
1408 union tgsi_exec_channel null
;
1409 union tgsi_exec_channel
*dst
;
1410 uint execmask
= mach
->ExecMask
;
1411 int offset
= 0; /* indirection offset */
1415 check_inf_or_nan(chan
);
1418 /* There is an extra source register that indirectly subscripts
1419 * a register file. The direct index now becomes an offset
1420 * that is being added to the indirect register.
1424 * ind = DstRegisterInd.File
1425 * [2] = DstRegisterInd.Index
1426 * .x = DstRegisterInd.SwizzleX
1428 if (reg
->DstRegister
.Indirect
) {
1429 union tgsi_exec_channel index
;
1430 union tgsi_exec_channel indir_index
;
1433 /* which address register (always zero for now) */
1437 index
.i
[3] = reg
->DstRegisterInd
.Index
;
1439 /* get current value of address register[swizzle] */
1440 swizzle
= tgsi_util_get_src_register_swizzle( ®
->DstRegisterInd
, CHAN_X
);
1442 /* fetch values from the address/indirection register */
1443 fetch_src_file_channel(
1445 reg
->DstRegisterInd
.File
,
1450 /* save indirection offset */
1451 offset
= (int) indir_index
.f
[0];
1454 switch (reg
->DstRegister
.File
) {
1455 case TGSI_FILE_NULL
:
1459 case TGSI_FILE_OUTPUT
:
1460 index
= mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0]
1461 + reg
->DstRegister
.Index
;
1462 dst
= &mach
->Outputs
[offset
+ index
].xyzw
[chan_index
];
1465 case TGSI_FILE_TEMPORARY
:
1466 index
= reg
->DstRegister
.Index
;
1467 assert( index
< TGSI_EXEC_NUM_TEMPS
);
1468 dst
= &mach
->Temps
[offset
+ index
].xyzw
[chan_index
];
1471 case TGSI_FILE_ADDRESS
:
1472 index
= reg
->DstRegister
.Index
;
1473 dst
= &mach
->Addrs
[index
].xyzw
[chan_index
];
1481 if (inst
->InstructionExtNv
.CondFlowEnable
) {
1482 union tgsi_exec_channel
*cc
= &mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
];
1488 /* Only CC0 supported.
1490 assert( inst
->InstructionExtNv
.CondFlowIndex
< 1 );
1492 switch (chan_index
) {
1494 swizzle
= inst
->InstructionExtNv
.CondSwizzleX
;
1497 swizzle
= inst
->InstructionExtNv
.CondSwizzleY
;
1500 swizzle
= inst
->InstructionExtNv
.CondSwizzleZ
;
1503 swizzle
= inst
->InstructionExtNv
.CondSwizzleW
;
1511 case TGSI_SWIZZLE_X
:
1512 shift
= TGSI_EXEC_CC_X_SHIFT
;
1513 mask
= TGSI_EXEC_CC_X_MASK
;
1515 case TGSI_SWIZZLE_Y
:
1516 shift
= TGSI_EXEC_CC_Y_SHIFT
;
1517 mask
= TGSI_EXEC_CC_Y_MASK
;
1519 case TGSI_SWIZZLE_Z
:
1520 shift
= TGSI_EXEC_CC_Z_SHIFT
;
1521 mask
= TGSI_EXEC_CC_Z_MASK
;
1523 case TGSI_SWIZZLE_W
:
1524 shift
= TGSI_EXEC_CC_W_SHIFT
;
1525 mask
= TGSI_EXEC_CC_W_MASK
;
1532 switch (inst
->InstructionExtNv
.CondMask
) {
1534 test
= ~(TGSI_EXEC_CC_GT
<< shift
) & mask
;
1535 for (i
= 0; i
< QUAD_SIZE
; i
++)
1536 if (cc
->u
[i
] & test
)
1537 execmask
&= ~(1 << i
);
1541 test
= ~(TGSI_EXEC_CC_EQ
<< shift
) & mask
;
1542 for (i
= 0; i
< QUAD_SIZE
; i
++)
1543 if (cc
->u
[i
] & test
)
1544 execmask
&= ~(1 << i
);
1548 test
= ~(TGSI_EXEC_CC_LT
<< shift
) & mask
;
1549 for (i
= 0; i
< QUAD_SIZE
; i
++)
1550 if (cc
->u
[i
] & test
)
1551 execmask
&= ~(1 << i
);
1555 test
= ~((TGSI_EXEC_CC_GT
| TGSI_EXEC_CC_EQ
) << shift
) & mask
;
1556 for (i
= 0; i
< QUAD_SIZE
; i
++)
1557 if (cc
->u
[i
] & test
)
1558 execmask
&= ~(1 << i
);
1562 test
= ~((TGSI_EXEC_CC_LT
| TGSI_EXEC_CC_EQ
) << shift
) & mask
;
1563 for (i
= 0; i
< QUAD_SIZE
; i
++)
1564 if (cc
->u
[i
] & test
)
1565 execmask
&= ~(1 << i
);
1569 test
= ~((TGSI_EXEC_CC_GT
| TGSI_EXEC_CC_LT
| TGSI_EXEC_CC_UN
) << shift
) & mask
;
1570 for (i
= 0; i
< QUAD_SIZE
; i
++)
1571 if (cc
->u
[i
] & test
)
1572 execmask
&= ~(1 << i
);
1579 for (i
= 0; i
< QUAD_SIZE
; i
++)
1580 execmask
&= ~(1 << i
);
1589 switch (inst
->Instruction
.Saturate
) {
1591 for (i
= 0; i
< QUAD_SIZE
; i
++)
1592 if (execmask
& (1 << i
))
1593 dst
->i
[i
] = chan
->i
[i
];
1596 case TGSI_SAT_ZERO_ONE
:
1597 for (i
= 0; i
< QUAD_SIZE
; i
++)
1598 if (execmask
& (1 << i
)) {
1599 if (chan
->f
[i
] < 0.0f
)
1601 else if (chan
->f
[i
] > 1.0f
)
1604 dst
->i
[i
] = chan
->i
[i
];
1608 case TGSI_SAT_MINUS_PLUS_ONE
:
1609 for (i
= 0; i
< QUAD_SIZE
; i
++)
1610 if (execmask
& (1 << i
)) {
1611 if (chan
->f
[i
] < -1.0f
)
1613 else if (chan
->f
[i
] > 1.0f
)
1616 dst
->i
[i
] = chan
->i
[i
];
1624 if (inst
->InstructionExtNv
.CondDstUpdate
) {
1625 union tgsi_exec_channel
*cc
= &mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
];
1629 /* Only CC0 supported.
1631 assert( inst
->InstructionExtNv
.CondDstIndex
< 1 );
1633 switch (chan_index
) {
1635 shift
= TGSI_EXEC_CC_X_SHIFT
;
1636 mask
= ~TGSI_EXEC_CC_X_MASK
;
1639 shift
= TGSI_EXEC_CC_Y_SHIFT
;
1640 mask
= ~TGSI_EXEC_CC_Y_MASK
;
1643 shift
= TGSI_EXEC_CC_Z_SHIFT
;
1644 mask
= ~TGSI_EXEC_CC_Z_MASK
;
1647 shift
= TGSI_EXEC_CC_W_SHIFT
;
1648 mask
= ~TGSI_EXEC_CC_W_MASK
;
1655 for (i
= 0; i
< QUAD_SIZE
; i
++)
1656 if (execmask
& (1 << i
)) {
1658 if (dst
->f
[i
] < 0.0f
)
1659 cc
->u
[i
] |= TGSI_EXEC_CC_LT
<< shift
;
1660 else if (dst
->f
[i
] > 0.0f
)
1661 cc
->u
[i
] |= TGSI_EXEC_CC_GT
<< shift
;
1662 else if (dst
->f
[i
] == 0.0f
)
1663 cc
->u
[i
] |= TGSI_EXEC_CC_EQ
<< shift
;
1665 cc
->u
[i
] |= TGSI_EXEC_CC_UN
<< shift
;
1670 #define FETCH(VAL,INDEX,CHAN)\
1671 fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
1673 #define STORE(VAL,INDEX,CHAN)\
1674 store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
1678 * Execute ARB-style KIL which is predicated by a src register.
1679 * Kill fragment if any of the four values is less than zero.
1682 exec_kil(struct tgsi_exec_machine
*mach
,
1683 const struct tgsi_full_instruction
*inst
)
1687 uint kilmask
= 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1688 union tgsi_exec_channel r
[1];
1690 /* This mask stores component bits that were already tested. Note that
1691 * we test if the value is less than zero, so 1.0 and 0.0 need not to be
1693 uniquemask
= (1 << TGSI_EXTSWIZZLE_ZERO
) | (1 << TGSI_EXTSWIZZLE_ONE
);
1695 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1700 /* unswizzle channel */
1701 swizzle
= tgsi_util_get_full_src_register_extswizzle (
1702 &inst
->FullSrcRegisters
[0],
1705 /* check if the component has not been already tested */
1706 if (uniquemask
& (1 << swizzle
))
1708 uniquemask
|= 1 << swizzle
;
1710 FETCH(&r
[0], 0, chan_index
);
1711 for (i
= 0; i
< 4; i
++)
1712 if (r
[0].f
[i
] < 0.0f
)
1716 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1720 * Execute NVIDIA-style KIL which is predicated by a condition code.
1721 * Kill fragment if the condition code is TRUE.
1724 exec_kilp(struct tgsi_exec_machine
*mach
,
1725 const struct tgsi_full_instruction
*inst
)
1727 uint kilmask
; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1729 if (inst
->InstructionExtNv
.CondFlowEnable
) {
1735 swizzle
[0] = inst
->InstructionExtNv
.CondSwizzleX
;
1736 swizzle
[1] = inst
->InstructionExtNv
.CondSwizzleY
;
1737 swizzle
[2] = inst
->InstructionExtNv
.CondSwizzleZ
;
1738 swizzle
[3] = inst
->InstructionExtNv
.CondSwizzleW
;
1740 for (chan_index
= 0; chan_index
< 4; chan_index
++)
1744 for (i
= 0; i
< 4; i
++) {
1745 /* TODO: evaluate the condition code */
1752 /* "unconditional" kil */
1753 kilmask
= mach
->ExecMask
;
1755 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] |= kilmask
;
1760 * Fetch a four texture samples using STR texture coordinates.
1763 fetch_texel( struct tgsi_sampler
*sampler
,
1764 const union tgsi_exec_channel
*s
,
1765 const union tgsi_exec_channel
*t
,
1766 const union tgsi_exec_channel
*p
,
1767 float lodbias
, /* XXX should be float[4] */
1768 union tgsi_exec_channel
*r
,
1769 union tgsi_exec_channel
*g
,
1770 union tgsi_exec_channel
*b
,
1771 union tgsi_exec_channel
*a
)
1774 float rgba
[NUM_CHANNELS
][QUAD_SIZE
];
1776 sampler
->get_samples(sampler
, s
->f
, t
->f
, p
->f
, lodbias
, rgba
);
1778 for (j
= 0; j
< 4; j
++) {
1779 r
->f
[j
] = rgba
[0][j
];
1780 g
->f
[j
] = rgba
[1][j
];
1781 b
->f
[j
] = rgba
[2][j
];
1782 a
->f
[j
] = rgba
[3][j
];
1788 exec_tex(struct tgsi_exec_machine
*mach
,
1789 const struct tgsi_full_instruction
*inst
,
1793 const uint unit
= inst
->FullSrcRegisters
[1].SrcRegister
.Index
;
1794 union tgsi_exec_channel r
[4];
1798 /* debug_printf("Sampler %u unit %u\n", sampler, unit); */
1800 switch (inst
->InstructionExtTexture
.Texture
) {
1801 case TGSI_TEXTURE_1D
:
1802 case TGSI_TEXTURE_SHADOW1D
:
1804 FETCH(&r
[0], 0, CHAN_X
);
1807 FETCH(&r
[1], 0, CHAN_W
);
1808 micro_div( &r
[0], &r
[0], &r
[1] );
1812 FETCH(&r
[1], 0, CHAN_W
);
1813 lodBias
= r
[2].f
[0];
1818 fetch_texel(mach
->Samplers
[unit
],
1819 &r
[0], &ZeroVec
, &ZeroVec
, lodBias
, /* S, T, P, BIAS */
1820 &r
[0], &r
[1], &r
[2], &r
[3]); /* R, G, B, A */
1823 case TGSI_TEXTURE_2D
:
1824 case TGSI_TEXTURE_RECT
:
1825 case TGSI_TEXTURE_SHADOW2D
:
1826 case TGSI_TEXTURE_SHADOWRECT
:
1828 FETCH(&r
[0], 0, CHAN_X
);
1829 FETCH(&r
[1], 0, CHAN_Y
);
1830 FETCH(&r
[2], 0, CHAN_Z
);
1833 FETCH(&r
[3], 0, CHAN_W
);
1834 micro_div( &r
[0], &r
[0], &r
[3] );
1835 micro_div( &r
[1], &r
[1], &r
[3] );
1836 micro_div( &r
[2], &r
[2], &r
[3] );
1840 FETCH(&r
[3], 0, CHAN_W
);
1841 lodBias
= r
[3].f
[0];
1846 fetch_texel(mach
->Samplers
[unit
],
1847 &r
[0], &r
[1], &r
[2], lodBias
, /* inputs */
1848 &r
[0], &r
[1], &r
[2], &r
[3]); /* outputs */
1851 case TGSI_TEXTURE_3D
:
1852 case TGSI_TEXTURE_CUBE
:
1854 FETCH(&r
[0], 0, CHAN_X
);
1855 FETCH(&r
[1], 0, CHAN_Y
);
1856 FETCH(&r
[2], 0, CHAN_Z
);
1859 FETCH(&r
[3], 0, CHAN_W
);
1860 micro_div( &r
[0], &r
[0], &r
[3] );
1861 micro_div( &r
[1], &r
[1], &r
[3] );
1862 micro_div( &r
[2], &r
[2], &r
[3] );
1866 FETCH(&r
[3], 0, CHAN_W
);
1867 lodBias
= r
[3].f
[0];
1872 fetch_texel(mach
->Samplers
[unit
],
1873 &r
[0], &r
[1], &r
[2], lodBias
,
1874 &r
[0], &r
[1], &r
[2], &r
[3]);
1881 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
1882 STORE( &r
[chan_index
], 0, chan_index
);
1888 * Evaluate a constant-valued coefficient at the position of the
1893 struct tgsi_exec_machine
*mach
,
1899 for( i
= 0; i
< QUAD_SIZE
; i
++ ) {
1900 mach
->Inputs
[attrib
].xyzw
[chan
].f
[i
] = mach
->InterpCoefs
[attrib
].a0
[chan
];
1905 * Evaluate a linear-valued coefficient at the position of the
1910 struct tgsi_exec_machine
*mach
,
1914 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1915 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1916 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1917 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1918 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1919 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
;
1920 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = a0
+ dadx
;
1921 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = a0
+ dady
;
1922 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = a0
+ dadx
+ dady
;
1926 * Evaluate a perspective-valued coefficient at the position of the
1930 eval_perspective_coef(
1931 struct tgsi_exec_machine
*mach
,
1935 const float x
= mach
->QuadPos
.xyzw
[0].f
[0];
1936 const float y
= mach
->QuadPos
.xyzw
[1].f
[0];
1937 const float dadx
= mach
->InterpCoefs
[attrib
].dadx
[chan
];
1938 const float dady
= mach
->InterpCoefs
[attrib
].dady
[chan
];
1939 const float a0
= mach
->InterpCoefs
[attrib
].a0
[chan
] + dadx
* x
+ dady
* y
;
1940 const float *w
= mach
->QuadPos
.xyzw
[3].f
;
1941 /* divide by W here */
1942 mach
->Inputs
[attrib
].xyzw
[chan
].f
[0] = a0
/ w
[0];
1943 mach
->Inputs
[attrib
].xyzw
[chan
].f
[1] = (a0
+ dadx
) / w
[1];
1944 mach
->Inputs
[attrib
].xyzw
[chan
].f
[2] = (a0
+ dady
) / w
[2];
1945 mach
->Inputs
[attrib
].xyzw
[chan
].f
[3] = (a0
+ dadx
+ dady
) / w
[3];
1949 typedef void (* eval_coef_func
)(
1950 struct tgsi_exec_machine
*mach
,
1956 struct tgsi_exec_machine
*mach
,
1957 const struct tgsi_full_declaration
*decl
)
1959 if( mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
1960 if( decl
->Declaration
.File
== TGSI_FILE_INPUT
) {
1961 unsigned first
, last
, mask
;
1962 eval_coef_func eval
;
1964 first
= decl
->DeclarationRange
.First
;
1965 last
= decl
->DeclarationRange
.Last
;
1966 mask
= decl
->Declaration
.UsageMask
;
1968 switch( decl
->Declaration
.Interpolate
) {
1969 case TGSI_INTERPOLATE_CONSTANT
:
1970 eval
= eval_constant_coef
;
1973 case TGSI_INTERPOLATE_LINEAR
:
1974 eval
= eval_linear_coef
;
1977 case TGSI_INTERPOLATE_PERSPECTIVE
:
1978 eval
= eval_perspective_coef
;
1986 if( mask
== TGSI_WRITEMASK_XYZW
) {
1989 for( i
= first
; i
<= last
; i
++ ) {
1990 for( j
= 0; j
< NUM_CHANNELS
; j
++ ) {
1998 for( j
= 0; j
< NUM_CHANNELS
; j
++ ) {
1999 if( mask
& (1 << j
) ) {
2000 for( i
= first
; i
<= last
; i
++ ) {
2012 struct tgsi_exec_machine
*mach
,
2013 const struct tgsi_full_instruction
*inst
,
2017 union tgsi_exec_channel r
[10];
2021 switch (inst
->Instruction
.Opcode
) {
2022 case TGSI_OPCODE_ARL
:
2023 case TGSI_OPCODE_FLOOR
:
2024 /* TGSI_OPCODE_FLR */
2025 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2026 FETCH( &r
[0], 0, chan_index
);
2027 micro_flr( &r
[0], &r
[0] );
2028 STORE( &r
[0], 0, chan_index
);
2032 case TGSI_OPCODE_MOV
:
2033 case TGSI_OPCODE_SWZ
:
2034 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2035 FETCH( &r
[0], 0, chan_index
);
2036 STORE( &r
[0], 0, chan_index
);
2040 case TGSI_OPCODE_LIT
:
2041 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2042 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2045 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2046 FETCH( &r
[0], 0, CHAN_X
);
2047 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2048 micro_max( &r
[0], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2049 STORE( &r
[0], 0, CHAN_Y
);
2052 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2053 FETCH( &r
[1], 0, CHAN_Y
);
2054 micro_max( &r
[1], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2056 FETCH( &r
[2], 0, CHAN_W
);
2057 micro_min( &r
[2], &r
[2], &mach
->Temps
[TEMP_128_I
].xyzw
[TEMP_128_C
] );
2058 micro_max( &r
[2], &r
[2], &mach
->Temps
[TEMP_M128_I
].xyzw
[TEMP_M128_C
] );
2059 micro_pow( &r
[1], &r
[1], &r
[2] );
2060 micro_lt( &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2061 STORE( &r
[0], 0, CHAN_Z
);
2065 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2066 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2070 case TGSI_OPCODE_RCP
:
2071 /* TGSI_OPCODE_RECIP */
2072 FETCH( &r
[0], 0, CHAN_X
);
2073 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
2074 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2075 STORE( &r
[0], 0, chan_index
);
2079 case TGSI_OPCODE_RSQ
:
2080 /* TGSI_OPCODE_RECIPSQRT */
2081 FETCH( &r
[0], 0, CHAN_X
);
2082 micro_abs( &r
[0], &r
[0] );
2083 micro_sqrt( &r
[0], &r
[0] );
2084 micro_div( &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0] );
2085 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2086 STORE( &r
[0], 0, chan_index
);
2090 case TGSI_OPCODE_EXP
:
2091 FETCH( &r
[0], 0, CHAN_X
);
2092 micro_flr( &r
[1], &r
[0] ); /* r1 = floor(r0) */
2093 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2094 micro_exp2( &r
[2], &r
[1] ); /* r2 = 2 ^ r1 */
2095 STORE( &r
[2], 0, CHAN_X
); /* store r2 */
2097 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2098 micro_sub( &r
[2], &r
[0], &r
[1] ); /* r2 = r0 - r1 */
2099 STORE( &r
[2], 0, CHAN_Y
); /* store r2 */
2101 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2102 micro_exp2( &r
[2], &r
[0] ); /* r2 = 2 ^ r0 */
2103 STORE( &r
[2], 0, CHAN_Z
); /* store r2 */
2105 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2106 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2110 case TGSI_OPCODE_LOG
:
2111 FETCH( &r
[0], 0, CHAN_X
);
2112 micro_abs( &r
[2], &r
[0] ); /* r2 = abs(r0) */
2113 micro_lg2( &r
[1], &r
[2] ); /* r1 = lg2(r2) */
2114 micro_flr( &r
[0], &r
[1] ); /* r0 = floor(r1) */
2115 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2116 STORE( &r
[0], 0, CHAN_X
);
2118 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2119 micro_exp2( &r
[0], &r
[0] ); /* r0 = 2 ^ r0 */
2120 micro_div( &r
[0], &r
[2], &r
[0] ); /* r0 = r2 / r0 */
2121 STORE( &r
[0], 0, CHAN_Y
);
2123 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2124 STORE( &r
[1], 0, CHAN_Z
);
2126 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2127 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2131 case TGSI_OPCODE_MUL
:
2132 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
)
2134 FETCH(&r
[0], 0, chan_index
);
2135 FETCH(&r
[1], 1, chan_index
);
2137 micro_mul( &r
[0], &r
[0], &r
[1] );
2139 STORE(&r
[0], 0, chan_index
);
2143 case TGSI_OPCODE_ADD
:
2144 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2145 FETCH( &r
[0], 0, chan_index
);
2146 FETCH( &r
[1], 1, chan_index
);
2147 micro_add( &r
[0], &r
[0], &r
[1] );
2148 STORE( &r
[0], 0, chan_index
);
2152 case TGSI_OPCODE_DP3
:
2153 /* TGSI_OPCODE_DOT3 */
2154 FETCH( &r
[0], 0, CHAN_X
);
2155 FETCH( &r
[1], 1, CHAN_X
);
2156 micro_mul( &r
[0], &r
[0], &r
[1] );
2158 FETCH( &r
[1], 0, CHAN_Y
);
2159 FETCH( &r
[2], 1, CHAN_Y
);
2160 micro_mul( &r
[1], &r
[1], &r
[2] );
2161 micro_add( &r
[0], &r
[0], &r
[1] );
2163 FETCH( &r
[1], 0, CHAN_Z
);
2164 FETCH( &r
[2], 1, CHAN_Z
);
2165 micro_mul( &r
[1], &r
[1], &r
[2] );
2166 micro_add( &r
[0], &r
[0], &r
[1] );
2168 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2169 STORE( &r
[0], 0, chan_index
);
2173 case TGSI_OPCODE_DP4
:
2174 /* TGSI_OPCODE_DOT4 */
2175 FETCH(&r
[0], 0, CHAN_X
);
2176 FETCH(&r
[1], 1, CHAN_X
);
2178 micro_mul( &r
[0], &r
[0], &r
[1] );
2180 FETCH(&r
[1], 0, CHAN_Y
);
2181 FETCH(&r
[2], 1, CHAN_Y
);
2183 micro_mul( &r
[1], &r
[1], &r
[2] );
2184 micro_add( &r
[0], &r
[0], &r
[1] );
2186 FETCH(&r
[1], 0, CHAN_Z
);
2187 FETCH(&r
[2], 1, CHAN_Z
);
2189 micro_mul( &r
[1], &r
[1], &r
[2] );
2190 micro_add( &r
[0], &r
[0], &r
[1] );
2192 FETCH(&r
[1], 0, CHAN_W
);
2193 FETCH(&r
[2], 1, CHAN_W
);
2195 micro_mul( &r
[1], &r
[1], &r
[2] );
2196 micro_add( &r
[0], &r
[0], &r
[1] );
2198 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2199 STORE( &r
[0], 0, chan_index
);
2203 case TGSI_OPCODE_DST
:
2204 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2205 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_X
);
2208 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2209 FETCH( &r
[0], 0, CHAN_Y
);
2210 FETCH( &r
[1], 1, CHAN_Y
);
2211 micro_mul( &r
[0], &r
[0], &r
[1] );
2212 STORE( &r
[0], 0, CHAN_Y
);
2215 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2216 FETCH( &r
[0], 0, CHAN_Z
);
2217 STORE( &r
[0], 0, CHAN_Z
);
2220 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2221 FETCH( &r
[0], 1, CHAN_W
);
2222 STORE( &r
[0], 0, CHAN_W
);
2226 case TGSI_OPCODE_MIN
:
2227 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2228 FETCH(&r
[0], 0, chan_index
);
2229 FETCH(&r
[1], 1, chan_index
);
2231 /* XXX use micro_min()?? */
2232 micro_lt( &r
[0], &r
[0], &r
[1], &r
[0], &r
[1] );
2234 STORE(&r
[0], 0, chan_index
);
2238 case TGSI_OPCODE_MAX
:
2239 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2240 FETCH(&r
[0], 0, chan_index
);
2241 FETCH(&r
[1], 1, chan_index
);
2243 /* XXX use micro_max()?? */
2244 micro_lt( &r
[0], &r
[0], &r
[1], &r
[1], &r
[0] );
2246 STORE(&r
[0], 0, chan_index
);
2250 case TGSI_OPCODE_SLT
:
2251 /* TGSI_OPCODE_SETLT */
2252 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2253 FETCH( &r
[0], 0, chan_index
);
2254 FETCH( &r
[1], 1, chan_index
);
2255 micro_lt( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2256 STORE( &r
[0], 0, chan_index
);
2260 case TGSI_OPCODE_SGE
:
2261 /* TGSI_OPCODE_SETGE */
2262 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2263 FETCH( &r
[0], 0, chan_index
);
2264 FETCH( &r
[1], 1, chan_index
);
2265 micro_le( &r
[0], &r
[1], &r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2266 STORE( &r
[0], 0, chan_index
);
2270 case TGSI_OPCODE_MAD
:
2271 /* TGSI_OPCODE_MADD */
2272 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2273 FETCH( &r
[0], 0, chan_index
);
2274 FETCH( &r
[1], 1, chan_index
);
2275 micro_mul( &r
[0], &r
[0], &r
[1] );
2276 FETCH( &r
[1], 2, chan_index
);
2277 micro_add( &r
[0], &r
[0], &r
[1] );
2278 STORE( &r
[0], 0, chan_index
);
2282 case TGSI_OPCODE_SUB
:
2283 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2284 FETCH(&r
[0], 0, chan_index
);
2285 FETCH(&r
[1], 1, chan_index
);
2287 micro_sub( &r
[0], &r
[0], &r
[1] );
2289 STORE(&r
[0], 0, chan_index
);
2293 case TGSI_OPCODE_LERP
:
2294 /* TGSI_OPCODE_LRP */
2295 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2296 FETCH(&r
[0], 0, chan_index
);
2297 FETCH(&r
[1], 1, chan_index
);
2298 FETCH(&r
[2], 2, chan_index
);
2300 micro_sub( &r
[1], &r
[1], &r
[2] );
2301 micro_mul( &r
[0], &r
[0], &r
[1] );
2302 micro_add( &r
[0], &r
[0], &r
[2] );
2304 STORE(&r
[0], 0, chan_index
);
2308 case TGSI_OPCODE_CND
:
2309 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2310 FETCH(&r
[0], 0, chan_index
);
2311 FETCH(&r
[1], 1, chan_index
);
2312 FETCH(&r
[2], 2, chan_index
);
2313 micro_lt(&r
[0], &mach
->Temps
[TEMP_HALF_I
].xyzw
[TEMP_HALF_C
], &r
[2], &r
[0], &r
[1]);
2314 STORE(&r
[0], 0, chan_index
);
2318 case TGSI_OPCODE_CND0
:
2319 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2320 FETCH(&r
[0], 0, chan_index
);
2321 FETCH(&r
[1], 1, chan_index
);
2322 FETCH(&r
[2], 2, chan_index
);
2323 micro_le(&r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[2], &r
[0], &r
[1]);
2324 STORE(&r
[0], 0, chan_index
);
2328 case TGSI_OPCODE_DOT2ADD
:
2329 /* TGSI_OPCODE_DP2A */
2330 FETCH( &r
[0], 0, CHAN_X
);
2331 FETCH( &r
[1], 1, CHAN_X
);
2332 micro_mul( &r
[0], &r
[0], &r
[1] );
2334 FETCH( &r
[1], 0, CHAN_Y
);
2335 FETCH( &r
[2], 1, CHAN_Y
);
2336 micro_mul( &r
[1], &r
[1], &r
[2] );
2337 micro_add( &r
[0], &r
[0], &r
[1] );
2339 FETCH( &r
[2], 2, CHAN_X
);
2340 micro_add( &r
[0], &r
[0], &r
[2] );
2342 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2343 STORE( &r
[0], 0, chan_index
);
2347 case TGSI_OPCODE_INDEX
:
2348 /* XXX: considered for removal */
2352 case TGSI_OPCODE_NEGATE
:
2353 /* XXX: considered for removal */
2357 case TGSI_OPCODE_FRAC
:
2358 /* TGSI_OPCODE_FRC */
2359 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2360 FETCH( &r
[0], 0, chan_index
);
2361 micro_frc( &r
[0], &r
[0] );
2362 STORE( &r
[0], 0, chan_index
);
2366 case TGSI_OPCODE_CLAMP
:
2367 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2368 FETCH(&r
[0], 0, chan_index
);
2369 FETCH(&r
[1], 1, chan_index
);
2370 micro_max(&r
[0], &r
[0], &r
[1]);
2371 FETCH(&r
[1], 2, chan_index
);
2372 micro_min(&r
[0], &r
[0], &r
[1]);
2373 STORE(&r
[0], 0, chan_index
);
2377 case TGSI_OPCODE_ROUND
:
2378 case TGSI_OPCODE_ARR
:
2379 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2380 FETCH( &r
[0], 0, chan_index
);
2381 micro_rnd( &r
[0], &r
[0] );
2382 STORE( &r
[0], 0, chan_index
);
2386 case TGSI_OPCODE_EXPBASE2
:
2387 /* TGSI_OPCODE_EX2 */
2388 FETCH(&r
[0], 0, CHAN_X
);
2391 micro_exp2( &r
[0], &r
[0] );
2393 micro_pow( &r
[0], &mach
->Temps
[TEMP_2_I
].xyzw
[TEMP_2_C
], &r
[0] );
2396 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2397 STORE( &r
[0], 0, chan_index
);
2401 case TGSI_OPCODE_LOGBASE2
:
2402 /* TGSI_OPCODE_LG2 */
2403 FETCH( &r
[0], 0, CHAN_X
);
2404 micro_lg2( &r
[0], &r
[0] );
2405 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2406 STORE( &r
[0], 0, chan_index
);
2410 case TGSI_OPCODE_POWER
:
2411 /* TGSI_OPCODE_POW */
2412 FETCH(&r
[0], 0, CHAN_X
);
2413 FETCH(&r
[1], 1, CHAN_X
);
2415 micro_pow( &r
[0], &r
[0], &r
[1] );
2417 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2418 STORE( &r
[0], 0, chan_index
);
2422 case TGSI_OPCODE_CROSSPRODUCT
:
2423 /* TGSI_OPCODE_XPD */
2424 FETCH(&r
[0], 0, CHAN_Y
);
2425 FETCH(&r
[1], 1, CHAN_Z
);
2427 micro_mul( &r
[2], &r
[0], &r
[1] );
2429 FETCH(&r
[3], 0, CHAN_Z
);
2430 FETCH(&r
[4], 1, CHAN_Y
);
2432 micro_mul( &r
[5], &r
[3], &r
[4] );
2433 micro_sub( &r
[2], &r
[2], &r
[5] );
2435 if (IS_CHANNEL_ENABLED( *inst
, CHAN_X
)) {
2436 STORE( &r
[2], 0, CHAN_X
);
2439 FETCH(&r
[2], 1, CHAN_X
);
2441 micro_mul( &r
[3], &r
[3], &r
[2] );
2443 FETCH(&r
[5], 0, CHAN_X
);
2445 micro_mul( &r
[1], &r
[1], &r
[5] );
2446 micro_sub( &r
[3], &r
[3], &r
[1] );
2448 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Y
)) {
2449 STORE( &r
[3], 0, CHAN_Y
);
2452 micro_mul( &r
[5], &r
[5], &r
[4] );
2453 micro_mul( &r
[0], &r
[0], &r
[2] );
2454 micro_sub( &r
[5], &r
[5], &r
[0] );
2456 if (IS_CHANNEL_ENABLED( *inst
, CHAN_Z
)) {
2457 STORE( &r
[5], 0, CHAN_Z
);
2460 if (IS_CHANNEL_ENABLED( *inst
, CHAN_W
)) {
2461 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2465 case TGSI_OPCODE_MULTIPLYMATRIX
:
2466 /* XXX: considered for removal */
2470 case TGSI_OPCODE_ABS
:
2471 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2472 FETCH(&r
[0], 0, chan_index
);
2474 micro_abs( &r
[0], &r
[0] );
2476 STORE(&r
[0], 0, chan_index
);
2480 case TGSI_OPCODE_RCC
:
2481 FETCH(&r
[0], 0, CHAN_X
);
2482 micro_div(&r
[0], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &r
[0]);
2483 micro_float_clamp(&r
[0], &r
[0]);
2484 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2485 STORE(&r
[0], 0, chan_index
);
2489 case TGSI_OPCODE_DPH
:
2490 FETCH(&r
[0], 0, CHAN_X
);
2491 FETCH(&r
[1], 1, CHAN_X
);
2493 micro_mul( &r
[0], &r
[0], &r
[1] );
2495 FETCH(&r
[1], 0, CHAN_Y
);
2496 FETCH(&r
[2], 1, CHAN_Y
);
2498 micro_mul( &r
[1], &r
[1], &r
[2] );
2499 micro_add( &r
[0], &r
[0], &r
[1] );
2501 FETCH(&r
[1], 0, CHAN_Z
);
2502 FETCH(&r
[2], 1, CHAN_Z
);
2504 micro_mul( &r
[1], &r
[1], &r
[2] );
2505 micro_add( &r
[0], &r
[0], &r
[1] );
2507 FETCH(&r
[1], 1, CHAN_W
);
2509 micro_add( &r
[0], &r
[0], &r
[1] );
2511 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2512 STORE( &r
[0], 0, chan_index
);
2516 case TGSI_OPCODE_COS
:
2517 FETCH(&r
[0], 0, CHAN_X
);
2519 micro_cos( &r
[0], &r
[0] );
2521 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2522 STORE( &r
[0], 0, chan_index
);
2526 case TGSI_OPCODE_DDX
:
2527 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2528 FETCH( &r
[0], 0, chan_index
);
2529 micro_ddx( &r
[0], &r
[0] );
2530 STORE( &r
[0], 0, chan_index
);
2534 case TGSI_OPCODE_DDY
:
2535 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2536 FETCH( &r
[0], 0, chan_index
);
2537 micro_ddy( &r
[0], &r
[0] );
2538 STORE( &r
[0], 0, chan_index
);
2542 case TGSI_OPCODE_KILP
:
2543 exec_kilp (mach
, inst
);
2546 case TGSI_OPCODE_KIL
:
2547 exec_kil (mach
, inst
);
2550 case TGSI_OPCODE_PK2H
:
2554 case TGSI_OPCODE_PK2US
:
2558 case TGSI_OPCODE_PK4B
:
2562 case TGSI_OPCODE_PK4UB
:
2566 case TGSI_OPCODE_RFL
:
2567 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2568 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2569 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2570 /* r0 = dp3(src0, src0) */
2571 FETCH(&r
[2], 0, CHAN_X
);
2572 micro_mul(&r
[0], &r
[2], &r
[2]);
2573 FETCH(&r
[4], 0, CHAN_Y
);
2574 micro_mul(&r
[8], &r
[4], &r
[4]);
2575 micro_add(&r
[0], &r
[0], &r
[8]);
2576 FETCH(&r
[6], 0, CHAN_Z
);
2577 micro_mul(&r
[8], &r
[6], &r
[6]);
2578 micro_add(&r
[0], &r
[0], &r
[8]);
2580 /* r1 = dp3(src0, src1) */
2581 FETCH(&r
[3], 1, CHAN_X
);
2582 micro_mul(&r
[1], &r
[2], &r
[3]);
2583 FETCH(&r
[5], 1, CHAN_Y
);
2584 micro_mul(&r
[8], &r
[4], &r
[5]);
2585 micro_add(&r
[1], &r
[1], &r
[8]);
2586 FETCH(&r
[7], 1, CHAN_Z
);
2587 micro_mul(&r
[8], &r
[6], &r
[7]);
2588 micro_add(&r
[1], &r
[1], &r
[8]);
2590 /* r1 = 2 * r1 / r0 */
2591 micro_add(&r
[1], &r
[1], &r
[1]);
2592 micro_div(&r
[1], &r
[1], &r
[0]);
2594 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2595 micro_mul(&r
[2], &r
[2], &r
[1]);
2596 micro_sub(&r
[2], &r
[2], &r
[3]);
2597 STORE(&r
[2], 0, CHAN_X
);
2599 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2600 micro_mul(&r
[4], &r
[4], &r
[1]);
2601 micro_sub(&r
[4], &r
[4], &r
[5]);
2602 STORE(&r
[4], 0, CHAN_Y
);
2604 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2605 micro_mul(&r
[6], &r
[6], &r
[1]);
2606 micro_sub(&r
[6], &r
[6], &r
[7]);
2607 STORE(&r
[6], 0, CHAN_Z
);
2610 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2611 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2615 case TGSI_OPCODE_SEQ
:
2616 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2617 FETCH( &r
[0], 0, chan_index
);
2618 FETCH( &r
[1], 1, chan_index
);
2619 micro_eq( &r
[0], &r
[0], &r
[1],
2620 &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
],
2621 &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2622 STORE( &r
[0], 0, chan_index
);
2626 case TGSI_OPCODE_SFL
:
2627 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2628 STORE(&mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, chan_index
);
2632 case TGSI_OPCODE_SGT
:
2633 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2634 FETCH( &r
[0], 0, chan_index
);
2635 FETCH( &r
[1], 1, chan_index
);
2636 micro_le( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
] );
2637 STORE( &r
[0], 0, chan_index
);
2641 case TGSI_OPCODE_SIN
:
2642 FETCH( &r
[0], 0, CHAN_X
);
2643 micro_sin( &r
[0], &r
[0] );
2644 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2645 STORE( &r
[0], 0, chan_index
);
2649 case TGSI_OPCODE_SLE
:
2650 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2651 FETCH( &r
[0], 0, chan_index
);
2652 FETCH( &r
[1], 1, chan_index
);
2653 micro_le( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
] );
2654 STORE( &r
[0], 0, chan_index
);
2658 case TGSI_OPCODE_SNE
:
2659 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2660 FETCH( &r
[0], 0, chan_index
);
2661 FETCH( &r
[1], 1, chan_index
);
2662 micro_eq( &r
[0], &r
[0], &r
[1], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
] );
2663 STORE( &r
[0], 0, chan_index
);
2667 case TGSI_OPCODE_STR
:
2668 FOR_EACH_ENABLED_CHANNEL(*inst
, chan_index
) {
2669 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, chan_index
);
2673 case TGSI_OPCODE_TEX
:
2674 /* simple texture lookup */
2675 /* src[0] = texcoord */
2676 /* src[1] = sampler unit */
2677 exec_tex(mach
, inst
, FALSE
, FALSE
);
2680 case TGSI_OPCODE_TXB
:
2681 /* Texture lookup with lod bias */
2682 /* src[0] = texcoord (src[0].w = LOD bias) */
2683 /* src[1] = sampler unit */
2684 exec_tex(mach
, inst
, TRUE
, FALSE
);
2687 case TGSI_OPCODE_TXD
:
2688 /* Texture lookup with explict partial derivatives */
2689 /* src[0] = texcoord */
2690 /* src[1] = d[strq]/dx */
2691 /* src[2] = d[strq]/dy */
2692 /* src[3] = sampler unit */
2696 case TGSI_OPCODE_TXL
:
2697 /* Texture lookup with explit LOD */
2698 /* src[0] = texcoord (src[0].w = LOD) */
2699 /* src[1] = sampler unit */
2700 exec_tex(mach
, inst
, TRUE
, FALSE
);
2703 case TGSI_OPCODE_TXP
:
2704 /* Texture lookup with projection */
2705 /* src[0] = texcoord (src[0].w = projection) */
2706 /* src[1] = sampler unit */
2707 exec_tex(mach
, inst
, FALSE
, TRUE
);
2710 case TGSI_OPCODE_UP2H
:
2714 case TGSI_OPCODE_UP2US
:
2718 case TGSI_OPCODE_UP4B
:
2722 case TGSI_OPCODE_UP4UB
:
2726 case TGSI_OPCODE_X2D
:
2727 FETCH(&r
[0], 1, CHAN_X
);
2728 FETCH(&r
[1], 1, CHAN_Y
);
2729 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2730 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2731 FETCH(&r
[2], 2, CHAN_X
);
2732 micro_mul(&r
[2], &r
[2], &r
[0]);
2733 FETCH(&r
[3], 2, CHAN_Y
);
2734 micro_mul(&r
[3], &r
[3], &r
[1]);
2735 micro_add(&r
[2], &r
[2], &r
[3]);
2736 FETCH(&r
[3], 0, CHAN_X
);
2737 micro_add(&r
[2], &r
[2], &r
[3]);
2738 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2739 STORE(&r
[2], 0, CHAN_X
);
2741 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2742 STORE(&r
[2], 0, CHAN_Z
);
2745 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2746 IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2747 FETCH(&r
[2], 2, CHAN_Z
);
2748 micro_mul(&r
[2], &r
[2], &r
[0]);
2749 FETCH(&r
[3], 2, CHAN_W
);
2750 micro_mul(&r
[3], &r
[3], &r
[1]);
2751 micro_add(&r
[2], &r
[2], &r
[3]);
2752 FETCH(&r
[3], 0, CHAN_Y
);
2753 micro_add(&r
[2], &r
[2], &r
[3]);
2754 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2755 STORE(&r
[2], 0, CHAN_Y
);
2757 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2758 STORE(&r
[2], 0, CHAN_W
);
2763 case TGSI_OPCODE_ARA
:
2767 case TGSI_OPCODE_BRA
:
2771 case TGSI_OPCODE_CAL
:
2772 /* skip the call if no execution channels are enabled */
2773 if (mach
->ExecMask
) {
2776 /* push the Cond, Loop, Cont stacks */
2777 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2778 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2779 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2780 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
2781 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
2782 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
2784 assert(mach
->FuncStackTop
< TGSI_EXEC_MAX_CALL_NESTING
);
2785 mach
->FuncStack
[mach
->FuncStackTop
++] = mach
->FuncMask
;
2787 /* note that PC was already incremented above */
2788 mach
->CallStack
[mach
->CallStackTop
++] = *pc
;
2789 *pc
= inst
->InstructionExtLabel
.Label
;
2793 case TGSI_OPCODE_RET
:
2794 mach
->FuncMask
&= ~mach
->ExecMask
;
2795 UPDATE_EXEC_MASK(mach
);
2797 if (mach
->FuncMask
== 0x0) {
2798 /* really return now (otherwise, keep executing */
2800 if (mach
->CallStackTop
== 0) {
2801 /* returning from main() */
2805 *pc
= mach
->CallStack
[--mach
->CallStackTop
];
2807 /* pop the Cond, Loop, Cont stacks */
2808 assert(mach
->CondStackTop
> 0);
2809 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
2810 assert(mach
->LoopStackTop
> 0);
2811 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
2812 assert(mach
->ContStackTop
> 0);
2813 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
2814 assert(mach
->FuncStackTop
> 0);
2815 mach
->FuncMask
= mach
->FuncStack
[--mach
->FuncStackTop
];
2817 UPDATE_EXEC_MASK(mach
);
2821 case TGSI_OPCODE_SSG
:
2822 /* TGSI_OPCODE_SGN */
2823 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2824 FETCH( &r
[0], 0, chan_index
);
2825 micro_sgn( &r
[0], &r
[0] );
2826 STORE( &r
[0], 0, chan_index
);
2830 case TGSI_OPCODE_CMP
:
2831 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2832 FETCH(&r
[0], 0, chan_index
);
2833 FETCH(&r
[1], 1, chan_index
);
2834 FETCH(&r
[2], 2, chan_index
);
2836 micro_lt( &r
[0], &r
[0], &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], &r
[1], &r
[2] );
2838 STORE(&r
[0], 0, chan_index
);
2842 case TGSI_OPCODE_SCS
:
2843 if( IS_CHANNEL_ENABLED( *inst
, CHAN_X
) || IS_CHANNEL_ENABLED( *inst
, CHAN_Y
) ) {
2844 FETCH( &r
[0], 0, CHAN_X
);
2845 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2846 micro_cos(&r
[1], &r
[0]);
2847 STORE(&r
[1], 0, CHAN_X
);
2849 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2850 micro_sin(&r
[1], &r
[0]);
2851 STORE(&r
[1], 0, CHAN_Y
);
2854 if( IS_CHANNEL_ENABLED( *inst
, CHAN_Z
) ) {
2855 STORE( &mach
->Temps
[TEMP_0_I
].xyzw
[TEMP_0_C
], 0, CHAN_Z
);
2857 if( IS_CHANNEL_ENABLED( *inst
, CHAN_W
) ) {
2858 STORE( &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2862 case TGSI_OPCODE_NRM
:
2863 /* 3-component vector normalize */
2864 if(IS_CHANNEL_ENABLED(*inst
, CHAN_X
) ||
2865 IS_CHANNEL_ENABLED(*inst
, CHAN_Y
) ||
2866 IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2867 /* r3 = sqrt(dp3(src0, src0)) */
2868 FETCH(&r
[0], 0, CHAN_X
);
2869 micro_mul(&r
[3], &r
[0], &r
[0]);
2870 FETCH(&r
[1], 0, CHAN_Y
);
2871 micro_mul(&r
[4], &r
[1], &r
[1]);
2872 micro_add(&r
[3], &r
[3], &r
[4]);
2873 FETCH(&r
[2], 0, CHAN_Z
);
2874 micro_mul(&r
[4], &r
[2], &r
[2]);
2875 micro_add(&r
[3], &r
[3], &r
[4]);
2876 micro_sqrt(&r
[3], &r
[3]);
2878 if (IS_CHANNEL_ENABLED(*inst
, CHAN_X
)) {
2879 micro_div(&r
[0], &r
[0], &r
[3]);
2880 STORE(&r
[0], 0, CHAN_X
);
2882 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Y
)) {
2883 micro_div(&r
[1], &r
[1], &r
[3]);
2884 STORE(&r
[1], 0, CHAN_Y
);
2886 if (IS_CHANNEL_ENABLED(*inst
, CHAN_Z
)) {
2887 micro_div(&r
[2], &r
[2], &r
[3]);
2888 STORE(&r
[2], 0, CHAN_Z
);
2891 if (IS_CHANNEL_ENABLED(*inst
, CHAN_W
)) {
2892 STORE(&mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], 0, CHAN_W
);
2896 case TGSI_OPCODE_NRM4
:
2897 /* 4-component vector normalize */
2899 union tgsi_exec_channel tmp
, dot
;
2901 /* tmp = dp4(src0, src0): */
2902 FETCH( &r
[0], 0, CHAN_X
);
2903 micro_mul( &tmp
, &r
[0], &r
[0] );
2905 FETCH( &r
[1], 0, CHAN_Y
);
2906 micro_mul( &dot
, &r
[1], &r
[1] );
2907 micro_add( &tmp
, &tmp
, &dot
);
2909 FETCH( &r
[2], 0, CHAN_Z
);
2910 micro_mul( &dot
, &r
[2], &r
[2] );
2911 micro_add( &tmp
, &tmp
, &dot
);
2913 FETCH( &r
[3], 0, CHAN_W
);
2914 micro_mul( &dot
, &r
[3], &r
[3] );
2915 micro_add( &tmp
, &tmp
, &dot
);
2917 /* tmp = 1 / sqrt(tmp) */
2918 micro_sqrt( &tmp
, &tmp
);
2919 micro_div( &tmp
, &mach
->Temps
[TEMP_1_I
].xyzw
[TEMP_1_C
], &tmp
);
2921 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2922 /* chan = chan * tmp */
2923 micro_mul( &r
[chan_index
], &tmp
, &r
[chan_index
] );
2924 STORE( &r
[chan_index
], 0, chan_index
);
2929 case TGSI_OPCODE_DIV
:
2933 case TGSI_OPCODE_DP2
:
2934 FETCH( &r
[0], 0, CHAN_X
);
2935 FETCH( &r
[1], 1, CHAN_X
);
2936 micro_mul( &r
[0], &r
[0], &r
[1] );
2938 FETCH( &r
[1], 0, CHAN_Y
);
2939 FETCH( &r
[2], 1, CHAN_Y
);
2940 micro_mul( &r
[1], &r
[1], &r
[2] );
2941 micro_add( &r
[0], &r
[0], &r
[1] );
2943 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
2944 STORE( &r
[0], 0, chan_index
);
2948 case TGSI_OPCODE_IF
:
2950 assert(mach
->CondStackTop
< TGSI_EXEC_MAX_COND_NESTING
);
2951 mach
->CondStack
[mach
->CondStackTop
++] = mach
->CondMask
;
2952 FETCH( &r
[0], 0, CHAN_X
);
2953 /* update CondMask */
2955 mach
->CondMask
&= ~0x1;
2958 mach
->CondMask
&= ~0x2;
2961 mach
->CondMask
&= ~0x4;
2964 mach
->CondMask
&= ~0x8;
2966 UPDATE_EXEC_MASK(mach
);
2967 /* Todo: If CondMask==0, jump to ELSE */
2970 case TGSI_OPCODE_ELSE
:
2971 /* invert CondMask wrt previous mask */
2974 assert(mach
->CondStackTop
> 0);
2975 prevMask
= mach
->CondStack
[mach
->CondStackTop
- 1];
2976 mach
->CondMask
= ~mach
->CondMask
& prevMask
;
2977 UPDATE_EXEC_MASK(mach
);
2978 /* Todo: If CondMask==0, jump to ENDIF */
2982 case TGSI_OPCODE_ENDIF
:
2984 assert(mach
->CondStackTop
> 0);
2985 mach
->CondMask
= mach
->CondStack
[--mach
->CondStackTop
];
2986 UPDATE_EXEC_MASK(mach
);
2989 case TGSI_OPCODE_END
:
2990 /* halt execution */
2994 case TGSI_OPCODE_REP
:
2998 case TGSI_OPCODE_ENDREP
:
3002 case TGSI_OPCODE_PUSHA
:
3006 case TGSI_OPCODE_POPA
:
3010 case TGSI_OPCODE_CEIL
:
3011 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3012 FETCH( &r
[0], 0, chan_index
);
3013 micro_ceil( &r
[0], &r
[0] );
3014 STORE( &r
[0], 0, chan_index
);
3018 case TGSI_OPCODE_I2F
:
3019 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3020 FETCH( &r
[0], 0, chan_index
);
3021 micro_i2f( &r
[0], &r
[0] );
3022 STORE( &r
[0], 0, chan_index
);
3026 case TGSI_OPCODE_NOT
:
3027 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3028 FETCH( &r
[0], 0, chan_index
);
3029 micro_not( &r
[0], &r
[0] );
3030 STORE( &r
[0], 0, chan_index
);
3034 case TGSI_OPCODE_TRUNC
:
3035 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3036 FETCH( &r
[0], 0, chan_index
);
3037 micro_trunc( &r
[0], &r
[0] );
3038 STORE( &r
[0], 0, chan_index
);
3042 case TGSI_OPCODE_SHL
:
3043 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3044 FETCH( &r
[0], 0, chan_index
);
3045 FETCH( &r
[1], 1, chan_index
);
3046 micro_shl( &r
[0], &r
[0], &r
[1] );
3047 STORE( &r
[0], 0, chan_index
);
3051 case TGSI_OPCODE_SHR
:
3052 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3053 FETCH( &r
[0], 0, chan_index
);
3054 FETCH( &r
[1], 1, chan_index
);
3055 micro_ishr( &r
[0], &r
[0], &r
[1] );
3056 STORE( &r
[0], 0, chan_index
);
3060 case TGSI_OPCODE_AND
:
3061 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3062 FETCH( &r
[0], 0, chan_index
);
3063 FETCH( &r
[1], 1, chan_index
);
3064 micro_and( &r
[0], &r
[0], &r
[1] );
3065 STORE( &r
[0], 0, chan_index
);
3069 case TGSI_OPCODE_OR
:
3070 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3071 FETCH( &r
[0], 0, chan_index
);
3072 FETCH( &r
[1], 1, chan_index
);
3073 micro_or( &r
[0], &r
[0], &r
[1] );
3074 STORE( &r
[0], 0, chan_index
);
3078 case TGSI_OPCODE_MOD
:
3082 case TGSI_OPCODE_XOR
:
3083 FOR_EACH_ENABLED_CHANNEL( *inst
, chan_index
) {
3084 FETCH( &r
[0], 0, chan_index
);
3085 FETCH( &r
[1], 1, chan_index
);
3086 micro_xor( &r
[0], &r
[0], &r
[1] );
3087 STORE( &r
[0], 0, chan_index
);
3091 case TGSI_OPCODE_SAD
:
3095 case TGSI_OPCODE_TXF
:
3099 case TGSI_OPCODE_TXQ
:
3103 case TGSI_OPCODE_EMIT
:
3104 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] += 16;
3105 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]]++;
3108 case TGSI_OPCODE_ENDPRIM
:
3109 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]++;
3110 mach
->Primitives
[mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0]] = 0;
3113 case TGSI_OPCODE_LOOP
:
3114 /* fall-through (for now) */
3115 case TGSI_OPCODE_BGNLOOP2
:
3116 /* push LoopMask and ContMasks */
3117 assert(mach
->LoopStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3118 mach
->LoopStack
[mach
->LoopStackTop
++] = mach
->LoopMask
;
3119 assert(mach
->ContStackTop
< TGSI_EXEC_MAX_LOOP_NESTING
);
3120 mach
->ContStack
[mach
->ContStackTop
++] = mach
->ContMask
;
3123 case TGSI_OPCODE_ENDLOOP
:
3124 /* fall-through (for now at least) */
3125 case TGSI_OPCODE_ENDLOOP2
:
3126 /* Restore ContMask, but don't pop */
3127 assert(mach
->ContStackTop
> 0);
3128 mach
->ContMask
= mach
->ContStack
[mach
->ContStackTop
- 1];
3129 UPDATE_EXEC_MASK(mach
);
3130 if (mach
->ExecMask
) {
3131 /* repeat loop: jump to instruction just past BGNLOOP */
3132 *pc
= inst
->InstructionExtLabel
.Label
+ 1;
3135 /* exit loop: pop LoopMask */
3136 assert(mach
->LoopStackTop
> 0);
3137 mach
->LoopMask
= mach
->LoopStack
[--mach
->LoopStackTop
];
3139 assert(mach
->ContStackTop
> 0);
3140 mach
->ContMask
= mach
->ContStack
[--mach
->ContStackTop
];
3142 UPDATE_EXEC_MASK(mach
);
3145 case TGSI_OPCODE_BRK
:
3146 /* turn off loop channels for each enabled exec channel */
3147 mach
->LoopMask
&= ~mach
->ExecMask
;
3148 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3149 UPDATE_EXEC_MASK(mach
);
3152 case TGSI_OPCODE_CONT
:
3153 /* turn off cont channels for each enabled exec channel */
3154 mach
->ContMask
&= ~mach
->ExecMask
;
3155 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3156 UPDATE_EXEC_MASK(mach
);
3159 case TGSI_OPCODE_BGNSUB
:
3163 case TGSI_OPCODE_ENDSUB
:
3167 case TGSI_OPCODE_NOISE1
:
3171 case TGSI_OPCODE_NOISE2
:
3175 case TGSI_OPCODE_NOISE3
:
3179 case TGSI_OPCODE_NOISE4
:
3183 case TGSI_OPCODE_NOP
:
3193 * Run TGSI interpreter.
3194 * \return bitmask of "alive" quad components
3197 tgsi_exec_machine_run( struct tgsi_exec_machine
*mach
)
3202 mach
->CondMask
= 0xf;
3203 mach
->LoopMask
= 0xf;
3204 mach
->ContMask
= 0xf;
3205 mach
->FuncMask
= 0xf;
3206 mach
->ExecMask
= 0xf;
3208 mach
->CondStackTop
= 0; /* temporarily subvert this assertion */
3209 assert(mach
->CondStackTop
== 0);
3210 assert(mach
->LoopStackTop
== 0);
3211 assert(mach
->ContStackTop
== 0);
3212 assert(mach
->CallStackTop
== 0);
3214 mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0] = 0;
3215 mach
->Temps
[TEMP_OUTPUT_I
].xyzw
[TEMP_OUTPUT_C
].u
[0] = 0;
3217 if( mach
->Processor
== TGSI_PROCESSOR_GEOMETRY
) {
3218 mach
->Temps
[TEMP_PRIMITIVE_I
].xyzw
[TEMP_PRIMITIVE_C
].u
[0] = 0;
3219 mach
->Primitives
[0] = 0;
3222 for (i
= 0; i
< QUAD_SIZE
; i
++) {
3223 mach
->Temps
[TEMP_CC_I
].xyzw
[TEMP_CC_C
].u
[i
] =
3224 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_X_SHIFT
) |
3225 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Y_SHIFT
) |
3226 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_Z_SHIFT
) |
3227 (TGSI_EXEC_CC_EQ
<< TGSI_EXEC_CC_W_SHIFT
);
3230 /* execute declarations (interpolants) */
3231 for (i
= 0; i
< mach
->NumDeclarations
; i
++) {
3232 exec_declaration( mach
, mach
->Declarations
+i
);
3235 /* execute instructions, until pc is set to -1 */
3237 assert(pc
< (int) mach
->NumInstructions
);
3238 exec_instruction( mach
, mach
->Instructions
+ pc
, &pc
);
3242 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3243 if (mach
->Processor
== TGSI_PROCESSOR_FRAGMENT
) {
3245 * Scale back depth component.
3247 for (i
= 0; i
< 4; i
++)
3248 mach
->Outputs
[0].xyzw
[2].f
[i
] *= ctx
->DrawBuffer
->_DepthMaxF
;
3252 return ~mach
->Temps
[TEMP_KILMASK_I
].xyzw
[TEMP_KILMASK_C
].u
[0];