src/gallium/auxiliary/tgsi/tgsi_exec.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2009-2010 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #ifndef TGSI_EXEC_H
  30 #define TGSI_EXEC_H
  31
  32 #include "pipe/p_compiler.h"
  33 #include "pipe/p_state.h"
  34 #include "pipe/p_shader_tokens.h"
  35
  36 #if defined __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 #define TGSI_CHAN_X 0
  41 #define TGSI_CHAN_Y 1
  42 #define TGSI_CHAN_Z 2
  43 #define TGSI_CHAN_W 3
  44
  45 #define TGSI_NUM_CHANNELS 4  /* R,G,B,A */
  46 #define TGSI_QUAD_SIZE    4  /* 4 pixel/quad */
  47
  48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
  49    for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
  50
  51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  52    ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
  53
  54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  55    if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
  56
  57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
  58    TGSI_FOR_EACH_CHANNEL( CHAN )\
  59       TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
  60
  61
  62 /**
  63   * Registers may be treated as float, signed int or unsigned int.
  64   */
  65 union tgsi_exec_channel
  66 {
  67    float    f[TGSI_QUAD_SIZE];
  68    int      i[TGSI_QUAD_SIZE];
  69    unsigned u[TGSI_QUAD_SIZE];
  70 };
  71
  72 /**
  73   * A vector[RGBA] of channels[4 pixels]
  74   */
  75 struct tgsi_exec_vector
  76 {
  77    union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
  78 };
  79
  80 /**
  81  * For fragment programs, information for computing fragment input
  82  * values from plane equation of the triangle/line.
  83  */
  84 struct tgsi_interp_coef
  85 {
  86    float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
  87    float dadx[TGSI_NUM_CHANNELS];
  88    float dady[TGSI_NUM_CHANNELS];
  89 };
  90
  91 enum tgsi_sampler_control
  92 {
  93    TGSI_SAMPLER_LOD_NONE,
  94    TGSI_SAMPLER_LOD_BIAS,
  95    TGSI_SAMPLER_LOD_EXPLICIT,
  96    TGSI_SAMPLER_LOD_ZERO,
  97    TGSI_SAMPLER_DERIVS_EXPLICIT,
  98    TGSI_SAMPLER_GATHER,
  99 };
 100
 101 struct tgsi_image_params {
 102    unsigned unit;
 103    unsigned tgsi_tex_instr;
 104    enum pipe_format format;
 105    unsigned execmask;
 106 };
 107
 108 struct tgsi_image {
 109    /* image interfaces */
 110    void (*load)(const struct tgsi_image *image,
 111                 const struct tgsi_image_params *params,
 112                 const int s[TGSI_QUAD_SIZE],
 113                 const int t[TGSI_QUAD_SIZE],
 114                 const int r[TGSI_QUAD_SIZE],
 115                 const int sample[TGSI_QUAD_SIZE],
 116                 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 117
 118    void (*store)(const struct tgsi_image *image,
 119                  const struct tgsi_image_params *params,
 120                  const int s[TGSI_QUAD_SIZE],
 121                  const int t[TGSI_QUAD_SIZE],
 122                  const int r[TGSI_QUAD_SIZE],
 123                  const int sample[TGSI_QUAD_SIZE],
 124                  float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 125
 126    void (*op)(const struct tgsi_image *image,
 127               const struct tgsi_image_params *params,
 128               unsigned opcode,
 129               const int s[TGSI_QUAD_SIZE],
 130               const int t[TGSI_QUAD_SIZE],
 131               const int r[TGSI_QUAD_SIZE],
 132               const int sample[TGSI_QUAD_SIZE],
 133               float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE],
 134               float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 135
 136    void (*get_dims)(const struct tgsi_image *image,
 137                     const struct tgsi_image_params *params,
 138                     int dims[4]);
 139 };
 140
 141 /**
 142  * Information for sampling textures, which must be implemented
 143  * by code outside the TGSI executor.
 144  */
 145 struct tgsi_sampler
 146 {
 147    /** Get samples for four fragments in a quad */
 148    /* this interface contains 5 sets of channels that vary
 149     * depending on the sampler.
 150     * s - the first texture coordinate for sampling.
 151     * t - the second texture coordinate for sampling - unused for 1D,
 152           layer for 1D arrays.
 153     * r - the third coordinate for sampling for 3D, cube, cube arrays,
 154     *     layer for 2D arrays. Compare value for 1D/2D shadows.
 155     * c0 - Compare value for shadow cube and shadow 2d arrays,
 156     *      layer for cube arrays.
 157     * derivs - explicit derivatives.
 158     * offset - texel offsets
 159     * lod - lod value, except for shadow cube arrays (compare value there).
 160     */
 161    void (*get_samples)(struct tgsi_sampler *sampler,
 162                        const unsigned sview_index,
 163                        const unsigned sampler_index,
 164                        const float s[TGSI_QUAD_SIZE],
 165                        const float t[TGSI_QUAD_SIZE],
 166                        const float r[TGSI_QUAD_SIZE],
 167                        const float c0[TGSI_QUAD_SIZE],
 168                        const float c1[TGSI_QUAD_SIZE],
 169                        float derivs[3][2][TGSI_QUAD_SIZE],
 170                        const int8_t offset[3],
 171                        enum tgsi_sampler_control control,
 172                        float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 173    void (*get_dims)(struct tgsi_sampler *sampler,
 174                     const unsigned sview_index,
 175                     int level, int dims[4]);
 176    void (*get_texel)(struct tgsi_sampler *sampler,
 177                      const unsigned sview_index,
 178                      const int i[TGSI_QUAD_SIZE],
 179                      const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
 180                      const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
 181                      float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 182    void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
 183                      const unsigned sview_index,
 184                      const unsigned sampler_index,
 185                      const float s[TGSI_QUAD_SIZE],
 186                      const float t[TGSI_QUAD_SIZE],
 187                      const float p[TGSI_QUAD_SIZE],
 188                      const float c0[TGSI_QUAD_SIZE],
 189                      const enum tgsi_sampler_control control,
 190                      float mipmap[TGSI_QUAD_SIZE],
 191                      float lod[TGSI_QUAD_SIZE]);
 192 };
 193
 194 #define TGSI_EXEC_NUM_TEMPS       4096
 195 #define TGSI_EXEC_NUM_IMMEDIATES  256
 196
 197 /*
 198  * Locations of various utility registers (_I = Index, _C = Channel)
 199  */
 200 #define TGSI_EXEC_TEMP_00000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 201 #define TGSI_EXEC_TEMP_00000000_C   0
 202
 203 #define TGSI_EXEC_TEMP_7FFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 204 #define TGSI_EXEC_TEMP_7FFFFFFF_C   1
 205
 206 #define TGSI_EXEC_TEMP_80000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 207 #define TGSI_EXEC_TEMP_80000000_C   2
 208
 209 #define TGSI_EXEC_TEMP_FFFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 210 #define TGSI_EXEC_TEMP_FFFFFFFF_C   3
 211
 212 #define TGSI_EXEC_TEMP_ONE_I        (TGSI_EXEC_NUM_TEMPS + 1)
 213 #define TGSI_EXEC_TEMP_ONE_C        0
 214
 215 #define TGSI_EXEC_TEMP_TWO_I        (TGSI_EXEC_NUM_TEMPS + 1)
 216 #define TGSI_EXEC_TEMP_TWO_C        1
 217
 218 #define TGSI_EXEC_TEMP_128_I        (TGSI_EXEC_NUM_TEMPS + 1)
 219 #define TGSI_EXEC_TEMP_128_C        2
 220
 221 #define TGSI_EXEC_TEMP_MINUS_128_I  (TGSI_EXEC_NUM_TEMPS + 1)
 222 #define TGSI_EXEC_TEMP_MINUS_128_C  3
 223
 224 #define TGSI_EXEC_TEMP_KILMASK_I    (TGSI_EXEC_NUM_TEMPS + 2)
 225 #define TGSI_EXEC_TEMP_KILMASK_C    0
 226
 227 #define TGSI_EXEC_TEMP_OUTPUT_I     (TGSI_EXEC_NUM_TEMPS + 2)
 228 #define TGSI_EXEC_TEMP_OUTPUT_C     1
 229
 230 #define TGSI_EXEC_TEMP_PRIMITIVE_I  (TGSI_EXEC_NUM_TEMPS + 2)
 231 #define TGSI_EXEC_TEMP_PRIMITIVE_C  2
 232
 233 #define TGSI_EXEC_TEMP_THREE_I      (TGSI_EXEC_NUM_TEMPS + 2)
 234 #define TGSI_EXEC_TEMP_THREE_C      3
 235
 236 #define TGSI_EXEC_TEMP_HALF_I       (TGSI_EXEC_NUM_TEMPS + 3)
 237 #define TGSI_EXEC_TEMP_HALF_C       0
 238
 239 /* 4 register buffer for various purposes */
 240 #define TGSI_EXEC_TEMP_R0           (TGSI_EXEC_NUM_TEMPS + 4)
 241 #define TGSI_EXEC_NUM_TEMP_R        4
 242
 243 #define TGSI_EXEC_TEMP_ADDR         (TGSI_EXEC_NUM_TEMPS + 8)
 244 #define TGSI_EXEC_NUM_ADDRS         3
 245
 246 /* predicate register */
 247 #define TGSI_EXEC_TEMP_P0           (TGSI_EXEC_NUM_TEMPS + 11)
 248 #define TGSI_EXEC_NUM_PREDS         1
 249
 250 #define TGSI_EXEC_NUM_TEMP_EXTRAS   12
 251
 252
 253
 254 #define TGSI_EXEC_MAX_NESTING  32
 255 #define TGSI_EXEC_MAX_COND_NESTING  TGSI_EXEC_MAX_NESTING
 256 #define TGSI_EXEC_MAX_LOOP_NESTING  TGSI_EXEC_MAX_NESTING
 257 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
 258 #define TGSI_EXEC_MAX_CALL_NESTING  TGSI_EXEC_MAX_NESTING
 259
 260 /* The maximum number of input attributes per vertex. For 2D
 261  * input register files, this is the stride between two 1D
 262  * arrays.
 263  */
 264 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
 265
 266 /* The maximum number of bytes per constant buffer.
 267  */
 268 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE  (4096 * sizeof(float[4]))
 269
 270 /* The maximum number of vertices per primitive */
 271 #define TGSI_MAX_PRIM_VERTICES 6
 272
 273 /* The maximum number of primitives to be generated */
 274 #define TGSI_MAX_PRIMITIVES 64
 275
 276 /* The maximum total number of vertices */
 277 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
 278
 279 #define TGSI_MAX_MISC_INPUTS 8
 280
 281 /** function call/activation record */
 282 struct tgsi_call_record
 283 {
 284    uint CondStackTop;
 285    uint LoopStackTop;
 286    uint ContStackTop;
 287    int SwitchStackTop;
 288    int BreakStackTop;
 289    uint ReturnAddr;
 290 };
 291
 292
 293 /* Switch-case block state. */
 294 struct tgsi_switch_record {
 295    uint mask;                          /**< execution mask */
 296    union tgsi_exec_channel selector;   /**< a value case statements are compared to */
 297    uint defaultMask;                   /**< non-execute mask for default case */
 298 };
 299
 300
 301 enum tgsi_break_type {
 302    TGSI_EXEC_BREAK_INSIDE_LOOP,
 303    TGSI_EXEC_BREAK_INSIDE_SWITCH
 304 };
 305
 306
 307 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
 308
 309
 310 /**
 311  * Run-time virtual machine state for executing TGSI shader.
 312  */
 313 struct tgsi_exec_machine
 314 {
 315    /* Total = program temporaries + internal temporaries
 316     */
 317    struct tgsi_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS +
 318                                        TGSI_EXEC_NUM_TEMP_EXTRAS];
 319
 320    float                         Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
 321
 322    float                         ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
 323
 324    struct tgsi_exec_vector       *Inputs;
 325    struct tgsi_exec_vector       *Outputs;
 326
 327    /* System values */
 328    unsigned                      SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
 329    union tgsi_exec_channel       SystemValue[TGSI_MAX_MISC_INPUTS];
 330
 331    struct tgsi_exec_vector       *Addrs;
 332    struct tgsi_exec_vector       *Predicates;
 333
 334    struct tgsi_sampler           *Sampler;
 335
 336    struct tgsi_image             *Image;
 337    unsigned                      ImmLimit;
 338
 339    const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
 340    unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
 341
 342    const struct tgsi_token       *Tokens;   /**< Declarations, instructions */
 343    unsigned                      Processor; /**< TGSI_PROCESSOR_x */
 344
 345    /* GEOMETRY processor only. */
 346    unsigned                      *Primitives;
 347    unsigned                       NumOutputs;
 348    unsigned                       MaxGeometryShaderOutputs;
 349    unsigned                       MaxOutputVertices;
 350
 351    /* FRAGMENT processor only. */
 352    const struct tgsi_interp_coef *InterpCoefs;
 353    struct tgsi_exec_vector       QuadPos;
 354    float                         Face;    /**< +1 if front facing, -1 if back facing */
 355    bool                          flatshade_color;
 356
 357    /* See GLSL 4.50 specification for definition of helper invocations */
 358    uint NonHelperMask;  /**< non-helpers */
 359    /* Conditional execution masks */
 360    uint CondMask;  /**< For IF/ELSE/ENDIF */
 361    uint LoopMask;  /**< For BGNLOOP/ENDLOOP */
 362    uint ContMask;  /**< For loop CONT statements */
 363    uint FuncMask;  /**< For function calls */
 364    uint ExecMask;  /**< = CondMask & LoopMask */
 365
 366    /* Current switch-case state. */
 367    struct tgsi_switch_record Switch;
 368
 369    /* Current break type. */
 370    enum tgsi_break_type BreakType;
 371
 372    /** Condition mask stack (for nested conditionals) */
 373    uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
 374    int CondStackTop;
 375
 376    /** Loop mask stack (for nested loops) */
 377    uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
 378    int LoopStackTop;
 379
 380    /** Loop label stack */
 381    uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
 382    int LoopLabelStackTop;
 383
 384    /** Loop continue mask stack (see comments in tgsi_exec.c) */
 385    uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
 386    int ContStackTop;
 387
 388    /** Switch case stack */
 389    struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
 390    int SwitchStackTop;
 391
 392    enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
 393    int BreakStackTop;
 394
 395    /** Function execution mask stack (for executing subroutine code) */
 396    uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
 397    int FuncStackTop;
 398
 399    /** Function call stack for saving/restoring the program counter */
 400    struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
 401    int CallStackTop;
 402
 403    struct tgsi_full_instruction *Instructions;
 404    uint NumInstructions;
 405
 406    struct tgsi_full_declaration *Declarations;
 407    uint NumDeclarations;
 408
 409    struct tgsi_declaration_sampler_view
 410       SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
 411
 412    boolean UsedGeometryShader;
 413 };
 414
 415 struct tgsi_exec_machine *
 416 tgsi_exec_machine_create( void );
 417
 418 void
 419 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
 420
 421
 422 void
 423 tgsi_exec_machine_bind_shader(
 424    struct tgsi_exec_machine *mach,
 425    const struct tgsi_token *tokens,
 426    struct tgsi_sampler *sampler,
 427    struct tgsi_image *image);
 428
 429 uint
 430 tgsi_exec_machine_run(
 431    struct tgsi_exec_machine *mach );
 432
 433
 434 void
 435 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
 436
 437
 438 boolean
 439 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
 440
 441
 442 extern void
 443 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
 444                                unsigned num_bufs,
 445                                const void **bufs,
 446                                const unsigned *buf_sizes);
 447
 448
 449 static inline int
 450 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
 451 {
 452    switch(param) {
 453    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 454    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 455    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 456    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 457       return INT_MAX;
 458    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 459       return TGSI_EXEC_MAX_NESTING;
 460    case PIPE_SHADER_CAP_MAX_INPUTS:
 461       return TGSI_EXEC_MAX_INPUT_ATTRIBS;
 462    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 463       return 32;
 464    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 465       return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
 466    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 467       return PIPE_MAX_CONSTANT_BUFFERS;
 468    case PIPE_SHADER_CAP_MAX_TEMPS:
 469       return TGSI_EXEC_NUM_TEMPS;
 470    case PIPE_SHADER_CAP_MAX_PREDS:
 471       return TGSI_EXEC_NUM_PREDS;
 472    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 473       return 1;
 474    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 475    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 476    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 477    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 478       return 1;
 479    case PIPE_SHADER_CAP_SUBROUTINES:
 480       return 1;
 481    case PIPE_SHADER_CAP_INTEGERS:
 482       return 1;
 483    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 484       return PIPE_MAX_SAMPLERS;
 485    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 486       return PIPE_MAX_SHADER_SAMPLER_VIEWS;
 487    case PIPE_SHADER_CAP_PREFERRED_IR:
 488       return PIPE_SHADER_IR_TGSI;
 489    case PIPE_SHADER_CAP_SUPPORTED_IRS:
 490       return 1 << PIPE_SHADER_IR_TGSI;
 491    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 492       return 1;
 493    case PIPE_SHADER_CAP_DOUBLES:
 494    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 495    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 496       return 1;
 497    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 498    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 499    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 500       return 0;
 501    case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 502       return PIPE_MAX_SHADER_IMAGES;
 503
 504    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 505       return 32;
 506    }
 507    /* if we get here, we missed a shader cap above (and should have seen
 508     * a compiler warning.)
 509     */
 510    return 0;
 511 }
 512
 513 #if defined __cplusplus
 514 } /* extern "C" */
 515 #endif
 516
 517 #endif /* TGSI_EXEC_H */